(q, in_restricted_usm, out_restricted_usm, size);
+ }
+
+ // The FPGA emulator does not accurately represent the hardware performance
+ // so we don't print performance results when running with the emulator
+ #ifndef FPGA_EMULATOR
+ // Compute the average latency across all iterations.
+ // We use the first iteration as a 'warmup' for the FPGA,
+ // so we ignore its results.
+ double usm_avg_lat =
+ std::accumulate(usm_latency.begin() + 1,
+ usm_latency.end(), 0.0) /
+ (iterations - 1);
+
+ std::cout << "Average latency for the restricted USM kernel: "
+ << usm_avg_lat << " ms\n";
+ #endif
+
+ // free the allocated host usm memory
+ // note that these are calls to sycl::free()
+ free(in_restricted_usm, q);
+ free(out_restricted_usm, q);
+
+ }
+ catch (exception const& e)
+ {
+ // Catches exceptions in the host code
+ std::cerr << "Caught a SYCL host exception:\n" << e.what() << "\n";
+
+ // Most likely the runtime couldn't find FPGA hardware!
+ if (e.get_cl_code() == CL_DEVICE_NOT_FOUND)
+ {
+ std::cerr << "If you are targeting an FPGA, please ensure that your "
+ "system has a correctly configured FPGA board.\n";
+ std::cerr << "Run sys_check in the oneAPI root directory to verify.\n";
+ std::cerr << "If you are targeting the FPGA emulator, compile with "
+ "-DFPGA_EMULATOR.\n";
+ }
+ std::terminate();
+ }
+
+ std::cout << "PASSED\n";
+ return 0;
+
+}
+
diff --git a/rolling-mean-filter/third-party-programs.txt b/rolling-mean-filter/third-party-programs.txt
new file mode 100644
index 0000000..90daff4
--- /dev/null
+++ b/rolling-mean-filter/third-party-programs.txt
@@ -0,0 +1,253 @@
+oneAPI Code Samples - Third Party Programs File
+
+This file contains the list of third party software ("third party programs")
+contained in the Intel software and their required notices and/or license
+terms. This third party software, even if included with the distribution of the
+Intel software, may be governed by separate license terms, including without
+limitation, third party license terms, other Intel software license terms, and
+open source software license terms. These separate license terms govern your use
+of the third party programs as set forth in the “third-party-programs.txt” or
+other similarly named text file.
+
+Third party programs and their corresponding required notices and/or license
+terms are listed below.
+
+--------------------------------------------------------------------------------
+
+1. Nothings STB Libraries
+
+stb/LICENSE
+
+ This software is available under 2 licenses -- choose whichever you prefer.
+ ------------------------------------------------------------------------------
+ ALTERNATIVE A - MIT License
+ Copyright (c) 2017 Sean Barrett
+ Permission is hereby granted, free of charge, to any person obtaining a copy of
+ this software and associated documentation files (the "Software"), to deal in
+ the Software without restriction, including without limitation the rights to
+ use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
+ of the Software, and to permit persons to whom the Software is furnished to do
+ so, subject to the following conditions:
+ The above copyright notice and this permission notice shall be included in all
+ copies or substantial portions of the Software.
+ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ SOFTWARE.
+ ------------------------------------------------------------------------------
+ ALTERNATIVE B - Public Domain (www.unlicense.org)
+ This is free and unencumbered software released into the public domain.
+ Anyone is free to copy, modify, publish, use, compile, sell, or distribute this
+ software, either in source code form or as a compiled binary, for any purpose,
+ commercial or non-commercial, and by any means.
+ In jurisdictions that recognize copyright laws, the author or authors of this
+ software dedicate any and all copyright interest in the software to the public
+ domain. We make this dedication for the benefit of the public at large and to
+ the detriment of our heirs and successors. We intend this dedication to be an
+ overt act of relinquishment in perpetuity of all present and future rights to
+ this software under copyright law.
+ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+--------------------------------------------------------------------------------
+
+2. FGPA example designs-gzip
+
+ SDL2.0
+
+zlib License
+
+
+ This software is provided 'as-is', without any express or implied
+ warranty. In no event will the authors be held liable for any damages
+ arising from the use of this software.
+
+ Permission is granted to anyone to use this software for any purpose,
+ including commercial applications, and to alter it and redistribute it
+ freely, subject to the following restrictions:
+
+ 1. The origin of this software must not be misrepresented; you must not
+ claim that you wrote the original software. If you use this software
+ in a product, an acknowledgment in the product documentation would be
+ appreciated but is not required.
+ 2. Altered source versions must be plainly marked as such, and must not be
+ misrepresented as being the original software.
+ 3. This notice may not be removed or altered from any source distribution.
+
+
+--------------------------------------------------------------------------------
+
+3. Nbody
+ (c) 2019 Fabio Baruffa
+
+ Plotly.js
+ Copyright (c) 2020 Plotly, Inc
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all
+copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+SOFTWARE.
+© 2020 GitHub, Inc.
+
+--------------------------------------------------------------------------------
+
+4. GNU-EFI
+ Copyright (c) 1998-2000 Intel Corporation
+
+The files in the "lib" and "inc" subdirectories are using the EFI Application
+Toolkit distributed by Intel at http://developer.intel.com/technology/efi
+
+This code is covered by the following agreement:
+
+Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
+
+Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
+
+Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
+
+THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
+INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
+FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE. THE EFI SPECIFICATION AND ALL OTHER INFORMATION
+ON THIS WEB SITE ARE PROVIDED "AS IS" WITH NO WARRANTIES, AND ARE SUBJECT
+TO CHANGE WITHOUT NOTICE.
+
+--------------------------------------------------------------------------------
+
+5. Edk2
+ Copyright (c) 2019, Intel Corporation. All rights reserved.
+
+ Edk2 Basetools
+ Copyright (c) 2019, Intel Corporation. All rights reserved.
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+--------------------------------------------------------------------------------
+
+6. Heat Transmission
+
+GNU LESSER GENERAL PUBLIC LICENSE
+Version 3, 29 June 2007
+
+Copyright © 2007 Free Software Foundation, Inc.
+
+Everyone is permitted to copy and distribute verbatim copies of this license document, but changing it is not allowed.
+
+This version of the GNU Lesser General Public License incorporates the terms and conditions of version 3 of the GNU General Public License, supplemented by the additional permissions listed below.
+
+0. Additional Definitions.
+As used herein, “this License” refers to version 3 of the GNU Lesser General Public License, and the “GNU GPL” refers to version 3 of the GNU General Public License.
+
+“The Library” refers to a covered work governed by this License, other than an Application or a Combined Work as defined below.
+
+An “Application” is any work that makes use of an interface provided by the Library, but which is not otherwise based on the Library. Defining a subclass of a class defined by the Library is deemed a mode of using an interface provided by the Library.
+
+A “Combined Work” is a work produced by combining or linking an Application with the Library. The particular version of the Library with which the Combined Work was made is also called the “Linked Version”.
+
+The “Minimal Corresponding Source” for a Combined Work means the Corresponding Source for the Combined Work, excluding any source code for portions of the Combined Work that, considered in isolation, are based on the Application, and not on the Linked Version.
+
+The “Corresponding Application Code” for a Combined Work means the object code and/or source code for the Application, including any data and utility programs needed for reproducing the Combined Work from the Application, but excluding the System Libraries of the Combined Work.
+
+1. Exception to Section 3 of the GNU GPL.
+You may convey a covered work under sections 3 and 4 of this License without being bound by section 3 of the GNU GPL.
+
+2. Conveying Modified Versions.
+If you modify a copy of the Library, and, in your modifications, a facility refers to a function or data to be supplied by an Application that uses the facility (other than as an argument passed when the facility is invoked), then you may convey a copy of the modified version:
+
+a) under this License, provided that you make a good faith effort to ensure that, in the event an Application does not supply the function or data, the facility still operates, and performs whatever part of its purpose remains meaningful, or
+b) under the GNU GPL, with none of the additional permissions of this License applicable to that copy.
+3. Object Code Incorporating Material from Library Header Files.
+The object code form of an Application may incorporate material from a header file that is part of the Library. You may convey such object code under terms of your choice, provided that, if the incorporated material is not limited to numerical parameters, data structure layouts and accessors, or small macros, inline functions and templates (ten or fewer lines in length), you do both of the following:
+
+a) Give prominent notice with each copy of the object code that the Library is used in it and that the Library and its use are covered by this License.
+b) Accompany the object code with a copy of the GNU GPL and this license document.
+4. Combined Works.
+You may convey a Combined Work under terms of your choice that, taken together, effectively do not restrict modification of the portions of the Library contained in the Combined Work and reverse engineering for debugging such modifications, if you also do each of the following:
+
+a) Give prominent notice with each copy of the Combined Work that the Library is used in it and that the Library and its use are covered by this License.
+b) Accompany the Combined Work with a copy of the GNU GPL and this license document.
+c) For a Combined Work that displays copyright notices during execution, include the copyright notice for the Library among these notices, as well as a reference directing the user to the copies of the GNU GPL and this license document.
+d) Do one of the following:
+0) Convey the Minimal Corresponding Source under the terms of this License, and the Corresponding Application Code in a form suitable for, and under terms that permit, the user to recombine or relink the Application with a modified version of the Linked Version to produce a modified Combined Work, in the manner specified by section 6 of the GNU GPL for conveying Corresponding Source.
+1) Use a suitable shared library mechanism for linking with the Library. A suitable mechanism is one that (a) uses at run time a copy of the Library already present on the user's computer system, and (b) will operate properly with a modified version of the Library that is interface-compatible with the Linked Version.
+e) Provide Installation Information, but only if you would otherwise be required to provide such information under section 6 of the GNU GPL, and only to the extent that such information is necessary to install and execute a modified version of the Combined Work produced by recombining or relinking the Application with a modified version of the Linked Version. (If you use option 4d0, the Installation Information must accompany the Minimal Corresponding Source and Corresponding Application Code. If you use option 4d1, you must provide the Installation Information in the manner specified by section 6 of the GNU GPL for conveying Corresponding Source.)
+5. Combined Libraries.
+You may place library facilities that are a work based on the Library side by side in a single library together with other library facilities that are not Applications and are not covered by this License, and convey such a combined library under terms of your choice, if you do both of the following:
+
+a) Accompany the combined library with a copy of the same work based on the Library, uncombined with any other library facilities, conveyed under the terms of this License.
+b) Give prominent notice with the combined library that part of it is a work based on the Library, and explaining where to find the accompanying uncombined form of the same work.
+6. Revised Versions of the GNU Lesser General Public License.
+The Free Software Foundation may publish revised and/or new versions of the GNU Lesser General Public License from time to time. Such new versions will be similar in spirit to the present version, but may differ in detail to address new problems or concerns.
+
+Each version is given a distinguishing version number. If the Library as you received it specifies that a certain numbered version of the GNU Lesser General Public License “or any later version” applies to it, you have the option of following the terms and conditions either of that published version or of any later version published by the Free Software Foundation. If the Library as you received it does not specify a version number of the GNU Lesser General Public License, you may choose any version of the GNU Lesser General Public License ever published by the Free Software Foundation.
+
+If the Library as you received it specifies that a proxy can decide whether future versions of the GNU Lesser General Public License shall apply, that proxy's public statement of acceptance of any version is permanent authorization for you to choose that version for the Library.
+
+--------------------------------------------------------------------------------
+7. Rodinia
+ Copyright (c)2008-2011 University of Virginia
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without modification, are permitted without royalty fees or other restrictions, provided that the following conditions are met:
+
+ * Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
+ * Neither the name of the University of Virginia, the Dept. of Computer Science, nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OF VIRGINIA OR THE SOFTWARE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+If you use this software or a modified version of it, please cite the most relevant among the following papers:
+
+ - M. A. Goodrum, M. J. Trotter, A. Aksel, S. T. Acton, and K. Skadron. Parallelization of Particle Filter Algorithms. In Proceedings of the 3rd Workshop on Emerging Applications and Many-core Architecture (EAMA), in conjunction with the IEEE/ACM International
+Symposium on Computer Architecture (ISCA), June 2010.
+
+ - S. Che, M. Boyer, J. Meng, D. Tarjan, J. W. Sheaffer, Sang-Ha Lee and K. Skadron.
+Rodinia: A Benchmark Suite for Heterogeneous Computing. IEEE International Symposium
+on Workload Characterization, Oct 2009.
+
+- J. Meng and K. Skadron. "Performance Modeling and Automatic Ghost Zone Optimization
+for Iterative Stencil Loops on GPUs." In Proceedings of the 23rd Annual ACM International
+Conference on Supercomputing (ICS), June 2009.
+
+- L.G. Szafaryn, K. Skadron and J. Saucerman. "Experiences Accelerating MATLAB Systems
+Biology Applications." in Workshop on Biomedicine in Computing (BiC) at the International
+Symposium on Computer Architecture (ISCA), June 2009.
+
+- M. Boyer, D. Tarjan, S. T. Acton, and K. Skadron. "Accelerating Leukocyte Tracking using CUDA:
+A Case Study in Leveraging Manycore Coprocessors." In Proceedings of the International Parallel
+and Distributed Processing Symposium (IPDPS), May 2009.
+
+- S. Che, M. Boyer, J. Meng, D. Tarjan, J. W. Sheaffer, and K. Skadron. "A Performance
+Study of General Purpose Applications on Graphics Processors using CUDA" Journal of
+Parallel and Distributed Computing, Elsevier, June 2008.
+
+--------------------------------------------------------------------------------
+Other names and brands may be claimed as the property of others.
+
+--------------------------------------------------------------------------------
\ No newline at end of file
diff --git a/sf-filter/CMakeLists.txt b/sf-filter/CMakeLists.txt
new file mode 100644
index 0000000..a870aa6
--- /dev/null
+++ b/sf-filter/CMakeLists.txt
@@ -0,0 +1,18 @@
+set(CMAKE_CXX_COMPILER "dpcpp")
+if(WIN32)
+ set(CMAKE_C_COMPILER "clang-cl")
+endif()
+
+cmake_minimum_required (VERSION 2.8)
+
+project(SFFilter)
+
+set(CMAKE_ARCHIVE_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR})
+set(CMAKE_LIBRARY_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR})
+set(CMAKE_RUNTIME_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR})
+
+# copy image files
+file(COPY ${CMAKE_CURRENT_SOURCE_DIR}/Images/ DESTINATION ${CMAKE_CURRENT_BINARY_DIR}/Images/)
+
+add_subdirectory (src)
+add_subdirectory (src/Utils)
\ No newline at end of file
diff --git a/sf-filter/Images/cat-face.bmp b/sf-filter/Images/cat-face.bmp
new file mode 100644
index 0000000..6ccd75c
Binary files /dev/null and b/sf-filter/Images/cat-face.bmp differ
diff --git a/sf-filter/Images/cat.bmp b/sf-filter/Images/cat.bmp
new file mode 100644
index 0000000..64b4512
Binary files /dev/null and b/sf-filter/Images/cat.bmp differ
diff --git a/sf-filter/Makefile b/sf-filter/Makefile
new file mode 100644
index 0000000..1f63e54
--- /dev/null
+++ b/sf-filter/Makefile
@@ -0,0 +1,23 @@
+CXX = dpcpp
+CXXFLAGS = -O2 -g -std=c++17
+INCDIR = ../image-conv/src/Utils
+
+BUFFER_EXE_NAME = sf-filter
+BUFFER_SOURCES = src/sf-filter.cpp ../image-conv/src/Utils/utils.c ../image-conv/src/Utils/gold.c ../image-conv/src/Utils/bmp-utils.c
+
+all: build_buffers
+
+build_buffers:
+ $(CXX) $(CXXFLAGS) -I$(INCDIR) -o $(BUFFER_EXE_NAME) $(BUFFER_SOURCES)
+
+build_usm:
+ $(CXX) $(CXXFLAGS) -o $(USM_EXE_NAME) $(USM_SOURCES)
+
+run:
+ ./$(BUFFER_EXE_NAME)
+
+run_usm:
+ ./$(USM_EXE_NAME)
+
+clean:
+ rm -rf $(BUFFER_EXE_NAME) $(USM_EXE_NAME)
diff --git a/sf-filter/Makefile.fpga b/sf-filter/Makefile.fpga
new file mode 100644
index 0000000..afb046e
--- /dev/null
+++ b/sf-filter/Makefile.fpga
@@ -0,0 +1,42 @@
+CXX := dpcpp
+CXXFLAGS = -O2 -g -std=c++17
+CXXINC = -Isrc/Utils -Isrc/PipeArray
+
+SRC := src/sf-filter.cpp src/Utils/bmp-utils.c src/Utils/gold.c src/Utils/utils.c
+
+.PHONY: fpga_emu run_emu clean
+
+fpga_emu: sf-filter.fpga_emu
+
+hw: sf-filter.fpga
+
+report: sf-filter_report.a
+
+profile: sf-filter.fpga_profile
+
+sf-filter.fpga_profile: $(SRC)
+ $(CXX) $(CXXFLAGS) $(CXXINC) -fintelfpga $^ -o $@ -Xshardware -Xsprofile -Xsprofile-shared-counters -DFPGA=1
+
+sf-filter.fpga_emu: $(SRC)
+ $(CXX) $(CXXFLAGS) $(CXXINC) -fintelfpga $^ -o $@ -DFPGA_EMULATOR=1
+
+a.o: $(SRC)
+ $(CXX) $(CXXFLAGS) -fintelfpga -c $^ -o $@ -DFPGA=1
+
+sf-filter.fpga: $(SRC)
+ $(CXX) $(CXXFLAGS) $(CXXINC) -fintelfpga $^ -o $@ -Xshardware -DFPGA=1
+
+run_emu: sf-filter.fpga_emu
+ ./sf-filter.fpga_emu
+
+run_hw: sf-filter.fpga
+ ./sf-filter.fpga
+
+dev.o: $(SRC)
+ $(CXX) $(CXXFLAGS) -fintelfpga -c $^ -o $@ -DFPGA=1
+
+sf-filter_report.a: dev.o
+ $(CXX) $(CXXFLAGS) -fintelfpga -fsycl-link $^ -o $@ -Xshardware
+
+clean:
+ rm -rf *.o *.d *.out *.mon *.emu *.aocr *.aoco *.prj *.fpga_emu *.fpga_emu_buffers sf-filter.fpga *.a
diff --git a/sf-filter/README.md b/sf-filter/README.md
new file mode 100644
index 0000000..6e13ac1
--- /dev/null
+++ b/sf-filter/README.md
@@ -0,0 +1,109 @@
+# `sf-filter` Sample
+
+The Sobel_Feldman operator runs two image convolution processes on an input image to detect the gradients in both the horizontal and vertical directions. This application is a very simple algorithm used to detect vertical and horizontal lines in imagery.
+
+| Optimized for | Description
+|:--- |:---
+| OS | Linux* Ubuntu* 18.04
+| Hardware | Skylake with GEN9 or newer, Intel(R) Programmable Acceleration Card with Intel(R) Arria(R) 10 GX FPGA
+| Software | Intel® oneAPI DPC++ Compiler (beta)
+
+## Purpose
+
+The Sobel-Feldman operator was designed as an introduction to programming in DPC++. Two different implementations of the Sobel-Feldman operator are designed in this application. The first uses the Image-Conv sample in this repo. The other implementation has two kernels running in parallel to compute the gradients for each pixel, and the forwards the pixel values, via pipes, to a consumer task. The consumer task calculates the Root Mean Sum for each pixel, and then sends the output image back to the host.
+
+## Key Implementation Details
+
+This 'sf-filter' example uses DPC++ buffers to store image data and a kernel function to perform convolution operation on the image data, which then gets piped to a consumer kernel function. The output of this kernel function is sent back to the host, where it gets written to a bmp file. A few utility functions, such as reading image data from bmp files or writing new image data to bmp files, are provided.
+
+<<<<<<< HEAD
+## Future Work
+
+The current implementation of this application only builds for the FPGA Emulator target. The current use of the PipeArray uses about 10x more ALUTs than any FPGA on Devcloud can support, however limiting this number causes the gradient producer kernels to deadlock the program. Some work should be done in the future to implement a better PipeArray.
+
+## License
+This code sample is licensed under MIT license.
+=======
+We include two implementations of image-conv kernels: buffer objects based and image objects based. Buffer objects are general memory objects that can be used to store arbitrary data structure, whereas image objects are opaque data types specifically for image data and related image processing operations.
+
+## License
+This code sample is licensed under MIT license.
+>>>>>>> origin/master
+
+### On a Linux* System
+
+**The project uses CMake. Perform the following steps to build different targets.**
+
+```
+ mkdir build
+ cd build
+ cmake ..
+ make
+ make report
+ make fpga
+ make fpga_profile
+```
+* make : by default, the emulation executables are built.
+* make report : generate static report on the FPGA resource utilization of the design.
+* make fpga : generate FPGA binary files for the designs. Will take a couple of hours.
+* make fpga_profile : generate FPGA binary to be used in run-time profiling. Will take a couple of hours.
+
+*A Makefile is still maintained in the directory, however, the usage of it is disencouraged.*
+
+## Running the Sample
+
+The executables (for emulation or for FPGA hardware) can be found in the build directory. Use the file name(s) to executable the samples. For example
+ ```
+ ./sf-filter.fpga_emu
+ ```
+or
+ ```
+ ./sf-filter.fpga
+ ```
+or
+ ```
+ ./sf-filter.fpga_profile
+ ```
+
+### Application Parameters
+There are no command line parameters for this sample. The input images are provided in "./Images" directory.
+
+### Example of Output
+
+$ ./sf-filter.fpga_emu
+1 found >>
+Platform: Intel(R) FPGA Emulation Platform for OpenCL(TM)
+Device: Intel(R) FPGA Emulation Device
+2 found >>
+Platform: Intel(R) FPGA SDK for OpenCL(TM)
+Device: pac_s10 : Intel PAC Platform (pac_ec00000)
+3 found >>
+Platform: Intel(R) OpenCL
+Device: Intel(R) Xeon(R) Platinum 8256 CPU @ 3.80GHz
+4 found >>Platform: SYCL host platform
+Device: SYCL host device
+Reading input image from ./Images/cat.bmp
+offset = 1078
+width = 1080
+height = 720
+bits per pixel = 8
+imageRows=720, imageCols=1080
+Running on device: Intel(R) FPGA Emulation Device Enqueuing producer 0...
+Enqueuing producer 1...
+Enqueuing consumer...
+Horizontal kernel compute time: 93.7039 ms.
+Vertical kernel compute time: 55.4169 ms.
+Consumer kernel compute time: 9.0035 ms.
+Total compute time: 197.006 ms.
+Total Image_Conv compute time: 393.862 ms.
+Output image saved as ./Images/filtered_cat.bmp.
+
+
+## Recorded Lectures
+
+A series of recorded lectures are provided to introduce the important concepts in this image-conv example for FPGAs. The videos can be found at the [DPC++ Tutorial playlist](https://youtube.com/playlist?list=PLZ9YeF_1_vF8RqYPNpHToklJcDRoVocU4) on Youtube and are linked individually below.
+
+[Introduction to Image Convolution](https://youtu.be/O_-sXNy23mw)
+
+[Image Objects in DPC++](https://youtu.be/Kb46lMLsve0)
+
diff --git a/sf-filter/src/CMakeLists.txt b/sf-filter/src/CMakeLists.txt
new file mode 100644
index 0000000..f974d8e
--- /dev/null
+++ b/sf-filter/src/CMakeLists.txt
@@ -0,0 +1,131 @@
+set(SOURCE_FILE sf-filter.cpp)
+set(TARGET_NAME sf-filter)
+set(EMULATOR_TARGET ${TARGET_NAME}.fpga_emu)
+set(FPGA_TARGET ${TARGET_NAME}.fpga)
+set(FPGA_PROFILE_TARGET ${TARGET_NAME}.fpga_profile)
+set(SOURCE_FILE_IMAGE sf-filter.cpp)
+
+# FPGA board selection
+set(A10_PAC_BOARD_NAME "intel_a10gx_pac:pac_a10")
+set(S10_PAC_BOARD_NAME "intel_s10sx_pac:pac_s10")
+set(SELECTED_BOARD ${A10_PAC_BOARD_NAME})
+if (NOT DEFINED FPGA_BOARD)
+ message(STATUS "\tFPGA_BOARD was not specified. Configuring the design to run on the Intel(R) Programmable Acceleration Card (PAC) with Intel Arria(R) 10 GX FPGA. Please refer to the README for information on board selection.")
+elseif(FPGA_BOARD STREQUAL ${A10_PAC_BOARD_NAME})
+ message(STATUS "\tConfiguring the design to run on the Intel(R) Programmable Acceleration Card (PAC) with Intel Arria(R) 10 GX FPGA.")
+elseif(FPGA_BOARD STREQUAL ${S10_PAC_BOARD_NAME})
+ message(STATUS "\tConfiguring the design to run on the Intel(R) Programmable Acceleration Card (PAC) D5005 (with Intel Stratix(R) 10 SX FPGA).")
+ set(SELECTED_BOARD ${S10_PAC_BOARD_NAME})
+else()
+ message(STATUS "\tAn invalid board name was passed in using the FPGA_BOARD flag. Configuring the design to run on the Intel(R) Programmable Acceleration Card (PAC) with Intel Arria(R) 10 GX FPGA. Please refer to the README for the list of valid board names.")
+endif()
+
+# Flags
+set(EMULATOR_COMPILE_FLAGS "-fintelfpga -DFPGA_EMULATOR")
+set(EMULATOR_LINK_FLAGS "-fintelfpga")
+set(HARDWARE_COMPILE_FLAGS "-fintelfpga -DFPGA")
+set(HARDWARE_LINK_FLAGS "-fintelfpga -Xshardware -Xsboard=${SELECTED_BOARD} ${USER_HARDWARE_FLAGS}")
+# use cmake -D USER_HARDWARE_FLAGS= to set extra flags for FPGA backend compilation
+set(HARDWARE_PROFILE_COMPILE_FLAGS "-fintelfpga -DFPGA_PROFILE")
+set(HARDWARE_PROFILE_LINK_FLAGS "-fintelfpga -Xshardware -Xsprofile -Xsprofile-shared-counters -Xsboard=${SELECTED_BOARD} ${USER_HARDWARE_FLAGS}")
+
+
+# FPGA emulator
+if(WIN32)
+ set(WIN_EMULATOR_TARGET ${EMULATOR_TARGET}.exe)
+ add_custom_target(fpga_emu DEPENDS ${WIN_EMULATOR_TARGET})
+ separate_arguments(WIN_EMULATOR_COMPILE_FLAGS WINDOWS_COMMAND "${EMULATOR_COMPILE_FLAGS}")
+ add_custom_command(OUTPUT ${WIN_EMULATOR_TARGET}
+ COMMAND ${CMAKE_CXX_COMPILER} /EHsc ${WIN_EMULATOR_COMPILE_FLAGS} ${CMAKE_CURRENT_SOURCE_DIR}/${SOURCE_FILE} -o ${CMAKE_BINARY_DIR}/${WIN_EMULATOR_TARGET}
+ DEPENDS ${SOURCE_FILE})
+else()
+ add_executable(${EMULATOR_TARGET} ${SOURCE_FILE})
+ add_custom_target(fpga_emu DEPENDS ${EMULATOR_TARGET})
+ set_target_properties(${EMULATOR_TARGET} PROPERTIES COMPILE_FLAGS ${EMULATOR_COMPILE_FLAGS})
+ set_target_properties(${EMULATOR_TARGET} PROPERTIES LINK_FLAGS ${EMULATOR_LINK_FLAGS})
+ # to link with functions in Utils library (definded in Utils/ folder)
+ target_link_libraries (${EMULATOR_TARGET} LINK_PUBLIC Utils)
+endif()
+
+# CPU or GPU that supports "image" APIs
+if(WIN32)
+ add_custom_target(nofpga COMMAND echo "Non-FPGA emulation on Windows. not tested. See README for details.")
+ set(WIN_EMULATOR_TARGET ${EMULATOR_TARGET}.exe)
+ add_custom_target(nofpga DEPENDS ${WIN_EMULATOR_TARGET})
+ separate_arguments(WIN_EMULATOR_COMPILE_FLAGS WINDOWS_COMMAND "${EMULATOR_COMPILE_FLAGS}")
+ add_custom_command(OUTPUT ${WIN_EMULATOR_TARGET}
+ COMMAND ${CMAKE_CXX_COMPILER} /EHsc ${WIN_EMULATOR_COMPILE_FLAGS} ${CMAKE_CURRENT_SOURCE_DIR}/${SOURCE_FILE} -o ${CMAKE_BINARY_DIR}/${WIN_EMULATOR_TARGET}
+ DEPENDS ${SOURCE_FILE})
+else()
+ add_executable(${TARGET_NAME} ${SOURCE_FILE_IMAGE})
+ add_custom_target(nofpga DEPENDS ${TARGET_NAME})
+ #set_target_properties(${EMULATOR_TARGET} PROPERTIES COMPILE_FLAGS ${EMULATOR_COMPILE_FLAGS})
+ #set_target_properties(${EMULATOR_TARGET} PROPERTIES LINK_FLAGS ${EMULATOR_LINK_FLAGS})
+ # to link with functions in Utils library (definded in Utils/ folder)
+ target_link_libraries (${TARGET_NAME} LINK_PUBLIC Utils)
+endif()
+
+# FPGA hardware
+if(WIN32)
+ add_custom_target(fpga COMMAND echo "An FPGA hardware target is not provided on Windows. See README for details.")
+else()
+ add_executable(${FPGA_TARGET} EXCLUDE_FROM_ALL ${SOURCE_FILE})
+ add_custom_target(fpga DEPENDS ${FPGA_TARGET})
+ target_include_directories(${FPGA_TARGET} PUBLIC
+ $)
+ set_target_properties(${FPGA_TARGET} PROPERTIES COMPILE_FLAGS ${HARDWARE_COMPILE_FLAGS})
+ set_target_properties(${FPGA_TARGET} PROPERTIES LINK_FLAGS ${HARDWARE_LINK_FLAGS})
+ # to link with functions in Utils library (definded in Utils/ folder)
+ target_link_libraries (${FPGA_TARGET} LINK_PUBLIC Utils)
+endif()
+
+# Generate report
+if(WIN32)
+ set(DEVICE_OBJ_FILE ${TARGET_NAME}_report.a)
+ add_custom_target(report DEPENDS ${DEVICE_OBJ_FILE})
+ separate_arguments(HARDWARE_LINK_FLAGS_LIST WINDOWS_COMMAND "${HARDWARE_LINK_FLAGS}")
+ add_custom_command(OUTPUT ${DEVICE_OBJ_FILE}
+ COMMAND ${CMAKE_CXX_COMPILER} /EHsc ${HARDWARE_LINK_FLAGS_LIST} -fsycl-link ${CMAKE_CURRENT_SOURCE_DIR}/${SOURCE_FILE} -o ${CMAKE_BINARY_DIR}/${DEVICE_OBJ_FILE}
+ DEPENDS ${SOURCE_FILE})
+else()
+#[[ foreach( testsourcefile ${SOURCE_FILES} )
+ # replace file suffix to create executable file name
+ string( REPLACE ".cpp" "_report.a" devobjfile ${testsourcefile} )
+ get_filename_component(barename ${testsourcefile} NAME_WE)
+ add_custom_target(${barename}.report DEPENDS ${devobjfile})
+ list(APPEND reportlist ${barename}.report)
+ configure_file(${CMAKE_CURRENT_SOURCE_DIR}/${testsourcefile} ${testsourcefile} COPYONLY)
+ separate_arguments(HARDWARE_LINK_FLAGS_LIST UNIX_COMMAND "${HARDWARE_LINK_FLAGS}")
+ separate_arguments(CMAKE_CXX_FLAGS_LIST UNIX_COMMAND "${CMAKE_CXX_FLAGS}")
+ add_custom_command(OUTPUT ${devobjfile}
+ COMMAND ${CMAKE_CXX_COMPILER} ${CMAKE_CXX_FLAGS_LIST} ${HARDWARE_LINK_FLAGS_LIST} -fsycl-link ${testsourcefile} -o ${CMAKE_BINARY_DIR}/${devobjfile}
+ DEPENDS ${testsourcefile})
+ endforeach( testsourcefile ${SOURCE_FILES} )
+ add_custom_target(report DEPENDS ${reportlist})
+]]
+
+ set(DEVICE_OBJ_FILE ${TARGET_NAME}_report.a)
+ add_custom_target(report DEPENDS ${DEVICE_OBJ_FILE})
+ configure_file(${CMAKE_CURRENT_SOURCE_DIR}/${SOURCE_FILE} ${SOURCE_FILE} COPYONLY)
+ separate_arguments(HARDWARE_LINK_FLAGS_LIST UNIX_COMMAND "${HARDWARE_LINK_FLAGS}")
+ separate_arguments(CMAKE_CXX_FLAGS_LIST UNIX_COMMAND "${CMAKE_CXX_FLAGS}")
+ list(APPEND CMAKE_CXX_FLAGS_LIST -I${CMAKE_CURRENT_SOURCE_DIR} -I${CMAKE_CURRENT_SOURCE_DIR}/Utils/)
+ add_custom_command(OUTPUT ${DEVICE_OBJ_FILE}
+ COMMAND ${CMAKE_CXX_COMPILER} ${CMAKE_CXX_FLAGS_LIST} ${HARDWARE_LINK_FLAGS_LIST} -fsycl-link ${SOURCE_FILE} -o ${CMAKE_BINARY_DIR}/${DEVICE_OBJ_FILE}
+ DEPENDS ${SOURCE_FILE})
+endif()
+
+# FPGA hardware profiling
+if(WIN32)
+ add_custom_target(fpga_profile COMMAND echo "An FPGA hardware target is not provided on Windows. See README for details.")
+else()
+ add_executable(${FPGA_PROFILE_TARGET} EXCLUDE_FROM_ALL ${SOURCE_FILE})
+ add_custom_target(fpga_profile DEPENDS ${FPGA_PROFILE_TARGET})
+ target_include_directories(${FPGA_PROFILE_TARGET} PUBLIC
+ $)
+ set_target_properties(${FPGA_PROFILE_TARGET} PROPERTIES COMPILE_FLAGS ${HARDWARE_PROFILE_COMPILE_FLAGS})
+ set_target_properties(${FPGA_PROFILE_TARGET} PROPERTIES LINK_FLAGS ${HARDWARE_PROFILE_LINK_FLAGS})
+ # to link with functions in Utils library (definded in Utils/ folder)
+ target_link_libraries (${FPGA_PROFILE_TARGET} LINK_PUBLIC Utils)
+endif()
+
diff --git a/sf-filter/src/Utils b/sf-filter/src/Utils
new file mode 120000
index 0000000..1e196aa
--- /dev/null
+++ b/sf-filter/src/Utils
@@ -0,0 +1 @@
+../../image-conv/src/Utils
\ No newline at end of file
diff --git a/sf-filter/src/pipe_array.hpp b/sf-filter/src/pipe_array.hpp
new file mode 100644
index 0000000..0f1ca1f
--- /dev/null
+++ b/sf-filter/src/pipe_array.hpp
@@ -0,0 +1,33 @@
+//==============================================================
+// Copyright Intel Corporation
+//
+// SPDX-License-Identifier: MIT
+// =============================================================
+#include
+#include
+#include
+
+#include "pipe_array_internal.hpp"
+
+template
+struct PipeArray {
+ PipeArray() = delete;
+
+ template
+ struct StructId;
+
+ template
+ struct VerifyIndices {
+ static_assert(sizeof...(idxs) == sizeof...(dims),
+ "Indexing into a PipeArray requires as many indices as "
+ "dimensions of the PipeArray.");
+ static_assert(VerifierDimLayer::template VerifierIdxLayer<
+ idxs...>::IsValid(),
+ "Index out of bounds");
+ using VerifiedPipe =
+ cl::sycl::INTEL::pipe, BaseTy, depth>;
+ };
+
+ template
+ using PipeAt = typename VerifyIndices::VerifiedPipe;
+};
diff --git a/sf-filter/src/pipe_array_internal.hpp b/sf-filter/src/pipe_array_internal.hpp
new file mode 100644
index 0000000..1b62f66
--- /dev/null
+++ b/sf-filter/src/pipe_array_internal.hpp
@@ -0,0 +1,26 @@
+//==============================================================
+// Copyright Intel Corporation
+//
+// SPDX-License-Identifier: MIT
+// =============================================================
+
+namespace {
+template
+struct VerifierDimLayer {
+ template
+ struct VerifierIdxLayer {
+ static constexpr bool IsValid() {
+ return idx1 < dim1 &&
+ (VerifierDimLayer::template VerifierIdxLayer<
+ idxs...>::IsValid());
+ }
+ };
+};
+template
+struct VerifierDimLayer {
+ template
+ struct VerifierIdxLayer {
+ static constexpr bool IsValid() { return idx < dim; }
+ };
+};
+} // namespace
diff --git a/sf-filter/src/sf-filter.cpp b/sf-filter/src/sf-filter.cpp
new file mode 100644
index 0000000..eec0d20
--- /dev/null
+++ b/sf-filter/src/sf-filter.cpp
@@ -0,0 +1,433 @@
+//***************************************************************************************
+// DPC++ Example
+//
+// Sobel-Feldman Filter with DPC++
+//
+// Author: Matthew Cloutier
+//
+//***************************************************************************************
+#include
+#include
+#include
+#include
+#include "dpc_common.hpp"
+#if FPGA || FPGA_EMULATOR || FPGA_PROFILE
+#include
+#endif
+
+using namespace sycl;
+
+// useful headers for image processing
+#include "bmp-utils.h"
+
+// pipe_array headers
+#include "pipe_array.hpp"
+
+// Debug flag for print statements
+static const bool debug = true;
+
+static const int sobelFilterWidth = 3;
+static float verticalSobelFilter[9] = {
+ 3.0f, 0.0f, -3.0f,
+ 10.0f, 0.0f, -10.0f,
+ 3.0f, 0.0f, -3.0f
+};
+
+static float horizontalSobelFilter[9] = {
+ 3.0f, 10.0f, 3.0f,
+ 0.0f, 0.0f, 0.0f,
+ -3.0f, -10.0f, -3.0f
+};
+
+//
+// Image Info
+//
+static const char* inputImagePath = "./Images/cat.bmp";
+static const char* output_filename = "./Images/filtered_cat.bmp";
+
+#define IMAGE_SIZE (720*1080)
+constexpr size_t array_size = IMAGE_SIZE;
+typedef std::array FloatArray;
+
+// 2-D pipe matrix. One pipe for each pixel, for each image filter.
+constexpr size_t kDepth = 2;
+constexpr size_t kNumProducers = 2;
+constexpr size_t kNumRows = 720;
+constexpr size_t kNumCols = 1080;
+
+using ProducerPipeArray = PipeArray; // number of pipes to create
+
+template class ProducerKernel;
+class ConsumerKernel;
+
+template
+sycl::event Producer(queue &q, float *image_in,
+ float *filter_in, const size_t FilterWidth,
+ const size_t ImageRows, const size_t ImageCols)
+{
+ std::cout << "Enqueuing producer " << producer_id << "..." << std::endl;
+
+ buffer image_in_buf(image_in, range<1>(ImageRows * ImageCols));
+ buffer filter_buf(filter_in, range<1>(FilterWidth*FilterWidth));
+
+ //
+ // Compute the filter width (intentionally truncate)
+ //
+ int halfFilterWidth = (int)FilterWidth/2;
+
+ auto e = q.submit([&](handler &h)
+ {
+ auto sourcePtr = image_in_buf.get_access(h);
+ auto filterPtr = filter_buf.get_access(h);
+
+ //
+ // Apply filter to each pixel in the image.
+ // Need to do this as single task to ensure the order
+ // of pixels being processed by the consumer kernel;
+ //
+ h.single_task>([=]()
+ {
+ for (int row = 0; row < ImageRows; row++)
+ {
+ for (int col = 0; col < ImageCols; col++)
+ {
+ // Each work item iterates around its local are based on the size of the filter.
+ float sum = 0.0f;
+
+ //
+ // Apply the filter to the pixel neigborhood
+ //
+ for (int k = -halfFilterWidth; k <= halfFilterWidth; k++)
+ {
+ for (int l = -halfFilterWidth; l <= halfFilterWidth; l++)
+ {
+ // Indices used to access the image
+ int r = row + k;
+ int c = col + l;
+
+ // Handle out of bounds locations by clamping to the border pixel
+ r = (r < 0) ? 0 : r;
+ c = (c < 0) ? 0 : c;
+ r = (r >= ImageRows) ? ImageRows - 1 : r;
+ c = (c >= ImageCols) ? ImageCols - 1 : c;
+
+ sum += sourcePtr[r * ImageCols + c] *
+ filterPtr[(k + halfFilterWidth) * FilterWidth + (l + halfFilterWidth)];
+
+ }
+ }
+ //
+ // Write the value to the pipe for the given filter, row, col values
+ //
+ ProducerPipeArray::PipeAt::write(sum);
+
+ }
+ }
+ });
+ });
+
+ //
+ // Get the elapsed kernel time, mostly just to see difference between
+ // single_task and parallel_for execution schema
+ //
+
+ return e;
+ //return (end_time_ns - start_time_ns);
+}
+
+sycl::event Consumer(queue &q, float *image_out, const size_t ImageRows, const size_t ImageCols)
+{
+ std::cout << "Enqueuing consumer..." << std::endl;
+
+ //
+ // Create buffers for the input and output data
+ //
+ buffer image_out_buf(image_out, range<1>(ImageRows * ImageCols));
+
+ auto e = q.submit([&](handler &h)
+ {
+ auto destPtr = image_out_buf.get_access(h);
+
+ //
+ // Loop through each pixel and combine the results from the two producer kernels.
+ // Must be done as a single task to ensure the image is processed in the correct order.
+ //
+ h.single_task([=]()
+ {
+ for (int row= 0; row < ImageRows; row++)
+ {
+ for (int col = 0; col < ImageCols; col++)
+ {
+ //
+ // Read the results from the two data pipes and calculate the RMS
+ //
+ float result_0 = ProducerPipeArray::PipeAt<0>::read();
+ float result_1 = ProducerPipeArray::PipeAt<1>::read();
+
+ float result = sqrt((result_0 * result_0) + (result_1 * result_1));
+
+ destPtr[row * ImageCols + col] = result;
+ }
+ }
+ });
+ });
+
+ //
+ // Get the elapsed kernel time, mostly just to see difference between
+ // single_task and parallel_for execution schema
+ //
+
+ return e;
+}
+
+// **************************************************************************************
+// Image Convolution in DPC++ on device:
+// Copied from image-conv.cpp and modified for specific Sobel-Feldman filtering
+// **************************************************************************************
+void ImageConv(queue &q, float *image_in, float *image_out,
+ float *filter_in, const size_t FilterWidth,
+ const size_t ImageRows, const size_t ImageCols)
+{
+ //
+ // Create buffers for the input and output data
+ //
+ buffer image_in_buf(image_in, range<1>(ImageRows * ImageCols));
+ buffer image_out_buf(image_out, range<1>(ImageRows * ImageCols));
+
+ //
+ // Create the range object for the pixel data
+ //
+ range<2> num_items {ImageRows, ImageCols};
+
+ //
+ // Create buffers that hold the filter shared between the host and the devices.
+ //
+ buffer filter_buf(filter_in, range<1>(FilterWidth*FilterWidth));
+
+ //
+ // Compute the filter width (intentionally truncate)
+ //
+ int halfFilterWidth = (int)FilterWidth/2;
+
+ //
+ // Submit a command group to the queue by a lambda function that contains the data access
+ // permission and device computation (kernel)
+ //
+ q.submit([&](handler &h)
+ {
+ //
+ // Create an accessor to the buffers with access permission.
+ //
+ auto sourcePtr = image_in_buf.get_access(h);
+ auto destPtr = image_out_buf.get_access(h);
+ auto filterPtr = filter_buf.get_access(h);
+
+ //
+ // Use parallel_for to run the image convolution in parallel on device.
+ // This executes the kernel.
+ // 1st parameter is the number of work items.
+ // 2nd parameter is the kernel, the lambda to specify what to do per work item.
+ // The parameter of the lambda is the work item id.
+ h.parallel_for(num_items, [=](id<2> item)
+ {
+ //
+ // Get the cow and col of the pixel assigned to this work item
+ //
+ int row = item[0];
+ int col = item[1];
+
+ // Each work item iterates around its local are based on the size of the filter.
+ float sum = 0.0f;
+
+ //
+ // Apply the filter to the pixel neigborhood
+ //
+ for (int k = -halfFilterWidth; k <= halfFilterWidth; k++)
+ {
+ for (int l = -halfFilterWidth; l <= halfFilterWidth; l++)
+ {
+ // Indices used to access the image
+ int r = row + k;
+ int c = col + l;
+
+ // Handle out of bounds locations by clamping to the border pixel
+ r = (r < 0) ? 0 : r;
+ c = (c < 0) ? 0 : c;
+ r = (r >= ImageRows) ? ImageRows - 1 : r;
+ c = (c >= ImageCols) ? ImageCols - 1 : c;
+
+ sum += sourcePtr[r * ImageCols + c] *
+ filterPtr[(k + halfFilterWidth) * FilterWidth + (l + halfFilterWidth)];
+
+ }
+ }
+ //
+ // Save off the new pixel value
+ //
+ destPtr[row * ImageCols + col] = sum;
+
+ });
+ });
+
+}
+
+int main()
+{
+ // Create device selector for the device of your interest.
+ #if FPGA_EMULATOR
+ // DPC++ extension: FPGA emulator selector on systems without FPGA card.
+ INTEL::fpga_emulator_selector d_selector;
+ #elif FPGA || FPGA_PROFILE
+ // DPC++ extension: FPGA selector on systems with FPGA card.
+ INTEL::fpga_selector d_selector;
+ #else
+ // The default device selector will select the most performant device.
+ default_selector d_selector;
+ #endif
+
+ float *hInputImage;
+ float *hOutputImage;
+ float *vOutputImage;
+ float *outputImage;
+
+ int imageRows;
+ int imageCols;
+
+ float *filter;
+
+ #ifndef FPGA_PROFILE
+ // Query some platform information
+ unsigned number = 0;
+ auto myPlatforms = platform::get_platforms();
+
+ //loop through the platforms to poke
+ for (auto &onePlatform: myPlatforms)
+ {
+ std::cout << ++number << " found >>" << std::endl;
+ std::cout << "Platform: " << onePlatform.get_info() << std::endl;
+
+ // Loop through devices
+ auto myDevices = onePlatform.get_devices();
+ for (auto &oneDevice : myDevices)
+ {
+ std::cout << "Device: " << oneDevice.get_info() << std::endl;
+ }
+ }
+
+ std::cout << std::endl;
+ #endif
+
+ //
+ // Read in the image
+ //
+ hInputImage = readBmpFloat(inputImagePath, &imageRows, &imageCols);
+ if (debug)
+ {
+ printf("imageRows=%d, imageCols=%d\n", imageRows, imageCols);
+ }
+
+ //
+ // Allocate space for the resulting images
+ //
+ hOutputImage = (float*) malloc(imageRows * imageCols * sizeof(float));
+ vOutputImage = (float*) malloc(imageRows * imageCols * sizeof(float));
+ outputImage = (float*) malloc(imageRows * imageCols * sizeof(float));
+
+ //
+ // Start the timer
+ //
+ dpc_common::TimeInterval exec_time;
+ double total_pipe_path_time_s = 0;
+
+ try
+ {
+ auto prop_list = property_list{property::queue::enable_profiling()};
+
+ queue q(d_selector, dpc_common::exception_handler, prop_list);
+
+ //
+ // Print device information used in the kernel
+ //
+ std::cout << "Running on device: " <<
+ q.get_device().get_info() << std::endl;
+
+ //
+ // Enqueue producers
+ //
+ double start_time = exec_time.Elapsed();
+
+ auto horzEvent = Producer<0>(q, hInputImage, horizontalSobelFilter, sobelFilterWidth, imageRows, imageCols);
+
+ auto vertEvent = Producer<1>(q, hInputImage, verticalSobelFilter, sobelFilterWidth, imageRows, imageCols);
+
+ //
+ // Enqueue Consumer
+ //
+ auto consEvent = Consumer(q, outputImage, imageRows, imageCols);
+
+ q.wait();
+
+ double total_pipe_path_time_s = exec_time.Elapsed() - start_time;
+
+
+ auto horzKernelTime = (horzEvent.get_profiling_info() -
+ horzEvent.get_profiling_info());
+ auto vertKernelTime = (vertEvent.get_profiling_info() -
+ vertEvent.get_profiling_info());
+ auto consKernelTime = (consEvent.get_profiling_info() -
+ consEvent.get_profiling_info());
+
+ std::cout << "Horizontal kernel compute time: " << horzKernelTime * 1e-6 << " ms." << std::endl;
+ std::cout << "Vertical kernel compute time: " << vertKernelTime * 1e-6 << " ms." << std::endl;
+ std::cout << "Consumer kernel compute time: " << consKernelTime * 1e-6 << " ms." << std::endl;
+ std::cout << "Total compute time: " << total_pipe_path_time_s * 1e3 << " ms." << std::endl;
+
+
+ //
+ // Run the horizontal line filter, then the vertical line filter
+ //
+ filter = horizontalSobelFilter;
+ ImageConv(q, hInputImage, hOutputImage, filter, sobelFilterWidth, imageRows, imageCols);
+
+ filter = verticalSobelFilter;
+ ImageConv(q, hInputImage, vOutputImage, filter, sobelFilterWidth, imageRows, imageCols);
+ }
+ catch(const std::exception& e)
+ {
+ std::cerr << "Caught the following error executing ImageConv:" << std::endl;
+ std::cerr << e.what() << std::endl;
+ std::terminate();
+ }
+
+ //
+ // No errors runing kernel, so combine the two filtered images
+ //
+ for (int r = 0; r < imageRows; r++)
+ {
+ for (int c = 0; c < imageCols; c++)
+ {
+ outputImage[r * imageCols + c] = std::sqrt(
+ std::pow(hOutputImage[r * imageCols + c], 2) +
+ std::pow(vOutputImage[r * imageCols + c], 2));
+ }
+ }
+
+
+ //
+ // Stop the timer and report execution times
+ //
+ double total_img_conv_time_s = exec_time.Elapsed() - total_pipe_path_time_s;
+ std::cout << "Total Image_Conv compute time: " << total_img_conv_time_s * 1e3 << " ms." << std::endl;
+
+ //
+ // Save the output bmp
+ //
+ printf("Output image saved as %s.\n", output_filename);
+ writeBmpFloat(outputImage, output_filename, imageRows, imageCols, inputImagePath);
+
+ return 0;
+
+}
\ No newline at end of file