diff --git a/ARM.CMSIS.pdsc b/ARM.CMSIS.pdsc index be4b7d5e..78815de8 100644 --- a/ARM.CMSIS.pdsc +++ b/ARM.CMSIS.pdsc @@ -16,8 +16,9 @@ Active development ... - - CMSIS-Driver: 2.12.0 - - Added Gigabit Ethernet support to the Ethernet driver API + - CMSIS-Driver: 2.12.0 (see revision history for details) + - Ethernet Driver API V2.3.0 + - MCI Driver API V2.5.0 CMSIS-Core(M): 5.6.0 @@ -481,7 +482,7 @@ - + MCI (Memory Card Interface) Driver API @@ -770,7 +771,7 @@ - + Access to #include Driver_MCI.h file and code template for custom implementation diff --git a/CMSIS/Documentation/Doxygen/Driver/src/Driver_MCI.c b/CMSIS/Documentation/Doxygen/Driver/src/Driver_MCI.c index 5a9d07e7..22034d31 100644 --- a/CMSIS/Documentation/Doxygen/Driver/src/Driver_MCI.c +++ b/CMSIS/Documentation/Doxygen/Driver/src/Driver_MCI.c @@ -93,6 +93,8 @@ This section provides the event values for the \ref ARM_MCI_SignalEvent callback The following call back notification events are generated: @{ +*/ +/** \def ARM_MCI_EVENT_CARD_INSERTED \sa \ref ARM_MCI_SignalEvent \def ARM_MCI_EVENT_CARD_REMOVED @@ -115,6 +117,28 @@ The following call back notification events are generated: \sa \ref ARM_MCI_SignalEvent \def ARM_MCI_EVENT_CCS_TIMEOUT \sa \ref ARM_MCI_SignalEvent +*/ + +/** +\def ARM_MCI_EVENT_RETUNING_REQUEST +\sa \ref ARM_MCI_SignalEvent +\details +This event does not invalidate transferred data and active transfer may finish normally unless the transfer ends +with \ref ARM_MCI_EVENT_TRANSFER_ERROR. + +After receiving this event, re-tuning should be performed using \ref ARM_MCI_UHS_RETUNING_START before starting +the next normal command. +*/ + +/** +\def ARM_MCI_EVENT_TUNING_ERROR +\details +Indicates an unrecoverable tuning-circuit error outside the tuning procedure. +The affected transfer is invalid. Reset the tuning circuit and perform initial tuning before retrying. +\sa \ref ARM_MCI_SignalEvent +*/ + +/** @} *******************************************************************************************************************/ @@ -164,6 +188,251 @@ The following codes are used as values for the parameter \em control of the func \def ARM_MCI_CONTROL_READ_WAIT \def ARM_MCI_SUSPEND_TRANSFER \def ARM_MCI_RESUME_TRANSFER +\def ARM_MCI_UHS_VOLTAGE_SWITCH +@} +*******************************************************************************************************************/ + +/** +\defgroup mci_uhs_voltage_switch_ctrls MCI UHS-I Signal Voltage Switch +\ingroup mci_control_gr +\brief Host-controller phases of the SD UHS-I signal-voltage switch. +\details + +Call \ref ARM_MCI_Control with \em control = \ref ARM_MCI_UHS_VOLTAGE_SWITCH. +Set \em arg to one of the phase codes below. + +To perform a voltage switch, MCI controlling software must use this order: +1. PREPARE. +2. Send voltage switch command using \ref ARM_MCI_SendCommand and wait for its completion. +3. APPLY. +4. Wait at least 5 ms. +5. CLOCK_ON. +6. Wait at least 1 ms. +7. VERIFY. + +\b Example: +\code +volatile uint32_t MCI_Events; + +void MCI_SignalEvent_Callback (uint32_t event) { + // Save current event + MCI_Events |= event; +} + +// Switch Signaling Voltage +void mci_switch_signaling_voltage(void) { + int32_t status; + uint32_t r1 = 0U; + + // Prepare host controller for signaling voltage switch + if (MCIdrv->Control(ARM_MCI_UHS_VOLTAGE_SWITCH, ARM_MCI_VOLTAGE_SWITCH_PREPARE) != ARM_DRIVER_OK) { + return; + } + + // Clear previous events + MCI_Events = 0; + + // Send voltage switch command + status = MCIdrv->SendCommand(11, 0U, ARM_MCI_RESPONSE_SHORT|ARM_MCI_RESPONSE_CRC, &r1); + + if (status == ARM_DRIVER_OK) { + // Wait for event + while ((MCI_Events & ARM_MCI_EVENT_COMMAND_COMPLETE) == 0U); + + // Change the signaling voltage selection from 3.3V to 1.8V + status = MCIdrv->Control(ARM_MCI_UHS_VOLTAGE_SWITCH, ARM_MCI_VOLTAGE_SWITCH_APPLY); + + if (status == ARM_DRIVER_OK) { + // Wait for the signaling voltage to stabilize + delay_ms(5); + + // Turn on the SD clock after the voltage switch + status = MCIdrv->Control(ARM_MCI_UHS_VOLTAGE_SWITCH, ARM_MCI_VOLTAGE_SWITCH_CLOCK_ON); + + if (status == ARM_DRIVER_OK) { + // Wait for the card to release the data lines + delay_ms(1); + + // Verify the voltage switch after memory card releases data lines + status = MCIdrv->Control(ARM_MCI_UHS_VOLTAGE_SWITCH, ARM_MCI_VOLTAGE_SWITCH_VERIFY); + + if (status == ARM_DRIVER_OK) { + // Voltage switch successful + return; + } + } + } + } + // Failed to switch signaling voltage, abort procedure + MCIdrv->Control(ARM_MCI_UHS_VOLTAGE_SWITCH, ARM_MCI_VOLTAGE_SWITCH_ABORT); +} +\endcode + +@{ +*/ + +/** +\def ARM_MCI_VOLTAGE_SWITCH_PREPARE +*/ + +/** +\def ARM_MCI_VOLTAGE_SWITCH_APPLY +*/ + +/** +\def ARM_MCI_VOLTAGE_SWITCH_CLOCK_ON +*/ + +/** +\def ARM_MCI_VOLTAGE_SWITCH_VERIFY +*/ + +/** +\def ARM_MCI_VOLTAGE_SWITCH_ABORT +\details +Stop the switch logic and leave the host interface electrically safe. +Allow this operation after PREPARE, including after a failed phase. +*/ + +/** +\def ARM_MCI_VOLTAGE_SWITCH_RESET +\details +Restore the host pads, voltage selection, and switch state for 3.3 V signaling. +Call while card power is removed. +*/ + +/** +@} +*******************************************************************************************************************/ + +/** +\defgroup mci_uhs_tuning_ctrls MCI UHS-I Tuning +\ingroup mci_control_gr +\brief Host-controller tuning operations and results. +\details + +Call \ref ARM_MCI_Control with \em control = \ref ARM_MCI_UHS_TUNING_OPERATION. +Set \em arg to one of the phase codes \ref ARM_MCI_UHS_TUNING_ABORT, \ref ARM_MCI_UHS_TUNING_START, +or \ref ARM_MCI_UHS_RETUNING_START. + +These operations return an execution status, call \ref ARM_MCI_Control with +\em control = \ref ARM_MCI_UHS_TUNING_RESULT and check returned value against +\ref ARM_MCI_UHS_TUNING_DONE, \ref ARM_MCI_UHS_TUNING_CONTINUE, or \ref ARM_MCI_UHS_TUNING_ERROR. + +UHS-I tuning is performed iteratively until a valid sampling point is found or an error occurs. + +Use this order of commands: + +1. Start tuning operation using \ref ARM_MCI_UHS_TUNING_OPERATION with \ref ARM_MCI_UHS_TUNING_START +2. Transfer tuning block +3. Inspect the result using \ref ARM_MCI_UHS_TUNING_RESULT + +Repeat steps 2 and 3 until the tuning result is \ref ARM_MCI_UHS_TUNING_DONE or an error occurs. + +\note A data CRC error may identify an invalid sampling point and shall not be reported through the + ordinary transfer-error event. + +\b Example: +\code +volatile uint32_t MCI_Events; + +void MCI_SignalEvent_Callback (uint32_t event) { + // Save current event + MCI_Events |= event; +} + +// Tune Sampling Clock +void mci_tune_sampling_clock(void) { + int32_t status; + uint8_t buf[64U]; + uint32_t step = 40U; + uint32_t r1 = 0U; + + // Start tuning operation + if (MCIdrv->Control(ARM_MCI_UHS_TUNING_OPERATION, ARM_MCI_UHS_TUNING_START) != ARM_DRIVER_OK) { + return; + } + + while(step--) { + // Setup transfer + status = MCIdrv->SetupTransfer(buf, 1U, 64U, ARM_MCI_TRANSFER_READ|ARM_MCI_TRANSFER_BLOCK); + if (status != ARM_DRIVER_OK) { + break; + } + + // Clear previous events + MCI_Events = 0; + + // Transfer tuning block + status = MCIdrv->SendCommand(19, 0U, ARM_MCI_RESPONSE_SHORT|ARM_MCI_RESPONSE_CRC|ARM_MCI_TRANSFER_DATA, &r1); + if (status == ARM_DRIVER_OK) { + // Wait for event + while ((MCI_Events & ARM_MCI_EVENT_TRANSFER_COMPLETE) == 0U); + + // Check the tuning result + status = MCIdrv->Control(ARM_MCI_UHS_TUNING_RESULT, 0U); + + if (status == ARM_MCI_UHS_TUNING_DONE) { + // Tuning completed successfully + return; + } + if (status == ARM_MCI_UHS_TUNING_ERROR) { + // Tuning error occurred + break; + } + } + } + // Tuning failed + MCIdrv->Control(ARM_MCI_UHS_TUNING_OPERATION, ARM_MCI_UHS_TUNING_ABORT); +} +\endcode + +@{ +*/ + +/** +\def ARM_MCI_UHS_TUNING_ABORT +\details +Stop any active data transfer and reset the tuning configuration. +*/ + +/** +\def ARM_MCI_UHS_TUNING_START +\details +This operation initializes a new sampling-clock search. +*/ + +/** +\def ARM_MCI_UHS_RETUNING_START +\details +After initial tuning, re-tuning may be required during normal operation, +after \ref ARM_MCI_EVENT_RETUNING_REQUEST. Re-tuning ensures that the sampling point remains optimal. +*/ + +/** +\def ARM_MCI_UHS_TUNING_DONE +\details +A valid sampling setting has been selected and applied. +No further tuning block is required for this search. +*/ + +/** +\def ARM_MCI_UHS_TUNING_CONTINUE +\details +The search has not completed, and another iteration is required. +*/ + +/** +\def ARM_MCI_UHS_TUNING_ERROR +\details +No usable result is available from this search. +Stop the tuning loop and perform abort/recovery. + +This return value differs from \ref ARM_MCI_EVENT_TUNING_ERROR. +That event reports a sampling-circuit failure during normal operation. +*/ + +/** @} *******************************************************************************************************************/ @@ -182,8 +451,8 @@ as specified with \em arg listed bellow. The function \ref ARM_MCI_GetCapabilities lists the supported bus speed modes. Initially, all SD cards use a 3.3 volt electrical interface. Some SD cards can switch to 1.8 volt operation. For example, the use of ultra-high-speed (UHS) -SD cards requires 1.8 volt operation and a 4-bit bus data width. The data field \em uhs_signaling of the structure ARM_MCI_CAPABILITIES encodes -whether the driver supports 1.8 volt UHS signaling. +SD cards requires 1.8 volt operation and a 4-bit bus data width. The data field \em uhs_signaling of the structure ARM_MCI_CAPABILITIES encodes +whether the driver supports the UHS-I signal-voltage switch to 1.8V. \sa - \ref mci_driver_strength_ctrls @@ -613,14 +882,15 @@ Parameter \em control | Operation \ref ARM_MCI_DRIVER_STRENGTH | Set driver strength. Predefined values for \em arg are listed in the table Driver Type \ref ARM_MCI_CONTROL_RESET | Control optional RST_n Pin (eMMC). The parameter \em arg can have the values \token{[0:inactive(default); 1:active]} \ref ARM_MCI_CONTROL_CLOCK_IDLE | Control clock generation on CLK Pin when idle. The parameter \em arg can have the values \token{[0:disabled; 1:enabled]} -\ref ARM_MCI_UHS_TUNING_OPERATION | Sampling clock Tuning operation (SD UHS-I). The parameter \em arg can have the values \token{[0:reset; 1:execute]} -\ref ARM_MCI_UHS_TUNING_RESULT | Sampling clock Tuning result (SD UHS-I). Returns \token{[0:done; 1:in progress; -1:error]} +\ref ARM_MCI_UHS_TUNING_OPERATION | Start, restart, or abort host-controller sampling-clock tuning. The parameter \em arg is one of \ref ARM_MCI_UHS_TUNING_ABORT, \ref ARM_MCI_UHS_TUNING_START, or \ref ARM_MCI_UHS_RETUNING_START. +\ref ARM_MCI_UHS_TUNING_RESULT | Return \ref ARM_MCI_UHS_TUNING_DONE, \ref ARM_MCI_UHS_TUNING_CONTINUE, or \ref ARM_MCI_UHS_TUNING_ERROR after a protocol tuning-block command. \ref ARM_MCI_DATA_TIMEOUT | Set Data timeout; The parameter \em arg sets the timeout in bus cycles. \ref ARM_MCI_CSS_TIMEOUT | Set Command Completion Signal (CCS) timeout. The parameter \em arg sets timeout in bus cycles. \ref ARM_MCI_MONITOR_SDIO_INTERRUPT | Monitor SD I/O interrupt. The parameter \em arg can have the values \token{[0:disabled(default); 1:enabled]}. Monitoring is automatically disabled when an interrupt is recognized. \ref ARM_MCI_CONTROL_READ_WAIT | Control Read/Wait states for SD I/O. The parameter \em arg can have the values \token{[0:disabled(default); 1:enabled]}. \ref ARM_MCI_SUSPEND_TRANSFER | Suspend Data transfer (SD I/O). Returns the number of remaining bytes to transfer. \ref ARM_MCI_RESUME_TRANSFER | Resume Data transfer (SD I/O). +\ref ARM_MCI_UHS_VOLTAGE_SWITCH | Perform a host-controller phase of the UHS-I signal-voltage switch. The parameter \em arg is an \ref mci_uhs_voltage_switch_ctrls value. Bus Speed Mode @@ -628,7 +898,7 @@ Parameter \em control | Operation The function \ref ARM_MCI_GetCapabilities lists the supported bus speed modes. Initially, all SD cards use a 3.3 volt electrical interface. Some SD cards can switch to 1.8 volt operation. For example, the use of ultra-high-speed (UHS) SD cards requires 1.8 volt operation and a 4-bit bus data width. The bit field ARM_MCI_CAPABILITIES.uhs_signaling encodes -whether the driver supports 1.8 volt UHS signaling. +whether the driver supports the UHS-I signal-voltage switch and the mandatory SDR12 and SDR25 baseline. The \em control operation \b ARM_MCI_BUS_SPEED_MODE sets the bus speed mode using the parameter \em arg. @@ -684,6 +954,46 @@ Parameter \em arg | Driver Type \ref ARM_MCI_DRIVER_TYPE_C | Set the interface to SD UHS-I Driver Type C \ref ARM_MCI_DRIVER_TYPE_D | Set the interface to SD UHS-I Driver Type D + +UHS-I Tuning Operation + +Specifies the UHS-I tuning operation. + +The \em control operation \b ARM_MCI_UHS_TUNING_OPERATION triggers a phase in the sampling-clock tuning procedure using the parameter \em arg. + +Parameter \em arg | UHS-I Tuning Operation +:-------------------------------------------------------------|:------------------------------------------ +\ref ARM_MCI_UHS_TUNING_ABORT | Abort the UHS-I tuning procedure +\ref ARM_MCI_UHS_TUNING_START | Start the UHS-I tuning procedure +\ref ARM_MCI_UHS_RETUNING_START | Start the UHS-I re-tuning procedure + +UHS-I Tuning Result + +Specifies the UHS-I tuning procedure result retrieval. + +The \em control operation \b ARM_MCI_UHS_TUNING_RESULT returns the result of the UHS-I tuning procedure. + +Return value | UHS-I Tuning Result +:-------------------------------------------------------------|:------------------------------------------ +\ref ARM_MCI_UHS_TUNING_DONE | UHS-I tuning procedure completed successfully +\ref ARM_MCI_UHS_TUNING_ERROR | UHS-I tuning procedure failed +\ref ARM_MCI_UHS_TUNING_CONTINUE | UHS-I tuning procedure should continue + +UHS-I Signaling Voltage Switch + +Specifies the UHS-I signaling voltage switch operation. + +The \em control operation \b ARM_MCI_UHS_VOLTAGE_SWITCH triggers a phase in the UHS-I signaling voltage switch procedure using the parameter \em arg. + +Parameter \em arg | UHS-I Signaling Voltage Switch Phase +:-------------------------------------------------------------|:------------------------------------------ +\ref ARM_MCI_VOLTAGE_SWITCH_PREPARE | Prepare the host-controller for signaling voltage switch +\ref ARM_MCI_VOLTAGE_SWITCH_APPLY | Change the voltage selection from 3.3V to 1.8V +\ref ARM_MCI_VOLTAGE_SWITCH_CLOCK_ON | Start or confirm the bus clock after the signaling voltage has stabilized +\ref ARM_MCI_VOLTAGE_SWITCH_VERIFY | Verify the voltage switch after memory card releases data lines +\ref ARM_MCI_VOLTAGE_SWITCH_ABORT | Abort an incomplete switch and leave the host interface safe +\ref ARM_MCI_VOLTAGE_SWITCH_RESET | Restore host signaling state for memory card power-up at 3.3 V + \b Examples: \code // Set Bus Speed to 25MHz @@ -713,17 +1023,10 @@ MCIdrv->Control(ARM_MCI_CONTROL_CLOCK_IDLE, 1); // Disable Clock generation on CLK when Idle MCIdrv->Control(ARM_MCI_CONTROL_CLOCK_IDLE, 0); -// UHS Tuning -MCIdrv->Control(ARM_MCI_UHS_TUNING_OPERATION, 1); // start tuning -do { - status = MCIdrv->Control(ARM_MCI_UHS_TUNING_RESULT, 0/*argument not used*/); - if (status == -1) { break; /* tuning failed */ } -} while (status == 1); - // Set Data Timeout to 12500000 bus cycles (0.5s @25MHz Bus Speed) // Default value is hardware specific (typically 2^32-1) MCIdrv->Control(ARM_MCI_DATA_TIMEOUT, 12500000); - + // Set CSS Timeout to 1000000 bus cycles // Default value is hardware specific MCIdrv->Control(ARM_MCI_CSS_TIMEOUT, 1000000); @@ -769,11 +1072,11 @@ The parameter \em event indicates one or more events that occurred during driver Each event is encoded in a separate bit and therefore it is possible to signal multiple events within the same call. Not every event is necessarily generated by the driver. This depends on the implemented capabilities stored in the -data fields of the structure \ref ARM_NAND_CAPABILITIES, which can be retrieved with the function \ref ARM_NAND_GetCapabilities. +data fields of the structure \ref ARM_MCI_CAPABILITIES, which can be retrieved with the function \ref ARM_MCI_GetCapabilities. The following events can be generated: -Parameter \em event |Bit | Description | supported when \ref ARM_NAND_CAPABILITIES +Parameter \em event |Bit | Description | supported when \ref ARM_MCI_CAPABILITIES :------------------------------------------|---:|:----------------------------------------------------------------------|:--------------------------------------------- \ref ARM_MCI_EVENT_CARD_INSERTED | 0 | Occurs after Memory Card inserted | always supported \ref ARM_MCI_EVENT_CARD_REMOVED | 1 | Occurs after Memory Card removal | always supported @@ -785,7 +1088,9 @@ Parameter \em event |Bit | Description \ref ARM_MCI_EVENT_TRANSFER_ERROR | 7 | Occurs after data transfer error (CRC failed) | always supported \ref ARM_MCI_EVENT_SDIO_INTERRUPT | 8 | Indicates SD I/O Interrupt | data field \em sdio_interrupt = \token{1} \ref ARM_MCI_EVENT_CCS | 9 | Indicates a Command Completion Signal (CCS) | data field \em ccs = \token{1} -\ref ARM_MCI_EVENT_CCS_TIMEOUT |10 | Indicates a Command Completion Signal (CCS) Timeout | data field \em css_timeout = \token{1} +\ref ARM_MCI_EVENT_CCS_TIMEOUT |10 | Indicates a Command Completion Signal (CCS) Timeout | data field \em ccs_timeout = \token{1} +\ref ARM_MCI_EVENT_RETUNING_REQUEST |11 | Requests execution of the re-tuning loop before a subsequent command | data field \em uhs_retuning = \token{1} +\ref ARM_MCI_EVENT_TUNING_ERROR |12 | Indicates tuned sampling circuit failed during normal operation | data field \em uhs_tuning = \token{1} See also: - \ref ARM_MCI_SendCommand diff --git a/CMSIS/Documentation/Doxygen/Driver/src/history.md b/CMSIS/Documentation/Doxygen/Driver/src/history.md index a3492160..3b34ad08 100644 --- a/CMSIS/Documentation/Doxygen/Driver/src/history.md +++ b/CMSIS/Documentation/Doxygen/Driver/src/history.md @@ -12,7 +12,12 @@ The table below provides information about the changes delivered with specific v 2.12.0 - - Added Gigabit Ethernet support to the Ethernet driver API + - Updated Ethernet API 2.3.0: + - Added Gigabit Ethernet support + - Updated MCI API 2.5.0: + - Enhanced support for SD UHS-I operations + - Added phased UHS-I signal-voltage switching + - Added capabilities and re-tuning operation diff --git a/CMSIS/Documentation/Doxygen/General/src/revision_history.md b/CMSIS/Documentation/Doxygen/General/src/revision_history.md index 43563612..821af764 100644 --- a/CMSIS/Documentation/Doxygen/General/src/revision_history.md +++ b/CMSIS/Documentation/Doxygen/General/src/revision_history.md @@ -15,6 +15,14 @@ Release history of other CMSIS components and tools can be found in their docume Version Description + + 6.4.0 + + - CMSIS-Driver: 2.12.0 + - Updated Ethernet API to 2.3.0 with Gigabit Ethernet support + - Updated MCI API to 2.5.0 with UHS-I voltage switching and re-tuning support + + 6.3.0 diff --git a/CMSIS/Driver/DriverTemplates/Driver_MCI.c b/CMSIS/Driver/DriverTemplates/Driver_MCI.c index dd73c040..e677d004 100644 --- a/CMSIS/Driver/DriverTemplates/Driver_MCI.c +++ b/CMSIS/Driver/DriverTemplates/Driver_MCI.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2020 Arm Limited. All rights reserved. + * Copyright (c) 2013-2026 Arm Limited. All rights reserved. * * SPDX-License-Identifier: Apache-2.0 * @@ -57,7 +57,9 @@ static const ARM_MCI_CAPABILITIES DriverCapabilities = { 0, /* rst_n */ 0, /* ccs */ 0, /* ccs_timeout */ - 0 /* Reserved */ + 0, /* uhs_tuning_sdr50 */ + 0, /* uhs_retuning */ + 0 /* reserved */ }; // diff --git a/CMSIS/Driver/Include/Driver_MCI.h b/CMSIS/Driver/Include/Driver_MCI.h index 088c48fd..f5d14072 100644 --- a/CMSIS/Driver/Include/Driver_MCI.h +++ b/CMSIS/Driver/Include/Driver_MCI.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2020 ARM Limited. All rights reserved. + * Copyright (c) 2013-2026 Arm Limited. All rights reserved. * * SPDX-License-Identifier: Apache-2.0 * @@ -15,13 +15,16 @@ * See the License for the specific language governing permissions and * limitations under the License. * - * $Date: 31. March 2020 - * $Revision: V2.4 + * $Date: 5. October 2026 + * $Revision: V2.5 * * Project: MCI (Memory Card Interface) Driver definitions */ /* History: + * Version 2.5 + * Added phased UHS-I signal-voltage switching + * Added tuning and re-tuning operations and capabilities * Version 2.4 * Removed volatile from ARM_MCI_STATUS * Version 2.3 @@ -71,7 +74,7 @@ extern "C" #include "Driver_Common.h" -#define ARM_MCI_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2,4) /* API version */ +#define ARM_MCI_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2,5) /* API version */ #define _ARM_Driver_MCI_(n) Driver_MCI##n @@ -121,14 +124,15 @@ extern "C" #define ARM_MCI_DRIVER_STRENGTH (0x05UL) ///< Set SD UHS-I Driver Strength as specified with arg #define ARM_MCI_CONTROL_RESET (0x06UL) ///< Control optional RST_n Pin (eMMC); arg: 0=inactive, 1=active #define ARM_MCI_CONTROL_CLOCK_IDLE (0x07UL) ///< Control Clock generation on CLK Pin when idle; arg: 0=disabled, 1=enabled -#define ARM_MCI_UHS_TUNING_OPERATION (0x08UL) ///< Sampling clock Tuning operation (SD UHS-I); arg: 0=reset, 1=execute -#define ARM_MCI_UHS_TUNING_RESULT (0x09UL) ///< Sampling clock Tuning result (SD UHS-I); returns: 0=done, 1=in progress, -1=error +#define ARM_MCI_UHS_TUNING_OPERATION (0x08UL) ///< Sampling clock tuning operation (SD UHS-I); arg specifies ARM_MCI_UHS_TUNING_* operation +#define ARM_MCI_UHS_TUNING_RESULT (0x09UL) ///< Sampling clock tuning result (SD UHS-I); returns ARM_MCI_UHS_TUNING_* result #define ARM_MCI_DATA_TIMEOUT (0x0AUL) ///< Set Data timeout; arg = timeout in bus cycles #define ARM_MCI_CSS_TIMEOUT (0x0BUL) ///< Set Command Completion Signal (CCS) timeout; arg = timeout in bus cycles #define ARM_MCI_MONITOR_SDIO_INTERRUPT (0x0CUL) ///< Monitor SD I/O interrupt: arg: 0=disabled, 1=enabled #define ARM_MCI_CONTROL_READ_WAIT (0x0DUL) ///< Control Read/Wait for SD I/O; arg: 0=disabled, 1=enabled #define ARM_MCI_SUSPEND_TRANSFER (0x0EUL) ///< Suspend Data transfer (SD I/O); returns number of remaining bytes to transfer #define ARM_MCI_RESUME_TRANSFER (0x0FUL) ///< Resume Data transfer (SD I/O) +#define ARM_MCI_UHS_VOLTAGE_SWITCH (0x10UL) ///< UHS-I signal voltage switch; arg: ARM_MCI_VOLTAGE_SWITCH_* /*----- MCI Bus Speed Mode -----*/ #define ARM_MCI_BUS_DEFAULT_SPEED (0x00UL) ///< SD/MMC: Default Speed mode up to 25/26MHz @@ -156,6 +160,24 @@ extern "C" #define ARM_MCI_DRIVER_TYPE_C (0x02UL) ///< SD UHS-I Driver Type C #define ARM_MCI_DRIVER_TYPE_D (0x03UL) ///< SD UHS-I Driver Type D +/*----- MCI UHS-I Signal Voltage Switch -----*/ +#define ARM_MCI_VOLTAGE_SWITCH_PREPARE (0x00UL) ///< Prepare the host before voltage switch command +#define ARM_MCI_VOLTAGE_SWITCH_APPLY (0x01UL) ///< Apply 1.8 V signaling after the voltage switch command +#define ARM_MCI_VOLTAGE_SWITCH_CLOCK_ON (0x02UL) ///< Start or confirm SD card bus clock +#define ARM_MCI_VOLTAGE_SWITCH_VERIFY (0x03UL) ///< Verify completion of the voltage switch +#define ARM_MCI_VOLTAGE_SWITCH_ABORT (0x04UL) ///< Abort a prepared or incomplete voltage switch +#define ARM_MCI_VOLTAGE_SWITCH_RESET (0x05UL) ///< Restore the host signaling path for card power-up + +/*----- MCI UHS-I Tuning Operation -----*/ +#define ARM_MCI_UHS_TUNING_ABORT (0x00UL) ///< Abort or reset the sampling-clock tuning operation +#define ARM_MCI_UHS_TUNING_START (0x01UL) ///< Start initial sampling-clock tuning operation +#define ARM_MCI_UHS_RETUNING_START (0x02UL) ///< Start sampling-clock re-tuning during normal operation + +/*----- MCI UHS-I Tuning Result -----*/ +#define ARM_MCI_UHS_TUNING_DONE (0) ///< Tuning completed successfully +#define ARM_MCI_UHS_TUNING_CONTINUE (1) ///< Another tuning-block is required +#define ARM_MCI_UHS_TUNING_ERROR (-1) ///< Tuning failed + /****** MCI Card Power *****/ #define ARM_MCI_POWER_VDD_Pos 0 @@ -199,6 +221,8 @@ typedef struct _ARM_MCI_STATUS { #define ARM_MCI_EVENT_SDIO_INTERRUPT (1UL << 8) ///< SD I/O Interrupt #define ARM_MCI_EVENT_CCS (1UL << 9) ///< Command Completion Signal (CCS) #define ARM_MCI_EVENT_CCS_TIMEOUT (1UL << 10) ///< Command Completion Signal (CCS) Timeout +#define ARM_MCI_EVENT_RETUNING_REQUEST (1UL << 11) ///< Driver requests re-tuning before a subsequent command +#define ARM_MCI_EVENT_TUNING_ERROR (1UL << 12) ///< Host controller detected a tuning error // Function documentation @@ -313,7 +337,7 @@ typedef struct _ARM_MCI_CAPABILITIES { uint32_t data_width_4_ddr : 1; ///< Supports 4-bit data, DDR (Dual Data Rate) - MMC only uint32_t data_width_8_ddr : 1; ///< Supports 8-bit data, DDR (Dual Data Rate) - MMC only uint32_t high_speed : 1; ///< Supports SD/MMC High Speed Mode - uint32_t uhs_signaling : 1; ///< Supports SD UHS-I (Ultra High Speed) 1.8V signaling + uint32_t uhs_signaling : 1; ///< Supports SD UHS-I (Ultra High Speed) 1.8V signaling uint32_t uhs_tuning : 1; ///< Supports SD UHS-I tuning uint32_t uhs_sdr50 : 1; ///< Supports SD UHS-I SDR50 (Single Data Rate) up to 50MB/s uint32_t uhs_sdr104 : 1; ///< Supports SD UHS-I SDR104 (Single Data Rate) up to 104MB/s @@ -329,7 +353,9 @@ typedef struct _ARM_MCI_CAPABILITIES { uint32_t rst_n : 1; ///< Supports RST_n Pin Control (eMMC) uint32_t ccs : 1; ///< Supports Command Completion Signal (CCS) for CE-ATA uint32_t ccs_timeout : 1; ///< Supports Command Completion Signal (CCS) timeout for CE-ATA - uint32_t reserved : 3; ///< Reserved (must be zero) + uint32_t uhs_tuning_sdr50 : 1; ///< UHS-I SDR50 requires host-controller tuning + uint32_t uhs_retuning : 1; ///< Supports driver-managed re-tuning requests or timers + uint32_t reserved : 1; ///< Reserved (must be zero) } ARM_MCI_CAPABILITIES;