PRD: Ideal differential 3-tap TX FIR LTspice behavioral model

[ingram-chen]

Problem Statement

Analog and mixed-signal designers need a reproducible way to study transmitter feed-forward equalization in LTspice without first building a transistor-level driver. The repository has local LTspice execution and measurement support, but no ideal differential TX FIR reference model covering cursor shaping, matched loading, channel loss, and eye-diagram improvement at 20 Gb/s.

The requested 1.0 Vpp differential swing must be defined at the loaded TX pins with a matched 100 Ω differential load, not at the open-circuit behavioral source.

Solution

Provide a reusable ideal differential 3-tap TX FIR behavioral subcircuit and one companion LTspice testbench. Drive it with deterministic NRZ PRBS7 at 20 Gb/s, exercise fixed pre/main/post coefficients, optionally pass it through a simple lossy channel, terminate it with 100 Ω differential impedance, and expose measurements plus eye views for FIR-on versus FIR-off comparison.

The implementation remains behavioral and causal. A fixed 1 UI latency converts pre-cursor behavior into three non-negative delays while preserving the intended FIR response.

User Stories

1. As an analog designer, I want an ideal TX FIR model, so that I can study equalization before transistor-level design.
2. As a link designer, I want NRZ signaling, so that the model matches the selected format.
3. As a link designer, I want a 20 Gb/s default rate, so that the UI is the agreed 50 ps.
4. As a model user, I want a parameterized rate, so that later experiments do not require rewriting the model.
5. As a model user, I want pre/main/post taps, so that both pre-cursor and post-cursor shaping are visible.
6. As a model user, I want coefficients -0.15, 0.70, and -0.15, so that the agreed profile runs immediately.
7. As a reviewer, I want the absolute coefficient sum to equal one, so that peak normalization is unambiguous.
8. As a simulator user, I want causal delays only, so that the model uses no negative delay.
9. As a reviewer, I want the 1 UI latency documented, so that cursor alignment is reproducible.
10. As a simulator user, I want 5 ps rise and fall times, so that transient analysis avoids infinite bandwidth.
11. As a board-level designer, I want outputs centered at 0.6 V common-mode, so that both legs have defined absolute voltages.
12. As a board-level designer, I want 50 Ω source resistance per leg, so that the TX has 100 Ω differential source impedance.
13. As a model user, I want 1.0 Vpp differential at the loaded TX pins, so that the measurement plane is explicit.
14. As a reviewer, I want Thevenin-source calibration, so that matched loading does not accidentally halve the requested swing.
15. As a receiver designer, I want 100 Ω differential termination, so that the link is conventionally matched.
16. As a verification engineer, I want deterministic PRBS7, so that simulations are repeatable.
17. As a verification engineer, I want at least eight PRBS7 periods, so that every sequence repeats in the eye.
18. As a signal-integrity engineer, I want a bypassable channel, so that FIR behavior can be isolated.
19. As a signal-integrity engineer, I want 0 dB DC gain and -12 dB at 10 GHz, so that Nyquist loss is explicit.
20. As a model user, I want a main-only FIR-off mode, so that equalized and unequalized results share one topology.
21. As a reviewer, I want TX and RX differential probe points, so that launch and received behavior can be inspected separately.
22. As a verification engineer, I want all eight adjacent-bit combinations checked, so that polarity and tap ordering cannot drift.
23. As a verification engineer, I want common-mode and loaded-swing checks, so that plausible traces cannot hide incorrect scaling.
24. As a signal-integrity engineer, I want FIR-on and FIR-off eyes under identical conditions, so that benefit is directly visible.
25. As an automation user, I want scalar LTspice measurements, so that the existing parser can evaluate the run.
26. As an automation user, I want simulator failure rejected before measurements are trusted, so that syntax errors cannot false-pass.
27. As a maintainer, I want only a reusable model and one testbench, so that no unnecessary framework is added.
28. As a future user, I want a replaceable channel boundary, so that Touchstone data can be added later without redesign.
29. As a reviewer, I want the artifact driven in LTspice, so that parser success is supplemented by observable eye behavior.
30. As an implementer, I want agreed values represented as named parameters, so that the schematic documents its specification.

Implementation Decisions

• Build one reusable ideal differential TX FIR behavioral subcircuit and one end-to-end testbench.
• Use native LTspice behavioral sources and passive elements; add no dependency or simulation framework.
• Represent NRZ symbols internally as -1 and +1.
• Default to 20 Gb/s and a 50 ps UI.
• Use pre/main/post coefficients of -0.15, 0.70, and -0.15.
• Implement delays of 0 UI, 1 UI, and 2 UI, with the middle path as main cursor and overall latency of 1 UI.
• Limit transitions to 5 ps.
• Generate complementary outputs around 0.6 V common-mode.
• Define 1.0 Vpp differential at the loaded TX pins. Use 2.0 Vpp differential open-circuit so matched division produces the requested swing.
• Use 50 Ω series resistance per TX leg and 100 Ω differential RX termination.
• Use deterministic 127-bit PRBS7.
• Provide FIR-on and main-only FIR-off modes with the same loaded peak swing.
• Provide a bypassable unity-DC-gain first-order channel with a pole near 2.59 GHz, producing approximately -12 dB at 10 GHz.
• Define insertion loss between loaded TX and loaded RX measurement planes.
• Simulate at least eight PRBS7 periods, approximately 50.8 ns, excluding initial settling from eye evaluation.
• Limit the transient maximum step sufficiently to resolve 5 ps transitions.
• Configure LTspice eye folding for 20 Gbaud and compensate for FIR latency plus channel group delay.
• Reuse the repository's LTspice execution and measurement parsing flow. Measurement names map directly to behavioral specifications.
• Do not add another wrapper around the existing LTspice runner.

Testing Decisions

• Use one primary seam: the complete LTspice testbench from PRBS7 through TX FIR, optional channel, and 100 Ω termination.
• Test externally observable voltage, timing, frequency response, measurements, and eyes rather than internal expressions.
• Verify all eight pre/main/post input combinations. Normalized output must be in ±0.4, ±0.7, and ±1.0.
• Verify matched-load differential levels of ±0.20 V, ±0.35 V, and ±0.50 V.
• Verify 1.0 Vpp loaded worst-case differential swing and 0.6 V common-mode.
• Verify cursor spacing of 50 ps and documented latency of 1 UI.
• Verify channel gain is approximately 0 dB at low frequency and -12 dB at 10 GHz.
• Verify bypass removes channel attenuation without changing FIR behavior.
• Verify FIR-off produces the main-only reference with the same loaded peak swing.
• Run FIR-on and FIR-off against identical PRBS7, channel, impedance, and termination conditions.
• Verify FIR-on RX eye height and eye width are both greater than FIR-off for the default channel.
• Treat failure to improve the eye as a failed coefficient/channel pairing; do not weaken acceptance or silently retune coefficients.
• Reject non-zero LTspice exit status before parsing measurements.
• Parse scalar measurements through the existing repository parser.
• Complete manual QA by opening the raw result in LTspice, plotting differential TX/RX, enabling eye folding, and confirming FIR-on versus FIR-off behavior.

Out of Scope

• Transistor-level TX implementation, device sizing, biasing, and process models.
• PVT, Monte Carlo, aging, supply noise, jitter, crosstalk, EMI, and BER extrapolation.
• PAM4 and other multi-level signaling.
• Adaptive tap training, coefficient optimization, and back-channel protocols.
• CTLE, RX FIR, DFE, slicers, and receiver adaptation.
• Package, connector, PCB geometry, extracted transmission lines, and Touchstone data.
• Compliance masks and protocol-specific certification.
• A graphical configuration application or generalized arbitrary-tap FIR framework.

Further Notes

• The fixed FIR has DC magnitude 0.4 and Nyquist magnitude 1.0, approximately 7.96 dB of relative high-frequency emphasis.
• The simple channel is a replaceable behavioral stimulus, not a physical interconnect model.
• Confirm the installed LTspice version before relying on waveform-viewer baud-rate eye folding.
• Reuse the existing local LTspice runner and measurement parser.
• All product decisions were resolved through the preceding specification interview; no further clarification is required for implementation.