Hi,
Thanks for your works!
I replaced external Flash Rom with a 64MB chip and followed instructions to program the patch.
But I got following error message:
make PATCH_PARAMS="--device=zelda" LARGE_FLASH=1 flash_patched
python3 scripts/check_env_vars.py "flash_patched" build/env "--device=zelda"
/usr/local/bin/openocd -f openocd/interface_"stlink".cfg
-c "init; halt;"
-c "program build/internal_flash_patched.bin 0x08000000 "";"
-c "reset; exit;"
Open On-Chip Debugger 0.12.0+dev-00440-ge8e09b1b5 (2023-12-20-14:08)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
none separate
Info : clock speed 1800 kHz
Info : STLINK V2J29S7 (API v2) VID:PID 0483:3748
Info : Target voltage: 3.124936
Info : [stm32h7x.cpu0] Cortex-M7 r1p1 processor detected
Info : [stm32h7x.cpu0] target has 8 breakpoints, 4 watchpoints
Info : [stm32h7x.cpu0] Examination succeed
Info : starting gdb server for stm32h7x.cpu0 on 3333
Info : Listening on port 3333 for gdb connections
Warn : target was in unknown state when halt was requested
[stm32h7x.cpu0] halted due to debug-request, current mode: Thread
xPSR: 0x81000000 pc: 0x08013652 msp: 0x2001ff78
[stm32h7x.cpu0] halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x0801368c msp: 0x20020000
Info : Device: STM32H7Ax/7Bx
Info : flash size probed value 128k
Info : STM32H7 flash has a single bank
Info : Bank (0) size is 128 kb, base address is 0x08000000
Initializing Octo-SPI interface
Info : device has to be switched to 4-byte addresses
Info : 4-byte address parameter table
Info : valid SFDP detected
Info : flash1 'sfdp' id = 0x3a25c2 size = 65536 KiB
Error: FSIZE in DCR(1) doesn't match actual capacity.
** Programming Started **
** Programming Finished **
Info : Device: STM32H7Ax/7Bx
Info : flash size probed value 128k
Info : STM32H7 flash has a single bank
Info : Bank (0) size is 128 kb, base address is 0x08000000
Initializing Octo-SPI interface
Error: Target not halted
Error executing event reset-end on target stm32h7x.cpu0:
embedded:startup.tcl:1225: Error:
in procedure 'ocd_process_reset'
in procedure 'ocd_process_reset_inner' called at file "embedded:startup.tcl", line 1225
if [ -s build/external_flash_patched.bin ]; then
/usr/local/bin/openocd -f "openocd/interface_stlink.cfg"
-c "init; halt;"
-c "program build/external_flash_patched.bin 0x90000000 "";"
-c "exit;"
&& make reset;
fi
Open On-Chip Debugger 0.12.0+dev-00440-ge8e09b1b5 (2023-12-20-14:08)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
none separate
Info : clock speed 1800 kHz
Info : STLINK V2J29S7 (API v2) VID:PID 0483:3748
Info : Target voltage: 3.124936
Info : [stm32h7x.cpu0] Cortex-M7 r1p1 processor detected
Info : [stm32h7x.cpu0] target has 8 breakpoints, 4 watchpoints
Info : [stm32h7x.cpu0] Examination succeed
Info : starting gdb server for stm32h7x.cpu0 on 3333
Info : Listening on port 3333 for gdb connections
Warn : target was in unknown state when halt was requested
[stm32h7x.cpu0] halted due to debug-request, current mode: Thread
xPSR: 0x81000000 pc: 0x08001ab6 msp: 0x2001b610
[stm32h7x.cpu0] halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x0801b42c msp: 0x2001b620
Info : Device: STM32H7Ax/7Bx
Info : flash size probed value 128k
Info : STM32H7 flash has a single bank
Info : Bank (0) size is 128 kb, base address is 0x08000000
Initializing Octo-SPI interface
Info : device has to be switched to 4-byte addresses
Info : 4-byte address parameter table
Info : valid SFDP detected
Info : flash1 'sfdp' id = 0x3a25c2 size = 65536 KiB
Error: FSIZE in DCR(1) doesn't match actual capacity.
** Programming Started **
** Programming Finished **
make[1]: Entering directory '/home/wells/game_watch/game-and-watch-patch'
/usr/local/bin/openocd -f openocd/interface_stlink.cfg -c "init; reset; exit"
Open On-Chip Debugger 0.12.0+dev-00440-ge8e09b1b5 (2023-12-20-14:08)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
none separate
Info : clock speed 1800 kHz
Info : STLINK V2J29S7 (API v2) VID:PID 0483:3748
Info : Target voltage: 3.124936
Info : [stm32h7x.cpu0] Cortex-M7 r1p1 processor detected
Info : [stm32h7x.cpu0] target has 8 breakpoints, 4 watchpoints
Info : [stm32h7x.cpu0] Examination succeed
Info : starting gdb server for stm32h7x.cpu0 on 3333
Info : Listening on port 3333 for gdb connections
Info : Device: STM32H7Ax/7Bx
Info : flash size probed value 128k
Info : STM32H7 flash has a single bank
Info : Bank (0) size is 128 kb, base address is 0x08000000
Initializing Octo-SPI interface
Error: Target not halted
Error executing event reset-end on target stm32h7x.cpu0:
embedded:startup.tcl:1225: Error:
in procedure 'ocd_process_reset'
in procedure 'ocd_process_reset_inner' called at file "embedded:startup.tcl", line 1225
make[1]: Leaving directory '/home/wells/game_watch/game-and-watch-patch'
=============================================
I also tried to program retro-go only and it sucessfully programmed. So I don't know where is the problem.
Thanks!
BR.
Wells.
Hi,
Thanks for your works!
I replaced external Flash Rom with a 64MB chip and followed instructions to program the patch.
But I got following error message:
make PATCH_PARAMS="--device=zelda" LARGE_FLASH=1 flash_patched
=============================================
I also tried to program retro-go only and it sucessfully programmed. So I don't know where is the problem.
Thanks!
BR.
Wells.