From 4818c4fceffa0b351cde3020d496a118aa97939c Mon Sep 17 00:00:00 2001 From: Kevin Brodsky Date: Fri, 10 Jul 2020 19:28:05 +0100 Subject: [PATCH 1/2] arm64: morello: Preserve capabilities in copy_page() Regular writes zero the capability tags in memory, which is exactly what we want in clear_page(), but in copy_page() we want to preserve the tags of the source page. We can achieve this by using capability loads/stores to copy both data and tags. Signed-off-by: Kevin Brodsky --- arch/arm64/lib/copy_page.S | 54 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/arch/arm64/lib/copy_page.S b/arch/arm64/lib/copy_page.S index e6374e7e55110f..dd0bf2559a8dfb 100644 --- a/arch/arm64/lib/copy_page.S +++ b/arch/arm64/lib/copy_page.S @@ -30,6 +30,19 @@ alternative_else_nop_endif cpyewn [x0]!, [x1]!, x2! ret .Lno_mops: +#endif + +#ifdef CONFIG_ARM64_MORELLO +alternative_if ARM64_MORELLO + ldp c2, c3, [x1] + nop + ldp c4, c5, [x1, #32] + nop + ldp c6, c7, [x1, #64] + nop + ldp c8, c9, [x1, #96] + nop +alternative_else #endif ldp x2, x3, [x1] ldp x4, x5, [x1, #16] @@ -39,12 +52,35 @@ alternative_else_nop_endif ldp x12, x13, [x1, #80] ldp x14, x15, [x1, #96] ldp x16, x17, [x1, #112] +#ifdef CONFIG_ARM64_MORELLO +alternative_endif +#endif add x0, x0, #256 add x1, x1, #128 1: tst x0, #(PAGE_SIZE - 1) +#ifdef CONFIG_ARM64_MORELLO +alternative_if ARM64_MORELLO + stp c2, c3, [x0, #-256] + ldp c2, c3, [x1] + nop + nop + stp c4, c5, [x0, #32 - 256] + ldp c4, c5, [x1, #32] + nop + nop + stp c6, c7, [x0, #64 - 256] + ldp c6, c7, [x1, #64] + nop + nop + stp c8, c9, [x0, #96 - 256] + ldp c8, c9, [x1, #96] + nop + nop +alternative_else +#endif stnp x2, x3, [x0, #-256] ldp x2, x3, [x1] stnp x4, x5, [x0, #16 - 256] @@ -61,12 +97,27 @@ alternative_else_nop_endif ldp x14, x15, [x1, #96] stnp x16, x17, [x0, #112 - 256] ldp x16, x17, [x1, #112] +#ifdef CONFIG_ARM64_MORELLO +alternative_endif +#endif add x0, x0, #128 add x1, x1, #128 b.ne 1b +#ifdef CONFIG_ARM64_MORELLO +alternative_if ARM64_MORELLO + stp c2, c3, [x0, #-256] + nop + stp c4, c5, [x0, #32 - 256] + nop + stp c6, c7, [x0, #64 - 256] + nop + stp c8, c9, [x0, #96 - 256] + nop +alternative_else +#endif stnp x2, x3, [x0, #-256] stnp x4, x5, [x0, #16 - 256] stnp x6, x7, [x0, #32 - 256] @@ -75,6 +126,9 @@ alternative_else_nop_endif stnp x12, x13, [x0, #80 - 256] stnp x14, x15, [x0, #96 - 256] stnp x16, x17, [x0, #112 - 256] +#ifdef CONFIG_ARM64_MORELLO +alternative_endif +#endif ret SYM_FUNC_END(__pi_copy_page) From 7b7ba7f0b114d4262caf311e91c5ee77629df585 Mon Sep 17 00:00:00 2001 From: Kevin Brodsky Date: Thu, 30 Dec 2021 19:08:21 +0000 Subject: [PATCH 2/2] arm64: morello: Remove late runtime detection We have just done away with runtime detection for Morello in early initialisation paths. As a result, standard runtime detection based on the Morello CPU capability (ARM64_MORELLO) is now pointless (and misleading). Remove all uses of the ARM64_MORELLO capability. In assembly, this allows us to simplify quite a few paths. In C, the CPU capability is only used through the system_supports_morello() function. We preserve that function for convenience, making it rely purely on the CONFIG macro. Where it is used inside a code region that is already #ifdef'd on the macro, it becomes a no-op and we remove it. The Morello CPU feature itself is preserved, as well as runtime detection for it (based on the Morello and TTPBHA ID fields). This is not essential, but makes it easy to keep HWCAP2_MORELLO exposed to userspace, and reading the ID fields is marginally useful in case Morello hardware somehow did not set them to the right value. Signed-off-by: Kevin Brodsky --- arch/arm64/lib/copy_page.S | 34 +++------------------------------- 1 file changed, 3 insertions(+), 31 deletions(-) diff --git a/arch/arm64/lib/copy_page.S b/arch/arm64/lib/copy_page.S index dd0bf2559a8dfb..d14627fa86fee4 100644 --- a/arch/arm64/lib/copy_page.S +++ b/arch/arm64/lib/copy_page.S @@ -33,17 +33,11 @@ alternative_else_nop_endif #endif #ifdef CONFIG_ARM64_MORELLO -alternative_if ARM64_MORELLO ldp c2, c3, [x1] - nop ldp c4, c5, [x1, #32] - nop ldp c6, c7, [x1, #64] - nop ldp c8, c9, [x1, #96] - nop -alternative_else -#endif +#else ldp x2, x3, [x1] ldp x4, x5, [x1, #16] ldp x6, x7, [x1, #32] @@ -52,8 +46,6 @@ alternative_else ldp x12, x13, [x1, #80] ldp x14, x15, [x1, #96] ldp x16, x17, [x1, #112] -#ifdef CONFIG_ARM64_MORELLO -alternative_endif #endif add x0, x0, #256 @@ -62,25 +54,15 @@ alternative_endif tst x0, #(PAGE_SIZE - 1) #ifdef CONFIG_ARM64_MORELLO -alternative_if ARM64_MORELLO stp c2, c3, [x0, #-256] ldp c2, c3, [x1] - nop - nop stp c4, c5, [x0, #32 - 256] ldp c4, c5, [x1, #32] - nop - nop stp c6, c7, [x0, #64 - 256] ldp c6, c7, [x1, #64] - nop - nop stp c8, c9, [x0, #96 - 256] ldp c8, c9, [x1, #96] - nop - nop -alternative_else -#endif +#else stnp x2, x3, [x0, #-256] ldp x2, x3, [x1] stnp x4, x5, [x0, #16 - 256] @@ -97,8 +79,6 @@ alternative_else ldp x14, x15, [x1, #96] stnp x16, x17, [x0, #112 - 256] ldp x16, x17, [x1, #112] -#ifdef CONFIG_ARM64_MORELLO -alternative_endif #endif add x0, x0, #128 @@ -107,17 +87,11 @@ alternative_endif b.ne 1b #ifdef CONFIG_ARM64_MORELLO -alternative_if ARM64_MORELLO stp c2, c3, [x0, #-256] - nop stp c4, c5, [x0, #32 - 256] - nop stp c6, c7, [x0, #64 - 256] - nop stp c8, c9, [x0, #96 - 256] - nop -alternative_else -#endif +#else stnp x2, x3, [x0, #-256] stnp x4, x5, [x0, #16 - 256] stnp x6, x7, [x0, #32 - 256] @@ -126,8 +100,6 @@ alternative_else stnp x12, x13, [x0, #80 - 256] stnp x14, x15, [x0, #96 - 256] stnp x16, x17, [x0, #112 - 256] -#ifdef CONFIG_ARM64_MORELLO -alternative_endif #endif ret