Pooling has no CUDA path, every pool round trips through the host

[CanReader]

All three pooling forwards start with self.to_vec() and end with
.to(self.device()), and all three backwards do the same. So
mnist_cnn --features cuda moves every activation to the host and back, twice per
pool layer per step.

kernels.cu already has working fastnn_cuda_max_pool2d, ..._backward,
fastnn_cuda_avg_pool2d and fastnn_cuda_adaptive_avg_pool2d. None of them are
declared in ffi.rs.

README's Known gaps lists cat/stack/narrow as host bound but doesn't mention
pooling.

Files: src/tensor/ops/pool.rs:21, :54, :84