The current design has one 100 µF bulk cap on +12V and one on -12V at the power input. For a fully-loaded board with 8 modules — especially if some are digital (Pi-Pico-RLS, Clock module, OLED-driven modules) — the centralized cap can't keep up with local di/dt spikes at the far-end connectors.
Standard practice for distribution boards is to add per-connector decoupling: a small (10 µF X7R ceramic) cap across ±12V at each slot's IDC / JST footprint.
Math: for a digital module pulling ~50 mA peak with sharp clock-rate transients, the local cap discharges briefly and recovers from the bulk. A 10 µF X7R provides good high-frequency response that a 100 µF electrolytic can't.
Action:
The current design has one 100 µF bulk cap on +12V and one on -12V at the power input. For a fully-loaded board with 8 modules — especially if some are digital (Pi-Pico-RLS, Clock module, OLED-driven modules) — the centralized cap can't keep up with local di/dt spikes at the far-end connectors.
Standard practice for distribution boards is to add per-connector decoupling: a small (10 µF X7R ceramic) cap across ±12V at each slot's IDC / JST footprint.
Math: for a digital module pulling ~50 mA peak with sharp clock-rate transients, the local cap discharges briefly and recovers from the bulk. A 10 µF X7R provides good high-frequency response that a 100 µF electrolytic can't.
Action: