Donny/rx tb#29
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Pull request overview
This PR refactors the RX testbench to exercise the full receive chain through the FIFO/AXI-stream path instead of the older direct payload outputs. It aligns rx_tb with the repository’s generic cocotb infrastructure and adds a wrapper/topology that matches the newer RX datapath structure.
Changes:
- Reworks
rx_topto connectethernet_assemblerintorx_fifo_ctrl, with a newrx_top_wrapperexposing the internal AXI stream used by cocotb. - Replaces the legacy RX transaction/scoreboard flow with generic testbench pieces: driver, event monitor, model, checker, and shared test base.
- Updates the runner/tests and tweaks FIFO control buffering/depth to support the end-to-end RX path.
Reviewed changes
Copilot reviewed 15 out of 15 changed files in this pull request and generated 7 comments.
Show a summary per file
| File | Description |
|---|---|
rx_tb/tb/rx_transaction.py |
Removes the legacy direct-output RX transaction type. |
rx_tb/tb/rx_test_base.py |
Adds a shared RX cocotb base wired to the generic driver/monitor/model/checker stack. |
rx_tb/tb/rx_test.py |
Rewrites RX tests around the new wrapper/test-base flow and randomized traffic scenarios. |
rx_tb/tb/rx_tb_runner.py |
Updates the cocotb runner to build the new wrapper/topology and auto-select a simulator. |
rx_tb/tb/rx_sequence.py |
Publishes expected frame notifications while driving encoded RX traffic. |
rx_tb/tb/rx_scoreboard.py |
Removes the legacy RX scoreboard implementation. |
rx_tb/tb/rx_model.py |
Adds a simple model that queues expected frame bytes for checking. |
rx_tb/tb/rx_event_monitor.py |
Adds an AXI-stream event monitor that reconstructs packets from m_axi. |
rx_tb/tb/rx_driver.py |
Adds an RX driver bound to the source clock domain. |
rx_tb/tb/rx_checker.py |
Adds a custom checker for expected-vs-received packet matching. |
rx_tb/rtl/rx_top_wrapper.sv |
Introduces a cocotb-facing wrapper with dual clocks/resets and internal AXI interface. |
rx_tb/rtl/rx_top.sv |
Refactors the RX RTL to emit AXI traffic through rx_fifo_ctrl instead of raw output signals. |
rx_fifo/rtl/rx_fifo_ctrl.sv |
Adjusts buffering/full-handling logic and increases FIFO depth. |
descrambler/rtl/descrambler.sv |
Cleans up formatting and removes debug print logic. |
bubbler/rtl/bubbler.sv |
Cleans up formatting and removes debug print logic. |
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| checker=checker, | ||
| ) | ||
| self.sequence.add_subscriber(self.scoreboard) | ||
| self.ready_driver = RXFifoReadyDriver(dut, probability=ready_probability) |
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| DATA_W = 256 | ||
| MASK_W = DATA_W // 8 |
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| localparam DATA_W = DIN_W; | ||
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| localparam PCS_W = 66; | ||
| localparam HEADER_W = 2; | ||
| localparam ETH_DATA_W = 64; | ||
| localparam ETH_MASK_W = ETH_DATA_W / 8; | ||
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| logic [ PCS_W-1:0] bubbler_data_66; | ||
| logic bubbler_valid_66; | ||
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| logic [ DIN_W-1:0] descrambled_data_64; |
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| frames = [list(range(8 + i)) for i in range(20)] | ||
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| await seq.send_idles(20) | ||
| await drain_and_check(dut, monitor, scoreboard) | ||
| await tb.sequence.send_idles(LOCK_IDLES) | ||
| await tb.sequence.send_back_to_back_frames(frames, gap_idles=4) |
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| size = rng.randint(16, 128) | ||
| frame = [rng.randint(0, 255) for _ in range(size)] |
Collaborator
|
looks good |
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Updated rx_tb chain