diff --git a/poster.html b/poster.html index 6e3a416..1da1ff9 100644 --- a/poster.html +++ b/poster.html @@ -225,6 +225,68 @@ margin: 0 5px; } + /* Workflow diagram styles */ + .workflow-container { + margin: 15px 0; + padding: 10px; + background: #f9f9f9; + border-radius: 8px; + border: 1px solid #e0e0e0; + } + + .workflow { + display: flex; + align-items: center; + justify-content: center; + flex-wrap: wrap; + gap: 8px; + font-size: 0.75em; + } + + .workflow-step { + background: white; + border: 2px solid #ddd; + border-radius: 6px; + padding: 6px 10px; + text-align: center; + min-width: 60px; + font-weight: bold; + color: #333; + box-shadow: 0 2px 4px rgba(0,0,0,0.1); + transition: all 0.3s ease; + } + + .workflow-step:hover { + transform: translateY(-2px); + box-shadow: 0 4px 8px rgba(0,0,0,0.15); + } + + .workflow-arrow { + font-size: 1.2em; + color: #667eea; + font-weight: bold; + } + + /* Different colors for different workflows */ + .autochip .workflow-step { + border-color: #4CAF50; + color: #2E7D32; + } + + .security .workflow-step { + border-color: #FF5722; + color: #D84315; + } + + .c2hlsc .workflow-step { + border-color: #2196F3; + color: #1565C0; + } + + .workflow-step:nth-child(odd):not(.workflow-arrow) { + background: linear-gradient(135deg, #f8f9fa 0%, #e9ecef 100%); + } + .stats-section { background: #263238; color: white; @@ -284,6 +346,22 @@ padding: 20px; margin: 10px; } + + .workflow { + flex-direction: column; + gap: 5px; + } + + .workflow-arrow { + transform: rotate(90deg); + font-size: 1.5em; + } + + .workflow-step { + min-width: 80px; + padding: 8px 12px; + font-size: 0.8em; + } } @@ -307,25 +385,60 @@

📦 Repository

🌟 Featured Submodules

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🔧 AutoChip

Generate functional Verilog modules from design prompts using LLMs with iterative error feedback

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Natural Language Prompt
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LLM
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Verilog Code
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Error Feedback
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Refined Verilog
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📄 Paper 💻 Code
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🛡️ Security Assertions

LLM-generated SystemVerilog assertions for hardware security verification

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Natural Language Security Specs
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LLM
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SystemVerilog Assertions
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Hardware Verification
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📄 Paper 💻 Code
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⚡ C2HLSC

Bridge software-to-hardware design gap using LLMs to refactor C code for HLS

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C Code
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LLM Transformation
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HLS-Compatible C
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Hardware Synthesis
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📄 Paper 💻 Code