uboot-rockchip: update with 2022.07-rc2 to support RK3566/RK35688

Author: coolsnowwolf

package/boot/uboot-rockchip/Makefile

@@ -1,14 +1,14 @@
 #
 # This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
+# See /LICENSE for more information. 
 #
 include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/kernel.mk
 
-PKG_VERSION:=2021.07
+PKG_VERSION:=2022.07-rc2
 PKG_RELEASE:=$(AUTORELEASE)
 
-PKG_HASH:=312b7eeae44581d1362c3a3f02c28d806647756c82ba8c72241c7cdbe68ba77e
+PKG_HASH:=de4819a6d83c557efe3cf65ad17ec111008baa400ea2a8d13e04ddd43eca3a81
 
 PKG_MAINTAINER:=Tobias Maedel <openwrt@tbspace.de>
 

package/boot/uboot-rockchip/patches/001-rockchip-rk3568-add-boot-device-detection.patch

@@ -0,0 +1,43 @@
+From 9b92a43a4f5acf4cba14fd9d473b3120688532dc Mon Sep 17 00:00:00 2001
+From: Peter Geis <pgwipeout@gmail.com>
+Date: Sun, 19 Dec 2021 08:10:24 -0500
+Subject: [PATCH 01/11] rockchip: rk3568: add boot device detection
+
+Enable spl to detect which device it was booted from.
+
+Signed-off-by: Peter Geis <pgwipeout@gmail.com>
+---
+ arch/arm/mach-rockchip/rk3568/rk3568.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
++++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
+@@ -7,6 +7,7 @@
+ #include <dm.h>
+ #include <asm/armv8/mmu.h>
+ #include <asm/io.h>
++#include <asm/arch-rockchip/bootrom.h>
+ #include <asm/arch-rockchip/grf_rk3568.h>
+ #include <asm/arch-rockchip/hardware.h>
+ #include <dt-bindings/clock/rk3568-cru.h>
+@@ -23,6 +24,7 @@
+ #define SGRF_SOC_CON4			0x10
+ #define EMMC_HPROT_SECURE_CTRL		0x03
+ #define SDMMC0_HPROT_SECURE_CTRL	0x01
++
+ /* PMU_GRF_GPIO0D_IOMUX_L */
+ enum {
+ 	GPIO0D1_SHIFT		= 4,
+@@ -43,6 +45,12 @@ enum {
+ 	UART2_IO_SEL_M0		= 0,
+ };
+ 
++const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
++	[BROM_BOOTSOURCE_EMMC] = "/sdhci@fe310000",
++	[BROM_BOOTSOURCE_SPINOR] = "/spi@fe300000/flash@0",
++	[BROM_BOOTSOURCE_SD] = "/mmc@fe2b0000",
++};
++
+ static struct mm_region rk3568_mem_map[] = {
+ 	{
+ 		.virt = 0x0UL,

package/boot/uboot-rockchip/patches/002-rockchip-rk3568-enable-automatic-power-savings.patch

@@ -0,0 +1,52 @@
+From 09d877cf076cbb67c79054e12bbb7c63a91faa71 Mon Sep 17 00:00:00 2001
+From: Peter Geis <pgwipeout@gmail.com>
+Date: Sun, 19 Dec 2021 08:11:56 -0500
+Subject: [PATCH 02/11] rockchip: rk3568: enable automatic power savings
+
+Enable automatic clock gating, solves the 7c temperature difference on
+SoQuartz.
+
+Signed-off-by: Peter Geis <pgwipeout@gmail.com>
+---
+ arch/arm/mach-rockchip/rk3568/rk3568.c | 23 +++++++++++++++++++++++
+ 1 file changed, 23 insertions(+)
+
+--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
++++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
+@@ -25,6 +25,15 @@
+ #define EMMC_HPROT_SECURE_CTRL		0x03
+ #define SDMMC0_HPROT_SECURE_CTRL	0x01
+ 
++#define PMU_BASE_ADDR		0xfdd90000
++#define PMU_NOC_AUTO_CON0	(0x70)
++#define PMU_NOC_AUTO_CON1	(0x74)
++#define EDP_PHY_GRF_BASE	0xfdcb0000
++#define EDP_PHY_GRF_CON0	(EDP_PHY_GRF_BASE + 0x00)
++#define EDP_PHY_GRF_CON10	(EDP_PHY_GRF_BASE + 0x28)
++#define CPU_GRF_BASE		0xfdc30000
++#define GRF_CORE_PVTPLL_CON0	(0x10)
++
+ /* PMU_GRF_GPIO0D_IOMUX_L */
+ enum {
+ 	GPIO0D1_SHIFT		= 4,
+@@ -99,6 +108,20 @@ void board_debug_uart_init(void)
+ int arch_cpu_init(void)
+ {
+ #ifdef CONFIG_SPL_BUILD
++	/*
++	 * When perform idle operation, corresponding clock can
++	 * be opened or gated automatically.
++	 */
++	writel(0xffffffff, PMU_BASE_ADDR + PMU_NOC_AUTO_CON0);
++	writel(0x000f000f, PMU_BASE_ADDR + PMU_NOC_AUTO_CON1);
++
++	/* Disable eDP phy by default */
++	writel(0x00070007, EDP_PHY_GRF_CON10);
++	writel(0x0ff10ff1, EDP_PHY_GRF_CON0);
++
++	/* Set core pvtpll ring length */
++	writel(0x00ff002b, CPU_GRF_BASE + GRF_CORE_PVTPLL_CON0);
++
+ 	/* Set the emmc sdmmc0 to secure */
+ 	rk_clrreg(SGRF_BASE + SGRF_SOC_CON4, (EMMC_HPROT_SECURE_CTRL << 11
+ 		| SDMMC0_HPROT_SECURE_CTRL << 4));

package/boot/uboot-rockchip/patches/003-Makefile-rockchip-HACK-build-rk3568-images.patch

@@ -0,0 +1,47 @@
+From ddbcec939789d1f7264134b3628ffb649ec88168 Mon Sep 17 00:00:00 2001
+From: Peter Geis <pgwipeout@gmail.com>
+Date: Sun, 19 Dec 2021 08:20:33 -0500
+Subject: [PATCH 03/11] Makefile: rockchip: HACK: build rk3568 images
+
+This is a hack to build rk3568 images.
+It seems makefile can't cope with the format mkimage expects for
+multiple file entries, so hack around the situation.
+
+Signed-off-by: Peter Geis <pgwipeout@gmail.com>
+---
+ Makefile | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+--- a/Makefile
++++ b/Makefile
+@@ -1047,6 +1047,9 @@ quiet_cmd_mkimage = MKIMAGE $@
+ cmd_mkimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -d $< $@ \
+ 	>$(MKIMAGEOUTPUT) $(if $(KBUILD_VERBOSE:0=), && cat $(MKIMAGEOUTPUT))
+ 
++cmd_mkimage_combined = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -d $(COMBINED_FILE):$< $@ \
++	>$(MKIMAGEOUTPUT) $(if $(KBUILD_VERBOSE:0=), && cat $(MKIMAGEOUTPUT))
++
+ quiet_cmd_mkfitimage = MKIMAGE $@
+ cmd_mkfitimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) \
+ 	-f $(U_BOOT_ITS) -p $(CONFIG_FIT_EXTERNAL_OFFSET) $@ \
+@@ -1491,6 +1494,7 @@ u-boot-with-spl.bin: $(SPL_IMAGE) $(SPL_
+ ifeq ($(CONFIG_ARCH_ROCKCHIP),y)
+ 
+ # TPL + SPL
++ifneq ($(CONFIG_SYS_SOC),$(filter $(CONFIG_SYS_SOC),"rk3568" "rk3566"))
+ ifeq ($(CONFIG_SPL)$(CONFIG_TPL),yy)
+ MKIMAGEFLAGS_u-boot-tpl-rockchip.bin = -n $(CONFIG_SYS_SOC) -T rksd
+ tpl/u-boot-tpl-rockchip.bin: tpl/u-boot-tpl.bin FORCE
+@@ -1502,6 +1506,12 @@ MKIMAGEFLAGS_idbloader.img = -n $(CONFIG
+ idbloader.img: spl/u-boot-spl.bin FORCE
+ 	$(call if_changed,mkimage)
+ endif
++else
++MKIMAGEFLAGS_idbloader.img = -n $(CONFIG_SYS_SOC) -T rksd
++COMBINED_FILE = ram_init.bin
++idbloader.img: spl/u-boot-spl.bin FORCE
++	$(call if_changed,mkimage_combined)
++endif
+ 
+ ifeq ($(CONFIG_ARM64),y)
+ OBJCOPYFLAGS_u-boot-rockchip.bin = -I binary -O binary \