Computer-arc_reqs/ramFile_test.do at main · HossamMo123/Computer-arc_reqs · GitHub

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vsim work.reg_file
# End time: 20:02:05 on Oct 13,2025, Elapsed time: 22:43:42
# Errors: 1, Warnings: 2
# vsim work.reg_file
# Start time: 20:02:05 on Oct 13,2025
# Loading std.standard
# Loading std.textio(body)
# Loading ieee.std_logic_1164(body)
# Loading ieee.numeric_std(body)
# Loading work.reg_file(structural)
# Loading work.reg8(structural)
# Loading work.dff(behav)

# ===============================================================
# Add all signals to the waveform
# ===============================================================
add wave -position insertpoint sim:/reg_file/*

# ===============================================================
# Apply stimulus manually
# ===============================================================

# --- Clock generation (10 ns period) ---
force -freeze sim:/reg_file/clk 1 0, 0 {5 ns} -r 10ns

# --- Initial reset ---
force -freeze sim:/reg_file/rst 1 0
run 20 ns
force -freeze sim:/reg_file/rst 0 0

# ===============================================================
# Test Sequence
# ===============================================================

# ---------------------------------------------------------------
# 1. Reset all registers, set all read addresses to zero
# ---------------------------------------------------------------
force -freeze sim:/reg_file/rd_addr0 000 0
force -freeze sim:/reg_file/rd_addr1 000 0
force -freeze sim:/reg_file/we 0 0
force -freeze sim:/reg_file/data_in x"00" 0
run 20 ns

# ---------------------------------------------------------------
# 2. Write Reg(0) = 0xFF
# ---------------------------------------------------------------
force -freeze sim:/reg_file/we 1 0
force -freeze sim:/reg_file/wr_addr 000 0
force -freeze sim:/reg_file/data_in x"FF" 0
run 10 ns
force -freeze sim:/reg_file/we 0 0
run 10 ns

# ---------------------------------------------------------------
# 3. Write Reg(1) = 0x11
# ---------------------------------------------------------------
force -freeze sim:/reg_file/we 1 0
force -freeze sim:/reg_file/wr_addr 001 0
force -freeze sim:/reg_file/data_in x"11" 0
run 10 ns
force -freeze sim:/reg_file/we 0 0
run 10 ns

# ---------------------------------------------------------------
# 4. Write Reg(7) = 0x90
# ---------------------------------------------------------------
force -freeze sim:/reg_file/we 1 0
force -freeze sim:/reg_file/wr_addr 111 0
force -freeze sim:/reg_file/data_in x"90" 0
run 10 ns
force -freeze sim:/reg_file/we 0 0
run 10 ns

# ---------------------------------------------------------------
# 5. Write Reg(3) = 0x08
# ---------------------------------------------------------------
force -freeze sim:/reg_file/we 1 0
force -freeze sim:/reg_file/wr_addr 011 0
force -freeze sim:/reg_file/data_in x"08" 0
run 10 ns
force -freeze sim:/reg_file/we 0 0
run 10 ns

# ---------------------------------------------------------------
# 6. Read Reg(1) on port 0, Reg(7) on port 1, and write 0x03 to Reg(4)
# ---------------------------------------------------------------
force -freeze sim:/reg_file/rd_addr0 001 0
force -freeze sim:/reg_file/rd_addr1 111 0
force -freeze sim:/reg_file/we 1 0
force -freeze sim:/reg_file/wr_addr 100 0
force -freeze sim:/reg_file/data_in x"03" 0
run 10 ns
force -freeze sim:/reg_file/we 0 0
run 20 ns

# ---------------------------------------------------------------
# 7. Read Reg(2) on port 0, Reg(3) on port 1
# ---------------------------------------------------------------
force -freeze sim:/reg_file/rd_addr0 010 0
force -freeze sim:/reg_file/rd_addr1 011 0
run 20 ns

# ---------------------------------------------------------------
# 8. Read Reg(4) on port 0, Reg(5) on port 1
# ---------------------------------------------------------------
force -freeze sim:/reg_file/rd_addr0 100 0
force -freeze sim:/reg_file/rd_addr1 101 0
run 20 ns

# ---------------------------------------------------------------
# 9. Read Reg(6) on port 0, Reg(0) on port 1, and write 0x01 to Reg(0)
# ---------------------------------------------------------------
force -freeze sim:/reg_file/rd_addr0 110 0
force -freeze sim:/reg_file/rd_addr1 000 0
force -freeze sim:/reg_file/we 1 0
force -freeze sim:/reg_file/wr_addr 000 0
force -freeze sim:/reg_file/data_in x"01" 0
run 10 ns
force -freeze sim:/reg_file/we 0 0
run 20 ns

# ===============================================================
# End simulation
# ===============================================================
run 100 ns
echo "# ==============================================================="
echo "# End time: [clock format [clock seconds] -format {%H:%M:%S on %b %d,%Y}]"
echo "# ==============================================================="