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executable file
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samcpu.vvp
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executable file
·2290 lines (2290 loc) · 78.6 KB
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#! /usr/bin/vvp
:ivl_version "10.1 (stable)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision - 12;
:vpi_module "system";
:vpi_module "vhdl_sys";
:vpi_module "v2005_math";
:vpi_module "va_math";
S_0x55e766cdc2c0 .scope module, "TestBench" "TestBench" 2 4;
.timescale -9 -12;
v0x55e766d67a30_0 .var "CLK", 0 0;
v0x55e766d67ad0_0 .var "START", 0 0;
v0x55e766d67b90_0 .var/i "handle1", 31 0;
v0x55e766d67c30_0 .var/i "handle2", 31 0;
S_0x55e766cdb860 .scope module, "cpu" "CPU" 2 8, 3 3 0, S_0x55e766cdc2c0;
.timescale 0 0;
.port_info 0 /INPUT 1 "clk_i"
.port_info 1 /INPUT 1 "start_i"
L_0x55e766d78fb0 .functor AND 1, v0x55e766d64bc0_0, v0x55e766d5d520_0, C4<1>, C4<1>;
v0x55e766d65460_0 .net "ALUOp", 2 0, v0x55e766d5d460_0; 1 drivers
v0x55e766d65590_0 .net "ALUSrc", 0 0, v0x55e766d5d380_0; 1 drivers
v0x55e766d656a0_0 .net "AlU_control", 3 0, v0x55e766d50e10_0; 1 drivers
v0x55e766d65740_0 .net "RD_data", 31 0, v0x55e766d59ac0_0; 1 drivers
v0x55e766d657e0_0 .net "RS_data", 31 0, L_0x55e766d78450; 1 drivers
v0x55e766d658f0_0 .net "RT_data", 31 0, L_0x55e766d78780; 1 drivers
v0x55e766d659b0_0 .net "RegDst", 0 0, v0x55e766d5d5f0_0; 1 drivers
v0x55e766d65aa0_0 .net "RegWrite", 0 0, v0x55e766d5d690_0; 1 drivers
L_0x7f00d2fde1c8 .functor BUFT 1, C4<000000>, C4<0>, C4<0>, C4<0>;
v0x55e766d65b90_0 .net/2u *"_s24", 5 0, L_0x7f00d2fde1c8; 1 drivers
v0x55e766d65c70_0 .net *"_s27", 25 0, L_0x55e766d79370; 1 drivers
v0x55e766d65d50_0 .net *"_s31", 3 0, L_0x55e766d797e0; 1 drivers
v0x55e766d65e30_0 .net *"_s33", 27 0, L_0x55e766d798f0; 1 drivers
v0x55e766d65f10_0 .net "branch", 0 0, v0x55e766d5d520_0; 1 drivers
v0x55e766d65fb0_0 .net "branch_address", 31 0, v0x55e766d60110_0; 1 drivers
v0x55e766d66050_0 .net "branch_target_addr", 31 0, L_0x55e766d78f10; 1 drivers
v0x55e766d66160_0 .net "branch_type", 1 0, v0x55e766d5d7a0_0; 1 drivers
v0x55e766d66270_0 .net "branch_type_or_not", 0 0, v0x55e766d64bc0_0; 1 drivers
v0x55e766d66420_0 .net "clk_i", 0 0, v0x55e766d67a30_0; 1 drivers
v0x55e766d664c0_0 .net "data_after_left2", 31 0, L_0x55e766d790c0; 1 drivers
v0x55e766d665b0_0 .net "data_after_se", 31 0, v0x55e766d63f40_0; 1 drivers
v0x55e766d66670_0 .net "data_into_ALU_after_mux", 31 0, v0x55e766d5f950_0; 1 drivers
v0x55e766d66780_0 .net "instruction", 31 0, L_0x55e766d67db0; 1 drivers
v0x55e766d66840_0 .net "jal", 0 0, v0x55e766d5d960_0; 1 drivers
v0x55e766d668e0_0 .net "jr", 0 0, v0x55e766d595c0_0; 1 drivers
v0x55e766d669d0_0 .net "jump", 0 0, v0x55e766d5da20_0; 1 drivers
v0x55e766d66ac0_0 .net "jump_address", 31 0, L_0x55e766d79990; 1 drivers
v0x55e766d66b60_0 .net "jump_address_2", 31 0, v0x55e766d61820_0; 1 drivers
v0x55e766d66c50_0 .net "mem_read", 0 0, v0x55e766d5dae0_0; 1 drivers
v0x55e766d66d40_0 .net "mem_reg", 0 0, v0x55e766d5db80_0; 1 drivers
v0x55e766d66e30_0 .net "mem_write", 0 0, v0x55e766d5dc20_0; 1 drivers
v0x55e766d66f20_0 .net "number_WriteReg_fromMux", 4 0, v0x55e766d61070_0; 1 drivers
v0x55e766d67030_0 .net "pc_in", 31 0, v0x55e766d5ebf0_0; 1 drivers
v0x55e766d67140_0 .net "pc_out", 31 0, v0x55e766d62610_0; 1 drivers
v0x55e766d67200_0 .net "pc_plus_4", 31 0, L_0x55e766d67d10; 1 drivers
v0x55e766d672c0_0 .net "result_mem", 31 0, v0x55e766d5c910_0; 1 drivers
v0x55e766d67380_0 .net "result_mux_mem_alu", 31 0, v0x55e766d61fe0_0; 1 drivers
v0x55e766d67490_0 .net "start_i", 0 0, v0x55e766d67ad0_0; 1 drivers
v0x55e766d67580_0 .net "tmp", 31 0, L_0x55e766d79470; 1 drivers
v0x55e766d67640_0 .net "tmp_jump_address", 31 0, L_0x55e766d79650; 1 drivers
v0x55e766d676e0_0 .net "tmp_number_WriteReg_fromMux", 4 0, v0x55e766d608c0_0; 1 drivers
v0x55e766d677d0_0 .net "write_data2", 31 0, v0x55e766d65210_0; 1 drivers
v0x55e766d678e0_0 .net "zero_alu", 0 0, v0x55e766d5a0f0_0; 1 drivers
L_0x55e766d780f0 .part L_0x55e766d67db0, 16, 5;
L_0x55e766d78190 .part L_0x55e766d67db0, 11, 5;
L_0x55e766d78880 .part L_0x55e766d67db0, 21, 5;
L_0x55e766d78970 .part L_0x55e766d67db0, 16, 5;
L_0x55e766d78a60 .part L_0x55e766d67db0, 26, 6;
L_0x55e766d78b00 .part L_0x55e766d67db0, 0, 6;
L_0x55e766d78be0 .part L_0x55e766d67db0, 0, 16;
L_0x55e766d78dd0 .part L_0x55e766d67db0, 6, 5;
L_0x55e766d791f0 .part v0x55e766d59ac0_0, 31, 1;
L_0x55e766d79370 .part L_0x55e766d67db0, 0, 26;
L_0x55e766d79470 .concat [ 26 6 0 0], L_0x55e766d79370, L_0x7f00d2fde1c8;
L_0x55e766d797e0 .part L_0x55e766d67d10, 28, 4;
L_0x55e766d798f0 .part L_0x55e766d79650, 0, 28;
L_0x55e766d79990 .concat [ 28 4 0 0], L_0x55e766d798f0, L_0x55e766d797e0;
S_0x55e766cda020 .scope module, "AC" "ALU_Ctrl" 3 134, 4 3 0, S_0x55e766cdb860;
.timescale 0 0;
.port_info 0 /INPUT 6 "funct_i"
.port_info 1 /INPUT 3 "ALUOp_i"
.port_info 2 /OUTPUT 4 "ALUCtrl_o"
.port_info 3 /OUTPUT 1 "jr_o"
v0x55e766d50e10_0 .var "ALUCtrl_o", 3 0;
v0x55e766ce9e60_0 .net "ALUOp_i", 2 0, v0x55e766d5d460_0; alias, 1 drivers
v0x55e766d59500_0 .net "funct_i", 5 0, L_0x55e766d78b00; 1 drivers
v0x55e766d595c0_0 .var "jr_o", 0 0;
E_0x55e766d50830 .event edge, v0x55e766ce9e60_0, v0x55e766d59500_0;
S_0x55e766d59700 .scope module, "ALU" "ALU" 3 154, 5 3 0, S_0x55e766cdb860;
.timescale 0 0;
.port_info 0 /INPUT 32 "src1_i"
.port_info 1 /INPUT 32 "src2_i"
.port_info 2 /INPUT 4 "ctrl_i"
.port_info 3 /OUTPUT 32 "result_o"
.port_info 4 /OUTPUT 1 "zero_o"
.port_info 5 /INPUT 5 "shamt_i"
L_0x55e766d78c80 .functor BUFZ 32, L_0x55e766d78450, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
L_0x55e766d78cf0 .functor BUFZ 32, v0x55e766d5f950_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
L_0x55e766d78d60 .functor BUFZ 5, L_0x55e766d78dd0, C4<00000>, C4<00000>, C4<00000>;
v0x55e766d599e0_0 .net "ctrl_i", 3 0, v0x55e766d50e10_0; alias, 1 drivers
v0x55e766d59ac0_0 .var "result_o", 31 0;
v0x55e766d59b80_0 .net "shamt_i", 4 0, L_0x55e766d78dd0; 1 drivers
v0x55e766d59c40_0 .net "src1_i", 31 0, L_0x55e766d78450; alias, 1 drivers
v0x55e766d59d20_0 .net "src2_i", 31 0, v0x55e766d5f950_0; alias, 1 drivers
v0x55e766d59e50_0 .net/s "tmp_shamt", 4 0, L_0x55e766d78d60; 1 drivers
v0x55e766d59f30_0 .net/s "tmp_src1", 31 0, L_0x55e766d78c80; 1 drivers
v0x55e766d5a010_0 .net/s "tmp_src2", 31 0, L_0x55e766d78cf0; 1 drivers
v0x55e766d5a0f0_0 .var "zero_o", 0 0;
E_0x55e766d508b0/0 .event edge, v0x55e766d50e10_0, v0x55e766d59c40_0, v0x55e766d59d20_0, v0x55e766d59f30_0;
E_0x55e766d508b0/1 .event edge, v0x55e766d5a010_0, v0x55e766d59e50_0, v0x55e766d59b80_0, v0x55e766d59ac0_0;
E_0x55e766d508b0 .event/or E_0x55e766d508b0/0, E_0x55e766d508b0/1;
S_0x55e766d5a270 .scope module, "Adder1" "Adder" 3 62, 6 3 0, S_0x55e766cdb860;
.timescale 0 0;
.port_info 0 /INPUT 32 "src1_i"
.port_info 1 /INPUT 32 "src2_i"
.port_info 2 /OUTPUT 32 "sum_o"
v0x55e766d5a440_0 .net "src1_i", 31 0, v0x55e766d62610_0; alias, 1 drivers
L_0x7f00d2fde018 .functor BUFT 1, C4<00000000000000000000000000000100>, C4<0>, C4<0>, C4<0>;
v0x55e766d5a540_0 .net "src2_i", 31 0, L_0x7f00d2fde018; 1 drivers
v0x55e766d5a620_0 .net "sum_o", 31 0, L_0x55e766d67d10; alias, 1 drivers
L_0x55e766d67d10 .arith/sum 32, v0x55e766d62610_0, L_0x7f00d2fde018;
S_0x55e766d5a760 .scope module, "Adder2" "Adder" 3 163, 6 3 0, S_0x55e766cdb860;
.timescale 0 0;
.port_info 0 /INPUT 32 "src1_i"
.port_info 1 /INPUT 32 "src2_i"
.port_info 2 /OUTPUT 32 "sum_o"
v0x55e766d5a980_0 .net "src1_i", 31 0, L_0x55e766d67d10; alias, 1 drivers
v0x55e766d5aa90_0 .net "src2_i", 31 0, L_0x55e766d790c0; alias, 1 drivers
v0x55e766d5ab50_0 .net "sum_o", 31 0, L_0x55e766d78f10; alias, 1 drivers
L_0x55e766d78f10 .arith/sum 32, L_0x55e766d67d10, L_0x55e766d790c0;
S_0x55e766d5acc0 .scope module, "DM" "Data_Memory" 3 232, 7 1 0, S_0x55e766cdb860;
.timescale 0 0;
.port_info 0 /INPUT 1 "clk_i"
.port_info 1 /INPUT 32 "addr_i"
.port_info 2 /INPUT 32 "data_i"
.port_info 3 /INPUT 1 "MemRead_i"
.port_info 4 /INPUT 1 "MemWrite_i"
.port_info 5 /OUTPUT 32 "data_o"
v0x55e766d5b000 .array "Mem", 127 0, 7 0;
v0x55e766d5c4f0_0 .net "MemRead_i", 0 0, v0x55e766d5dae0_0; alias, 1 drivers
v0x55e766d5c5b0_0 .net "MemWrite_i", 0 0, v0x55e766d5dc20_0; alias, 1 drivers
v0x55e766d5c650_0 .net "addr_i", 31 0, v0x55e766d59ac0_0; alias, 1 drivers
v0x55e766d5c740_0 .net "clk_i", 0 0, v0x55e766d67a30_0; alias, 1 drivers
v0x55e766d5c830_0 .net "data_i", 31 0, L_0x55e766d78780; alias, 1 drivers
v0x55e766d5c910_0 .var "data_o", 31 0;
v0x55e766d5c9f0_0 .var/i "i", 31 0;
v0x55e766d5cad0 .array "memory", 31 0;
v0x55e766d5cad0_0 .net v0x55e766d5cad0 0, 31 0, L_0x55e766d79ba0; 1 drivers
v0x55e766d5cad0_1 .net v0x55e766d5cad0 1, 31 0, L_0x55e766d79c40; 1 drivers
v0x55e766d5cad0_2 .net v0x55e766d5cad0 2, 31 0, L_0x55e766d79d70; 1 drivers
v0x55e766d5cad0_3 .net v0x55e766d5cad0 3, 31 0, L_0x55e766d79f30; 1 drivers
v0x55e766d5cad0_4 .net v0x55e766d5cad0 4, 31 0, L_0x55e766d7a120; 1 drivers
v0x55e766d5cad0_5 .net v0x55e766d5cad0 5, 31 0, L_0x55e766d7a2e0; 1 drivers
v0x55e766d5cad0_6 .net v0x55e766d5cad0 6, 31 0, L_0x55e766d7a4e0; 1 drivers
v0x55e766d5cad0_7 .net v0x55e766d5cad0 7, 31 0, L_0x55e766d7a670; 1 drivers
v0x55e766d5cad0_8 .net v0x55e766d5cad0 8, 31 0, L_0x55e766d7a880; 1 drivers
v0x55e766d5cad0_9 .net v0x55e766d5cad0 9, 31 0, L_0x55e766d7aa40; 1 drivers
v0x55e766d5cad0_10 .net v0x55e766d5cad0 10, 31 0, L_0x55e766d7ac60; 1 drivers
v0x55e766d5cad0_11 .net v0x55e766d5cad0 11, 31 0, L_0x55e766d7ae20; 1 drivers
v0x55e766d5cad0_12 .net v0x55e766d5cad0 12, 31 0, L_0x55e766d7b050; 1 drivers
v0x55e766d5cad0_13 .net v0x55e766d5cad0 13, 31 0, L_0x55e766d7b210; 1 drivers
v0x55e766d5cad0_14 .net v0x55e766d5cad0 14, 31 0, L_0x55e766d7b450; 1 drivers
v0x55e766d5cad0_15 .net v0x55e766d5cad0 15, 31 0, L_0x55e766d7b610; 1 drivers
v0x55e766d5cad0_16 .net v0x55e766d5cad0 16, 31 0, L_0x55e766d7b860; 1 drivers
v0x55e766d5cad0_17 .net v0x55e766d5cad0 17, 31 0, L_0x55e766d7ba20; 1 drivers
v0x55e766d5cad0_18 .net v0x55e766d5cad0 18, 31 0, L_0x55e766d7bc80; 1 drivers
v0x55e766d5cad0_19 .net v0x55e766d5cad0 19, 31 0, L_0x55e766d7be40; 1 drivers
v0x55e766d5cad0_20 .net v0x55e766d5cad0 20, 31 0, L_0x55e766d7bbe0; 1 drivers
v0x55e766d5cad0_21 .net v0x55e766d5cad0 21, 31 0, L_0x55e766d7c1d0; 1 drivers
v0x55e766d5cad0_22 .net v0x55e766d5cad0 22, 31 0, L_0x55e766d7c450; 1 drivers
v0x55e766d5cad0_23 .net v0x55e766d5cad0 23, 31 0, L_0x55e766d7c610; 1 drivers
v0x55e766d5cad0_24 .net v0x55e766d5cad0 24, 31 0, L_0x55e766d7c8a0; 1 drivers
v0x55e766d5cad0_25 .net v0x55e766d5cad0 25, 31 0, L_0x55e766d7ca60; 1 drivers
v0x55e766d5cad0_26 .net v0x55e766d5cad0 26, 31 0, L_0x55e766d7cd00; 1 drivers
v0x55e766d5cad0_27 .net v0x55e766d5cad0 27, 31 0, L_0x55e766d7cec0; 1 drivers
v0x55e766d5cad0_28 .net v0x55e766d5cad0 28, 31 0, L_0x55e766d7d170; 1 drivers
v0x55e766d5cad0_29 .net v0x55e766d5cad0 29, 31 0, L_0x55e766d7d330; 1 drivers
v0x55e766d5cad0_30 .net v0x55e766d5cad0 30, 31 0, L_0x55e766d7d5f0; 1 drivers
v0x55e766d5cad0_31 .net v0x55e766d5cad0 31, 31 0, L_0x55e766d7d7b0; 1 drivers
E_0x55e766d50bb0 .event edge, v0x55e766d5c4f0_0, v0x55e766d59ac0_0;
E_0x55e766d5afa0 .event posedge, v0x55e766d5c740_0;
v0x55e766d5b000_0 .array/port v0x55e766d5b000, 0;
v0x55e766d5b000_1 .array/port v0x55e766d5b000, 1;
v0x55e766d5b000_2 .array/port v0x55e766d5b000, 2;
v0x55e766d5b000_3 .array/port v0x55e766d5b000, 3;
L_0x55e766d79ba0 .concat [ 8 8 8 8], v0x55e766d5b000_0, v0x55e766d5b000_1, v0x55e766d5b000_2, v0x55e766d5b000_3;
v0x55e766d5b000_4 .array/port v0x55e766d5b000, 4;
v0x55e766d5b000_5 .array/port v0x55e766d5b000, 5;
v0x55e766d5b000_6 .array/port v0x55e766d5b000, 6;
v0x55e766d5b000_7 .array/port v0x55e766d5b000, 7;
L_0x55e766d79c40 .concat [ 8 8 8 8], v0x55e766d5b000_4, v0x55e766d5b000_5, v0x55e766d5b000_6, v0x55e766d5b000_7;
v0x55e766d5b000_8 .array/port v0x55e766d5b000, 8;
v0x55e766d5b000_9 .array/port v0x55e766d5b000, 9;
v0x55e766d5b000_10 .array/port v0x55e766d5b000, 10;
v0x55e766d5b000_11 .array/port v0x55e766d5b000, 11;
L_0x55e766d79d70 .concat [ 8 8 8 8], v0x55e766d5b000_8, v0x55e766d5b000_9, v0x55e766d5b000_10, v0x55e766d5b000_11;
v0x55e766d5b000_12 .array/port v0x55e766d5b000, 12;
v0x55e766d5b000_13 .array/port v0x55e766d5b000, 13;
v0x55e766d5b000_14 .array/port v0x55e766d5b000, 14;
v0x55e766d5b000_15 .array/port v0x55e766d5b000, 15;
L_0x55e766d79f30 .concat [ 8 8 8 8], v0x55e766d5b000_12, v0x55e766d5b000_13, v0x55e766d5b000_14, v0x55e766d5b000_15;
v0x55e766d5b000_16 .array/port v0x55e766d5b000, 16;
v0x55e766d5b000_17 .array/port v0x55e766d5b000, 17;
v0x55e766d5b000_18 .array/port v0x55e766d5b000, 18;
v0x55e766d5b000_19 .array/port v0x55e766d5b000, 19;
L_0x55e766d7a120 .concat [ 8 8 8 8], v0x55e766d5b000_16, v0x55e766d5b000_17, v0x55e766d5b000_18, v0x55e766d5b000_19;
v0x55e766d5b000_20 .array/port v0x55e766d5b000, 20;
v0x55e766d5b000_21 .array/port v0x55e766d5b000, 21;
v0x55e766d5b000_22 .array/port v0x55e766d5b000, 22;
v0x55e766d5b000_23 .array/port v0x55e766d5b000, 23;
L_0x55e766d7a2e0 .concat [ 8 8 8 8], v0x55e766d5b000_20, v0x55e766d5b000_21, v0x55e766d5b000_22, v0x55e766d5b000_23;
v0x55e766d5b000_24 .array/port v0x55e766d5b000, 24;
v0x55e766d5b000_25 .array/port v0x55e766d5b000, 25;
v0x55e766d5b000_26 .array/port v0x55e766d5b000, 26;
v0x55e766d5b000_27 .array/port v0x55e766d5b000, 27;
L_0x55e766d7a4e0 .concat [ 8 8 8 8], v0x55e766d5b000_24, v0x55e766d5b000_25, v0x55e766d5b000_26, v0x55e766d5b000_27;
v0x55e766d5b000_28 .array/port v0x55e766d5b000, 28;
v0x55e766d5b000_29 .array/port v0x55e766d5b000, 29;
v0x55e766d5b000_30 .array/port v0x55e766d5b000, 30;
v0x55e766d5b000_31 .array/port v0x55e766d5b000, 31;
L_0x55e766d7a670 .concat [ 8 8 8 8], v0x55e766d5b000_28, v0x55e766d5b000_29, v0x55e766d5b000_30, v0x55e766d5b000_31;
v0x55e766d5b000_32 .array/port v0x55e766d5b000, 32;
v0x55e766d5b000_33 .array/port v0x55e766d5b000, 33;
v0x55e766d5b000_34 .array/port v0x55e766d5b000, 34;
v0x55e766d5b000_35 .array/port v0x55e766d5b000, 35;
L_0x55e766d7a880 .concat [ 8 8 8 8], v0x55e766d5b000_32, v0x55e766d5b000_33, v0x55e766d5b000_34, v0x55e766d5b000_35;
v0x55e766d5b000_36 .array/port v0x55e766d5b000, 36;
v0x55e766d5b000_37 .array/port v0x55e766d5b000, 37;
v0x55e766d5b000_38 .array/port v0x55e766d5b000, 38;
v0x55e766d5b000_39 .array/port v0x55e766d5b000, 39;
L_0x55e766d7aa40 .concat [ 8 8 8 8], v0x55e766d5b000_36, v0x55e766d5b000_37, v0x55e766d5b000_38, v0x55e766d5b000_39;
v0x55e766d5b000_40 .array/port v0x55e766d5b000, 40;
v0x55e766d5b000_41 .array/port v0x55e766d5b000, 41;
v0x55e766d5b000_42 .array/port v0x55e766d5b000, 42;
v0x55e766d5b000_43 .array/port v0x55e766d5b000, 43;
L_0x55e766d7ac60 .concat [ 8 8 8 8], v0x55e766d5b000_40, v0x55e766d5b000_41, v0x55e766d5b000_42, v0x55e766d5b000_43;
v0x55e766d5b000_44 .array/port v0x55e766d5b000, 44;
v0x55e766d5b000_45 .array/port v0x55e766d5b000, 45;
v0x55e766d5b000_46 .array/port v0x55e766d5b000, 46;
v0x55e766d5b000_47 .array/port v0x55e766d5b000, 47;
L_0x55e766d7ae20 .concat [ 8 8 8 8], v0x55e766d5b000_44, v0x55e766d5b000_45, v0x55e766d5b000_46, v0x55e766d5b000_47;
v0x55e766d5b000_48 .array/port v0x55e766d5b000, 48;
v0x55e766d5b000_49 .array/port v0x55e766d5b000, 49;
v0x55e766d5b000_50 .array/port v0x55e766d5b000, 50;
v0x55e766d5b000_51 .array/port v0x55e766d5b000, 51;
L_0x55e766d7b050 .concat [ 8 8 8 8], v0x55e766d5b000_48, v0x55e766d5b000_49, v0x55e766d5b000_50, v0x55e766d5b000_51;
v0x55e766d5b000_52 .array/port v0x55e766d5b000, 52;
v0x55e766d5b000_53 .array/port v0x55e766d5b000, 53;
v0x55e766d5b000_54 .array/port v0x55e766d5b000, 54;
v0x55e766d5b000_55 .array/port v0x55e766d5b000, 55;
L_0x55e766d7b210 .concat [ 8 8 8 8], v0x55e766d5b000_52, v0x55e766d5b000_53, v0x55e766d5b000_54, v0x55e766d5b000_55;
v0x55e766d5b000_56 .array/port v0x55e766d5b000, 56;
v0x55e766d5b000_57 .array/port v0x55e766d5b000, 57;
v0x55e766d5b000_58 .array/port v0x55e766d5b000, 58;
v0x55e766d5b000_59 .array/port v0x55e766d5b000, 59;
L_0x55e766d7b450 .concat [ 8 8 8 8], v0x55e766d5b000_56, v0x55e766d5b000_57, v0x55e766d5b000_58, v0x55e766d5b000_59;
v0x55e766d5b000_60 .array/port v0x55e766d5b000, 60;
v0x55e766d5b000_61 .array/port v0x55e766d5b000, 61;
v0x55e766d5b000_62 .array/port v0x55e766d5b000, 62;
v0x55e766d5b000_63 .array/port v0x55e766d5b000, 63;
L_0x55e766d7b610 .concat [ 8 8 8 8], v0x55e766d5b000_60, v0x55e766d5b000_61, v0x55e766d5b000_62, v0x55e766d5b000_63;
v0x55e766d5b000_64 .array/port v0x55e766d5b000, 64;
v0x55e766d5b000_65 .array/port v0x55e766d5b000, 65;
v0x55e766d5b000_66 .array/port v0x55e766d5b000, 66;
v0x55e766d5b000_67 .array/port v0x55e766d5b000, 67;
L_0x55e766d7b860 .concat [ 8 8 8 8], v0x55e766d5b000_64, v0x55e766d5b000_65, v0x55e766d5b000_66, v0x55e766d5b000_67;
v0x55e766d5b000_68 .array/port v0x55e766d5b000, 68;
v0x55e766d5b000_69 .array/port v0x55e766d5b000, 69;
v0x55e766d5b000_70 .array/port v0x55e766d5b000, 70;
v0x55e766d5b000_71 .array/port v0x55e766d5b000, 71;
L_0x55e766d7ba20 .concat [ 8 8 8 8], v0x55e766d5b000_68, v0x55e766d5b000_69, v0x55e766d5b000_70, v0x55e766d5b000_71;
v0x55e766d5b000_72 .array/port v0x55e766d5b000, 72;
v0x55e766d5b000_73 .array/port v0x55e766d5b000, 73;
v0x55e766d5b000_74 .array/port v0x55e766d5b000, 74;
v0x55e766d5b000_75 .array/port v0x55e766d5b000, 75;
L_0x55e766d7bc80 .concat [ 8 8 8 8], v0x55e766d5b000_72, v0x55e766d5b000_73, v0x55e766d5b000_74, v0x55e766d5b000_75;
v0x55e766d5b000_76 .array/port v0x55e766d5b000, 76;
v0x55e766d5b000_77 .array/port v0x55e766d5b000, 77;
v0x55e766d5b000_78 .array/port v0x55e766d5b000, 78;
v0x55e766d5b000_79 .array/port v0x55e766d5b000, 79;
L_0x55e766d7be40 .concat [ 8 8 8 8], v0x55e766d5b000_76, v0x55e766d5b000_77, v0x55e766d5b000_78, v0x55e766d5b000_79;
v0x55e766d5b000_80 .array/port v0x55e766d5b000, 80;
v0x55e766d5b000_81 .array/port v0x55e766d5b000, 81;
v0x55e766d5b000_82 .array/port v0x55e766d5b000, 82;
v0x55e766d5b000_83 .array/port v0x55e766d5b000, 83;
L_0x55e766d7bbe0 .concat [ 8 8 8 8], v0x55e766d5b000_80, v0x55e766d5b000_81, v0x55e766d5b000_82, v0x55e766d5b000_83;
v0x55e766d5b000_84 .array/port v0x55e766d5b000, 84;
v0x55e766d5b000_85 .array/port v0x55e766d5b000, 85;
v0x55e766d5b000_86 .array/port v0x55e766d5b000, 86;
v0x55e766d5b000_87 .array/port v0x55e766d5b000, 87;
L_0x55e766d7c1d0 .concat [ 8 8 8 8], v0x55e766d5b000_84, v0x55e766d5b000_85, v0x55e766d5b000_86, v0x55e766d5b000_87;
v0x55e766d5b000_88 .array/port v0x55e766d5b000, 88;
v0x55e766d5b000_89 .array/port v0x55e766d5b000, 89;
v0x55e766d5b000_90 .array/port v0x55e766d5b000, 90;
v0x55e766d5b000_91 .array/port v0x55e766d5b000, 91;
L_0x55e766d7c450 .concat [ 8 8 8 8], v0x55e766d5b000_88, v0x55e766d5b000_89, v0x55e766d5b000_90, v0x55e766d5b000_91;
v0x55e766d5b000_92 .array/port v0x55e766d5b000, 92;
v0x55e766d5b000_93 .array/port v0x55e766d5b000, 93;
v0x55e766d5b000_94 .array/port v0x55e766d5b000, 94;
v0x55e766d5b000_95 .array/port v0x55e766d5b000, 95;
L_0x55e766d7c610 .concat [ 8 8 8 8], v0x55e766d5b000_92, v0x55e766d5b000_93, v0x55e766d5b000_94, v0x55e766d5b000_95;
v0x55e766d5b000_96 .array/port v0x55e766d5b000, 96;
v0x55e766d5b000_97 .array/port v0x55e766d5b000, 97;
v0x55e766d5b000_98 .array/port v0x55e766d5b000, 98;
v0x55e766d5b000_99 .array/port v0x55e766d5b000, 99;
L_0x55e766d7c8a0 .concat [ 8 8 8 8], v0x55e766d5b000_96, v0x55e766d5b000_97, v0x55e766d5b000_98, v0x55e766d5b000_99;
v0x55e766d5b000_100 .array/port v0x55e766d5b000, 100;
v0x55e766d5b000_101 .array/port v0x55e766d5b000, 101;
v0x55e766d5b000_102 .array/port v0x55e766d5b000, 102;
v0x55e766d5b000_103 .array/port v0x55e766d5b000, 103;
L_0x55e766d7ca60 .concat [ 8 8 8 8], v0x55e766d5b000_100, v0x55e766d5b000_101, v0x55e766d5b000_102, v0x55e766d5b000_103;
v0x55e766d5b000_104 .array/port v0x55e766d5b000, 104;
v0x55e766d5b000_105 .array/port v0x55e766d5b000, 105;
v0x55e766d5b000_106 .array/port v0x55e766d5b000, 106;
v0x55e766d5b000_107 .array/port v0x55e766d5b000, 107;
L_0x55e766d7cd00 .concat [ 8 8 8 8], v0x55e766d5b000_104, v0x55e766d5b000_105, v0x55e766d5b000_106, v0x55e766d5b000_107;
v0x55e766d5b000_108 .array/port v0x55e766d5b000, 108;
v0x55e766d5b000_109 .array/port v0x55e766d5b000, 109;
v0x55e766d5b000_110 .array/port v0x55e766d5b000, 110;
v0x55e766d5b000_111 .array/port v0x55e766d5b000, 111;
L_0x55e766d7cec0 .concat [ 8 8 8 8], v0x55e766d5b000_108, v0x55e766d5b000_109, v0x55e766d5b000_110, v0x55e766d5b000_111;
v0x55e766d5b000_112 .array/port v0x55e766d5b000, 112;
v0x55e766d5b000_113 .array/port v0x55e766d5b000, 113;
v0x55e766d5b000_114 .array/port v0x55e766d5b000, 114;
v0x55e766d5b000_115 .array/port v0x55e766d5b000, 115;
L_0x55e766d7d170 .concat [ 8 8 8 8], v0x55e766d5b000_112, v0x55e766d5b000_113, v0x55e766d5b000_114, v0x55e766d5b000_115;
v0x55e766d5b000_116 .array/port v0x55e766d5b000, 116;
v0x55e766d5b000_117 .array/port v0x55e766d5b000, 117;
v0x55e766d5b000_118 .array/port v0x55e766d5b000, 118;
v0x55e766d5b000_119 .array/port v0x55e766d5b000, 119;
L_0x55e766d7d330 .concat [ 8 8 8 8], v0x55e766d5b000_116, v0x55e766d5b000_117, v0x55e766d5b000_118, v0x55e766d5b000_119;
v0x55e766d5b000_120 .array/port v0x55e766d5b000, 120;
v0x55e766d5b000_121 .array/port v0x55e766d5b000, 121;
v0x55e766d5b000_122 .array/port v0x55e766d5b000, 122;
v0x55e766d5b000_123 .array/port v0x55e766d5b000, 123;
L_0x55e766d7d5f0 .concat [ 8 8 8 8], v0x55e766d5b000_120, v0x55e766d5b000_121, v0x55e766d5b000_122, v0x55e766d5b000_123;
v0x55e766d5b000_124 .array/port v0x55e766d5b000, 124;
v0x55e766d5b000_125 .array/port v0x55e766d5b000, 125;
v0x55e766d5b000_126 .array/port v0x55e766d5b000, 126;
v0x55e766d5b000_127 .array/port v0x55e766d5b000, 127;
L_0x55e766d7d7b0 .concat [ 8 8 8 8], v0x55e766d5b000_124, v0x55e766d5b000_125, v0x55e766d5b000_126, v0x55e766d5b000_127;
S_0x55e766d5d090 .scope module, "Decoder" "Decoder" 3 119, 8 3 0, S_0x55e766cdb860;
.timescale 0 0;
.port_info 0 /INPUT 6 "instr_op_i"
.port_info 1 /OUTPUT 1 "RegWrite_o"
.port_info 2 /OUTPUT 3 "ALU_op_o"
.port_info 3 /OUTPUT 1 "ALUSrc_o"
.port_info 4 /OUTPUT 1 "RegDst_o"
.port_info 5 /OUTPUT 1 "Branch_o"
.port_info 6 /OUTPUT 1 "mem_write_o"
.port_info 7 /OUTPUT 1 "mem_read_o"
.port_info 8 /OUTPUT 1 "mem_to_reg"
.port_info 9 /OUTPUT 1 "jump_o"
.port_info 10 /OUTPUT 2 "branch_type_o"
.port_info 11 /OUTPUT 1 "jal_o"
v0x55e766d5d380_0 .var "ALUSrc_o", 0 0;
v0x55e766d5d460_0 .var "ALU_op_o", 2 0;
v0x55e766d5d520_0 .var "Branch_o", 0 0;
v0x55e766d5d5f0_0 .var "RegDst_o", 0 0;
v0x55e766d5d690_0 .var "RegWrite_o", 0 0;
v0x55e766d5d7a0_0 .var "branch_type_o", 1 0;
v0x55e766d5d880_0 .net "instr_op_i", 5 0, L_0x55e766d78a60; 1 drivers
v0x55e766d5d960_0 .var "jal_o", 0 0;
v0x55e766d5da20_0 .var "jump_o", 0 0;
v0x55e766d5dae0_0 .var "mem_read_o", 0 0;
v0x55e766d5db80_0 .var "mem_to_reg", 0 0;
v0x55e766d5dc20_0 .var "mem_write_o", 0 0;
E_0x55e766d50870 .event edge, v0x55e766d5d880_0;
S_0x55e766d5de50 .scope module, "IM" "Instruction_Memory" 3 68, 9 21 0, S_0x55e766cdb860;
.timescale -9 -12;
.port_info 0 /INPUT 32 "addr_i"
.port_info 1 /OUTPUT 32 "instr_o"
L_0x55e766d67db0 .functor BUFZ 32, L_0x55e766d77ec0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
v0x55e766d5e030_0 .net *"_s0", 31 0, L_0x55e766d77ec0; 1 drivers
L_0x7f00d2fde060 .functor BUFT 1, C4<00000000000000000000000000000100>, C4<0>, C4<0>, C4<0>;
v0x55e766d5e130_0 .net/2u *"_s2", 31 0, L_0x7f00d2fde060; 1 drivers
v0x55e766d5e210_0 .net *"_s4", 31 0, L_0x55e766d77f60; 1 drivers
v0x55e766d5e300_0 .net "addr_i", 31 0, v0x55e766d62610_0; alias, 1 drivers
v0x55e766d5e3f0_0 .var/i "i", 31 0;
v0x55e766d5e500_0 .net "instr_o", 31 0, L_0x55e766d67db0; alias, 1 drivers
v0x55e766d5e5e0 .array "instruction_file", 64 0, 31 0;
L_0x55e766d77ec0 .array/port v0x55e766d5e5e0, L_0x55e766d77f60;
L_0x55e766d77f60 .arith/div 32, v0x55e766d62610_0, L_0x7f00d2fde060;
S_0x55e766d5e700 .scope module, "Jrr" "MUX_2to1" 3 221, 10 3 0, S_0x55e766cdb860;
.timescale -9 -12;
.port_info 0 /INPUT 32 "data0_i"
.port_info 1 /INPUT 32 "data1_i"
.port_info 2 /INPUT 1 "select_i"
.port_info 3 /OUTPUT 32 "data_o"
P_0x55e766d5e8d0 .param/l "size" 0 10 10, +C4<00000000000000000000000000100000>;
v0x55e766d5ea00_0 .net "data0_i", 31 0, v0x55e766d61820_0; alias, 1 drivers
v0x55e766d5eb00_0 .net "data1_i", 31 0, L_0x55e766d78450; alias, 1 drivers
v0x55e766d5ebf0_0 .var "data_o", 31 0;
v0x55e766d5ecc0_0 .net "select_i", 0 0, v0x55e766d595c0_0; alias, 1 drivers
E_0x55e766d5e9a0 .event edge, v0x55e766d595c0_0, v0x55e766d59c40_0, v0x55e766d5ea00_0;
S_0x55e766d5ee20 .scope module, "Jump_address" "Shift_Left_Two_32" 3 202, 11 3 0, S_0x55e766cdb860;
.timescale -9 -12;
.port_info 0 /INPUT 32 "data_i"
.port_info 1 /OUTPUT 32 "data_o"
v0x55e766d5f050_0 .net *"_s2", 29 0, L_0x55e766d795b0; 1 drivers
L_0x7f00d2fde210 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v0x55e766d5f150_0 .net *"_s4", 1 0, L_0x7f00d2fde210; 1 drivers
v0x55e766d5f230_0 .net "data_i", 31 0, L_0x55e766d79470; alias, 1 drivers
v0x55e766d5f2f0_0 .net "data_o", 31 0, L_0x55e766d79650; alias, 1 drivers
L_0x55e766d795b0 .part L_0x55e766d79470, 0, 30;
L_0x55e766d79650 .concat [ 2 30 0 0], L_0x7f00d2fde210, L_0x55e766d795b0;
S_0x55e766d5f430 .scope module, "Mux_ALUSrc" "MUX_2to1" 3 147, 10 3 0, S_0x55e766cdb860;
.timescale -9 -12;
.port_info 0 /INPUT 32 "data0_i"
.port_info 1 /INPUT 32 "data1_i"
.port_info 2 /INPUT 1 "select_i"
.port_info 3 /OUTPUT 32 "data_o"
P_0x55e766d5f5b0 .param/l "size" 0 10 10, +C4<00000000000000000000000000100000>;
v0x55e766d5f780_0 .net "data0_i", 31 0, L_0x55e766d78780; alias, 1 drivers
v0x55e766d5f890_0 .net "data1_i", 31 0, v0x55e766d63f40_0; alias, 1 drivers
v0x55e766d5f950_0 .var "data_o", 31 0;
v0x55e766d5fa50_0 .net "select_i", 0 0, v0x55e766d5d380_0; alias, 1 drivers
E_0x55e766d5f720 .event edge, v0x55e766d5d380_0, v0x55e766d5f890_0, v0x55e766d5c830_0;
S_0x55e766d5fb90 .scope module, "Mux_PC_Source" "MUX_2to1" 3 187, 10 3 0, S_0x55e766cdb860;
.timescale -9 -12;
.port_info 0 /INPUT 32 "data0_i"
.port_info 1 /INPUT 32 "data1_i"
.port_info 2 /INPUT 1 "select_i"
.port_info 3 /OUTPUT 32 "data_o"
P_0x55e766d5fd60 .param/l "size" 0 10 10, +C4<00000000000000000000000000100000>;
v0x55e766d5ff20_0 .net "data0_i", 31 0, L_0x55e766d67d10; alias, 1 drivers
v0x55e766d60050_0 .net "data1_i", 31 0, L_0x55e766d78f10; alias, 1 drivers
v0x55e766d60110_0 .var "data_o", 31 0;
v0x55e766d601e0_0 .net "select_i", 0 0, L_0x55e766d78fb0; 1 drivers
E_0x55e766d5fea0 .event edge, v0x55e766d601e0_0, v0x55e766d5ab50_0, v0x55e766d5a620_0;
S_0x55e766d60350 .scope module, "Mux_Write_Reg" "MUX_2to1" 3 81, 10 3 0, S_0x55e766cdb860;
.timescale -9 -12;
.port_info 0 /INPUT 5 "data0_i"
.port_info 1 /INPUT 5 "data1_i"
.port_info 2 /INPUT 1 "select_i"
.port_info 3 /OUTPUT 5 "data_o"
P_0x55e766d60520 .param/l "size" 0 10 10, +C4<00000000000000000000000000000101>;
v0x55e766d606e0_0 .net "data0_i", 4 0, L_0x55e766d780f0; 1 drivers
v0x55e766d607e0_0 .net "data1_i", 4 0, L_0x55e766d78190; 1 drivers
v0x55e766d608c0_0 .var "data_o", 4 0;
v0x55e766d609b0_0 .net "select_i", 0 0, v0x55e766d5d5f0_0; alias, 1 drivers
E_0x55e766d60660 .event edge, v0x55e766d5d5f0_0, v0x55e766d607e0_0, v0x55e766d606e0_0;
S_0x55e766d60b10 .scope module, "Mux_Write_Reg_or_jal" "MUX_2to1" 3 88, 10 3 0, S_0x55e766cdb860;
.timescale -9 -12;
.port_info 0 /INPUT 5 "data0_i"
.port_info 1 /INPUT 5 "data1_i"
.port_info 2 /INPUT 1 "select_i"
.port_info 3 /OUTPUT 5 "data_o"
P_0x55e766d60ce0 .param/l "size" 0 10 10, +C4<00000000000000000000000000000101>;
v0x55e766d60ea0_0 .net "data0_i", 4 0, v0x55e766d608c0_0; alias, 1 drivers
L_0x7f00d2fde0a8 .functor BUFT 1, C4<11111>, C4<0>, C4<0>, C4<0>;
v0x55e766d60fb0_0 .net "data1_i", 4 0, L_0x7f00d2fde0a8; 1 drivers
v0x55e766d61070_0 .var "data_o", 4 0;
v0x55e766d61160_0 .net "select_i", 0 0, v0x55e766d5d960_0; alias, 1 drivers
E_0x55e766d60e20 .event edge, v0x55e766d5d960_0, v0x55e766d60fb0_0, v0x55e766d608c0_0;
S_0x55e766d612c0 .scope module, "Mux_jump" "MUX_2to1" 3 209, 10 3 0, S_0x55e766cdb860;
.timescale -9 -12;
.port_info 0 /INPUT 32 "data0_i"
.port_info 1 /INPUT 32 "data1_i"
.port_info 2 /INPUT 1 "select_i"
.port_info 3 /OUTPUT 32 "data_o"
P_0x55e766d61490 .param/l "size" 0 10 10, +C4<00000000000000000000000000100000>;
v0x55e766d61650_0 .net "data0_i", 31 0, v0x55e766d60110_0; alias, 1 drivers
v0x55e766d61760_0 .net "data1_i", 31 0, L_0x55e766d79990; alias, 1 drivers
v0x55e766d61820_0 .var "data_o", 31 0;
v0x55e766d61920_0 .net "select_i", 0 0, v0x55e766d5da20_0; alias, 1 drivers
E_0x55e766d615d0 .event edge, v0x55e766d5da20_0, v0x55e766d61760_0, v0x55e766d60110_0;
S_0x55e766d61a60 .scope module, "Mux_mem_or_alu" "MUX_2to1" 3 242, 10 3 0, S_0x55e766cdb860;
.timescale -9 -12;
.port_info 0 /INPUT 32 "data0_i"
.port_info 1 /INPUT 32 "data1_i"
.port_info 2 /INPUT 1 "select_i"
.port_info 3 /OUTPUT 32 "data_o"
P_0x55e766d61c30 .param/l "size" 0 10 10, +C4<00000000000000000000000000100000>;
v0x55e766d61df0_0 .net "data0_i", 31 0, v0x55e766d59ac0_0; alias, 1 drivers
v0x55e766d61f20_0 .net "data1_i", 31 0, v0x55e766d5c910_0; alias, 1 drivers
v0x55e766d61fe0_0 .var "data_o", 31 0;
v0x55e766d620b0_0 .net "select_i", 0 0, v0x55e766d5db80_0; alias, 1 drivers
E_0x55e766d61d70 .event edge, v0x55e766d5db80_0, v0x55e766d5c910_0, v0x55e766d59ac0_0;
S_0x55e766d62210 .scope module, "PC" "ProgramCounter" 3 55, 12 1 0, S_0x55e766cdb860;
.timescale -9 -12;
.port_info 0 /INPUT 1 "clk_i"
.port_info 1 /INPUT 1 "rst_i"
.port_info 2 /INPUT 32 "pc_in_i"
.port_info 3 /OUTPUT 32 "pc_out_o"
v0x55e766d62450_0 .net "clk_i", 0 0, v0x55e766d67a30_0; alias, 1 drivers
v0x55e766d62540_0 .net "pc_in_i", 31 0, v0x55e766d5ebf0_0; alias, 1 drivers
v0x55e766d62610_0 .var "pc_out_o", 31 0;
v0x55e766d62730_0 .net "rst_i", 0 0, v0x55e766d67ad0_0; alias, 1 drivers
S_0x55e766d62850 .scope module, "RF" "Reg_File" 3 104, 13 1 0, S_0x55e766cdb860;
.timescale -9 -12;
.port_info 0 /INPUT 1 "clk_i"
.port_info 1 /INPUT 1 "rst_i"
.port_info 2 /INPUT 5 "RSaddr_i"
.port_info 3 /INPUT 5 "RTaddr_i"
.port_info 4 /INPUT 5 "RDaddr_i"
.port_info 5 /INPUT 32 "RDdata_i"
.port_info 6 /INPUT 1 "RegWrite_i"
.port_info 7 /OUTPUT 32 "RSdata_o"
.port_info 8 /OUTPUT 32 "RTdata_o"
L_0x55e766d78450 .functor BUFZ 32, L_0x55e766d782c0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
L_0x55e766d78780 .functor BUFZ 32, L_0x55e766d78550, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
v0x55e766d62bd0_0 .net "RDaddr_i", 4 0, v0x55e766d61070_0; alias, 1 drivers
v0x55e766d62cb0_0 .net "RDdata_i", 31 0, v0x55e766d65210_0; alias, 1 drivers
v0x55e766d62d70_0 .net "RSaddr_i", 4 0, L_0x55e766d78880; 1 drivers
v0x55e766d62e60_0 .net "RSdata_o", 31 0, L_0x55e766d78450; alias, 1 drivers
v0x55e766d62f70_0 .net "RTaddr_i", 4 0, L_0x55e766d78970; 1 drivers
v0x55e766d630a0_0 .net "RTdata_o", 31 0, L_0x55e766d78780; alias, 1 drivers
v0x55e766d631b0_0 .net "RegWrite_i", 0 0, v0x55e766d5d690_0; alias, 1 drivers
v0x55e766d63250 .array/s "Reg_File", 31 0, 31 0;
v0x55e766d632f0_0 .net *"_s0", 31 0, L_0x55e766d782c0; 1 drivers
v0x55e766d633d0_0 .net *"_s10", 6 0, L_0x55e766d785f0; 1 drivers
L_0x7f00d2fde138 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v0x55e766d634b0_0 .net *"_s13", 1 0, L_0x7f00d2fde138; 1 drivers
v0x55e766d63590_0 .net *"_s2", 6 0, L_0x55e766d78360; 1 drivers
L_0x7f00d2fde0f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v0x55e766d63670_0 .net *"_s5", 1 0, L_0x7f00d2fde0f0; 1 drivers
v0x55e766d63750_0 .net *"_s8", 31 0, L_0x55e766d78550; 1 drivers
v0x55e766d63830_0 .net "clk_i", 0 0, v0x55e766d67a30_0; alias, 1 drivers
v0x55e766d638d0_0 .net "rst_i", 0 0, v0x55e766d67ad0_0; alias, 1 drivers
E_0x55e766d62b50 .event posedge, v0x55e766d5c740_0, v0x55e766d62730_0;
L_0x55e766d782c0 .array/port v0x55e766d63250, L_0x55e766d78360;
L_0x55e766d78360 .concat [ 5 2 0 0], L_0x55e766d78880, L_0x7f00d2fde0f0;
L_0x55e766d78550 .array/port v0x55e766d63250, L_0x55e766d785f0;
L_0x55e766d785f0 .concat [ 5 2 0 0], L_0x55e766d78970, L_0x7f00d2fde138;
S_0x55e766d63ac0 .scope module, "SE" "Sign_Extend" 3 141, 14 3 0, S_0x55e766cdb860;
.timescale -9 -12;
.port_info 0 /INPUT 16 "data_i"
.port_info 1 /OUTPUT 32 "data_o"
.port_info 2 /INPUT 4 "ctrl_i"
v0x55e766d63d30_0 .net "ctrl_i", 3 0, v0x55e766d50e10_0; alias, 1 drivers
v0x55e766d63e60_0 .net "data_i", 15 0, L_0x55e766d78be0; 1 drivers
v0x55e766d63f40_0 .var "data_o", 31 0;
E_0x55e766d63cb0 .event edge, v0x55e766d50e10_0, v0x55e766d63e60_0;
S_0x55e766d64040 .scope module, "Shifter" "Shift_Left_Two_32" 3 169, 11 3 0, S_0x55e766cdb860;
.timescale -9 -12;
.port_info 0 /INPUT 32 "data_i"
.port_info 1 /OUTPUT 32 "data_o"
v0x55e766d64250_0 .net *"_s2", 29 0, L_0x55e766d79020; 1 drivers
L_0x7f00d2fde180 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v0x55e766d64350_0 .net *"_s4", 1 0, L_0x7f00d2fde180; 1 drivers
v0x55e766d64430_0 .net "data_i", 31 0, v0x55e766d63f40_0; alias, 1 drivers
v0x55e766d64520_0 .net "data_o", 31 0, L_0x55e766d790c0; alias, 1 drivers
L_0x55e766d79020 .part v0x55e766d63f40_0, 0, 30;
L_0x55e766d790c0 .concat [ 2 30 0 0], L_0x7f00d2fde180, L_0x55e766d79020;
S_0x55e766d64620 .scope module, "branchtype" "Branch_type" 3 175, 15 3 0, S_0x55e766cdb860;
.timescale 0 0;
.port_info 0 /INPUT 2 "Branch_type_i"
.port_info 1 /INPUT 1 "Zero_i"
.port_info 2 /INPUT 1 "ALU_result_i"
.port_info 3 /OUTPUT 1 "branch_type_result_o"
v0x55e766d648f0_0 .net "ALU_result_i", 0 0, L_0x55e766d791f0; 1 drivers
v0x55e766d649d0_0 .net "Branch_type_i", 1 0, v0x55e766d5d7a0_0; alias, 1 drivers
v0x55e766d64ac0_0 .net "Zero_i", 0 0, v0x55e766d5a0f0_0; alias, 1 drivers
v0x55e766d64bc0_0 .var "branch_type_result_o", 0 0;
E_0x55e766d64890 .event edge, v0x55e766d5d7a0_0, v0x55e766d5a0f0_0, v0x55e766d648f0_0;
S_0x55e766d64cd0 .scope module, "write_data" "MUX_2to1" 3 95, 10 3 0, S_0x55e766cdb860;
.timescale -9 -12;
.port_info 0 /INPUT 32 "data0_i"
.port_info 1 /INPUT 32 "data1_i"
.port_info 2 /INPUT 1 "select_i"
.port_info 3 /OUTPUT 32 "data_o"
P_0x55e766d64ea0 .param/l "size" 0 10 10, +C4<00000000000000000000000000100000>;
v0x55e766d65060_0 .net "data0_i", 31 0, v0x55e766d61fe0_0; alias, 1 drivers
v0x55e766d65170_0 .net "data1_i", 31 0, L_0x55e766d67d10; alias, 1 drivers
v0x55e766d65210_0 .var "data_o", 31 0;
v0x55e766d65310_0 .net "select_i", 0 0, v0x55e766d5d960_0; alias, 1 drivers
E_0x55e766d64fe0 .event edge, v0x55e766d5d960_0, v0x55e766d5a620_0, v0x55e766d61fe0_0;
.scope S_0x55e766d62210;
T_0 ;
%wait E_0x55e766d5afa0;
%load/vec4 v0x55e766d62730_0;
%inv;
%flag_set/vec4 8;
%jmp/0xz T_0.0, 8;
%pushi/vec4 0, 0, 32;
%assign/vec4 v0x55e766d62610_0, 0;
%jmp T_0.1;
T_0.0 ;
%load/vec4 v0x55e766d62540_0;
%assign/vec4 v0x55e766d62610_0, 0;
T_0.1 ;
%jmp T_0;
.thread T_0;
.scope S_0x55e766d5de50;
T_1 ;
%pushi/vec4 0, 0, 32;
%store/vec4 v0x55e766d5e3f0_0, 0, 32;
T_1.0 ;
%load/vec4 v0x55e766d5e3f0_0;
%cmpi/s 65, 0, 32;
%jmp/0xz T_1.1, 5;
%pushi/vec4 0, 0, 32;
%ix/getv/s 4, v0x55e766d5e3f0_0;
%store/vec4a v0x55e766d5e5e0, 4, 0;
%load/vec4 v0x55e766d5e3f0_0;
%addi 1, 0, 32;
%store/vec4 v0x55e766d5e3f0_0, 0, 32;
%jmp T_1.0;
T_1.1 ;
%vpi_call 9 40 "$readmemb", "lab4_test_data.txt", v0x55e766d5e5e0 {0 0 0};
%end;
.thread T_1;
.scope S_0x55e766d60350;
T_2 ;
%wait E_0x55e766d60660;
%load/vec4 v0x55e766d609b0_0;
%pad/u 32;
%cmpi/e 1, 0, 32;
%flag_mov 8, 4;
%jmp/0 T_2.0, 8;
%load/vec4 v0x55e766d607e0_0;
%jmp/1 T_2.1, 8;
T_2.0 ; End of true expr.
%load/vec4 v0x55e766d606e0_0;
%jmp/0 T_2.1, 8;
; End of false expr.
%blend;
T_2.1;
%assign/vec4 v0x55e766d608c0_0, 0;
%jmp T_2;
.thread T_2, $push;
.scope S_0x55e766d60b10;
T_3 ;
%wait E_0x55e766d60e20;
%load/vec4 v0x55e766d61160_0;
%pad/u 32;
%cmpi/e 1, 0, 32;
%flag_mov 8, 4;
%jmp/0 T_3.0, 8;
%load/vec4 v0x55e766d60fb0_0;
%jmp/1 T_3.1, 8;
T_3.0 ; End of true expr.
%load/vec4 v0x55e766d60ea0_0;
%jmp/0 T_3.1, 8;
; End of false expr.
%blend;
T_3.1;
%assign/vec4 v0x55e766d61070_0, 0;
%jmp T_3;
.thread T_3, $push;
.scope S_0x55e766d64cd0;
T_4 ;
%wait E_0x55e766d64fe0;
%load/vec4 v0x55e766d65310_0;
%pad/u 32;
%cmpi/e 1, 0, 32;
%flag_mov 8, 4;
%jmp/0 T_4.0, 8;
%load/vec4 v0x55e766d65170_0;
%jmp/1 T_4.1, 8;
T_4.0 ; End of true expr.
%load/vec4 v0x55e766d65060_0;
%jmp/0 T_4.1, 8;
; End of false expr.
%blend;
T_4.1;
%assign/vec4 v0x55e766d65210_0, 0;
%jmp T_4;
.thread T_4, $push;
.scope S_0x55e766d62850;
T_5 ;
%wait E_0x55e766d62b50;
%load/vec4 v0x55e766d638d0_0;
%pad/u 32;
%cmpi/e 0, 0, 32;
%jmp/0xz T_5.0, 4;
%pushi/vec4 0, 0, 32;
%ix/load 3, 0, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 1, 0, 32;
%ix/load 3, 1, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 2, 0, 32;
%ix/load 3, 2, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 3, 0, 32;
%ix/load 3, 3, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 4, 0, 32;
%ix/load 3, 4, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 5, 0, 32;
%ix/load 3, 5, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 6, 0, 32;
%ix/load 3, 6, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 7, 0, 32;
%ix/load 3, 7, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 8, 0, 32;
%ix/load 3, 8, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 9, 0, 32;
%ix/load 3, 9, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 4294967295, 0, 32;
%ix/load 3, 10, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 4294967294, 0, 32;
%ix/load 3, 11, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 0, 0, 32;
%ix/load 3, 12, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 0, 0, 32;
%ix/load 3, 13, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 0, 0, 32;
%ix/load 3, 14, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 0, 0, 32;
%ix/load 3, 15, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 0, 0, 32;
%ix/load 3, 16, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 0, 0, 32;
%ix/load 3, 17, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 0, 0, 32;
%ix/load 3, 18, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 0, 0, 32;
%ix/load 3, 19, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 0, 0, 32;
%ix/load 3, 20, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 0, 0, 32;
%ix/load 3, 21, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 0, 0, 32;
%ix/load 3, 22, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 0, 0, 32;
%ix/load 3, 23, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 0, 0, 32;
%ix/load 3, 24, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 0, 0, 32;
%ix/load 3, 25, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 0, 0, 32;
%ix/load 3, 26, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 0, 0, 32;
%ix/load 3, 27, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 0, 0, 32;
%ix/load 3, 28, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 128, 0, 32;
%ix/load 3, 29, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 0, 0, 32;
%ix/load 3, 30, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%pushi/vec4 0, 0, 32;
%ix/load 3, 31, 0;
%flag_set/imm 4, 0;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%jmp T_5.1;
T_5.0 ;
%load/vec4 v0x55e766d631b0_0;
%flag_set/vec4 8;
%jmp/0xz T_5.2, 8;
%load/vec4 v0x55e766d62cb0_0;
%load/vec4 v0x55e766d62bd0_0;
%pad/u 7;
%ix/vec4 3;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
%jmp T_5.3;
T_5.2 ;
%load/vec4 v0x55e766d62bd0_0;
%pad/u 7;
%ix/vec4 4;
%load/vec4a v0x55e766d63250, 4;
%load/vec4 v0x55e766d62bd0_0;
%pad/u 7;
%ix/vec4 3;
%ix/load 4, 0, 0; Constant delay
%assign/vec4/a/d v0x55e766d63250, 0, 4;
T_5.3 ;
T_5.1 ;
%jmp T_5;
.thread T_5;
.scope S_0x55e766d5d090;
T_6 ;
%wait E_0x55e766d50870;
%load/vec4 v0x55e766d5d880_0;
%pad/u 32;
%cmpi/e 0, 0, 32;
%jmp/0xz T_6.0, 4;
%pushi/vec4 1, 0, 1;
%assign/vec4 v0x55e766d5d690_0, 0;
%pushi/vec4 0, 0, 3;
%assign/vec4 v0x55e766d5d460_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5d380_0, 0;
%pushi/vec4 1, 0, 1;
%assign/vec4 v0x55e766d5d5f0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5d520_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5dc20_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5dae0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5db80_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5da20_0, 0;
%pushi/vec4 0, 0, 2;
%assign/vec4 v0x55e766d5d7a0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5d960_0, 0;
%jmp T_6.1;
T_6.0 ;
%load/vec4 v0x55e766d5d880_0;
%pad/u 32;
%cmpi/e 8, 0, 32;
%jmp/0xz T_6.2, 4;
%pushi/vec4 1, 0, 1;
%assign/vec4 v0x55e766d5d690_0, 0;
%pushi/vec4 1, 0, 3;
%assign/vec4 v0x55e766d5d460_0, 0;
%pushi/vec4 1, 0, 1;
%assign/vec4 v0x55e766d5d380_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5d5f0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5d520_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5dc20_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5dae0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5db80_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5da20_0, 0;
%pushi/vec4 0, 0, 2;
%assign/vec4 v0x55e766d5d7a0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5d960_0, 0;
%jmp T_6.3;
T_6.2 ;
%load/vec4 v0x55e766d5d880_0;
%pad/u 32;
%cmpi/e 11, 0, 32;
%jmp/0xz T_6.4, 4;
%pushi/vec4 1, 0, 1;
%assign/vec4 v0x55e766d5d690_0, 0;
%pushi/vec4 2, 0, 3;
%assign/vec4 v0x55e766d5d460_0, 0;
%pushi/vec4 1, 0, 1;
%assign/vec4 v0x55e766d5d380_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5d5f0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5d520_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5dc20_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5dae0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5db80_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5da20_0, 0;
%pushi/vec4 0, 0, 2;
%assign/vec4 v0x55e766d5d7a0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5d960_0, 0;
%jmp T_6.5;
T_6.4 ;
%load/vec4 v0x55e766d5d880_0;
%pad/u 32;
%cmpi/e 4, 0, 32;
%jmp/0xz T_6.6, 4;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5d690_0, 0;
%pushi/vec4 6, 0, 3;
%assign/vec4 v0x55e766d5d460_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5d380_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5d5f0_0, 0;
%pushi/vec4 1, 0, 1;
%assign/vec4 v0x55e766d5d520_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5dc20_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5dae0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5db80_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5da20_0, 0;
%pushi/vec4 0, 0, 2;
%assign/vec4 v0x55e766d5d7a0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5d960_0, 0;
%jmp T_6.7;
T_6.6 ;
%load/vec4 v0x55e766d5d880_0;
%pad/u 32;
%cmpi/e 15, 0, 32;
%jmp/0xz T_6.8, 4;
%pushi/vec4 1, 0, 1;
%assign/vec4 v0x55e766d5d690_0, 0;
%pushi/vec4 3, 0, 3;
%assign/vec4 v0x55e766d5d460_0, 0;
%pushi/vec4 1, 0, 1;
%assign/vec4 v0x55e766d5d380_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5d5f0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5d520_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5dc20_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5dae0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5db80_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5da20_0, 0;
%pushi/vec4 0, 0, 2;
%assign/vec4 v0x55e766d5d7a0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x55e766d5d960_0, 0;
%jmp T_6.9;
T_6.8 ;
%load/vec4 v0x55e766d5d880_0;
%pad/u 32;
%cmpi/e 13, 0, 32;
%jmp/0xz T_6.10, 4;
%pushi/vec4 1, 0, 1;