From 7c23ff7389fc127051d2c0a9b2b6f146b865fa89 Mon Sep 17 00:00:00 2001 From: Alex Khal Date: Tue, 27 Oct 2026 09:13:02 -0700 Subject: [PATCH] fix: admit scalar arithmetic on verified pre-Ampere targets Signed-off-by: Alex Khal --- .../cuda-device/src/generated/async_copy.rs | 2 +- .../cuda-device/src/generated/atomic.rs | 2 +- .../crates/cuda-device/src/generated/bf16.rs | 2 +- .../cuda-device/src/generated/bf16x2.rs | 2 +- .../crates/cuda-device/src/generated/clc.rs | 2 +- .../src/generated/cluster_barrier.rs | 2 +- .../src/generated/cluster_memory.rs | 2 +- .../cuda-device/src/generated/cluster_sreg.rs | 2 +- .../cuda-device/src/generated/convert.rs | 2 +- .../src/generated/counted_barrier.rs | 2 +- .../src/generated/debug_control.rs | 2 +- .../cuda-device/src/generated/debug_sreg.rs | 2 +- .../cuda-device/src/generated/dotprod.rs | 2 +- .../crates/cuda-device/src/generated/f16.rs | 2 +- .../crates/cuda-device/src/generated/f16x2.rs | 2 +- .../crates/cuda-device/src/generated/f32x2.rs | 2 +- .../crates/cuda-device/src/generated/fence.rs | 2 +- .../crates/cuda-device/src/generated/float.rs | 2 +- .../src/generated/grid_dependency.rs | 2 +- .../cuda-device/src/generated/grid_sreg.rs | 2 +- .../crates/cuda-device/src/generated/i16x2.rs | 2 +- .../crates/cuda-device/src/generated/int.rs | 2 +- .../cuda-device/src/generated/ldmatrix.rs | 2 +- .../src/generated/mbarrier_basic.rs | 2 +- .../src/generated/mbarrier_extended.rs | 2 +- .../cuda-device/src/generated/movmatrix.rs | 2 +- .../crates/cuda-device/src/generated/prmt.rs | 2 +- .../src/generated/register_control.rs | 2 +- .../cuda-device/src/generated/register_mma.rs | 2 +- .../cuda-device/src/generated/shared_sreg.rs | 2 +- .../cuda-device/src/generated/sparse_mma.rs | 2 +- .../crates/cuda-device/src/generated/sreg.rs | 2 +- .../cuda-device/src/generated/stmatrix.rs | 2 +- .../cuda-device/src/generated/tcgen05.rs | 2 +- .../crates/cuda-device/src/generated/tma.rs | 2 +- .../cuda-device/src/generated/warp_sreg.rs | 2 +- .../src/generated/wgmma_control.rs | 2 +- .../src/resolve/families/scalar_arithmetic.rs | 36 +- .../src/resolve/tests/scalar_packed.rs | 36 + .../cuda-intrinsics/src/generated/abi_v1.rs | 130 +- .../cuda-intrinsics/src/generated/mod.rs | 2 +- .../active_mask.rs | 2 +- .../src/generated_intrinsic_targets/clc.rs | 2 +- .../cluster_barrier.rs | 2 +- .../cluster_memory.rs | 2 +- .../generated_intrinsic_targets/cp_async.rs | 2 +- .../debug_control.rs | 2 +- .../generated_intrinsic_targets/dotprod.rs | 2 +- .../src/generated_intrinsic_targets/elect.rs | 2 +- .../execution_control.rs | 2 +- .../extended_minmax.rs | 2 +- .../integer_minmax.rs | 2 +- .../generated_intrinsic_targets/ldmatrix.rs | 2 +- .../mbarrier_basic.rs | 2 +- .../mbarrier_extended.rs | 2 +- .../src/generated_intrinsic_targets/mod.rs | 2 +- .../generated_intrinsic_targets/movmatrix.rs | 2 +- .../generated_intrinsic_targets/packed_alu.rs | 2 +- .../packed_atomic.rs | 2 +- .../packed_conversion.rs | 2 +- .../src/generated_intrinsic_targets/prmt.rs | 2 +- .../src/generated_intrinsic_targets/redux.rs | 2 +- .../register_mma.rs | 2 +- .../scalar_arithmetic.rs | 770 +-- .../scalar_conversion.rs | 2 +- .../scalar_math.rs | 2 +- .../generated_intrinsic_targets/sparse_mma.rs | 2 +- .../src/generated_intrinsic_targets/sreg.rs | 2 +- .../generated_intrinsic_targets/stmatrix.rs | 2 +- .../src/generated_intrinsic_targets/sync.rs | 2 +- .../generated_intrinsic_targets/tcgen05_cp.rs | 2 +- .../generated_intrinsic_targets/tcgen05_ld.rs | 2 +- .../tcgen05_mma.rs | 2 +- .../tcgen05_mma_ws.rs | 2 +- .../tcgen05_other.rs | 2 +- .../generated_intrinsic_targets/tcgen05_st.rs | 2 +- .../tests/active_mask.rs | 2 +- .../generated_intrinsic_targets/tests/clc.rs | 2 +- .../tests/cluster_barrier.rs | 2 +- .../tests/cluster_memory.rs | 2 +- .../tests/cp_async.rs | 2 +- .../tests/debug_control.rs | 2 +- .../tests/dotprod.rs | 2 +- .../tests/elect.rs | 2 +- .../tests/execution_control.rs | 2 +- .../tests/extended_minmax.rs | 2 +- .../tests/integer_minmax.rs | 2 +- .../tests/ldmatrix.rs | 2 +- .../tests/mbarrier_basic.rs | 2 +- .../tests/mbarrier_extended.rs | 2 +- .../generated_intrinsic_targets/tests/mod.rs | 2 +- .../tests/movmatrix.rs | 2 +- .../tests/packed_alu.rs | 2 +- .../tests/packed_atomic.rs | 2 +- .../tests/packed_conversion.rs | 2 +- .../generated_intrinsic_targets/tests/prmt.rs | 2 +- .../tests/redux.rs | 2 +- .../tests/register_mma_float.rs | 2 +- .../tests/register_mma_s32.rs | 2 +- .../tests/scalar_arithmetic.rs | 770 +-- .../tests/scalar_conversion.rs | 2 +- .../tests/scalar_math.rs | 2 +- .../tests/sparse_mma.rs | 2 +- .../generated_intrinsic_targets/tests/sreg.rs | 2 +- .../tests/stmatrix.rs | 2 +- .../generated_intrinsic_targets/tests/sync.rs | 2 +- .../tests/tcgen05_cp.rs | 2 +- .../tests/tcgen05_ld.rs | 2 +- .../tests/tcgen05_mma.rs | 2 +- .../tests/tcgen05_mma_ws.rs | 2 +- .../tests/tcgen05_other.rs | 2 +- .../tests/tcgen05_st.rs | 2 +- .../generated_intrinsic_targets/tests/tma.rs | 2 +- .../generated_intrinsic_targets/tests/vote.rs | 2 +- .../tests/warp_barrier.rs | 2 +- .../tests/warp_match.rs | 2 +- .../tests/warp_shuffle.rs | 2 +- .../tests/wgmma_control.rs | 2 +- .../src/generated_intrinsic_targets/tma.rs | 2 +- .../src/generated_intrinsic_targets/vote.rs | 2 +- .../warp_barrier.rs | 2 +- .../generated_intrinsic_targets/warp_match.rs | 2 +- .../warp_shuffle.rs | 2 +- .../wgmma_control.rs | 2 +- .../src/target/tests/generated_floors.rs | 51 + .../src/ops/generated/active_mask.rs | 2 +- .../dialect-nvvm/src/ops/generated/clc.rs | 2 +- .../src/ops/generated/cluster_barrier.rs | 2 +- .../src/ops/generated/cluster_memory.rs | 2 +- .../src/ops/generated/cp_async.rs | 2 +- .../src/ops/generated/debug_control.rs | 2 +- .../dialect-nvvm/src/ops/generated/dotprod.rs | 2 +- .../dialect-nvvm/src/ops/generated/elect.rs | 2 +- .../src/ops/generated/execution_control.rs | 2 +- .../src/ops/generated/extended_minmax.rs | 2 +- .../src/ops/generated/integer_minmax.rs | 2 +- .../src/ops/generated/ldmatrix.rs | 2 +- .../src/ops/generated/mbarrier_basic.rs | 2 +- .../src/ops/generated/mbarrier_extended.rs | 2 +- .../dialect-nvvm/src/ops/generated/mod.rs | 2 +- .../src/ops/generated/movmatrix.rs | 2 +- .../src/ops/generated/packed_alu.rs | 2 +- .../src/ops/generated/packed_atomic.rs | 2 +- .../src/ops/generated/packed_conversion.rs | 2 +- .../dialect-nvvm/src/ops/generated/prmt.rs | 2 +- .../dialect-nvvm/src/ops/generated/redux.rs | 2 +- .../src/ops/generated/register_mma.rs | 2 +- .../src/ops/generated/scalar_arithmetic.rs | 2 +- .../src/ops/generated/scalar_conversion.rs | 2 +- .../src/ops/generated/scalar_math.rs | 2 +- .../src/ops/generated/sparse_mma.rs | 2 +- .../dialect-nvvm/src/ops/generated/sreg.rs | 2 +- .../src/ops/generated/stmatrix.rs | 2 +- .../dialect-nvvm/src/ops/generated/sync.rs | 2 +- .../dialect-nvvm/src/ops/generated/tcgen05.rs | 2 +- .../dialect-nvvm/src/ops/generated/tma.rs | 2 +- .../dialect-nvvm/src/ops/generated/vote.rs | 2 +- .../src/ops/generated/warp_barrier.rs | 2 +- .../src/ops/generated/warp_match.rs | 2 +- .../src/ops/generated/warp_shuffle.rs | 2 +- .../src/ops/generated/wgmma_control.rs | 2 +- .../intrinsics/generated/active_mask.rs | 2 +- .../terminator/intrinsics/generated/clc.rs | 2 +- .../intrinsics/generated/cluster_barrier.rs | 2 +- .../intrinsics/generated/cluster_memory.rs | 2 +- .../intrinsics/generated/cp_async.rs | 2 +- .../intrinsics/generated/debug_control.rs | 2 +- .../intrinsics/generated/dotprod.rs | 2 +- .../terminator/intrinsics/generated/elect.rs | 2 +- .../intrinsics/generated/execution_control.rs | 2 +- .../intrinsics/generated/extended_minmax.rs | 2 +- .../intrinsics/generated/helpers.rs | 2 +- .../intrinsics/generated/integer_minmax.rs | 2 +- .../intrinsics/generated/ldmatrix.rs | 2 +- .../intrinsics/generated/mbarrier_basic.rs | 2 +- .../intrinsics/generated/mbarrier_extended.rs | 2 +- .../terminator/intrinsics/generated/mod.rs | 2 +- .../intrinsics/generated/movmatrix.rs | 2 +- .../intrinsics/generated/packed_alu.rs | 2 +- .../intrinsics/generated/packed_atomic.rs | 2 +- .../intrinsics/generated/packed_conversion.rs | 2 +- .../terminator/intrinsics/generated/prmt.rs | 2 +- .../terminator/intrinsics/generated/redux.rs | 2 +- .../intrinsics/generated/register_mma.rs | 2 +- .../intrinsics/generated/scalar_arithmetic.rs | 2 +- .../intrinsics/generated/scalar_conversion.rs | 2 +- .../intrinsics/generated/scalar_math.rs | 2 +- .../intrinsics/generated/sparse_mma.rs | 2 +- .../terminator/intrinsics/generated/sreg.rs | 2 +- .../intrinsics/generated/stmatrix.rs | 2 +- .../terminator/intrinsics/generated/sync.rs | 2 +- .../intrinsics/generated/tcgen05_cp.rs | 2 +- .../intrinsics/generated/tcgen05_ld.rs | 2 +- .../intrinsics/generated/tcgen05_mma.rs | 2 +- .../intrinsics/generated/tcgen05_other.rs | 2 +- .../intrinsics/generated/tcgen05_st.rs | 2 +- .../intrinsics/generated/tests/active_mask.rs | 2 +- .../intrinsics/generated/tests/clc.rs | 2 +- .../generated/tests/cluster_barrier.rs | 2 +- .../generated/tests/cluster_memory.rs | 2 +- .../intrinsics/generated/tests/cp_async.rs | 2 +- .../generated/tests/debug_control.rs | 2 +- .../intrinsics/generated/tests/dotprod.rs | 2 +- .../intrinsics/generated/tests/elect.rs | 2 +- .../generated/tests/execution_control.rs | 2 +- .../generated/tests/extended_minmax.rs | 2 +- .../generated/tests/integer_minmax.rs | 2 +- .../intrinsics/generated/tests/ldmatrix.rs | 2 +- .../generated/tests/mbarrier_basic.rs | 2 +- .../generated/tests/mbarrier_extended.rs | 2 +- .../intrinsics/generated/tests/mod.rs | 2 +- .../intrinsics/generated/tests/movmatrix.rs | 2 +- .../intrinsics/generated/tests/packed_alu.rs | 2 +- .../generated/tests/packed_atomic.rs | 2 +- .../generated/tests/packed_conversion.rs | 2 +- .../intrinsics/generated/tests/prmt.rs | 2 +- .../intrinsics/generated/tests/redux.rs | 2 +- .../generated/tests/register_mma.rs | 2 +- .../generated/tests/scalar_arithmetic.rs | 2 +- .../generated/tests/scalar_conversion.rs | 2 +- .../intrinsics/generated/tests/scalar_math.rs | 2 +- .../intrinsics/generated/tests/sparse_mma.rs | 2 +- .../intrinsics/generated/tests/sreg.rs | 2 +- .../intrinsics/generated/tests/stmatrix.rs | 2 +- .../intrinsics/generated/tests/sync.rs | 2 +- .../intrinsics/generated/tests/tcgen05.rs | 2 +- .../intrinsics/generated/tests/tma.rs | 2 +- .../intrinsics/generated/tests/vote.rs | 2 +- .../generated/tests/warp_barrier.rs | 2 +- .../intrinsics/generated/tests/warp_match.rs | 2 +- .../generated/tests/warp_shuffle.rs | 2 +- .../generated/tests/wgmma_control.rs | 2 +- .../terminator/intrinsics/generated/tma.rs | 2 +- .../terminator/intrinsics/generated/vote.rs | 2 +- .../intrinsics/generated/warp_barrier.rs | 2 +- .../intrinsics/generated/warp_match.rs | 2 +- .../intrinsics/generated/warp_shuffle.rs | 2 +- .../intrinsics/generated/wgmma_control.rs | 2 +- .../generated_intrinsics/active_mask.rs | 2 +- .../src/convert/generated_intrinsics/clc.rs | 2 +- .../generated_intrinsics/cluster_barrier.rs | 2 +- .../generated_intrinsics/cluster_memory.rs | 2 +- .../convert/generated_intrinsics/cp_async.rs | 2 +- .../generated_intrinsics/debug_control.rs | 2 +- .../convert/generated_intrinsics/dotprod.rs | 2 +- .../src/convert/generated_intrinsics/elect.rs | 2 +- .../generated_intrinsics/execution_control.rs | 2 +- .../generated_intrinsics/extended_minmax.rs | 2 +- .../generated_intrinsics/integer_minmax.rs | 2 +- .../convert/generated_intrinsics/ldmatrix.rs | 2 +- .../generated_intrinsics/mbarrier_basic.rs | 2 +- .../generated_intrinsics/mbarrier_extended.rs | 2 +- .../src/convert/generated_intrinsics/mod.rs | 2 +- .../convert/generated_intrinsics/movmatrix.rs | 2 +- .../generated_intrinsics/packed_alu.rs | 2 +- .../generated_intrinsics/packed_atomic.rs | 2 +- .../generated_intrinsics/packed_conversion.rs | 2 +- .../src/convert/generated_intrinsics/prmt.rs | 2 +- .../src/convert/generated_intrinsics/redux.rs | 2 +- .../generated_intrinsics/register_mma.rs | 2 +- .../generated_intrinsics/scalar_arithmetic.rs | 2 +- .../generated_intrinsics/scalar_conversion.rs | 2 +- .../generated_intrinsics/scalar_math.rs | 2 +- .../generated_intrinsics/sparse_mma.rs | 2 +- .../src/convert/generated_intrinsics/sreg.rs | 2 +- .../convert/generated_intrinsics/stmatrix.rs | 2 +- .../src/convert/generated_intrinsics/sync.rs | 2 +- .../convert/generated_intrinsics/tcgen05.rs | 2 +- .../src/convert/generated_intrinsics/tma.rs | 2 +- .../src/convert/generated_intrinsics/vote.rs | 2 +- .../generated_intrinsics/warp_barrier.rs | 2 +- .../generated_intrinsics/warp_match.rs | 2 +- .../generated_intrinsics/warp_shuffle.rs | 2 +- .../generated_intrinsics/wgmma_control.rs | 2 +- .../src/generated_intrinsics.rs | 2 +- .../cuda-oxide-book/compiler/mlir-dialects.md | 4 +- cuda-oxide/intrinsics/catalog.json | 5636 ++++++++-------- .../cuda-13.3-sm75-scalar-arithmetic.json | 5317 ++++++++++++++++ ...-llvm-23.1.3-aab11ee0-scalar-baseline.json | 5655 +++++++++++++++++ .../scalar-arithmetic-sm20-20261013/README.md | 62 + .../captures.json | 1935 ++++++ .../inputs.jsonl | 64 + .../proof.json | 135 + .../scalar-arithmetic-sm75-20261013/scalar.ll | 393 ++ cuda-oxide/intrinsics/generated-reference.md | 1154 ++-- .../intrinsics/overlay/scalar_arithmetic.toml | 4 +- cuda-oxide/intrinsics/probes/abs_bf16x2.ll | 2 +- cuda-oxide/intrinsics/probes/abs_f16x2.ll | 2 +- cuda-oxide/intrinsics/probes/active_mask.ll | 2 +- cuda-oxide/intrinsics/probes/add_bf16x2.ll | 2 +- cuda-oxide/intrinsics/probes/add_f16x2.ll | 2 +- cuda-oxide/intrinsics/probes/add_f32x2.ll | 2 +- cuda-oxide/intrinsics/probes/add_ftz_f32x2.ll | 2 +- cuda-oxide/intrinsics/probes/add_rm_f32.ll | 2 +- cuda-oxide/intrinsics/probes/add_rm_f64.ll | 2 +- .../intrinsics/probes/add_rm_ftz_f32.ll | 2 +- .../intrinsics/probes/add_rm_ftz_sat_f32.ll | 2 +- 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.../probes/tcgen05_ld_16x32bx2_x1_pack16.ll | 2 +- .../probes/tcgen05_ld_16x32bx2_x1_raw.ll | 2 +- .../probes/tcgen05_ld_16x32bx2_x2_pack16.ll | 2 +- .../probes/tcgen05_ld_16x32bx2_x2_raw.ll | 2 +- .../probes/tcgen05_ld_16x32bx2_x32_pack16.ll | 2 +- .../probes/tcgen05_ld_16x32bx2_x32_raw.ll | 2 +- .../probes/tcgen05_ld_16x32bx2_x4_pack16.ll | 2 +- .../probes/tcgen05_ld_16x32bx2_x4_raw.ll | 2 +- .../probes/tcgen05_ld_16x32bx2_x64_pack16.ll | 2 +- .../probes/tcgen05_ld_16x32bx2_x64_raw.ll | 2 +- .../probes/tcgen05_ld_16x32bx2_x8_pack16.ll | 2 +- .../probes/tcgen05_ld_16x32bx2_x8_raw.ll | 2 +- .../probes/tcgen05_ld_16x64b_x128_pack16.ll | 2 +- .../probes/tcgen05_ld_16x64b_x128_raw.ll | 2 +- .../probes/tcgen05_ld_16x64b_x16_pack16.ll | 2 +- .../probes/tcgen05_ld_16x64b_x16_raw.ll | 2 +- .../probes/tcgen05_ld_16x64b_x1_pack16.ll | 2 +- .../probes/tcgen05_ld_16x64b_x1_raw.ll | 2 +- .../probes/tcgen05_ld_16x64b_x2_pack16.ll | 2 +- .../probes/tcgen05_ld_16x64b_x2_raw.ll | 2 +- .../probes/tcgen05_ld_16x64b_x32_pack16.ll | 2 +- .../probes/tcgen05_ld_16x64b_x32_raw.ll | 2 +- .../probes/tcgen05_ld_16x64b_x4_pack16.ll | 2 +- .../probes/tcgen05_ld_16x64b_x4_raw.ll | 2 +- .../probes/tcgen05_ld_16x64b_x64_pack16.ll | 2 +- .../probes/tcgen05_ld_16x64b_x64_raw.ll | 2 +- .../probes/tcgen05_ld_16x64b_x8_pack16.ll | 2 +- .../probes/tcgen05_ld_16x64b_x8_raw.ll | 2 +- .../probes/tcgen05_ld_32x32b_x128_pack16.ll | 2 +- .../probes/tcgen05_ld_32x32b_x128_raw.ll | 2 +- .../probes/tcgen05_ld_32x32b_x16_pack16.ll | 2 +- .../probes/tcgen05_ld_32x32b_x16_raw.ll | 2 +- .../probes/tcgen05_ld_32x32b_x1_pack16.ll | 2 +- .../probes/tcgen05_ld_32x32b_x1_raw.ll | 2 +- .../probes/tcgen05_ld_32x32b_x2_pack16.ll | 2 +- .../probes/tcgen05_ld_32x32b_x2_raw.ll | 2 +- .../probes/tcgen05_ld_32x32b_x32_pack16.ll | 2 +- .../probes/tcgen05_ld_32x32b_x32_raw.ll | 2 +- .../probes/tcgen05_ld_32x32b_x4_pack16.ll | 2 +- .../probes/tcgen05_ld_32x32b_x4_raw.ll | 2 +- .../probes/tcgen05_ld_32x32b_x64_pack16.ll | 2 +- .../probes/tcgen05_ld_32x32b_x64_raw.ll | 2 +- .../probes/tcgen05_ld_32x32b_x8_pack16.ll | 2 +- .../probes/tcgen05_ld_32x32b_x8_raw.ll | 2 +- .../intrinsics/probes/tcgen05_load_wait.ll | 2 +- .../intrinsics/probes/tcgen05_mma_e2m1.ll | 2 +- .../intrinsics/probes/tcgen05_mma_e2m3.ll | 2 +- .../intrinsics/probes/tcgen05_mma_e3m2.ll | 2 +- .../intrinsics/probes/tcgen05_mma_e4m3.ll | 2 +- .../intrinsics/probes/tcgen05_mma_e5m2.ll | 2 +- .../intrinsics/probes/tcgen05_mma_f16.ll | 2 +- .../intrinsics/probes/tcgen05_mma_f16_cg2.ll | 2 +- .../intrinsics/probes/tcgen05_mma_shared.ll | 2 +- .../probes/tcgen05_mma_sp_shared.ll | 2 +- .../probes/tcgen05_mma_sp_tensor.ll | 2 +- .../probes/tcgen05_mma_sp_tensor_ashift.ll | 2 +- .../intrinsics/probes/tcgen05_mma_tensor.ll | 2 +- .../probes/tcgen05_mma_tensor_ashift.ll | 2 +- .../intrinsics/probes/tcgen05_mma_ws_bf16.ll | 2 +- .../intrinsics/probes/tcgen05_mma_ws_e2m1.ll | 2 +- .../intrinsics/probes/tcgen05_mma_ws_e2m3.ll | 2 +- .../intrinsics/probes/tcgen05_mma_ws_e3m2.ll | 2 +- .../intrinsics/probes/tcgen05_mma_ws_e4m3.ll | 2 +- .../intrinsics/probes/tcgen05_mma_ws_e5m2.ll | 2 +- .../intrinsics/probes/tcgen05_mma_ws_f16.ll | 2 +- .../probes/tcgen05_mma_ws_shared.ll | 2 +- .../tcgen05_mma_ws_shared_zero_col_mask.ll | 2 +- .../probes/tcgen05_mma_ws_sp_shared.ll | 2 +- .../tcgen05_mma_ws_sp_shared_zero_col_mask.ll | 2 +- .../probes/tcgen05_mma_ws_sp_tensor.ll | 2 +- .../tcgen05_mma_ws_sp_tensor_zero_col_mask.ll | 2 +- .../probes/tcgen05_mma_ws_tensor.ll | 2 +- .../tcgen05_mma_ws_tensor_zero_col_mask.ll | 2 +- .../intrinsics/probes/tcgen05_mma_ws_tf32.ll | 2 +- .../probes/tcgen05_relinquish_alloc_permit.ll | 2 +- .../tcgen05_relinquish_alloc_permit_cg2.ll | 2 +- .../intrinsics/probes/tcgen05_shift_down.ll | 2 +- .../probes/tcgen05_shift_down_cg2.ll | 2 +- .../probes/tcgen05_st_16x128b_x16_raw.ll | 2 +- .../probes/tcgen05_st_16x128b_x16_unpack16.ll | 2 +- .../probes/tcgen05_st_16x128b_x1_raw.ll | 2 +- .../probes/tcgen05_st_16x128b_x1_unpack16.ll | 2 +- .../probes/tcgen05_st_16x128b_x2_raw.ll | 2 +- .../probes/tcgen05_st_16x128b_x2_unpack16.ll | 2 +- .../probes/tcgen05_st_16x128b_x32_raw.ll | 2 +- .../probes/tcgen05_st_16x128b_x32_unpack16.ll | 2 +- .../probes/tcgen05_st_16x128b_x4_raw.ll | 2 +- .../probes/tcgen05_st_16x128b_x4_unpack16.ll | 2 +- .../probes/tcgen05_st_16x128b_x64_raw.ll | 2 +- .../probes/tcgen05_st_16x128b_x64_unpack16.ll | 2 +- .../probes/tcgen05_st_16x128b_x8_raw.ll | 2 +- .../probes/tcgen05_st_16x128b_x8_unpack16.ll | 2 +- .../probes/tcgen05_st_16x256b_x16_raw.ll | 2 +- .../probes/tcgen05_st_16x256b_x16_unpack16.ll | 2 +- .../probes/tcgen05_st_16x256b_x1_raw.ll | 2 +- .../probes/tcgen05_st_16x256b_x1_unpack16.ll | 2 +- .../probes/tcgen05_st_16x256b_x2_raw.ll | 2 +- .../probes/tcgen05_st_16x256b_x2_unpack16.ll | 2 +- .../probes/tcgen05_st_16x256b_x32_raw.ll | 2 +- .../probes/tcgen05_st_16x256b_x32_unpack16.ll | 2 +- .../probes/tcgen05_st_16x256b_x4_raw.ll | 2 +- .../probes/tcgen05_st_16x256b_x4_unpack16.ll | 2 +- .../probes/tcgen05_st_16x256b_x8_raw.ll | 2 +- .../probes/tcgen05_st_16x256b_x8_unpack16.ll | 2 +- .../probes/tcgen05_st_16x32bx2_x128_raw.ll | 2 +- .../tcgen05_st_16x32bx2_x128_unpack16.ll | 2 +- .../probes/tcgen05_st_16x32bx2_x16_raw.ll | 2 +- .../tcgen05_st_16x32bx2_x16_unpack16.ll | 2 +- .../probes/tcgen05_st_16x32bx2_x1_raw.ll | 2 +- .../probes/tcgen05_st_16x32bx2_x1_unpack16.ll | 2 +- .../probes/tcgen05_st_16x32bx2_x2_raw.ll | 2 +- .../probes/tcgen05_st_16x32bx2_x2_unpack16.ll | 2 +- .../probes/tcgen05_st_16x32bx2_x32_raw.ll | 2 +- .../tcgen05_st_16x32bx2_x32_unpack16.ll | 2 +- .../probes/tcgen05_st_16x32bx2_x4_raw.ll | 2 +- .../probes/tcgen05_st_16x32bx2_x4_unpack16.ll | 2 +- .../probes/tcgen05_st_16x32bx2_x64_raw.ll | 2 +- .../tcgen05_st_16x32bx2_x64_unpack16.ll | 2 +- .../probes/tcgen05_st_16x32bx2_x8_raw.ll | 2 +- .../probes/tcgen05_st_16x32bx2_x8_unpack16.ll | 2 +- .../probes/tcgen05_st_16x64b_x128_raw.ll | 2 +- .../probes/tcgen05_st_16x64b_x128_unpack16.ll | 2 +- .../probes/tcgen05_st_16x64b_x16_raw.ll | 2 +- .../probes/tcgen05_st_16x64b_x16_unpack16.ll | 2 +- .../probes/tcgen05_st_16x64b_x1_raw.ll | 2 +- .../probes/tcgen05_st_16x64b_x1_unpack16.ll | 2 +- .../probes/tcgen05_st_16x64b_x2_raw.ll | 2 +- .../probes/tcgen05_st_16x64b_x2_unpack16.ll | 2 +- .../probes/tcgen05_st_16x64b_x32_raw.ll | 2 +- .../probes/tcgen05_st_16x64b_x32_unpack16.ll | 2 +- .../probes/tcgen05_st_16x64b_x4_raw.ll | 2 +- .../probes/tcgen05_st_16x64b_x4_unpack16.ll | 2 +- .../probes/tcgen05_st_16x64b_x64_raw.ll | 2 +- .../probes/tcgen05_st_16x64b_x64_unpack16.ll | 2 +- .../probes/tcgen05_st_16x64b_x8_raw.ll | 2 +- .../probes/tcgen05_st_16x64b_x8_unpack16.ll | 2 +- .../probes/tcgen05_st_32x32b_x128_raw.ll | 2 +- .../probes/tcgen05_st_32x32b_x128_unpack16.ll | 2 +- .../probes/tcgen05_st_32x32b_x16_raw.ll | 2 +- .../probes/tcgen05_st_32x32b_x16_unpack16.ll | 2 +- .../probes/tcgen05_st_32x32b_x1_raw.ll | 2 +- .../probes/tcgen05_st_32x32b_x1_unpack16.ll | 2 +- .../probes/tcgen05_st_32x32b_x2_raw.ll | 2 +- .../probes/tcgen05_st_32x32b_x2_unpack16.ll | 2 +- .../probes/tcgen05_st_32x32b_x32_raw.ll | 2 +- .../probes/tcgen05_st_32x32b_x32_unpack16.ll | 2 +- .../probes/tcgen05_st_32x32b_x4_raw.ll | 2 +- .../probes/tcgen05_st_32x32b_x4_unpack16.ll | 2 +- .../probes/tcgen05_st_32x32b_x64_raw.ll | 2 +- .../probes/tcgen05_st_32x32b_x64_unpack16.ll | 2 +- .../probes/tcgen05_st_32x32b_x8_raw.ll | 2 +- .../probes/tcgen05_st_32x32b_x8_unpack16.ll | 2 +- .../intrinsics/probes/tcgen05_store_wait.ll | 2 +- .../probes/tensormap_replace_box_dim.ll | 2 +- .../tensormap_replace_element_stride.ll | 2 +- .../probes/tensormap_replace_element_type.ll | 2 +- .../probes/tensormap_replace_fill_mode.ll | 2 +- .../tensormap_replace_global_address.ll | 2 +- .../probes/tensormap_replace_global_dim.ll | 2 +- .../probes/tensormap_replace_global_stride.ll | 2 +- .../tensormap_replace_interleave_layout.ll | 2 +- .../probes/tensormap_replace_rank.ll | 2 +- .../tensormap_replace_swizzle_atomicity.ll | 2 +- .../probes/tensormap_replace_swizzle_mode.ll | 2 +- cuda-oxide/intrinsics/probes/thread_idx_x.ll | 2 +- cuda-oxide/intrinsics/probes/thread_idx_y.ll | 2 +- cuda-oxide/intrinsics/probes/thread_idx_z.ll | 2 +- cuda-oxide/intrinsics/probes/threadfence.ll | 2 +- .../intrinsics/probes/threadfence_block.ll | 2 +- .../intrinsics/probes/threadfence_system.ll | 2 +- .../probes/total_smem_size.lib_nvvm.ll | 2 +- .../probes/total_smem_size.llvm_nvptx.ll | 2 +- cuda-oxide/intrinsics/probes/trap.ll | 2 +- cuda-oxide/intrinsics/probes/uni_sync.ll | 2 +- .../intrinsics/probes/warpid.lib_nvvm.ll | 2 +- .../intrinsics/probes/warpid.llvm_nvptx.ll | 2 +- .../intrinsics/probes/wgmma_commit_group.ll | 2 +- cuda-oxide/intrinsics/probes/wgmma_fence.ll | 2 +- .../intrinsics/probes/wgmma_wait_group.ll | 2 +- .../scripts/probe_scalar_llvm_floors.py | 123 + .../scripts/probe_scalar_nvvm_floors.py | 247 + 1343 files changed, 19605 insertions(+), 5565 deletions(-) create mode 100644 cuda-oxide/intrinsics/evidence/cuda-13.3-sm75-scalar-arithmetic.json create mode 100644 cuda-oxide/intrinsics/evidence/rust-llvm-23.1.3-aab11ee0-scalar-baseline.json create mode 100644 cuda-oxide/intrinsics/evidence/scalar-arithmetic-sm20-20261013/README.md create mode 100644 cuda-oxide/intrinsics/evidence/scalar-arithmetic-sm20-20261013/captures.json create mode 100644 cuda-oxide/intrinsics/evidence/scalar-arithmetic-sm20-20261013/inputs.jsonl create mode 100644 cuda-oxide/intrinsics/evidence/scalar-arithmetic-sm75-20261013/proof.json create mode 100644 cuda-oxide/intrinsics/evidence/scalar-arithmetic-sm75-20261013/scalar.ll create mode 100644 cuda-oxide/scripts/probe_scalar_llvm_floors.py create mode 100644 cuda-oxide/scripts/probe_scalar_nvvm_floors.py diff --git a/cuda-oxide/crates/cuda-device/src/generated/async_copy.rs b/cuda-oxide/crates/cuda-device/src/generated/async_copy.rs index 821e27ba83..7ad234f57d 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/async_copy.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/async_copy.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::async_copy` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/atomic.rs b/cuda-oxide/crates/cuda-device/src/generated/atomic.rs index 54e963cc62..f79c236ae5 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/atomic.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/atomic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::atomic` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/bf16.rs b/cuda-oxide/crates/cuda-device/src/generated/bf16.rs index 85254d74f7..5184bdf47d 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/bf16.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/bf16.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::bf16` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/bf16x2.rs b/cuda-oxide/crates/cuda-device/src/generated/bf16x2.rs index 2f952e598e..3e2b055917 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/bf16x2.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/bf16x2.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::bf16x2` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/clc.rs b/cuda-oxide/crates/cuda-device/src/generated/clc.rs index d11649381e..b4e6b5ec20 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/clc.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/clc.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::clc` to keep its public API stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/cluster_barrier.rs b/cuda-oxide/crates/cuda-device/src/generated/cluster_barrier.rs index de73e4179b..be554a24a2 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/cluster_barrier.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/cluster_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::cluster` to keep public paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/cluster_memory.rs b/cuda-oxide/crates/cuda-device/src/generated/cluster_memory.rs index 634f66471f..cf4fc06dff 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/cluster_memory.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/cluster_memory.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::cluster` to keep its public API stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/cluster_sreg.rs b/cuda-oxide/crates/cuda-device/src/generated/cluster_sreg.rs index a3cb4344b0..547f5af2c8 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/cluster_sreg.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/cluster_sreg.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // This file is included inside `cuda_device::cluster`. diff --git a/cuda-oxide/crates/cuda-device/src/generated/convert.rs b/cuda-oxide/crates/cuda-device/src/generated/convert.rs index f592b2299e..681e7335bb 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/convert.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/convert.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::convert`. diff --git a/cuda-oxide/crates/cuda-device/src/generated/counted_barrier.rs b/cuda-oxide/crates/cuda-device/src/generated/counted_barrier.rs index 6a6677919b..14b119749b 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/counted_barrier.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/counted_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::barrier` to keep its public API stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/debug_control.rs b/cuda-oxide/crates/cuda-device/src/generated/debug_control.rs index 3d5bab10c8..9ce1e1afd7 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/debug_control.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/debug_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::debug` to keep its public API stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/debug_sreg.rs b/cuda-oxide/crates/cuda-device/src/generated/debug_sreg.rs index 2789f4f675..2566b0c00c 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/debug_sreg.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/debug_sreg.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::debug` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/dotprod.rs b/cuda-oxide/crates/cuda-device/src/generated/dotprod.rs index d39b60563a..d469254ad9 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/dotprod.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/dotprod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::dotprod` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/f16.rs b/cuda-oxide/crates/cuda-device/src/generated/f16.rs index acdeaf41b5..53caffaa5e 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/f16.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/f16.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::f16` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/f16x2.rs b/cuda-oxide/crates/cuda-device/src/generated/f16x2.rs index fa908ce6b5..6f0706a157 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/f16x2.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/f16x2.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::f16x2` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/f32x2.rs b/cuda-oxide/crates/cuda-device/src/generated/f32x2.rs index 6769a157a2..cb868f1258 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/f32x2.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/f32x2.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::f32x2` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/fence.rs b/cuda-oxide/crates/cuda-device/src/generated/fence.rs index 06ef909025..ff4e0b3599 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/fence.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/fence.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // This file is included inside `cuda_device::fence` so existing paths stay stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/float.rs b/cuda-oxide/crates/cuda-device/src/generated/float.rs index 3e97a682d8..b51ddd51e0 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/float.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/float.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::float`. diff --git a/cuda-oxide/crates/cuda-device/src/generated/grid_dependency.rs b/cuda-oxide/crates/cuda-device/src/generated/grid_dependency.rs index 6006b8ecbc..9058d85017 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/grid_dependency.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/grid_dependency.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::grid` to keep its public API stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/grid_sreg.rs b/cuda-oxide/crates/cuda-device/src/generated/grid_sreg.rs index 56d3944256..6b5da73823 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/grid_sreg.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/grid_sreg.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::grid` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/i16x2.rs b/cuda-oxide/crates/cuda-device/src/generated/i16x2.rs index 77feb7b3eb..57ca29ab05 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/i16x2.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/i16x2.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::i16x2` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/int.rs b/cuda-oxide/crates/cuda-device/src/generated/int.rs index d13952b077..270b17ea7c 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/int.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/int.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::int` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/ldmatrix.rs b/cuda-oxide/crates/cuda-device/src/generated/ldmatrix.rs index 1645ec9922..95ba36d31f 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/ldmatrix.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/ldmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::wmma` to keep public paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/mbarrier_basic.rs b/cuda-oxide/crates/cuda-device/src/generated/mbarrier_basic.rs index d7f7432f5f..a289191eb9 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/mbarrier_basic.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/mbarrier_basic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::barrier` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/mbarrier_extended.rs b/cuda-oxide/crates/cuda-device/src/generated/mbarrier_extended.rs index e019729ce6..e2e22d5937 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/mbarrier_extended.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/mbarrier_extended.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::barrier` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/movmatrix.rs b/cuda-oxide/crates/cuda-device/src/generated/movmatrix.rs index 90c6bdff83..78ee2ebf75 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/movmatrix.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/movmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::wmma` to keep its public API stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/prmt.rs b/cuda-oxide/crates/cuda-device/src/generated/prmt.rs index 2c3ce2bedf..c1c663b373 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/prmt.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/prmt.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::prmt` to keep the public paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/register_control.rs b/cuda-oxide/crates/cuda-device/src/generated/register_control.rs index 9b7fa2f900..47d7d09066 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/register_control.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/register_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::thread` to keep its public API stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/register_mma.rs b/cuda-oxide/crates/cuda-device/src/generated/register_mma.rs index 580351a3c3..5f35096542 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/register_mma.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/register_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::wmma` to keep public paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/shared_sreg.rs b/cuda-oxide/crates/cuda-device/src/generated/shared_sreg.rs index 068fc93ca0..d8f1fd95bc 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/shared_sreg.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/shared_sreg.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::shared` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/sparse_mma.rs b/cuda-oxide/crates/cuda-device/src/generated/sparse_mma.rs index dae6ecf5e5..2eadd8440f 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/sparse_mma.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/sparse_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::wmma` to keep public paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/sreg.rs b/cuda-oxide/crates/cuda-device/src/generated/sreg.rs index d279384792..a5fe074967 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/sreg.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/sreg.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // This file is included lexically inside `cuda_device::thread` so existing diff --git a/cuda-oxide/crates/cuda-device/src/generated/stmatrix.rs b/cuda-oxide/crates/cuda-device/src/generated/stmatrix.rs index cba095423c..27dd7f563e 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/stmatrix.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/stmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::tcgen05` to keep public paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/tcgen05.rs b/cuda-oxide/crates/cuda-device/src/generated/tcgen05.rs index d2ae333e1a..747affc389 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/tcgen05.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/tcgen05.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::tcgen05` to keep its public API stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/tma.rs b/cuda-oxide/crates/cuda-device/src/generated/tma.rs index 828ddd5d95..4eff5ea437 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/tma.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/tma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::tma` to keep its public API stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/warp_sreg.rs b/cuda-oxide/crates/cuda-device/src/generated/warp_sreg.rs index f4eb6d8e04..b628cf1df0 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/warp_sreg.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/warp_sreg.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::warp` to keep existing paths stable. diff --git a/cuda-oxide/crates/cuda-device/src/generated/wgmma_control.rs b/cuda-oxide/crates/cuda-device/src/generated/wgmma_control.rs index 2824167161..f03db66b31 100644 --- a/cuda-oxide/crates/cuda-device/src/generated/wgmma_control.rs +++ b/cuda-oxide/crates/cuda-device/src/generated/wgmma_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. // Included inside `cuda_device::wgmma` to keep its public API stable. diff --git a/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/families/scalar_arithmetic.rs b/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/families/scalar_arithmetic.rs index 62d469d3a0..e68c6a61c2 100644 --- a/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/families/scalar_arithmetic.rs +++ b/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/families/scalar_arithmetic.rs @@ -321,8 +321,10 @@ pub(in crate::resolve) fn scalar_arithmetic_overlay_record( memory: "none".into(), convergent: false, execution_scope: "thread".into(), - minimum_ptx: "7.0".into(), - minimum_sm: Some("sm_80".into()), + // PTX 2.0 / sm_20 is a conservative common native floor for this family, + // including f32 subnormal preservation, directed division and fma. + minimum_ptx: "2.0".into(), + minimum_sm: Some("sm_20".into()), ptx_result: recipe.rust_type.into(), targets: "all".into(), ptx_isa_version: "9.3".into(), @@ -352,8 +354,22 @@ pub(in crate::resolve) fn scalar_arithmetic_overlay_record( }, evidence_profile: evidence_profile.clone(), targets: None, - minimum_ptx: Some("7.0".into()), - minimum_sm: Some("sm_80".into()), + // Keep compiler evidence floors independent: LLVM lowers the full family + // at sm_20/+ptx32; CUDA 13.3 libNVVM is separately validated at compute_75. + minimum_ptx: Some( + match backend { + IntrinsicBackend::LlvmNvptx => "3.2", + IntrinsicBackend::LibNvvm => "6.3", + } + .into(), + ), + minimum_sm: Some( + match backend { + IntrinsicBackend::LlvmNvptx => "sm_20", + IntrinsicBackend::LibNvvm => "sm_75", + } + .into(), + ), }) .collect(), packed_atomic: None, @@ -614,8 +630,8 @@ pub(in crate::resolve) fn validate_scalar_arithmetic_policy( && policy.memory == "none" && !policy.convergent && policy.execution_scope == "thread" - && policy.minimum_ptx == "7.0" - && policy.minimum_sm.as_deref() == Some("sm_80") + && policy.minimum_ptx == "2.0" + && policy.minimum_sm.as_deref() == Some("sm_20") && policy.ptx_result == recipe.rust_type && policy.targets == "all" && policy.ptx_isa_version == "9.3" @@ -649,11 +665,15 @@ pub(in crate::resolve) fn validate_scalar_arithmetic_policy( ensure!( policy.backend_lowerings.len() == 2 && expected_backends.into_iter().all(|(backend, mechanism)| { + let (ptx, sm) = match backend { + IntrinsicBackend::LlvmNvptx => ("3.2", "sm_20"), + IntrinsicBackend::LibNvvm => ("6.3", "sm_75"), + }; policy.backend_lowerings.iter().any(|lowering| { lowering.backend == backend && lowering.mechanism == mechanism - && lowering.minimum_ptx.as_deref() == Some("7.0") - && lowering.minimum_sm.as_deref() == Some("sm_80") + && lowering.minimum_ptx.as_deref() == Some(ptx) + && lowering.minimum_sm.as_deref() == Some(sm) && !lowering.evidence_profile.trim().is_empty() }) }), diff --git a/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/scalar_packed.rs b/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/scalar_packed.rs index a1ad55b83b..c9dc98d51e 100644 --- a/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/scalar_packed.rs +++ b/cuda-oxide/crates/cuda-intrinsics-gen/src/resolve/tests/scalar_packed.rs @@ -27,6 +27,42 @@ use crate::resolve::overlay::*; use crate::resolve::policy::*; use crate::resolve::targets::validate_arch_introduction_floor; +#[test] +fn scalar_arithmetic_llvm_floor_is_independent_of_libnvvm_evidence() { + let admission = ScalarArithmeticAdmission { + llvm_evidence_profile: "llvm-scalar-arithmetic".into(), + libnvvm_evidence_profile: "libnvvm-scalar-arithmetic".into(), + runtime_validation: RuntimeValidation::Unexecuted, + variants: canonical_scalar_arithmetic_variants() + .into_iter() + .enumerate() + .map( + |(index, variant)| crate::model::ScalarArithmeticAdmissionVariant { + abi_id: format!("i{:04}", 390 + index), + format: variant.0, + operation: variant.1, + rounding: variant.2, + subnormal: variant.3, + saturation: variant.4, + }, + ) + .collect(), + }; + let records = expand_scalar_arithmetic_admission(&admission).unwrap(); + assert_eq!(records.len(), 64); + for record in records { + assert_eq!(record.minimum_ptx, "2.0", "{}", record.id); + assert_eq!(record.minimum_sm.as_deref(), Some("sm_20"), "{}", record.id); + for lowering in record.backend_lowerings { + let (ptx, sm) = match lowering.backend { + IntrinsicBackend::LlvmNvptx => ("3.2", "sm_20"), + IntrinsicBackend::LibNvvm => ("6.3", "sm_75"), + }; + assert_eq!(lowering.minimum_ptx.as_deref(), Some(ptx), "{}", record.id); + assert_eq!(lowering.minimum_sm.as_deref(), Some(sm), "{}", record.id); + } + } +} #[test] fn compact_prmt_admission_requires_every_mode_and_reserved_abi_id() { assert_eq!( diff --git a/cuda-oxide/crates/cuda-intrinsics/src/generated/abi_v1.rs b/cuda-oxide/crates/cuda-intrinsics/src/generated/abi_v1.rs index a208567ecb..0d41c9049c 100644 --- a/cuda-oxide/crates/cuda-intrinsics/src/generated/abi_v1.rs +++ b/cuda-oxide/crates/cuda-intrinsics/src/generated/abi_v1.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Raw ABI functions recognized by cuda-oxide. @@ -101,7 +101,7 @@ pub fn i0996(_arg0: u64, _arg1: u64) -> u64 { /// Computes scalar add with explicit rm rounding. /// /// Catalog ID: `add_rm_f32`. Source: LLVM `llvm.nvvm.add.rm.f` from `int_nvvm_add_rm_f`; expects PTX `add.rm.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -114,7 +114,7 @@ pub fn i0446(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar add with explicit rm rounding. /// /// Catalog ID: `add_rm_f64`. Source: LLVM `llvm.nvvm.add.rm.d` from `int_nvvm_add_rm_d`; expects PTX `add.rm.f64 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -127,7 +127,7 @@ pub fn i0436(_arg0: f64, _arg1: f64) -> f64 { /// Computes scalar add with explicit rm rounding. /// /// Catalog ID: `add_rm_ftz_f32`. Source: LLVM `llvm.nvvm.add.rm.ftz.f` from `int_nvvm_add_rm_ftz_f`; expects PTX `add.rm.ftz.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -140,7 +140,7 @@ pub fn i0447(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar add with explicit rm rounding. /// /// Catalog ID: `add_rm_ftz_sat_f32`. Source: LLVM `llvm.nvvm.add.rm.ftz.sat.f` from `int_nvvm_add_rm_ftz_sat_f`; expects PTX `add.rm.sat.ftz.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -153,7 +153,7 @@ pub fn i0449(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar add with explicit rm rounding. /// /// Catalog ID: `add_rm_sat_f32`. Source: LLVM `llvm.nvvm.add.rm.sat.f` from `int_nvvm_add_rm_sat_f`; expects PTX `add.rm.sat.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -166,7 +166,7 @@ pub fn i0448(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar add with explicit rn rounding. /// /// Catalog ID: `add_rn_f32`. Source: LLVM `llvm.nvvm.add.rn.f` from `int_nvvm_add_rn_f`; expects PTX `add.rn.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -179,7 +179,7 @@ pub fn i0438(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar add with explicit rn rounding. /// /// Catalog ID: `add_rn_f64`. Source: LLVM `llvm.nvvm.add.rn.d` from `int_nvvm_add_rn_d`; expects PTX `add.rn.f64 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -192,7 +192,7 @@ pub fn i0434(_arg0: f64, _arg1: f64) -> f64 { /// Computes scalar add with explicit rn rounding. /// /// Catalog ID: `add_rn_ftz_f32`. Source: LLVM `llvm.nvvm.add.rn.ftz.f` from `int_nvvm_add_rn_ftz_f`; expects PTX `add.rn.ftz.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -205,7 +205,7 @@ pub fn i0439(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar add with explicit rn rounding. /// /// Catalog ID: `add_rn_ftz_sat_f32`. Source: LLVM `llvm.nvvm.add.rn.ftz.sat.f` from `int_nvvm_add_rn_ftz_sat_f`; expects PTX `add.rn.sat.ftz.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -218,7 +218,7 @@ pub fn i0441(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar add with explicit rn rounding. /// /// Catalog ID: `add_rn_sat_f32`. Source: LLVM `llvm.nvvm.add.rn.sat.f` from `int_nvvm_add_rn_sat_f`; expects PTX `add.rn.sat.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -231,7 +231,7 @@ pub fn i0440(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar add with explicit rp rounding. /// /// Catalog ID: `add_rp_f32`. Source: LLVM `llvm.nvvm.add.rp.f` from `int_nvvm_add_rp_f`; expects PTX `add.rp.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -244,7 +244,7 @@ pub fn i0450(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar add with explicit rp rounding. /// /// Catalog ID: `add_rp_f64`. Source: LLVM `llvm.nvvm.add.rp.d` from `int_nvvm_add_rp_d`; expects PTX `add.rp.f64 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -257,7 +257,7 @@ pub fn i0437(_arg0: f64, _arg1: f64) -> f64 { /// Computes scalar add with explicit rp rounding. /// /// Catalog ID: `add_rp_ftz_f32`. Source: LLVM `llvm.nvvm.add.rp.ftz.f` from `int_nvvm_add_rp_ftz_f`; expects PTX `add.rp.ftz.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -270,7 +270,7 @@ pub fn i0451(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar add with explicit rp rounding. /// /// Catalog ID: `add_rp_ftz_sat_f32`. Source: LLVM `llvm.nvvm.add.rp.ftz.sat.f` from `int_nvvm_add_rp_ftz_sat_f`; expects PTX `add.rp.sat.ftz.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -283,7 +283,7 @@ pub fn i0453(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar add with explicit rp rounding. /// /// Catalog ID: `add_rp_sat_f32`. Source: LLVM `llvm.nvvm.add.rp.sat.f` from `int_nvvm_add_rp_sat_f`; expects PTX `add.rp.sat.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -296,7 +296,7 @@ pub fn i0452(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar add with explicit rz rounding. /// /// Catalog ID: `add_rz_f32`. Source: LLVM `llvm.nvvm.add.rz.f` from `int_nvvm_add_rz_f`; expects PTX `add.rz.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -309,7 +309,7 @@ pub fn i0442(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar add with explicit rz rounding. /// /// Catalog ID: `add_rz_f64`. Source: LLVM `llvm.nvvm.add.rz.d` from `int_nvvm_add_rz_d`; expects PTX `add.rz.f64 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -322,7 +322,7 @@ pub fn i0435(_arg0: f64, _arg1: f64) -> f64 { /// Computes scalar add with explicit rz rounding. /// /// Catalog ID: `add_rz_ftz_f32`. Source: LLVM `llvm.nvvm.add.rz.ftz.f` from `int_nvvm_add_rz_ftz_f`; expects PTX `add.rz.ftz.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -335,7 +335,7 @@ pub fn i0443(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar add with explicit rz rounding. /// /// Catalog ID: `add_rz_ftz_sat_f32`. Source: LLVM `llvm.nvvm.add.rz.ftz.sat.f` from `int_nvvm_add_rz_ftz_sat_f`; expects PTX `add.rz.sat.ftz.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -348,7 +348,7 @@ pub fn i0445(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar add with explicit rz rounding. /// /// Catalog ID: `add_rz_sat_f32`. Source: LLVM `llvm.nvvm.add.rz.sat.f` from `int_nvvm_add_rz_sat_f`; expects PTX `add.rz.sat.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -3388,7 +3388,7 @@ pub fn i0374(_arg0: f32) -> u32 { /// Computes scalar div with explicit rm rounding. /// /// Catalog ID: `div_rm_f32`. Source: LLVM `llvm.nvvm.div.rm.f` from `int_nvvm_div_rm_f`; expects PTX `div.rm.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -3401,7 +3401,7 @@ pub fn i0414(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar div with explicit rm rounding. /// /// Catalog ID: `div_rm_f64`. Source: LLVM `llvm.nvvm.div.rm.d` from `int_nvvm_div_rm_d`; expects PTX `div.rm.f64 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -3414,7 +3414,7 @@ pub fn i0396(_arg0: f64, _arg1: f64) -> f64 { /// Computes scalar div with explicit rm rounding. /// /// Catalog ID: `div_rm_ftz_f32`. Source: LLVM `llvm.nvvm.div.rm.ftz.f` from `int_nvvm_div_rm_ftz_f`; expects PTX `div.rm.ftz.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -3427,7 +3427,7 @@ pub fn i0415(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar div with explicit rn rounding. /// /// Catalog ID: `div_rn_f32`. Source: LLVM `llvm.nvvm.div.rn.f` from `int_nvvm_div_rn_f`; expects PTX `div.rn.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -3440,7 +3440,7 @@ pub fn i0410(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar div with explicit rn rounding. /// /// Catalog ID: `div_rn_f64`. Source: LLVM `llvm.nvvm.div.rn.d` from `int_nvvm_div_rn_d`; expects PTX `div.rn.f64 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -3453,7 +3453,7 @@ pub fn i0394(_arg0: f64, _arg1: f64) -> f64 { /// Computes scalar div with explicit rn rounding. /// /// Catalog ID: `div_rn_ftz_f32`. Source: LLVM `llvm.nvvm.div.rn.ftz.f` from `int_nvvm_div_rn_ftz_f`; expects PTX `div.rn.ftz.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -3466,7 +3466,7 @@ pub fn i0411(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar div with explicit rp rounding. /// /// Catalog ID: `div_rp_f32`. Source: LLVM `llvm.nvvm.div.rp.f` from `int_nvvm_div_rp_f`; expects PTX `div.rp.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -3479,7 +3479,7 @@ pub fn i0416(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar div with explicit rp rounding. /// /// Catalog ID: `div_rp_f64`. Source: LLVM `llvm.nvvm.div.rp.d` from `int_nvvm_div_rp_d`; expects PTX `div.rp.f64 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -3492,7 +3492,7 @@ pub fn i0397(_arg0: f64, _arg1: f64) -> f64 { /// Computes scalar div with explicit rp rounding. /// /// Catalog ID: `div_rp_ftz_f32`. Source: LLVM `llvm.nvvm.div.rp.ftz.f` from `int_nvvm_div_rp_ftz_f`; expects PTX `div.rp.ftz.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -3505,7 +3505,7 @@ pub fn i0417(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar div with explicit rz rounding. /// /// Catalog ID: `div_rz_f32`. Source: LLVM `llvm.nvvm.div.rz.f` from `int_nvvm_div_rz_f`; expects PTX `div.rz.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -3518,7 +3518,7 @@ pub fn i0412(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar div with explicit rz rounding. /// /// Catalog ID: `div_rz_f64`. Source: LLVM `llvm.nvvm.div.rz.d` from `int_nvvm_div_rz_d`; expects PTX `div.rz.f64 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -3531,7 +3531,7 @@ pub fn i0395(_arg0: f64, _arg1: f64) -> f64 { /// Computes scalar div with explicit rz rounding. /// /// Catalog ID: `div_rz_ftz_f32`. Source: LLVM `llvm.nvvm.div.rz.ftz.f` from `int_nvvm_div_rz_ftz_f`; expects PTX `div.rz.ftz.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -3993,7 +3993,7 @@ pub fn i0073(_arg0: u32, _arg1: u32, _arg2: u32) -> u32 { /// Computes scalar fma with explicit rm rounding. /// /// Catalog ID: `fma_rm_f32`. Source: LLVM `llvm.nvvm.fma.rm.f` from `int_nvvm_fma_rm_f`; expects PTX `fma.rm.f32 , , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -4006,7 +4006,7 @@ pub fn i0426(_arg0: f32, _arg1: f32, _arg2: f32) -> f32 { /// Computes scalar fma with explicit rm rounding. /// /// Catalog ID: `fma_rm_f64`. Source: LLVM `llvm.nvvm.fma.rm.d` from `int_nvvm_fma_rm_d`; expects PTX `fma.rm.f64 , , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -4019,7 +4019,7 @@ pub fn i0400(_arg0: f64, _arg1: f64, _arg2: f64) -> f64 { /// Computes scalar fma with explicit rm rounding. /// /// Catalog ID: `fma_rm_ftz_f32`. Source: LLVM `llvm.nvvm.fma.rm.ftz.f` from `int_nvvm_fma_rm_ftz_f`; expects PTX `fma.rm.ftz.f32 , , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -4032,7 +4032,7 @@ pub fn i0427(_arg0: f32, _arg1: f32, _arg2: f32) -> f32 { /// Computes scalar fma with explicit rm rounding. /// /// Catalog ID: `fma_rm_ftz_sat_f32`. Source: LLVM `llvm.nvvm.fma.rm.ftz.sat.f` from `int_nvvm_fma_rm_ftz_sat_f`; expects PTX `fma.rm.ftz.sat.f32 , , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -4045,7 +4045,7 @@ pub fn i0429(_arg0: f32, _arg1: f32, _arg2: f32) -> f32 { /// Computes scalar fma with explicit rm rounding. /// /// Catalog ID: `fma_rm_sat_f32`. Source: LLVM `llvm.nvvm.fma.rm.sat.f` from `int_nvvm_fma_rm_sat_f`; expects PTX `fma.rm.sat.f32 , , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -4058,7 +4058,7 @@ pub fn i0428(_arg0: f32, _arg1: f32, _arg2: f32) -> f32 { /// Computes scalar fma with explicit rn rounding. /// /// Catalog ID: `fma_rn_f32`. Source: LLVM `llvm.nvvm.fma.rn.f` from `int_nvvm_fma_rn_f`; expects PTX `fma.rn.f32 , , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -4071,7 +4071,7 @@ pub fn i0418(_arg0: f32, _arg1: f32, _arg2: f32) -> f32 { /// Computes scalar fma with explicit rn rounding. /// /// Catalog ID: `fma_rn_f64`. Source: LLVM `llvm.nvvm.fma.rn.d` from `int_nvvm_fma_rn_d`; expects PTX `fma.rn.f64 , , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -4084,7 +4084,7 @@ pub fn i0398(_arg0: f64, _arg1: f64, _arg2: f64) -> f64 { /// Computes scalar fma with explicit rn rounding. /// /// Catalog ID: `fma_rn_ftz_f32`. Source: LLVM `llvm.nvvm.fma.rn.ftz.f` from `int_nvvm_fma_rn_ftz_f`; expects PTX `fma.rn.ftz.f32 , , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -4097,7 +4097,7 @@ pub fn i0419(_arg0: f32, _arg1: f32, _arg2: f32) -> f32 { /// Computes scalar fma with explicit rn rounding. /// /// Catalog ID: `fma_rn_ftz_sat_f32`. Source: LLVM `llvm.nvvm.fma.rn.ftz.sat.f` from `int_nvvm_fma_rn_ftz_sat_f`; expects PTX `fma.rn.ftz.sat.f32 , , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -4110,7 +4110,7 @@ pub fn i0421(_arg0: f32, _arg1: f32, _arg2: f32) -> f32 { /// Computes scalar fma with explicit rn rounding. /// /// Catalog ID: `fma_rn_sat_f32`. Source: LLVM `llvm.nvvm.fma.rn.sat.f` from `int_nvvm_fma_rn_sat_f`; expects PTX `fma.rn.sat.f32 , , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -4123,7 +4123,7 @@ pub fn i0420(_arg0: f32, _arg1: f32, _arg2: f32) -> f32 { /// Computes scalar fma with explicit rp rounding. /// /// Catalog ID: `fma_rp_f32`. Source: LLVM `llvm.nvvm.fma.rp.f` from `int_nvvm_fma_rp_f`; expects PTX `fma.rp.f32 , , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -4136,7 +4136,7 @@ pub fn i0430(_arg0: f32, _arg1: f32, _arg2: f32) -> f32 { /// Computes scalar fma with explicit rp rounding. /// /// Catalog ID: `fma_rp_f64`. Source: LLVM `llvm.nvvm.fma.rp.d` from `int_nvvm_fma_rp_d`; expects PTX `fma.rp.f64 , , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -4149,7 +4149,7 @@ pub fn i0401(_arg0: f64, _arg1: f64, _arg2: f64) -> f64 { /// Computes scalar fma with explicit rp rounding. /// /// Catalog ID: `fma_rp_ftz_f32`. Source: LLVM `llvm.nvvm.fma.rp.ftz.f` from `int_nvvm_fma_rp_ftz_f`; expects PTX `fma.rp.ftz.f32 , , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -4162,7 +4162,7 @@ pub fn i0431(_arg0: f32, _arg1: f32, _arg2: f32) -> f32 { /// Computes scalar fma with explicit rp rounding. /// /// Catalog ID: `fma_rp_ftz_sat_f32`. Source: LLVM `llvm.nvvm.fma.rp.ftz.sat.f` from `int_nvvm_fma_rp_ftz_sat_f`; expects PTX `fma.rp.ftz.sat.f32 , , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -4175,7 +4175,7 @@ pub fn i0433(_arg0: f32, _arg1: f32, _arg2: f32) -> f32 { /// Computes scalar fma with explicit rp rounding. /// /// Catalog ID: `fma_rp_sat_f32`. Source: LLVM `llvm.nvvm.fma.rp.sat.f` from `int_nvvm_fma_rp_sat_f`; expects PTX `fma.rp.sat.f32 , , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -4188,7 +4188,7 @@ pub fn i0432(_arg0: f32, _arg1: f32, _arg2: f32) -> f32 { /// Computes scalar fma with explicit rz rounding. /// /// Catalog ID: `fma_rz_f32`. Source: LLVM `llvm.nvvm.fma.rz.f` from `int_nvvm_fma_rz_f`; expects PTX `fma.rz.f32 , , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -4201,7 +4201,7 @@ pub fn i0422(_arg0: f32, _arg1: f32, _arg2: f32) -> f32 { /// Computes scalar fma with explicit rz rounding. /// /// Catalog ID: `fma_rz_f64`. Source: LLVM `llvm.nvvm.fma.rz.d` from `int_nvvm_fma_rz_d`; expects PTX `fma.rz.f64 , , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -4214,7 +4214,7 @@ pub fn i0399(_arg0: f64, _arg1: f64, _arg2: f64) -> f64 { /// Computes scalar fma with explicit rz rounding. /// /// Catalog ID: `fma_rz_ftz_f32`. Source: LLVM `llvm.nvvm.fma.rz.ftz.f` from `int_nvvm_fma_rz_ftz_f`; expects PTX `fma.rz.ftz.f32 , , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -4227,7 +4227,7 @@ pub fn i0423(_arg0: f32, _arg1: f32, _arg2: f32) -> f32 { /// Computes scalar fma with explicit rz rounding. /// /// Catalog ID: `fma_rz_ftz_sat_f32`. Source: LLVM `llvm.nvvm.fma.rz.ftz.sat.f` from `int_nvvm_fma_rz_ftz_sat_f`; expects PTX `fma.rz.ftz.sat.f32 , , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -4240,7 +4240,7 @@ pub fn i0425(_arg0: f32, _arg1: f32, _arg2: f32) -> f32 { /// Computes scalar fma with explicit rz rounding. /// /// Catalog ID: `fma_rz_sat_f32`. Source: LLVM `llvm.nvvm.fma.rz.sat.f` from `int_nvvm_fma_rz_sat_f`; expects PTX `fma.rz.sat.f32 , , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -12453,7 +12453,7 @@ pub fn i1000(_arg0: u64, _arg1: u64) -> u64 { /// Computes scalar mul with explicit rm rounding. /// /// Catalog ID: `mul_rm_f32`. Source: LLVM `llvm.nvvm.mul.rm.f` from `int_nvvm_mul_rm_f`; expects PTX `mul.rm.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -12466,7 +12466,7 @@ pub fn i0406(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar mul with explicit rm rounding. /// /// Catalog ID: `mul_rm_f64`. Source: LLVM `llvm.nvvm.mul.rm.d` from `int_nvvm_mul_rm_d`; expects PTX `mul.rm.f64 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -12479,7 +12479,7 @@ pub fn i0392(_arg0: f64, _arg1: f64) -> f64 { /// Computes scalar mul with explicit rm rounding. /// /// Catalog ID: `mul_rm_ftz_f32`. Source: LLVM `llvm.nvvm.mul.rm.ftz.f` from `int_nvvm_mul_rm_ftz_f`; expects PTX `mul.rm.ftz.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -12492,7 +12492,7 @@ pub fn i0407(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar mul with explicit rn rounding. /// /// Catalog ID: `mul_rn_f32`. Source: LLVM `llvm.nvvm.mul.rn.f` from `int_nvvm_mul_rn_f`; expects PTX `mul.rn.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -12505,7 +12505,7 @@ pub fn i0402(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar mul with explicit rn rounding. /// /// Catalog ID: `mul_rn_f64`. Source: LLVM `llvm.nvvm.mul.rn.d` from `int_nvvm_mul_rn_d`; expects PTX `mul.rn.f64 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -12518,7 +12518,7 @@ pub fn i0390(_arg0: f64, _arg1: f64) -> f64 { /// Computes scalar mul with explicit rn rounding. /// /// Catalog ID: `mul_rn_ftz_f32`. Source: LLVM `llvm.nvvm.mul.rn.ftz.f` from `int_nvvm_mul_rn_ftz_f`; expects PTX `mul.rn.ftz.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -12531,7 +12531,7 @@ pub fn i0403(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar mul with explicit rp rounding. /// /// Catalog ID: `mul_rp_f32`. Source: LLVM `llvm.nvvm.mul.rp.f` from `int_nvvm_mul_rp_f`; expects PTX `mul.rp.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -12544,7 +12544,7 @@ pub fn i0408(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar mul with explicit rp rounding. /// /// Catalog ID: `mul_rp_f64`. Source: LLVM `llvm.nvvm.mul.rp.d` from `int_nvvm_mul_rp_d`; expects PTX `mul.rp.f64 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -12557,7 +12557,7 @@ pub fn i0393(_arg0: f64, _arg1: f64) -> f64 { /// Computes scalar mul with explicit rp rounding. /// /// Catalog ID: `mul_rp_ftz_f32`. Source: LLVM `llvm.nvvm.mul.rp.ftz.f` from `int_nvvm_mul_rp_ftz_f`; expects PTX `mul.rp.ftz.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -12570,7 +12570,7 @@ pub fn i0409(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar mul with explicit rz rounding. /// /// Catalog ID: `mul_rz_f32`. Source: LLVM `llvm.nvvm.mul.rz.f` from `int_nvvm_mul_rz_f`; expects PTX `mul.rz.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -12583,7 +12583,7 @@ pub fn i0404(_arg0: f32, _arg1: f32) -> f32 { /// Computes scalar mul with explicit rz rounding. /// /// Catalog ID: `mul_rz_f64`. Source: LLVM `llvm.nvvm.mul.rz.d` from `int_nvvm_mul_rz_d`; expects PTX `mul.rz.f64 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] @@ -12596,7 +12596,7 @@ pub fn i0391(_arg0: f64, _arg1: f64) -> f64 { /// Computes scalar mul with explicit rz rounding. /// /// Catalog ID: `mul_rz_ftz_f32`. Source: LLVM `llvm.nvvm.mul.rz.ftz.f` from `int_nvvm_mul_rz_ftz_f`; expects PTX `mul.rz.ftz.f32 , , ;`. -/// Available on `sm_80+` targets from PTX 7.0. +/// Available on `sm_20+` targets from PTX 2.0. /// Safe because Scalar arithmetic has no caller obligations. #[must_use] #[inline(never)] diff --git a/cuda-oxide/crates/cuda-intrinsics/src/generated/mod.rs b/cuda-oxide/crates/cuda-intrinsics/src/generated/mod.rs index 5a6623e110..404c62768d 100644 --- a/cuda-oxide/crates/cuda-intrinsics/src/generated/mod.rs +++ b/cuda-oxide/crates/cuda-intrinsics/src/generated/mod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. #[doc(hidden)] diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/active_mask.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/active_mask.rs index c668285b8b..ddda6e65ea 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/active_mask.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/active_mask.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `active_mask` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/clc.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/clc.rs index 568cc0701c..671a7ae247 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/clc.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/clc.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `clc` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/cluster_barrier.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/cluster_barrier.rs index 6856e03f01..d232133884 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/cluster_barrier.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/cluster_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `cluster_barrier` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/cluster_memory.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/cluster_memory.rs index 2f9470f016..8f468b5424 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/cluster_memory.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/cluster_memory.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `cluster_memory` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/cp_async.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/cp_async.rs index a0300a9cc4..a1ea64b957 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/cp_async.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/cp_async.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `cp_async` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/debug_control.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/debug_control.rs index 145e58b9cb..6f8c3ce1ed 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/debug_control.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/debug_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `debug_control` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/dotprod.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/dotprod.rs index 5532f7f335..74fca7d887 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/dotprod.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/dotprod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `dotprod` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/elect.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/elect.rs index 99b91d3a36..ed4068b5a8 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/elect.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/elect.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `elect` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/execution_control.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/execution_control.rs index 84ef1ddd66..69070d5e9b 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/execution_control.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/execution_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `execution_control` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/extended_minmax.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/extended_minmax.rs index f7ae666f94..cff52a61b0 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/extended_minmax.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/extended_minmax.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `extended_minmax` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/integer_minmax.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/integer_minmax.rs index d1233ea0bc..d82a56dd45 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/integer_minmax.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/integer_minmax.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `integer_minmax` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/ldmatrix.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/ldmatrix.rs index dc9679d517..3f5e8432a7 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/ldmatrix.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/ldmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `ldmatrix` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/mbarrier_basic.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/mbarrier_basic.rs index 21ac163b92..75d8808eb3 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/mbarrier_basic.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/mbarrier_basic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `mbarrier_basic` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/mbarrier_extended.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/mbarrier_extended.rs index eb92247be1..fa13464ed6 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/mbarrier_extended.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/mbarrier_extended.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `mbarrier_extended` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/mod.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/mod.rs index 14c3e2e588..c6289d8343 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/mod.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/mod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated target requirements and separately imported LLVM/selection facts. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/movmatrix.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/movmatrix.rs index 1fb52887a1..d9b055258c 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/movmatrix.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/movmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `movmatrix` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/packed_alu.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/packed_alu.rs index b93de0cf82..fe0f8bbf92 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/packed_alu.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/packed_alu.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `packed_alu` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/packed_atomic.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/packed_atomic.rs index c4bd304fb1..a8cf430289 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/packed_atomic.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/packed_atomic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `packed_atomic` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/packed_conversion.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/packed_conversion.rs index 21c3d5da36..065a4e2639 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/packed_conversion.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/packed_conversion.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `packed_conversion` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/prmt.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/prmt.rs index 692a73beb5..a2f18ff536 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/prmt.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/prmt.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `prmt` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/redux.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/redux.rs index f67f400c30..de35e8ca14 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/redux.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/redux.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `redux` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/register_mma.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/register_mma.rs index fdf784cbf3..e24fbe3997 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/register_mma.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/register_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `register_mma` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/scalar_arithmetic.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/scalar_arithmetic.rs index 4879de292a..73e7b8c126 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/scalar_arithmetic.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/scalar_arithmetic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `scalar_arithmetic` intrinsics. @@ -32,27 +32,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -90,27 +90,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -148,27 +148,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -206,27 +206,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -264,27 +264,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -317,27 +317,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -370,27 +370,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -423,27 +423,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -476,27 +476,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -529,27 +529,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -582,27 +582,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -635,27 +635,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -688,27 +688,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -746,27 +746,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -804,27 +804,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -862,27 +862,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -920,27 +920,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -978,27 +978,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1036,27 +1036,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1094,27 +1094,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1152,27 +1152,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1205,27 +1205,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1258,27 +1258,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1311,27 +1311,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1364,27 +1364,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1417,27 +1417,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1470,27 +1470,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1523,27 +1523,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1576,27 +1576,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1629,27 +1629,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1682,27 +1682,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::Sat, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1735,27 +1735,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::Sat, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1788,27 +1788,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1841,27 +1841,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1894,27 +1894,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::Sat, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1947,27 +1947,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::Sat, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2000,27 +2000,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2053,27 +2053,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2106,27 +2106,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::Sat, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2159,27 +2159,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::Sat, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2212,27 +2212,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2265,27 +2265,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2318,27 +2318,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::Sat, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2371,27 +2371,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::Sat, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2424,27 +2424,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2482,27 +2482,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2540,27 +2540,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2598,27 +2598,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2656,27 +2656,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2714,27 +2714,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2772,27 +2772,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::Sat, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2830,27 +2830,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::Sat, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2888,27 +2888,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2946,27 +2946,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -3004,27 +3004,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::Sat, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -3062,27 +3062,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::Sat, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -3120,27 +3120,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -3178,27 +3178,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -3236,27 +3236,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::Sat, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -3294,27 +3294,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::Sat, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -3352,27 +3352,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -3410,27 +3410,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::None, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -3468,27 +3468,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::Sat, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -3526,27 +3526,27 @@ pub(super) const TARGETS: &[GeneratedIntrinsicTarget] = &[ saturation: GeneratedScalarArithmeticSaturation::Sat, }, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(20), hardware: GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm( - 80, + 20, )]), }, backend_requirements: &[ GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/scalar_conversion.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/scalar_conversion.rs index 99b72cda00..0733b3850f 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/scalar_conversion.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/scalar_conversion.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `scalar_conversion` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/scalar_math.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/scalar_math.rs index 7643253888..4f2c45a138 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/scalar_math.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/scalar_math.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `scalar_math` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/sparse_mma.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/sparse_mma.rs index c5cc33b4c7..c269ae923c 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/sparse_mma.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/sparse_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `sparse_mma` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/sreg.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/sreg.rs index 47c9a30ead..f73db3573e 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/sreg.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/sreg.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `sreg` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/stmatrix.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/stmatrix.rs index cde7d74fb3..947ca43a0a 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/stmatrix.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/stmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `stmatrix` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/sync.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/sync.rs index 9f91e3e4e0..5394c48c77 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/sync.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/sync.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `sync` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_cp.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_cp.rs index af657ccb8a..9ccb4190ef 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_cp.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_cp.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `tcgen05_cp` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_ld.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_ld.rs index c76ca85005..d9d916813c 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_ld.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_ld.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `tcgen05_ld` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_mma.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_mma.rs index c2e6f05061..527cb96e74 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_mma.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `tcgen05_mma` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_mma_ws.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_mma_ws.rs index 0d52b8ca98..3088bfd160 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_mma_ws.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_mma_ws.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `tcgen05_mma_ws` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_other.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_other.rs index 8b9850a3c9..bc03a2ff46 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_other.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_other.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `tcgen05_other` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_st.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_st.rs index 3eb4ac2e77..2be503f465 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_st.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tcgen05_st.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `tcgen05_st` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/active_mask.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/active_mask.rs index bd470b5d33..9c2c6628b8 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/active_mask.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/active_mask.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `active_mask` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/clc.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/clc.rs index 08d48ecaff..d4eeb75866 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/clc.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/clc.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `clc` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/cluster_barrier.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/cluster_barrier.rs index 0021713ea8..568a9c8de6 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/cluster_barrier.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/cluster_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `cluster_barrier` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/cluster_memory.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/cluster_memory.rs index af9eca62ae..6f49e4e9fc 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/cluster_memory.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/cluster_memory.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `cluster_memory` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/cp_async.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/cp_async.rs index 3781371112..15b719e7fe 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/cp_async.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/cp_async.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `cp_async` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/debug_control.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/debug_control.rs index 6ec580813f..d8dc83912b 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/debug_control.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/debug_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `debug_control` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/dotprod.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/dotprod.rs index 1ac767695a..614b94f131 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/dotprod.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/dotprod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `dotprod` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/elect.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/elect.rs index 716a6dd5ec..43d325932b 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/elect.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/elect.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `elect` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/execution_control.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/execution_control.rs index 0d5862ac32..51e6a72f7b 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/execution_control.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/execution_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `execution_control` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/extended_minmax.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/extended_minmax.rs index 326b18ec16..eeaeab48bb 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/extended_minmax.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/extended_minmax.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `extended_minmax` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/integer_minmax.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/integer_minmax.rs index d49447c7f1..d8c84cbf63 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/integer_minmax.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/integer_minmax.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `integer_minmax` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/ldmatrix.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/ldmatrix.rs index 4695f42f57..000e45846b 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/ldmatrix.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/ldmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `ldmatrix` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/mbarrier_basic.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/mbarrier_basic.rs index 6c15db9167..5c830c66c5 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/mbarrier_basic.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/mbarrier_basic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `mbarrier_basic` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/mbarrier_extended.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/mbarrier_extended.rs index 782b9ab218..8633322841 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/mbarrier_extended.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/mbarrier_extended.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `mbarrier_extended` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/mod.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/mod.rs index 0915796fd0..f912276062 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/mod.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/mod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests, grouped per family shard. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/movmatrix.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/movmatrix.rs index 98db4aaf4e..adea0cdde4 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/movmatrix.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/movmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `movmatrix` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/packed_alu.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/packed_alu.rs index e0833bcf44..2e99f8b234 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/packed_alu.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/packed_alu.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `packed_alu` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/packed_atomic.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/packed_atomic.rs index 52a9eec446..6a1c639a3a 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/packed_atomic.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/packed_atomic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `packed_atomic` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/packed_conversion.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/packed_conversion.rs index 394e138410..67d588fd5c 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/packed_conversion.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/packed_conversion.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `packed_conversion` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/prmt.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/prmt.rs index 4f8f92df86..2b478b37ce 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/prmt.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/prmt.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `prmt` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/redux.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/redux.rs index 5e9be59f08..804314d77b 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/redux.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/redux.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `redux` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/register_mma_float.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/register_mma_float.rs index 3445c4167e..890d71cce8 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/register_mma_float.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/register_mma_float.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `register_mma_float` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/register_mma_s32.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/register_mma_s32.rs index 2840232222..020b8e799e 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/register_mma_s32.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/register_mma_s32.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `register_mma_s32` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/scalar_arithmetic.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/scalar_arithmetic.rs index 9ef28b4104..824425d7d7 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/scalar_arithmetic.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/scalar_arithmetic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `scalar_arithmetic` intrinsics. @@ -27,10 +27,10 @@ fn mul_rn_f64_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -39,18 +39,18 @@ fn mul_rn_f64_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -96,10 +96,10 @@ fn mul_rz_f64_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -108,18 +108,18 @@ fn mul_rz_f64_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -165,10 +165,10 @@ fn mul_rm_f64_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -177,18 +177,18 @@ fn mul_rm_f64_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -234,10 +234,10 @@ fn mul_rp_f64_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -246,18 +246,18 @@ fn mul_rp_f64_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -303,10 +303,10 @@ fn div_rn_f64_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -315,18 +315,18 @@ fn div_rn_f64_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -367,10 +367,10 @@ fn div_rz_f64_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -379,18 +379,18 @@ fn div_rz_f64_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -431,10 +431,10 @@ fn div_rm_f64_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -443,18 +443,18 @@ fn div_rm_f64_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -495,10 +495,10 @@ fn div_rp_f64_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -507,18 +507,18 @@ fn div_rp_f64_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -559,10 +559,10 @@ fn fma_rn_f64_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -571,18 +571,18 @@ fn fma_rn_f64_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -623,10 +623,10 @@ fn fma_rz_f64_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -635,18 +635,18 @@ fn fma_rz_f64_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -687,10 +687,10 @@ fn fma_rm_f64_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -699,18 +699,18 @@ fn fma_rm_f64_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -751,10 +751,10 @@ fn fma_rp_f64_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -763,18 +763,18 @@ fn fma_rp_f64_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -815,10 +815,10 @@ fn mul_rn_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -827,18 +827,18 @@ fn mul_rn_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -884,10 +884,10 @@ fn mul_rn_ftz_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -896,18 +896,18 @@ fn mul_rn_ftz_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -953,10 +953,10 @@ fn mul_rz_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -965,18 +965,18 @@ fn mul_rz_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1022,10 +1022,10 @@ fn mul_rz_ftz_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -1034,18 +1034,18 @@ fn mul_rz_ftz_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1091,10 +1091,10 @@ fn mul_rm_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -1103,18 +1103,18 @@ fn mul_rm_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1160,10 +1160,10 @@ fn mul_rm_ftz_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -1172,18 +1172,18 @@ fn mul_rm_ftz_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1229,10 +1229,10 @@ fn mul_rp_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -1241,18 +1241,18 @@ fn mul_rp_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1298,10 +1298,10 @@ fn mul_rp_ftz_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -1310,18 +1310,18 @@ fn mul_rp_ftz_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1367,10 +1367,10 @@ fn div_rn_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -1379,18 +1379,18 @@ fn div_rn_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1431,10 +1431,10 @@ fn div_rn_ftz_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -1443,18 +1443,18 @@ fn div_rn_ftz_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1495,10 +1495,10 @@ fn div_rz_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -1507,18 +1507,18 @@ fn div_rz_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1559,10 +1559,10 @@ fn div_rz_ftz_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -1571,18 +1571,18 @@ fn div_rz_ftz_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1623,10 +1623,10 @@ fn div_rm_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -1635,18 +1635,18 @@ fn div_rm_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1687,10 +1687,10 @@ fn div_rm_ftz_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -1699,18 +1699,18 @@ fn div_rm_ftz_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1751,10 +1751,10 @@ fn div_rp_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -1763,18 +1763,18 @@ fn div_rp_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1815,10 +1815,10 @@ fn div_rp_ftz_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -1827,18 +1827,18 @@ fn div_rp_ftz_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1879,10 +1879,10 @@ fn fma_rn_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -1891,18 +1891,18 @@ fn fma_rn_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -1943,10 +1943,10 @@ fn fma_rn_ftz_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -1955,18 +1955,18 @@ fn fma_rn_ftz_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2007,10 +2007,10 @@ fn fma_rn_sat_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::Sat } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -2019,18 +2019,18 @@ fn fma_rn_sat_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2071,10 +2071,10 @@ fn fma_rn_ftz_sat_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::Sat } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -2083,18 +2083,18 @@ fn fma_rn_ftz_sat_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2135,10 +2135,10 @@ fn fma_rz_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -2147,18 +2147,18 @@ fn fma_rz_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2199,10 +2199,10 @@ fn fma_rz_ftz_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -2211,18 +2211,18 @@ fn fma_rz_ftz_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2263,10 +2263,10 @@ fn fma_rz_sat_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::Sat } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -2275,18 +2275,18 @@ fn fma_rz_sat_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2327,10 +2327,10 @@ fn fma_rz_ftz_sat_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::Sat } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -2339,18 +2339,18 @@ fn fma_rz_ftz_sat_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2391,10 +2391,10 @@ fn fma_rm_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -2403,18 +2403,18 @@ fn fma_rm_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2455,10 +2455,10 @@ fn fma_rm_ftz_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -2467,18 +2467,18 @@ fn fma_rm_ftz_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2519,10 +2519,10 @@ fn fma_rm_sat_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::Sat } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -2531,18 +2531,18 @@ fn fma_rm_sat_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2583,10 +2583,10 @@ fn fma_rm_ftz_sat_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::Sat } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -2595,18 +2595,18 @@ fn fma_rm_ftz_sat_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2647,10 +2647,10 @@ fn fma_rp_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -2659,18 +2659,18 @@ fn fma_rp_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2711,10 +2711,10 @@ fn fma_rp_ftz_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -2723,18 +2723,18 @@ fn fma_rp_ftz_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2775,10 +2775,10 @@ fn fma_rp_sat_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::Sat } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -2787,18 +2787,18 @@ fn fma_rp_sat_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2839,10 +2839,10 @@ fn fma_rp_ftz_sat_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::Sat } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -2851,18 +2851,18 @@ fn fma_rp_ftz_sat_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2903,10 +2903,10 @@ fn add_rn_f64_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -2915,18 +2915,18 @@ fn add_rn_f64_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -2972,10 +2972,10 @@ fn add_rz_f64_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -2984,18 +2984,18 @@ fn add_rz_f64_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -3041,10 +3041,10 @@ fn add_rm_f64_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -3053,18 +3053,18 @@ fn add_rm_f64_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -3110,10 +3110,10 @@ fn add_rp_f64_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -3122,18 +3122,18 @@ fn add_rp_f64_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -3179,10 +3179,10 @@ fn add_rn_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -3191,18 +3191,18 @@ fn add_rn_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -3248,10 +3248,10 @@ fn add_rn_ftz_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -3260,18 +3260,18 @@ fn add_rn_ftz_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -3317,10 +3317,10 @@ fn add_rn_sat_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::Sat } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -3329,18 +3329,18 @@ fn add_rn_sat_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -3386,10 +3386,10 @@ fn add_rn_ftz_sat_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::Sat } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -3398,18 +3398,18 @@ fn add_rn_ftz_sat_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -3455,10 +3455,10 @@ fn add_rz_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -3467,18 +3467,18 @@ fn add_rz_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -3524,10 +3524,10 @@ fn add_rz_ftz_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -3536,18 +3536,18 @@ fn add_rz_ftz_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -3593,10 +3593,10 @@ fn add_rz_sat_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::Sat } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -3605,18 +3605,18 @@ fn add_rz_sat_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -3662,10 +3662,10 @@ fn add_rz_ftz_sat_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::Sat } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -3674,18 +3674,18 @@ fn add_rz_ftz_sat_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -3731,10 +3731,10 @@ fn add_rm_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -3743,18 +3743,18 @@ fn add_rm_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -3800,10 +3800,10 @@ fn add_rm_ftz_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -3812,18 +3812,18 @@ fn add_rm_ftz_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -3869,10 +3869,10 @@ fn add_rm_sat_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::Sat } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -3881,18 +3881,18 @@ fn add_rm_sat_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -3938,10 +3938,10 @@ fn add_rm_ftz_sat_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::Sat } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -3950,18 +3950,18 @@ fn add_rm_ftz_sat_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -4007,10 +4007,10 @@ fn add_rp_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -4019,18 +4019,18 @@ fn add_rp_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -4076,10 +4076,10 @@ fn add_rp_ftz_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::None } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -4088,18 +4088,18 @@ fn add_rp_ftz_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -4145,10 +4145,10 @@ fn add_rp_sat_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::Sat } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -4157,18 +4157,18 @@ fn add_rp_sat_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, @@ -4214,10 +4214,10 @@ fn add_rp_ftz_sat_f32_target_matches_the_catalog() { saturation: GeneratedScalarArithmeticSaturation::Sat } ); - assert_eq!(target.requirement.minimum_ptx.encoded(), 70); + assert_eq!(target.requirement.minimum_ptx.encoded(), 20); assert_eq!( target.requirement.hardware, - const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(80)]) } + const { GeneratedHardwareTarget::AnyOf(&[GeneratedHardwareAlternative::MinimumSm(20)]) } ); assert_eq!( target.backend_requirements, @@ -4226,18 +4226,18 @@ fn add_rp_ftz_sat_f32_target_matches_the_catalog() { GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LlvmNvptx, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(32), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(20), ]), }, }, GeneratedBackendRequirement { backend: GeneratedIntrinsicBackend::LibNvvm, requirement: GeneratedTargetRequirement { - minimum_ptx: GeneratedPtxVersion::from_encoded(70), + minimum_ptx: GeneratedPtxVersion::from_encoded(63), hardware: GeneratedHardwareTarget::AnyOf(&[ - GeneratedHardwareAlternative::MinimumSm(80), + GeneratedHardwareAlternative::MinimumSm(75), ]), }, }, diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/scalar_conversion.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/scalar_conversion.rs index dc839e76a9..5f87ecd8e7 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/scalar_conversion.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/scalar_conversion.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `scalar_conversion` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/scalar_math.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/scalar_math.rs index b7c4b6ec20..37682f381c 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/scalar_math.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/scalar_math.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `scalar_math` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/sparse_mma.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/sparse_mma.rs index acd75e6af9..981b0c3bc3 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/sparse_mma.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/sparse_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `sparse_mma` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/sreg.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/sreg.rs index 3079cc1921..eaf20f0808 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/sreg.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/sreg.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `sreg` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/stmatrix.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/stmatrix.rs index 4ec333adc8..c381798310 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/stmatrix.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/stmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `stmatrix` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/sync.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/sync.rs index a0d9049a20..5aeb02f41e 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/sync.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/sync.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `sync` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_cp.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_cp.rs index 827fc47376..b22c95d1b4 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_cp.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_cp.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `tcgen05_cp` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_ld.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_ld.rs index 719b7d4f2f..b25af36b67 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_ld.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_ld.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `tcgen05_ld` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_mma.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_mma.rs index e32e1b4ebb..63780d69d3 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_mma.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `tcgen05_mma` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_mma_ws.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_mma_ws.rs index bb30d706d4..433a65ef5b 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_mma_ws.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_mma_ws.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `tcgen05_mma_ws` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_other.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_other.rs index f58b3845c6..fd2e7b9d0f 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_other.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_other.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `tcgen05_other` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_st.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_st.rs index 3dae5d3a7a..6cc54f4fea 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_st.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tcgen05_st.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `tcgen05_st` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tma.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tma.rs index 09d565f877..197b08fcd4 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tma.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/tma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `tma` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/vote.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/vote.rs index 70f661f183..8e702b6c4f 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/vote.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/vote.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `vote` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/warp_barrier.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/warp_barrier.rs index 6f453a5af0..beaa92aa78 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/warp_barrier.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/warp_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `warp_barrier` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/warp_match.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/warp_match.rs index e54059dcaf..26eb228c84 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/warp_match.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/warp_match.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `warp_match` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/warp_shuffle.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/warp_shuffle.rs index 71d40627c0..3db2b22bbf 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/warp_shuffle.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/warp_shuffle.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `warp_shuffle` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/wgmma_control.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/wgmma_control.rs index 25b0fb411d..ee3cc35507 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/wgmma_control.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tests/wgmma_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target tests: `wgmma_control` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tma.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tma.rs index 578073fbd3..d5fd991c51 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tma.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/tma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `tma` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/vote.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/vote.rs index 5ab177077a..cec0878a8f 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/vote.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/vote.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `vote` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/warp_barrier.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/warp_barrier.rs index 0af0a26bd0..b0366f6f39 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/warp_barrier.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/warp_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `warp_barrier` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/warp_match.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/warp_match.rs index 9d5d580445..ef5890d946 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/warp_match.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/warp_match.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `warp_match` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/warp_shuffle.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/warp_shuffle.rs index e4460f77fe..e39403ad93 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/warp_shuffle.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/warp_shuffle.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `warp_shuffle` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/wgmma_control.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/wgmma_control.rs index ee4dc522d5..ab09242ad6 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/wgmma_control.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/generated_intrinsic_targets/wgmma_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated intrinsic target records: `wgmma_control` intrinsics. diff --git a/cuda-oxide/crates/cuda-oxide-codegen/src/target/tests/generated_floors.rs b/cuda-oxide/crates/cuda-oxide-codegen/src/target/tests/generated_floors.rs index 1015e965a3..4938a6e7cb 100644 --- a/cuda-oxide/crates/cuda-oxide-codegen/src/target/tests/generated_floors.rs +++ b/cuda-oxide/crates/cuda-oxide-codegen/src/target/tests/generated_floors.rs @@ -16,6 +16,57 @@ use crate::target::generated_requirements::*; use crate::target::select::*; use libnvvm_sys::CudaArch; +#[test] +fn generated_scalar_arithmetic_floors_are_backend_specific() { + use crate::generated_intrinsic_targets::generated_intrinsic_target_by_marker; + + for abi in 390..=453 { + let marker = format!("v1:i{abi:04}"); + let target = generated_intrinsic_target_by_marker(&marker).unwrap(); + let llvm = GeneratedModuleRequirements::from_targets(vec![target]) + .for_backend(GeneratedIntrinsicBackend::LlvmNvptx); + // LLVM instruction evidence includes sm_20; the compiler's public target set + // with recorded backend floors starts at sm_70, independently of these requirements. + for architecture in ["sm_70", "sm_72", "sm_75", "sm_80", "sm_86"] { + let arch = architecture.parse().unwrap(); + assert!( + generated_target_satisfied(&arch, &llvm), + "{} {architecture}", + target.id + ); + validate_generated_target(&arch, &llvm).unwrap(); + } + assert_eq!( + generated_ptx_isa_requirement(&llvm).unwrap(), + PtxIsaRequirement::Default + ); + let libnvvm = GeneratedModuleRequirements::from_targets(vec![target]) + .for_backend(GeneratedIntrinsicBackend::LibNvvm); + for architecture in ["sm_70", "sm_72"] { + assert!( + !generated_target_satisfied(&architecture.parse().unwrap(), &libnvvm), + "{} {architecture}", + target.id + ); + } + assert!( + generated_target_satisfied(&"sm_75".parse().unwrap(), &libnvvm), + "{}", + target.id + ); + assert!( + generated_target_satisfied(&"sm_80".parse().unwrap(), &libnvvm), + "{}", + target.id + ); + // The compiler's discrete feature vocabulary rounds the PTX 6.3 floor to 6.5. + assert_eq!( + generated_ptx_isa_requirement(&libnvvm).unwrap(), + PtxIsaRequirement::new(65) + ); + } +} + #[test] fn paired_target_floors_compose_with_target_cpu_minima() { let generated = GeneratedModuleRequirements::from_targets(vec![&TCGEN_F16]); diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/active_mask.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/active_mask.rs index de90e2d015..6c8bfd6b3d 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/active_mask.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/active_mask.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operation for the generated active warp mask. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/clc.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/clc.rs index 59872c259e..388ef45084 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/clc.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/clc.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated Cluster Launch Control operations. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/cluster_barrier.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/cluster_barrier.rs index 0874df1091..2d65afd849 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/cluster_barrier.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/cluster_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated operations for the closed cluster-barrier family. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/cluster_memory.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/cluster_memory.rs index 77e99469a9..62740fd746 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/cluster_memory.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/cluster_memory.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operations for cluster address mapping and remote shared reads. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/cp_async.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/cp_async.rs index b377bcdd5c..4a9f54d6ec 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/cp_async.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/cp_async.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operations for classic `cp.async` instructions. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/debug_control.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/debug_control.rs index d448faad5c..67a20d7fc2 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/debug_control.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/debug_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operations for generated PTX debug controls. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/dotprod.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/dotprod.rs index 59b9533e91..07e7d3a40a 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/dotprod.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/dotprod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operations for generated packed integer dot products. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/elect.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/elect.rs index e0a6a491ed..9fcc2dae52 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/elect.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/elect.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated warp leader-election operation. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/execution_control.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/execution_control.rs index a7698ed8d2..6ecd3dc32f 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/execution_control.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/execution_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated counted-barrier, grid-dependency, and register-control operations. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/extended_minmax.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/extended_minmax.rs index 2dc98f2cf0..1d29fd9845 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/extended_minmax.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/extended_minmax.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! One structural operation for extended floating-point min/max. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/integer_minmax.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/integer_minmax.rs index 4f27501c02..ec634ab2a2 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/integer_minmax.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/integer_minmax.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operations for generated extended integer min/max. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/ldmatrix.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/ldmatrix.rs index d2d712a5f0..ae9ab1a9ff 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/ldmatrix.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/ldmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operation and compatibility carriers for generated `ldmatrix`. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/mbarrier_basic.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/mbarrier_basic.rs index 98cd51e0c2..2b705cf186 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/mbarrier_basic.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/mbarrier_basic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operations for the basic shared-memory mbarrier lifecycle. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/mbarrier_extended.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/mbarrier_extended.rs index d33ad27ab5..dc627e2f8f 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/mbarrier_extended.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/mbarrier_extended.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operations for extended mbarrier and async-proxy instructions. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/mod.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/mod.rs index eb5c94e9da..61d07eabcb 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/mod.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/mod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. mod active_mask; diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/movmatrix.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/movmatrix.rs index ee770d195b..282a4288dc 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/movmatrix.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/movmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operation for generated in-register matrix transpose. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/packed_alu.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/packed_alu.rs index e97f6cea42..0cf7da1f17 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/packed_alu.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/packed_alu.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operations for generated packed floating-point arithmetic. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/packed_atomic.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/packed_atomic.rs index fb56459682..4372f8bd22 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/packed_atomic.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/packed_atomic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! One structural operation for the closed generated packed-atomic family. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/packed_conversion.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/packed_conversion.rs index ac9fdb5246..28a94fd3b1 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/packed_conversion.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/packed_conversion.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operation for generated packed conversion. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/prmt.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/prmt.rs index d57fc2b7f1..23b61b14af 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/prmt.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/prmt.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! One structural operation for the closed generated `prmt` family. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/redux.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/redux.rs index b2fbd5c62f..2bffcfdfde 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/redux.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/redux.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural NVVM operations for the closed generated `redux.sync` family. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/register_mma.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/register_mma.rs index 8839d584fa..983549a660 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/register_mma.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/register_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! One structural operation for generated register-only `mma.sync` variants. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/scalar_arithmetic.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/scalar_arithmetic.rs index 5bf9def0af..657c256c7d 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/scalar_arithmetic.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/scalar_arithmetic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! One structural operation for generated scalar arithmetic. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/scalar_conversion.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/scalar_conversion.rs index 120190439b..1caf0587a6 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/scalar_conversion.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/scalar_conversion.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! One structural operation for generated `f32` to TF32 conversions. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/scalar_math.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/scalar_math.rs index be157d8c4f..2530772564 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/scalar_math.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/scalar_math.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! One structural operation for generated scalar math. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/sparse_mma.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/sparse_mma.rs index 342af76a23..f535841017 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/sparse_mma.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/sparse_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! One structural operation for generated sparse MMA variants. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/sreg.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/sreg.rs index b42167602b..027da3895f 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/sreg.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/sreg.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural NVVM operations for generated special-register reads. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/stmatrix.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/stmatrix.rs index cc11851956..ceb3d5db44 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/stmatrix.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/stmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operations for the four generated `stmatrix` stores. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/sync.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/sync.rs index ef627dd796..013ee403e7 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/sync.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/sync.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operation for generated CTA synchronization. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/tcgen05.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/tcgen05.rs index 71606692c4..928c9f17bd 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/tcgen05.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/tcgen05.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated Tensor Core Generation 5 operations. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/tma.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/tma.rs index 2f3c2597ce..444702f9e7 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/tma.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/tma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated Tensor Memory Accelerator operations. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/vote.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/vote.rs index e9246ec9da..6fced5f132 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/vote.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/vote.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operations for the generated `vote.sync` family. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/warp_barrier.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/warp_barrier.rs index 9cbc2ab8e9..677d39734f 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/warp_barrier.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/warp_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operation for generated warp synchronization. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/warp_match.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/warp_match.rs index 5832cc6834..9dd43a6f00 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/warp_match.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/warp_match.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operations for the generated `match.sync` family. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/warp_shuffle.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/warp_shuffle.rs index e6e3522f3f..52dd3c66de 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/warp_shuffle.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/warp_shuffle.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operations for the generated `shfl.sync` family. diff --git a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/wgmma_control.rs b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/wgmma_control.rs index 5edbefc59b..c0ec82de01 100644 --- a/cuda-oxide/crates/dialect-nvvm/src/ops/generated/wgmma_control.rs +++ b/cuda-oxide/crates/dialect-nvvm/src/ops/generated/wgmma_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Structural operations for generated WGMMA controls. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/active_mask.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/active_mask.rs index a24f6f9395..cf8886eaf4 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/active_mask.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/active_mask.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `active_mask` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/clc.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/clc.rs index 55baf4c4e7..9ea968beca 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/clc.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/clc.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `clc` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/cluster_barrier.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/cluster_barrier.rs index dbbee9abaa..95835800dd 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/cluster_barrier.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/cluster_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `cluster_barrier` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/cluster_memory.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/cluster_memory.rs index 1ec9e8cfab..37480c9a34 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/cluster_memory.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/cluster_memory.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `cluster_memory` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/cp_async.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/cp_async.rs index c968753ea0..bc42c74bed 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/cp_async.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/cp_async.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `cp_async` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/debug_control.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/debug_control.rs index 34f9e703f8..f083553a17 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/debug_control.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/debug_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `debug_control` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/dotprod.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/dotprod.rs index af3cdbcd30..91b77cbe1d 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/dotprod.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/dotprod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `dotprod` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/elect.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/elect.rs index 84c3287f38..31a28acae0 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/elect.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/elect.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `elect` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/execution_control.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/execution_control.rs index e61e80d9ce..d51e481cec 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/execution_control.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/execution_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `execution_control` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/extended_minmax.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/extended_minmax.rs index 258bb7f2ce..31efa97f84 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/extended_minmax.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/extended_minmax.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `extended_minmax` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/helpers.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/helpers.rs index 8dd7273051..96043f930f 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/helpers.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/helpers.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Shared glue for the generated intrinsic dispatch shards. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/integer_minmax.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/integer_minmax.rs index b5fedc0e92..8ff6c34827 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/integer_minmax.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/integer_minmax.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `integer_minmax` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/ldmatrix.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/ldmatrix.rs index 4afd34b8f0..8f3398757b 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/ldmatrix.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/ldmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `ldmatrix` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/mbarrier_basic.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/mbarrier_basic.rs index 5f6fc97b20..c314e36756 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/mbarrier_basic.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/mbarrier_basic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `mbarrier_basic` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/mbarrier_extended.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/mbarrier_extended.rs index cfec72c760..99d92ca804 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/mbarrier_extended.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/mbarrier_extended.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `mbarrier_extended` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/mod.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/mod.rs index 07bc667300..94b7f091a1 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/mod.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/mod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility path dispatch for CUDA intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/movmatrix.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/movmatrix.rs index 6e935cd437..5260ca2201 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/movmatrix.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/movmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `movmatrix` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/packed_alu.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/packed_alu.rs index 74bd7cb7e3..c219489499 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/packed_alu.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/packed_alu.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `packed_alu` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/packed_atomic.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/packed_atomic.rs index e0a7401bb3..f2f644f5d8 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/packed_atomic.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/packed_atomic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `packed_atomic` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/packed_conversion.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/packed_conversion.rs index cb88a6307f..f90820b6b1 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/packed_conversion.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/packed_conversion.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `packed_conversion` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/prmt.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/prmt.rs index 4eaadfa8e9..cdef58b792 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/prmt.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/prmt.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `prmt` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/redux.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/redux.rs index 58f1cbd014..6a9ccfe43a 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/redux.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/redux.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `redux` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/register_mma.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/register_mma.rs index 556940ad95..445ecfb5fb 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/register_mma.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/register_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `register_mma` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/scalar_arithmetic.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/scalar_arithmetic.rs index ddee176556..bd81c91393 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/scalar_arithmetic.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/scalar_arithmetic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `scalar_arithmetic` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/scalar_conversion.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/scalar_conversion.rs index 218b38c3ae..2e6345874d 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/scalar_conversion.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/scalar_conversion.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `scalar_conversion` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/scalar_math.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/scalar_math.rs index a9dfbc33c3..35ea3f8dbb 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/scalar_math.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/scalar_math.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `scalar_math` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/sparse_mma.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/sparse_mma.rs index 734e1c2ac7..e971d6ef56 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/sparse_mma.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/sparse_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `sparse_mma` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/sreg.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/sreg.rs index 10439f8b22..46394faa12 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/sreg.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/sreg.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `sreg` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/stmatrix.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/stmatrix.rs index 7269a3bb1e..fd57b35861 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/stmatrix.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/stmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `stmatrix` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/sync.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/sync.rs index 0ef28b175c..75633cba32 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/sync.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/sync.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `sync` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_cp.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_cp.rs index 67f719821c..27108d99fb 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_cp.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_cp.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `tcgen05_cp` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_ld.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_ld.rs index c51a81c377..3cd29a2063 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_ld.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_ld.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `tcgen05_ld` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_mma.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_mma.rs index 1dc99e58ea..10c341df8d 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_mma.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `tcgen05_mma` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_other.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_other.rs index 5d6d4cdf06..91a422b4b8 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_other.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_other.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `tcgen05_other` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_st.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_st.rs index af5044a941..b370f02ff3 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_st.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tcgen05_st.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `tcgen05_st` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/active_mask.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/active_mask.rs index f8c8ddc1c6..cfeab529cf 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/active_mask.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/active_mask.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `active_mask` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/clc.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/clc.rs index b164c399cb..c1a82f9d02 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/clc.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/clc.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `clc` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/cluster_barrier.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/cluster_barrier.rs index d65ec6b9ca..f9211adbff 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/cluster_barrier.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/cluster_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `cluster_barrier` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/cluster_memory.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/cluster_memory.rs index 47fd9d2510..2e6f2aaf31 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/cluster_memory.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/cluster_memory.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `cluster_memory` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/cp_async.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/cp_async.rs index 10fb3aaa3d..d2f92f329e 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/cp_async.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/cp_async.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `cp_async` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/debug_control.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/debug_control.rs index 488826b2b1..b9e0b62f09 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/debug_control.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/debug_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `debug_control` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/dotprod.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/dotprod.rs index ed6dffac3d..24a031a1d3 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/dotprod.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/dotprod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `dotprod` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/elect.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/elect.rs index 1e73fcb049..6f49ba2727 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/elect.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/elect.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `elect` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/execution_control.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/execution_control.rs index 320c7ff08c..3a50f810e1 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/execution_control.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/execution_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `execution_control` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/extended_minmax.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/extended_minmax.rs index 0b5c6773a3..479927b475 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/extended_minmax.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/extended_minmax.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `extended_minmax` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/integer_minmax.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/integer_minmax.rs index 8eba2f1917..a6dee75dab 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/integer_minmax.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/integer_minmax.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `integer_minmax` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/ldmatrix.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/ldmatrix.rs index d7db141e4c..9b866325ff 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/ldmatrix.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/ldmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `ldmatrix` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/mbarrier_basic.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/mbarrier_basic.rs index 9c81695619..f2f103ad24 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/mbarrier_basic.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/mbarrier_basic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `mbarrier_basic` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/mbarrier_extended.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/mbarrier_extended.rs index d0a4755f75..2939514a94 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/mbarrier_extended.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/mbarrier_extended.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `mbarrier_extended` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/mod.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/mod.rs index 0bee39eaa1..838ab98c01 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/mod.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/mod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests, grouped per intrinsic family. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/movmatrix.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/movmatrix.rs index d6c942687c..aa61562928 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/movmatrix.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/movmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `movmatrix` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/packed_alu.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/packed_alu.rs index 88ec80f81b..a3828875ee 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/packed_alu.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/packed_alu.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `packed_alu` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/packed_atomic.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/packed_atomic.rs index 7d92776321..8b0f94a0cb 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/packed_atomic.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/packed_atomic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `packed_atomic` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/packed_conversion.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/packed_conversion.rs index 2a74640dd2..f970723f75 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/packed_conversion.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/packed_conversion.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `packed_conversion` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/prmt.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/prmt.rs index 705edc5677..30a1b8f0d0 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/prmt.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/prmt.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `prmt` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/redux.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/redux.rs index 9de584943d..2e6d41ab4a 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/redux.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/redux.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `redux` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/register_mma.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/register_mma.rs index 9f8dbf1ae5..73007cfb21 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/register_mma.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/register_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `register_mma` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/scalar_arithmetic.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/scalar_arithmetic.rs index d9a69edb4e..54b1aafc27 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/scalar_arithmetic.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/scalar_arithmetic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `scalar_arithmetic` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/scalar_conversion.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/scalar_conversion.rs index 3b9826558d..0cdb7b5882 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/scalar_conversion.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/scalar_conversion.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `scalar_conversion` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/scalar_math.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/scalar_math.rs index 29cddaa2a3..baf7eb5426 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/scalar_math.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/scalar_math.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `scalar_math` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/sparse_mma.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/sparse_mma.rs index 57c067083b..f77da86dfd 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/sparse_mma.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/sparse_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `sparse_mma` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/sreg.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/sreg.rs index 9fd1dd0d24..47c9c16be9 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/sreg.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/sreg.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `sreg` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/stmatrix.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/stmatrix.rs index d4231a57ed..f90dfb3007 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/stmatrix.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/stmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `stmatrix` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/sync.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/sync.rs index fc110ef0af..91611650cd 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/sync.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/sync.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `sync` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/tcgen05.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/tcgen05.rs index 88f4c7c769..a959e0cf79 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/tcgen05.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/tcgen05.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `tcgen05` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/tma.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/tma.rs index c286ba6208..0e15c304c5 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/tma.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/tma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `tma` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/vote.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/vote.rs index 5b68a2a5be..920e84cb93 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/vote.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/vote.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `vote` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/warp_barrier.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/warp_barrier.rs index 9a19172d77..8ed7ed8705 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/warp_barrier.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/warp_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `warp_barrier` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/warp_match.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/warp_match.rs index 58ca44a029..06cf35e459 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/warp_match.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/warp_match.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `warp_match` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/warp_shuffle.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/warp_shuffle.rs index 3facbf75f8..f9ae86d048 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/warp_shuffle.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/warp_shuffle.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `warp_shuffle` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/wgmma_control.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/wgmma_control.rs index 693497de06..476f68e73c 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/wgmma_control.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tests/wgmma_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated dispatch-path tests: `wgmma_control` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tma.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tma.rs index 5f96afd655..8a4084e8bd 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tma.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/tma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `tma` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/vote.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/vote.rs index 3fe1066099..31ea9a686b 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/vote.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/vote.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `vote` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/warp_barrier.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/warp_barrier.rs index 2b5650bc62..f891a65a84 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/warp_barrier.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/warp_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `warp_barrier` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/warp_match.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/warp_match.rs index 536582e80a..c4aa0a18aa 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/warp_match.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/warp_match.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `warp_match` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/warp_shuffle.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/warp_shuffle.rs index c6440078a3..874d8afb47 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/warp_shuffle.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/warp_shuffle.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `warp_shuffle` intrinsics. diff --git a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/wgmma_control.rs b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/wgmma_control.rs index 1f8cb1817d..175b988e9a 100644 --- a/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/wgmma_control.rs +++ b/cuda-oxide/crates/mir-importer/src/translator/terminator/intrinsics/generated/wgmma_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated raw/compatibility dispatch arms: `wgmma_control` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/active_mask.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/active_mask.rs index 2b834ff1ae..00d70555e9 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/active_mask.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/active_mask.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `active_mask` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/clc.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/clc.rs index 91d29997dc..f92e45edb3 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/clc.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/clc.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `clc` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/cluster_barrier.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/cluster_barrier.rs index 3acdf9d2fb..2016704dfb 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/cluster_barrier.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/cluster_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `cluster_barrier` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/cluster_memory.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/cluster_memory.rs index b42ad78914..a9e4adaff6 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/cluster_memory.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/cluster_memory.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `cluster_memory` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/cp_async.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/cp_async.rs index 80403e2d20..bbb4b539b3 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/cp_async.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/cp_async.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `cp_async` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/debug_control.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/debug_control.rs index 614449b84e..1bffcda8a0 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/debug_control.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/debug_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `debug_control` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/dotprod.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/dotprod.rs index 4ecaf508a2..6bccf76953 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/dotprod.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/dotprod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `dotprod` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/elect.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/elect.rs index 5927a56de9..f546381083 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/elect.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/elect.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `elect` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/execution_control.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/execution_control.rs index 00eca17508..1ba925ce35 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/execution_control.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/execution_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `execution_control` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/extended_minmax.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/extended_minmax.rs index 296b6dd69c..cab164f5ca 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/extended_minmax.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/extended_minmax.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `extended_minmax` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/integer_minmax.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/integer_minmax.rs index fbdd7b11af..65bd6f4699 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/integer_minmax.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/integer_minmax.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `integer_minmax` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/ldmatrix.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/ldmatrix.rs index 85202fb799..521050eed4 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/ldmatrix.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/ldmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `ldmatrix` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/mbarrier_basic.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/mbarrier_basic.rs index 38c3c3570a..085beaeb84 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/mbarrier_basic.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/mbarrier_basic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `mbarrier_basic` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/mbarrier_extended.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/mbarrier_extended.rs index c18e2051fa..b3b2417990 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/mbarrier_extended.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/mbarrier_extended.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `mbarrier_extended` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/mod.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/mod.rs index 46e6d3bcb3..afa117cf8d 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/mod.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/mod.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces for admitted CUDA intrinsic families. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/movmatrix.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/movmatrix.rs index c30cf9ecfc..761181bd73 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/movmatrix.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/movmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `movmatrix` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/packed_alu.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/packed_alu.rs index 567e6efcc1..1dc1677885 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/packed_alu.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/packed_alu.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `packed_alu` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/packed_atomic.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/packed_atomic.rs index 0d841cc1d5..904b88821a 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/packed_atomic.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/packed_atomic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `packed_atomic` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/packed_conversion.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/packed_conversion.rs index a24c7b1201..5231d64841 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/packed_conversion.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/packed_conversion.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `packed_conversion` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/prmt.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/prmt.rs index 47c635e498..7fc444587a 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/prmt.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/prmt.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `prmt` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/redux.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/redux.rs index b62c7ad0fc..db63372a94 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/redux.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/redux.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `redux` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/register_mma.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/register_mma.rs index 0787369606..15a266904b 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/register_mma.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/register_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `register_mma` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/scalar_arithmetic.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/scalar_arithmetic.rs index 168a5537ea..5984643b59 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/scalar_arithmetic.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/scalar_arithmetic.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `scalar_arithmetic` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/scalar_conversion.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/scalar_conversion.rs index 6123726891..8c2ffdc509 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/scalar_conversion.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/scalar_conversion.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `scalar_conversion` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/scalar_math.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/scalar_math.rs index bcb2a15e8d..2cb000ddf9 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/scalar_math.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/scalar_math.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `scalar_math` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/sparse_mma.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/sparse_mma.rs index aab2bcf1b0..7712a1a30d 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/sparse_mma.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/sparse_mma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `sparse_mma` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/sreg.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/sreg.rs index 9c1c4ff210..13cedf279e 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/sreg.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/sreg.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `sreg` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/stmatrix.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/stmatrix.rs index aab5fd1b9e..2bc1bd559f 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/stmatrix.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/stmatrix.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `stmatrix` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/sync.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/sync.rs index 30799d126f..3fc4aa9a86 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/sync.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/sync.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `sync` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/tcgen05.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/tcgen05.rs index 8bb2bf6c96..ca5769d6f7 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/tcgen05.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/tcgen05.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `tcgen05` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/tma.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/tma.rs index 567ddbb37d..3a19d52ce9 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/tma.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/tma.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `tma` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/vote.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/vote.rs index 3252a6bd1a..bd8e63882b 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/vote.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/vote.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `vote` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/warp_barrier.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/warp_barrier.rs index 1f3d4d8d97..65baf660ac 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/warp_barrier.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/warp_barrier.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `warp_barrier` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/warp_match.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/warp_match.rs index 2acc2f26ef..c4798d298b 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/warp_match.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/warp_match.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `warp_match` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/warp_shuffle.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/warp_shuffle.rs index 1da375e4d8..6bf741a1fd 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/warp_shuffle.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/warp_shuffle.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `warp_shuffle` intrinsics. diff --git a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/wgmma_control.rs b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/wgmma_control.rs index 4aae07bf38..ada7627302 100644 --- a/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/wgmma_control.rs +++ b/cuda-oxide/crates/mir-lower/src/convert/generated_intrinsics/wgmma_control.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated conversion interfaces: `wgmma_control` intrinsics. diff --git a/cuda-oxide/crates/rustc-codegen-cuda/src/generated_intrinsics.rs b/cuda-oxide/crates/rustc-codegen-cuda/src/generated_intrinsics.rs index 09bf66fe4d..a2854a8bc4 100644 --- a/cuda-oxide/crates/rustc-codegen-cuda/src/generated_intrinsics.rs +++ b/cuda-oxide/crates/rustc-codegen-cuda/src/generated_intrinsics.rs @@ -4,7 +4,7 @@ */ // @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +// Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. // LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. //! Generated collector predicates for intrinsic placeholder functions. diff --git a/cuda-oxide/cuda-oxide-book/compiler/mlir-dialects.md b/cuda-oxide/cuda-oxide-book/compiler/mlir-dialects.md index 6225db2323..105ec44800 100644 --- a/cuda-oxide/cuda-oxide-book/compiler/mlir-dialects.md +++ b/cuda-oxide/cuda-oxide-book/compiler/mlir-dialects.md @@ -303,11 +303,11 @@ they become `call` instructions to `@llvm.nvvm.*` intrinsics. ### Architecture Coverage -At catalog SHA-256 `63f8d327` (the stamp in every `ops/generated/` file +At catalog SHA-256 `6169c166` (the stamp in every `ops/generated/` file header), the dialect holds 589 operations across 42 modules, and they come from two different places. The split is the first thing to know about it, because it decides where -- and whether -- you would add one. If the header -stamp no longer starts with `63f8d327`, the counts on this page predate the +stamp no longer starts with `6169c166`, the counts on this page predate the catalog you are reading. **Hand-written**, directly under `cuda-oxide/crates/dialect-nvvm/src/ops/`. These are the diff --git a/cuda-oxide/intrinsics/catalog.json b/cuda-oxide/intrinsics/catalog.json index cd02440eb8..1565f47663 100644 --- a/cuda-oxide/intrinsics/catalog.json +++ b/cuda-oxide/intrinsics/catalog.json @@ -11,7 +11,7 @@ }, "inputs": { "imported_sha256": "54d47b8e281dd953dc95fe16f834ff38164d9809171c9a1af097231b0bc45cab", - "overlay_sha256": "7cbb76a20d8a969f3411089c264bef87cfdb355224b22655a6de03251df2ad6c", + "overlay_sha256": "91a32dcbdf8ce7512806c8c23f060cf15d8fc7282ffee5ddd0e11488a74033e0", "abi_ledger_sha256": "813b4bc05e144d72760148d8693257adf34957a4cdb4bd8c42f48e6e1aa07eea", "evidence_sha256": [ "cuda-12.0-libnvvm-12.0.140-ex2-f16.json:7102ea7d567ff2d2eb75a0384148d2e5eb6e605c26a5b98c71371fa3c46adef6", @@ -75,6 +75,7 @@ "cuda-13.3-libnvvm-13.3.73-tma-descriptor-control.json:ac44f485122404f9a900cfb94bff658160a6c23d9e2f8ef74bb751f044b848fc", "cuda-13.3-libnvvm-13.3.73-tma-reduce.json:f5df5bb51068966594660cb01b1b28c3b72cb004c456fcd8dff377ff0bee4fc0", "cuda-13.3-libnvvm-13.3.73-tma.json:8607f93605f215858a98075a0ea1394f2718d090538bcaf0a795e11b4cb66d47", + "cuda-13.3-sm75-scalar-arithmetic.json:56a03da85525bbf911b1dbbef1d71df37e06395e844cb7b01623c535a30a61e8", "cuda-13.4-libnvvm-13.4.92-mbarrier-relaxed-cluster.json:6c32ccf10d7979fd48d720960466933f0e2677357317a1c2aceb562f55bad20f", "rust-llvm-23.1.3-aab11ee0-blackwell-ldmatrix.json:d97aa88300a7b6cf355711ce82d1a719ba27c1f8dce4d94a746ee664973dd309", "rust-llvm-23.1.3-aab11ee0-clc.json:5eb99c01287207b78db2a7cf3b2b60d932a64377120e65b39121f4bb65028061", @@ -110,6 +111,7 @@ "rust-llvm-23.1.3-aab11ee0-register-mma-mxf8f6f4-f32.json:74930317085a35821ff129a56351901c784e07d28fdc8b89cae608dc32e95802", "rust-llvm-23.1.3-aab11ee0-register-mma.json:85e30e8e7c3db6ab6e14cf364e16ca761bcca123e8fcf378080b82cd8c025f75", "rust-llvm-23.1.3-aab11ee0-scalar-arithmetic.json:2b75b6fabd4baec416c2836d54d0ec9f2d2f0381f6a22e0b6b923703c729419f", + "rust-llvm-23.1.3-aab11ee0-scalar-baseline.json:57beaf0b9ae58dc63dbae303fa5fc2e3491a926cc0ea45da1d58e6ae578986ff", "rust-llvm-23.1.3-aab11ee0-scalar-conversion.json:fc454571fa8ee04649455963022b7a3ab4eaecbdffa561522b00f495c8153d78", "rust-llvm-23.1.3-aab11ee0-scalar-math.json:f1d1d54c5cb53cbef1fc0cbd447c18b9a9c9909405174d8f23576e0e4db1bdbf", "rust-llvm-23.1.3-aab11ee0-sparse-mma-fp8.json:f21f3182c4d55d51ca4e775ecf7b68abb577d31592ebaa53c11de6afdf8e173e", @@ -1718,13 +1720,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -1747,35 +1749,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9dd11e1e9f47084b276eb70bc5ad65ca42d3c1a5f357e490477b10e470b5ae8d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode f9934d1038a5552cdf55ce0f17df5fcc611c849a241e8453cf3e3f3cf0c15962; canonical IR 8f0ad3024811995830aa253f4ab6c5d75fc39845e2275aabfa13fd8cb942d2d5.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -1783,14 +1785,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3b17c7a77acdeaccbb6ffd876b1efe91d4507ecb15d7e9a2515c04f96dc44807.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e418177b0c9db7c7573a1dedd369d535ac67ec84b286bc05bed2946bc03dccfc; PTX 81609f9d41d2c795c42f21971cfc190b12f58e3963e328f7f4bf610259c4222d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -1798,53 +1800,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0736508303112b799ebabcdcfa600ecfdef2a3c9ea9548cd80e1bb5316831c64.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e418177b0c9db7c7573a1dedd369d535ac67ec84b286bc05bed2946bc03dccfc; PTX 81609f9d41d2c795c42f21971cfc190b12f58e3963e328f7f4bf610259c4222d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "20 pure inline-PTX scalar add calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -1852,33 +1854,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 20 scalar add forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained scalar-add libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -1983,13 +1985,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -2012,35 +2014,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9dd11e1e9f47084b276eb70bc5ad65ca42d3c1a5f357e490477b10e470b5ae8d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode bc7f42e0ec5e6483a919837745374eac40281d09f39f28b62c9a75a79fdbb218; canonical IR f3e0c65a40fe5423b8a24ae43593534ed7416ba36180ea74e9d9d56c08178ec2.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -2048,14 +2050,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3b17c7a77acdeaccbb6ffd876b1efe91d4507ecb15d7e9a2515c04f96dc44807.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 1f3369b959c0ef2aed77091fcd2d3a0736d68a552214b4c56f5d602c806aac12; PTX 78c1ddfd01dc81fe4378cf8eb8ebd1ff0fdf831a4fec301c5ef793d81e12157d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -2063,53 +2065,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0736508303112b799ebabcdcfa600ecfdef2a3c9ea9548cd80e1bb5316831c64.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 1f3369b959c0ef2aed77091fcd2d3a0736d68a552214b4c56f5d602c806aac12; PTX 78c1ddfd01dc81fe4378cf8eb8ebd1ff0fdf831a4fec301c5ef793d81e12157d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "20 pure inline-PTX scalar add calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -2117,33 +2119,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 20 scalar add forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained scalar-add libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -2248,13 +2250,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -2277,35 +2279,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9dd11e1e9f47084b276eb70bc5ad65ca42d3c1a5f357e490477b10e470b5ae8d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode aa0f77b09603061feab0dc368c0cf23b9718861dfce22e3fc639a6f5ae016b31; canonical IR 6e055be48461eb4ee303d2e2872323b37704ca69db86070cce202079a607022b.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -2313,14 +2315,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3b17c7a77acdeaccbb6ffd876b1efe91d4507ecb15d7e9a2515c04f96dc44807.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input c5a5565c9597cd3362f58c0ccfeb4e75aff31c586f4aa44f11d1e8eff84bd60e; PTX 324a4ae4a929760832863e3abb0c36808ea3e985eee55e3c941d1baac2403bf9; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -2328,53 +2330,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0736508303112b799ebabcdcfa600ecfdef2a3c9ea9548cd80e1bb5316831c64.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input c5a5565c9597cd3362f58c0ccfeb4e75aff31c586f4aa44f11d1e8eff84bd60e; PTX 324a4ae4a929760832863e3abb0c36808ea3e985eee55e3c941d1baac2403bf9; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "20 pure inline-PTX scalar add calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -2382,33 +2384,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 20 scalar add forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained scalar-add libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -2514,13 +2516,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -2543,35 +2545,35 @@ { "backend": "llvm_nvptx", "mechanism": "inline_ptx", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 4b064c89e5c841dd226829c91b04b7ebfffa55127d7ae8b7da0f7d1a3fb4eda8; canonical IR 4286a12c568dd9269a56d3360215fc8e8e871018627316858f4522243bd9c2e2.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -2579,14 +2581,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input ce537f54d195eb09538ee0c08ec330fbb0e0d5328ba70686392b44c9943f1f40; PTX 5bfe9e86147ea594b8bb474ebeca67191a4c8c3f3e66a3099b7d50e4542f6d46; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -2594,53 +2596,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input ce537f54d195eb09538ee0c08ec330fbb0e0d5328ba70686392b44c9943f1f40; PTX 5bfe9e86147ea594b8bb474ebeca67191a4c8c3f3e66a3099b7d50e4542f6d46; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "20 pure inline-PTX scalar add calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -2648,33 +2650,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 20 scalar add forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained scalar-add libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -2781,13 +2783,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -2810,35 +2812,35 @@ { "backend": "llvm_nvptx", "mechanism": "inline_ptx", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode b3df4e3cac222e5f24e857258eaff059b7b0381d691f7932f4b0550bde04e0ea; canonical IR b043345b6aeeb8b04d10d9175f0aa42c81f83cec8aef11d01cffae0733f1e3ef.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -2846,14 +2848,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e5eb11903f065bbb151bb5ed9d8fb0eb42ae76fd0fb96df02711c774831a866a; PTX 07f1a2d8dab15e1e31ab5686ae546fb5778d0f0765baa6edf9ac198dcb333539; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -2861,53 +2863,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e5eb11903f065bbb151bb5ed9d8fb0eb42ae76fd0fb96df02711c774831a866a; PTX 07f1a2d8dab15e1e31ab5686ae546fb5778d0f0765baa6edf9ac198dcb333539; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "20 pure inline-PTX scalar add calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -2915,33 +2917,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 20 scalar add forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained scalar-add libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -3047,13 +3049,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -3076,35 +3078,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9dd11e1e9f47084b276eb70bc5ad65ca42d3c1a5f357e490477b10e470b5ae8d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 4906c68b31a587e0533836e64102c875cf374a29f4f74f70bc25fad881e09245; canonical IR 86b1abe44c429b97cda1b9d1db97daa3c7ee30e31ea2cf2cb79fb54d357222a1.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -3112,14 +3114,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3b17c7a77acdeaccbb6ffd876b1efe91d4507ecb15d7e9a2515c04f96dc44807.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input b45258cd817947f5b638831e7de967eb468c87ccf28f611c5b696c0c0b98f0ab; PTX abd80cdfde171f0256da6b509e6aa9d1f2b722e7a6130df8bdd8a6e6f5ebd3b3; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -3127,53 +3129,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0736508303112b799ebabcdcfa600ecfdef2a3c9ea9548cd80e1bb5316831c64.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input b45258cd817947f5b638831e7de967eb468c87ccf28f611c5b696c0c0b98f0ab; PTX abd80cdfde171f0256da6b509e6aa9d1f2b722e7a6130df8bdd8a6e6f5ebd3b3; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "20 pure inline-PTX scalar add calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -3181,33 +3183,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 20 scalar add forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained scalar-add libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -3312,13 +3314,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -3341,35 +3343,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9dd11e1e9f47084b276eb70bc5ad65ca42d3c1a5f357e490477b10e470b5ae8d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 00eef432ee19e5943038373c6dee49e3bfe18bf9b59402da3af2c57b8f7293d3; canonical IR 743bacc01c90edc19678a94fef121801f06b0674da1fa8d5e76fa6e19f1f30d5.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -3377,14 +3379,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3b17c7a77acdeaccbb6ffd876b1efe91d4507ecb15d7e9a2515c04f96dc44807.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e55c7674226a23532f5bb5328d349920a690c46d15f0a7aa7a89852ca7a81928; PTX 32662ead78cd9c57c9815970abd619a42754dc8528c330aeba837091faa03c35; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -3392,53 +3394,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0736508303112b799ebabcdcfa600ecfdef2a3c9ea9548cd80e1bb5316831c64.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e55c7674226a23532f5bb5328d349920a690c46d15f0a7aa7a89852ca7a81928; PTX 32662ead78cd9c57c9815970abd619a42754dc8528c330aeba837091faa03c35; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "20 pure inline-PTX scalar add calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -3446,33 +3448,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 20 scalar add forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained scalar-add libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -3577,13 +3579,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -3606,35 +3608,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9dd11e1e9f47084b276eb70bc5ad65ca42d3c1a5f357e490477b10e470b5ae8d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 714587e2cd143d7c81ae5cf1a2cc5c708765e3012c58c9fe8875f49db12be16d; canonical IR e292a3eaf055ee6842e1fff1eda21edfcd00cf9c10d10b3496092a677013a603.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -3642,14 +3644,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3b17c7a77acdeaccbb6ffd876b1efe91d4507ecb15d7e9a2515c04f96dc44807.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input c0ffb157cf77ca925bedcf8e54c05a917d41e39346039cf9aa5abfafe68bb93a; PTX 1bd431d9af5cd36fcfcf384185e639c3cc8259823cff60449f82db6f1ab54fea; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -3657,53 +3659,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0736508303112b799ebabcdcfa600ecfdef2a3c9ea9548cd80e1bb5316831c64.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input c0ffb157cf77ca925bedcf8e54c05a917d41e39346039cf9aa5abfafe68bb93a; PTX 1bd431d9af5cd36fcfcf384185e639c3cc8259823cff60449f82db6f1ab54fea; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "20 pure inline-PTX scalar add calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -3711,33 +3713,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 20 scalar add forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained scalar-add libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -3843,13 +3845,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -3872,35 +3874,35 @@ { "backend": "llvm_nvptx", "mechanism": "inline_ptx", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 4051efd46840af83910aff88e4c36e9cf47aff9107fdc7087af8093f4c5d8241; canonical IR 2493f5e594bc53e9508d95ac95d4ee282efcc089aa7ed83e88bff34cd8c44242.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -3908,14 +3910,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input dec89dc152625c26a321d7f0b80e2feb017c0142e705ddb70067e5617f1fa327; PTX edf6fe12657789f0360aba76a60b3fdcf92d9b5e761859dd283513c32ac4b9a4; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -3923,53 +3925,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input dec89dc152625c26a321d7f0b80e2feb017c0142e705ddb70067e5617f1fa327; PTX edf6fe12657789f0360aba76a60b3fdcf92d9b5e761859dd283513c32ac4b9a4; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "20 pure inline-PTX scalar add calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -3977,33 +3979,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 20 scalar add forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained scalar-add libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -4110,13 +4112,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -4139,35 +4141,35 @@ { "backend": "llvm_nvptx", "mechanism": "inline_ptx", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 5896c2c6cdf94a8f2e94037455158eaa52a454cb5b6d17e91d0278ec073aed42; canonical IR c3034f8ba93e6c37f8a510d7d8d272c02432162d8a748adc3de3c8846135ebbb.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -4175,14 +4177,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input f884bd3746714ea7b3d8a3e5e53d975d49446bb049984568c659f184a7f08906; PTX 31b7693cd7be0022424ca48fbe0ad167c77ac540a14685ae4ecd82c903f7d985; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -4190,53 +4192,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input f884bd3746714ea7b3d8a3e5e53d975d49446bb049984568c659f184a7f08906; PTX 31b7693cd7be0022424ca48fbe0ad167c77ac540a14685ae4ecd82c903f7d985; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "20 pure inline-PTX scalar add calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -4244,33 +4246,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 20 scalar add forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained scalar-add libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -4376,13 +4378,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -4405,35 +4407,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9dd11e1e9f47084b276eb70bc5ad65ca42d3c1a5f357e490477b10e470b5ae8d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode f751d4889e5442fe29adaacbcdcbfeed6047a5a806740b9ae070c7713b0bff28; canonical IR 92f40d69575bb2ec86d1f9836719dd74ef86949d97ac301df47e2a5ce6cad2f1.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -4441,14 +4443,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3b17c7a77acdeaccbb6ffd876b1efe91d4507ecb15d7e9a2515c04f96dc44807.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 744b25875d7093e7fd5e06a09dbb18b9bda9343d139a15fa45f98af2bbd69151; PTX 2b295f742d60f76d98f09523c5e36f5588132f0f52df5a4fc47f2a54809fb6b4; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -4456,53 +4458,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0736508303112b799ebabcdcfa600ecfdef2a3c9ea9548cd80e1bb5316831c64.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 744b25875d7093e7fd5e06a09dbb18b9bda9343d139a15fa45f98af2bbd69151; PTX 2b295f742d60f76d98f09523c5e36f5588132f0f52df5a4fc47f2a54809fb6b4; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "20 pure inline-PTX scalar add calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -4510,33 +4512,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 20 scalar add forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained scalar-add libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -4641,13 +4643,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -4670,35 +4672,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9dd11e1e9f47084b276eb70bc5ad65ca42d3c1a5f357e490477b10e470b5ae8d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode fa037bb4c69ca5dbb1517a9ae359e58dc559cb985517b467d84946888113f540; canonical IR 756573f679fe11ecfa849dc94ae0164bdb108c02c7774cc37e027b81139da131.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -4706,14 +4708,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3b17c7a77acdeaccbb6ffd876b1efe91d4507ecb15d7e9a2515c04f96dc44807.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input a43a1bdd8898a1348218e57e0b0cc8a6d34a10bd148857f782d4568947353688; PTX c93b6ea5ce08636f3477781e157c42792144fa710101dca84803ec0d727180be; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -4721,53 +4723,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0736508303112b799ebabcdcfa600ecfdef2a3c9ea9548cd80e1bb5316831c64.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input a43a1bdd8898a1348218e57e0b0cc8a6d34a10bd148857f782d4568947353688; PTX c93b6ea5ce08636f3477781e157c42792144fa710101dca84803ec0d727180be; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "20 pure inline-PTX scalar add calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -4775,33 +4777,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 20 scalar add forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained scalar-add libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -4906,13 +4908,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -4935,35 +4937,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9dd11e1e9f47084b276eb70bc5ad65ca42d3c1a5f357e490477b10e470b5ae8d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 30afff6d95731313be20be9fc9a5915870a502c69a51ab635f072eb997efc210; canonical IR f6b44a6e746a49e7a299d1da424a6bced1181eab104768ca5295740133b39cd2.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -4971,14 +4973,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3b17c7a77acdeaccbb6ffd876b1efe91d4507ecb15d7e9a2515c04f96dc44807.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 55cf1156ccc21305c842b6f6e622f4858499e0ddce52fc5c0b4eba00f85a7503; PTX 62f02c47ca6e38b49d7224cd07b962278e8edf7b5e244c3f472f0c11f7f5b41a; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -4986,53 +4988,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0736508303112b799ebabcdcfa600ecfdef2a3c9ea9548cd80e1bb5316831c64.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 55cf1156ccc21305c842b6f6e622f4858499e0ddce52fc5c0b4eba00f85a7503; PTX 62f02c47ca6e38b49d7224cd07b962278e8edf7b5e244c3f472f0c11f7f5b41a; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "20 pure inline-PTX scalar add calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -5040,33 +5042,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 20 scalar add forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained scalar-add libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -5172,13 +5174,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -5201,35 +5203,35 @@ { "backend": "llvm_nvptx", "mechanism": "inline_ptx", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode deeaf0c1aa02868245e3dc087ee1cc0d3716ad73acf402a95e58309ee95f07ce; canonical IR bb60971343d60d8084295441a8d7f7db974afd220d994660224abd3a203b3a10.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -5237,14 +5239,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input cf99f5e2a7fec608b19984b80f04669853cb9cca3b92b43a5eae0f5e5e5a41bf; PTX a30e859f828718fe375c6376d4678d659d73c1c71ee0b0f01cad23d560d94588; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -5252,53 +5254,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input cf99f5e2a7fec608b19984b80f04669853cb9cca3b92b43a5eae0f5e5e5a41bf; PTX a30e859f828718fe375c6376d4678d659d73c1c71ee0b0f01cad23d560d94588; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "20 pure inline-PTX scalar add calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -5306,33 +5308,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 20 scalar add forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained scalar-add libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -5439,13 +5441,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -5468,35 +5470,35 @@ { "backend": "llvm_nvptx", "mechanism": "inline_ptx", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 7f58f2252b0ddbcb7ee8e4fe2ebffcaca74d630b8724c5f7a3a170948e4c0f55; canonical IR 9a9d02d9bbfd0a6c00a1aba05fb2e6c8ddf83a74b95aea1cd89758407b2669ff.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -5504,14 +5506,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 9dc7f6935783ce5d9607ac76b90936509f8e4423ac6a362ea588200179e58995; PTX dced750c42722c8d011f4aa0b0be18e41f86a733ac23a27540aaa09cd5a2d4a7; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -5519,53 +5521,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 9dc7f6935783ce5d9607ac76b90936509f8e4423ac6a362ea588200179e58995; PTX dced750c42722c8d011f4aa0b0be18e41f86a733ac23a27540aaa09cd5a2d4a7; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "20 pure inline-PTX scalar add calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -5573,33 +5575,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 20 scalar add forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained scalar-add libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -5705,13 +5707,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -5734,35 +5736,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9dd11e1e9f47084b276eb70bc5ad65ca42d3c1a5f357e490477b10e470b5ae8d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 2a2ce18cd71fe1c891023cc15787bd9e2b74e226d7f4d5f5c4f588481a1a55b4; canonical IR a62381d4152598867d2c00a12a539f92ee42f3e53826aa93374f6b6d7bf95774.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -5770,14 +5772,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3b17c7a77acdeaccbb6ffd876b1efe91d4507ecb15d7e9a2515c04f96dc44807.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 89e825a3ced8de0eae4f18951bf4f8ca2071c495e1f057788aacb008e564c9c9; PTX 2c916b685c9b74f29e787af934794e4d7f993976722c1cefa2572851b6d300cc; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -5785,53 +5787,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0736508303112b799ebabcdcfa600ecfdef2a3c9ea9548cd80e1bb5316831c64.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 89e825a3ced8de0eae4f18951bf4f8ca2071c495e1f057788aacb008e564c9c9; PTX 2c916b685c9b74f29e787af934794e4d7f993976722c1cefa2572851b6d300cc; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "20 pure inline-PTX scalar add calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -5839,33 +5841,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 20 scalar add forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained scalar-add libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -5970,13 +5972,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -5999,35 +6001,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9dd11e1e9f47084b276eb70bc5ad65ca42d3c1a5f357e490477b10e470b5ae8d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode bcea3bd9a8706c996ef0a934e039e7473f5a1aa849e6de40fbe05f1840da6dbe; canonical IR 261944c7ac7b765072275a41eac4f83e443c70f7600d3ef57f5f06821760e71d.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -6035,14 +6037,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3b17c7a77acdeaccbb6ffd876b1efe91d4507ecb15d7e9a2515c04f96dc44807.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 10e608479b1706000af7524c4f3bdf3f7cf0ef1a20092c0e55590d19d7a2c81d; PTX 1a7dfcf431854618ba81b43b833d56cc743dd848f8f5b71c34641d644726862b; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -6050,53 +6052,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0736508303112b799ebabcdcfa600ecfdef2a3c9ea9548cd80e1bb5316831c64.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 10e608479b1706000af7524c4f3bdf3f7cf0ef1a20092c0e55590d19d7a2c81d; PTX 1a7dfcf431854618ba81b43b833d56cc743dd848f8f5b71c34641d644726862b; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "20 pure inline-PTX scalar add calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -6104,33 +6106,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 20 scalar add forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained scalar-add libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -6235,13 +6237,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -6264,35 +6266,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9dd11e1e9f47084b276eb70bc5ad65ca42d3c1a5f357e490477b10e470b5ae8d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode d4dadf6ee4eb21a92873d6f9662158656b7ca18f0a84a823f6affa7697406ead; canonical IR 961a89f3d7517a81429159fef786b2c083227aed53b431af09485eb1b0632538.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -6300,14 +6302,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3b17c7a77acdeaccbb6ffd876b1efe91d4507ecb15d7e9a2515c04f96dc44807.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 1e4e9b8674798f340b738cd96cc1ac09faeb3cf19c362daceffb2799b434d721; PTX 7618a645d06a5c968510e353670b2aa44c3348d9ab3cc26d0a20abbf3cb335ad; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -6315,53 +6317,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0736508303112b799ebabcdcfa600ecfdef2a3c9ea9548cd80e1bb5316831c64.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 1e4e9b8674798f340b738cd96cc1ac09faeb3cf19c362daceffb2799b434d721; PTX 7618a645d06a5c968510e353670b2aa44c3348d9ab3cc26d0a20abbf3cb335ad; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "20 pure inline-PTX scalar add calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -6369,33 +6371,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 20 scalar add forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained scalar-add libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -6501,13 +6503,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -6530,35 +6532,35 @@ { "backend": "llvm_nvptx", "mechanism": "inline_ptx", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode d6373b162715e509c2ac22077358477b7d825f7da0519c78bf88b3d9b8a6d5cf; canonical IR edad3cbd88093c18d9a600d49bd4ef24e71000bd2c2965a1581febabc0982c11.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -6566,14 +6568,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input df43766ad4fd2acde4a73dc43c763eae01c5b0ea5d1ca2c0645676fded0a44fd; PTX 4cd16d8f5eed14a0e2935148533ec0c6db2bf5462cda30893b266d037cdadfa6; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -6581,53 +6583,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input df43766ad4fd2acde4a73dc43c763eae01c5b0ea5d1ca2c0645676fded0a44fd; PTX 4cd16d8f5eed14a0e2935148533ec0c6db2bf5462cda30893b266d037cdadfa6; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "20 pure inline-PTX scalar add calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -6635,33 +6637,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 20 scalar add forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained scalar-add libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -6768,13 +6770,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -6797,35 +6799,35 @@ { "backend": "llvm_nvptx", "mechanism": "inline_ptx", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 6ab5896ae055db562e3de871a22baa8853dd3af1a4e64c8e8fb99a24cd372631; canonical IR 9c7b2e39b1c83b8ea1548f1c26b90d92924e8734c89f3c1a024ccaef436a571b.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -6833,14 +6835,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 21ab2a705aaf3c687dfe1499c95381a768647f73193804f351e9d8b37778f1b9; PTX 9fc0426b3db8fe567a0cf26c573cd8f178d5777a8b144fc223811aee92ff9fe1; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -6848,53 +6850,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 21ab2a705aaf3c687dfe1499c95381a768647f73193804f351e9d8b37778f1b9; PTX 9fc0426b3db8fe567a0cf26c573cd8f178d5777a8b144fc223811aee92ff9fe1; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "20 pure inline-PTX scalar add calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -6902,33 +6904,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 20 scalar add forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained scalar-add libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -53159,13 +53161,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -53188,35 +53190,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 4f65929b0778fc4e60e852b68a8b80015704712e34a80c1b00d58574f383cb83; canonical IR 881f29eadb6fe5033bede3eb73b71fdbb822d50fe9de999784fb465e8f2e8b9d.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -53224,14 +53226,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e64302ecae10b7565d9734062e42a34b9bb580f8f19f433bf20cd96fb4001eb7; PTX 918681e921e79b02f50fd02b0e3bdba181daafcfc1f9d888d0c4114368c79842; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -53239,53 +53241,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e64302ecae10b7565d9734062e42a34b9bb580f8f19f433bf20cd96fb4001eb7; PTX 918681e921e79b02f50fd02b0e3bdba181daafcfc1f9d888d0c4114368c79842; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -53293,33 +53295,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -53422,13 +53424,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -53451,35 +53453,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 98eb91e439f3018ae1421d7588f9beead3ef1e27ba544a5bab28a78ac31e7307; canonical IR f965b4b829e00e2569be716b8f8c460dcb05aed9f7c38d65dcad43b576890be0.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -53487,14 +53489,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input dc5c17b9371227026a8ba8049611debe66237ea5524cb5c264c86eb6a8b6cb82; PTX 4ff2dae1ed54430167e79baff2620975eb201b2978c12fa7805e9c278b1dacf0; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -53502,53 +53504,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input dc5c17b9371227026a8ba8049611debe66237ea5524cb5c264c86eb6a8b6cb82; PTX 4ff2dae1ed54430167e79baff2620975eb201b2978c12fa7805e9c278b1dacf0; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -53556,33 +53558,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -53685,13 +53687,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -53714,35 +53716,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 2b91e12e8fee2ade6958192f8c46349bbe8f3bfde8c33b60251ab3849c0e2f0d; canonical IR 09cb0d4613d535f3fab705d2b2c5dd5620df1ab76436515abf068f6117169334.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -53750,14 +53752,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 45edec0ac37ea1ce73e890423d94409da024e81bde096759ef7f403505a77bc9; PTX 11fd263e2af81736c9de306c3d999d35fb5e85b3bafa066194fbed06b9b5cb35; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -53765,53 +53767,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 45edec0ac37ea1ce73e890423d94409da024e81bde096759ef7f403505a77bc9; PTX 11fd263e2af81736c9de306c3d999d35fb5e85b3bafa066194fbed06b9b5cb35; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -53819,33 +53821,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -53949,13 +53951,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -53978,35 +53980,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode c8f094ad7fe975839748a01d0710de7d5a7c1a82ef87faeedb6ad4bfae05e304; canonical IR d58032888364b71e28147a64a0d6593dff99cb8a98dff79c01e00db5265e55fc.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -54014,14 +54016,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 70d667e3e5a210087b074a59d905cec7541a295eaacbc2efd97792570780e196; PTX e0b39f1f88d67360fa4a89b086bf1fe943b3cac96a2109c4f0985931deaaae9c; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -54029,53 +54031,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 70d667e3e5a210087b074a59d905cec7541a295eaacbc2efd97792570780e196; PTX e0b39f1f88d67360fa4a89b086bf1fe943b3cac96a2109c4f0985931deaaae9c; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -54083,33 +54085,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -54212,13 +54214,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -54241,35 +54243,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 111c4133fdac8a40e94ef182b6690286bef66dc47434ae1321354dc49cb04f47; canonical IR c6164908f74bdafdeefaf52b1a0458cb42b788e83b0dc459f9ea1659dd90d0d9.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -54277,14 +54279,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 5fa9bb1f4f3960d7205c2f51d22c9495c1d5f84c286fc69af0b37294f4d50f40; PTX 12e2c0e9618b2d9ff96a3522c9826c4fef4bf95baccbab27bf40ae23bb9d5acf; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -54292,53 +54294,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 5fa9bb1f4f3960d7205c2f51d22c9495c1d5f84c286fc69af0b37294f4d50f40; PTX 12e2c0e9618b2d9ff96a3522c9826c4fef4bf95baccbab27bf40ae23bb9d5acf; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -54346,33 +54348,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -54475,13 +54477,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -54504,35 +54506,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode a61ab19a202eaa31b721d753a15b2d930600da7261cd9cd47d43bbad0901e59e; canonical IR e976bc7be4c74be02e50e01004cd6b80c662222a5302d57233ccfb4a3f736a2b.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -54540,14 +54542,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e17a37dd7db077eeb29e37f339cc2079ac2b56493d30ffa84140bac16d9fb672; PTX 271a96d5492a80359857e23bc83a9e45cecfa626404c2cb5088a2ce3a14f6270; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -54555,53 +54557,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e17a37dd7db077eeb29e37f339cc2079ac2b56493d30ffa84140bac16d9fb672; PTX 271a96d5492a80359857e23bc83a9e45cecfa626404c2cb5088a2ce3a14f6270; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -54609,33 +54611,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -54739,13 +54741,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -54768,35 +54770,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode ddc0b85220df5c6bd83cc79d351d0af9b0202230a9b33fa537eabbcc7be500ac; canonical IR 35ed93d9237feffef19d1980b0954279a3f17e890bd771c441ad4e81a9de0039.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -54804,14 +54806,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input a450ff2e5a2ab7d65f3764d36a943039942f61c44ff592b3e86d26a9f43a9c63; PTX 329257b2135da493cc00d2a3d329dc1e3f144d2b7bb1077e7da0b5ce31edf641; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -54819,53 +54821,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input a450ff2e5a2ab7d65f3764d36a943039942f61c44ff592b3e86d26a9f43a9c63; PTX 329257b2135da493cc00d2a3d329dc1e3f144d2b7bb1077e7da0b5ce31edf641; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -54873,33 +54875,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -55002,13 +55004,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -55031,35 +55033,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 3fc32170b5a53e699829cf32e18d0b7a6d8551650c883ccab2b1c1977934e823; canonical IR 706618c58fbe6ad068339c2e81423214a191a39e49319193b5f4b86b65d6476c.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -55067,14 +55069,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input ba5a45a618f00b184f6f4406f16fe9ff96c2267f76df131653f0a669ab5a539c; PTX 83e1a13980266ec1fa39fd597064f1fa2c57c17c32a27905c0f67105ccf6556f; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -55082,53 +55084,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input ba5a45a618f00b184f6f4406f16fe9ff96c2267f76df131653f0a669ab5a539c; PTX 83e1a13980266ec1fa39fd597064f1fa2c57c17c32a27905c0f67105ccf6556f; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -55136,33 +55138,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -55265,13 +55267,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -55294,35 +55296,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode abe750764d37a93c709f987380b7220d81dc476e7e2d799d793eac8e70918063; canonical IR 885798008d8dacb036111605953c74ca804f0c158e62bbf33b5b353b87ae610d.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -55330,14 +55332,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 2b80a436e4f5ee1dbee2c0375c84f4b9c731ce43b2ac11bec8eeff1ca447e885; PTX 596d076ae134ac7e1292d63be88d7773a0d5da29348e2f41c94e97365bd8fc3d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -55345,53 +55347,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 2b80a436e4f5ee1dbee2c0375c84f4b9c731ce43b2ac11bec8eeff1ca447e885; PTX 596d076ae134ac7e1292d63be88d7773a0d5da29348e2f41c94e97365bd8fc3d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -55399,33 +55401,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -55529,13 +55531,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -55558,35 +55560,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode fa4724faa51258f7c5b89753691633b0e8da0e7608884dfe47a476f64be8bf75; canonical IR f29620f20383dfb6fbfc26179e1d8148f04863ec0fbc3c6a1713c78ee68ada17.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -55594,14 +55596,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 8b8c81889b821917b8312bba62a90d00caa26a0536b6adc911f94e650c1e55b2; PTX 96f72e7886c7b84313f3fcadce27b74d9c733aef3e241bbcaa8d9e00a761b82d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -55609,53 +55611,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 8b8c81889b821917b8312bba62a90d00caa26a0536b6adc911f94e650c1e55b2; PTX 96f72e7886c7b84313f3fcadce27b74d9c733aef3e241bbcaa8d9e00a761b82d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -55663,33 +55665,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -55792,13 +55794,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -55821,35 +55823,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode dcb6fc41c86e75d1c86f3bec23f4ff7c5c353d61feec52342ce5383ee9f9efa8; canonical IR 32a8e7bd41c2449a4203def04f6d797130f1dc24f566e4b797bfc1716ea2258f.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -55857,14 +55859,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 1842ad0d6c954014d11e54f571937bdd06c81c60718f85d8c466115e60eb79d8; PTX 0fb8324f7b279ebc55830c5271355bfd6fb504f040b4bb053552e1121123641d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -55872,53 +55874,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 1842ad0d6c954014d11e54f571937bdd06c81c60718f85d8c466115e60eb79d8; PTX 0fb8324f7b279ebc55830c5271355bfd6fb504f040b4bb053552e1121123641d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -55926,33 +55928,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -56055,13 +56057,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -56084,35 +56086,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 7ee1df4e5f45a6e3e85f5a08250ba5390ff9c7d0cb562af08e427a1b567f9559; canonical IR 986ab2872c78e953894629e6c3b1e2109ccee9734160df27a3e4db534d000b9e.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -56120,14 +56122,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input f5a74f740ad4453d9c3298bceb38f8a9c0c8719d6c77d228fe450b07ef91a6ec; PTX e5e4867abc2832760637bae848db4f56a016129b46a9fc001cd8a6af2a58cb26; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -56135,53 +56137,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input f5a74f740ad4453d9c3298bceb38f8a9c0c8719d6c77d228fe450b07ef91a6ec; PTX e5e4867abc2832760637bae848db4f56a016129b46a9fc001cd8a6af2a58cb26; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -56189,33 +56191,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -64332,13 +64334,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -64361,35 +64363,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 09f44ef419ab05d10716cfdf7cfaa75003586a915ae79227d75e7e0bb854c731; canonical IR 682cd88ea120fca5d8fc349177cd50f25aec5317b8d82d61c20af031cba1b677.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -64397,14 +64399,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input d5539e68e09bfb47670eafa13256aacaa6c96cfa523d20a8bb585402242fc193; PTX 7e66354f63b1bcea7ba4b3e2ea4879c8886d3ad8130bdf2a36afe1b70f79855c; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -64412,53 +64414,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input d5539e68e09bfb47670eafa13256aacaa6c96cfa523d20a8bb585402242fc193; PTX 7e66354f63b1bcea7ba4b3e2ea4879c8886d3ad8130bdf2a36afe1b70f79855c; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -64466,33 +64468,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -64602,13 +64604,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -64631,35 +64633,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 287228c3e60fca183b467eae3fb33dc34f80f3754455410112c68382f8582905; canonical IR 56af89bc7ea141713a822b6bcf855795a5c342c26b8bdcdd54255a5adf034e5a.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -64667,14 +64669,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input d696e9725b3705b7d1e0fb5ce20940fc87fe6c421f6c72ded81254aac1599687; PTX ca75a5ccec41516cec2fae78bdc4fe06257793dbf1eebe64cdc60e78fcb24f8f; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -64682,53 +64684,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input d696e9725b3705b7d1e0fb5ce20940fc87fe6c421f6c72ded81254aac1599687; PTX ca75a5ccec41516cec2fae78bdc4fe06257793dbf1eebe64cdc60e78fcb24f8f; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -64736,33 +64738,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -64872,13 +64874,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -64901,35 +64903,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 8e8bb6b338bf9038d039666038697594955b04e3a83dede5a93242461cdff9f3; canonical IR 76b88eceb3713395ec477c604f5e1a5e85dc5670c6905348cffaa0ddb81e6811.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -64937,14 +64939,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 6f95c7b5351094db59a0a27a6dd635486eb7a03a3dbb1a25c39bc0b55c98682c; PTX c7ce37008e99cd502baddb447b2da136f24a0f5c65b2da03ce3f521845f7e002; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -64952,53 +64954,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 6f95c7b5351094db59a0a27a6dd635486eb7a03a3dbb1a25c39bc0b55c98682c; PTX c7ce37008e99cd502baddb447b2da136f24a0f5c65b2da03ce3f521845f7e002; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -65006,33 +65008,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -65143,13 +65145,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -65172,35 +65174,35 @@ { "backend": "llvm_nvptx", "mechanism": "inline_ptx", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 8566544060a4270d2cf4e7652bb7b97260e32afe5d947c2344dfb9b785a5ee78; canonical IR 62b57361073aebd859f86d5ad74efa479414d8c0c05a8e6852d775110ac7f8de.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -65208,14 +65210,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 9d1de2389ecb6f7613144bf5a9da7a59d669bf8eeb6277cc6897053507201d4e; PTX 51f350e8dcc5b924c6429d3842dce981057454ef8eb4c2a3f86220e5b0cffb80; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -65223,53 +65225,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 9d1de2389ecb6f7613144bf5a9da7a59d669bf8eeb6277cc6897053507201d4e; PTX 51f350e8dcc5b924c6429d3842dce981057454ef8eb4c2a3f86220e5b0cffb80; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -65277,33 +65279,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -65415,13 +65417,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -65444,35 +65446,35 @@ { "backend": "llvm_nvptx", "mechanism": "inline_ptx", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 24fd4bbd321a3f0e826b86875021c09bbfa8925654eee29d384382de9252f55d; canonical IR 875c85c382022f334f8a76beb04c8a4699b384f8014007a55f85f589fcc2d38e.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -65480,14 +65482,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 4e7a2be5dbf69315081568647203ac80416f52c3bf521d8be3345d599fb739c6; PTX e73ddd10405009b75e8856eaff39d7b5bd0f2b01c8e9a545099280740ac0b508; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -65495,53 +65497,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 4e7a2be5dbf69315081568647203ac80416f52c3bf521d8be3345d599fb739c6; PTX e73ddd10405009b75e8856eaff39d7b5bd0f2b01c8e9a545099280740ac0b508; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -65549,33 +65551,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -65686,13 +65688,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -65715,35 +65717,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 96a5b9daa9c3e9dc8d6c0e779e3240fc72595f1c5bea3cc1cc8d77796fb3a86b; canonical IR fbc9eb19bcab3691fce05b2f12755b9c999b6a98ab828084374b8bde103296e1.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -65751,14 +65753,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e013026b2457bce1f4d453774ff2efc20ace0b2cbb58f40f544bacdefa873efc; PTX c341c3549c334576726ea141782dc0d45ae7f8a92588197a6b03440e37043407; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -65766,53 +65768,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e013026b2457bce1f4d453774ff2efc20ace0b2cbb58f40f544bacdefa873efc; PTX c341c3549c334576726ea141782dc0d45ae7f8a92588197a6b03440e37043407; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -65820,33 +65822,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -65956,13 +65958,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -65985,35 +65987,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 6e2610170f4565cbcad389a3d8841476dca4fbe49c290754dcff3c5ba5c25102; canonical IR 5bc7f5846c57b1e22f7f1b85ce7384cdbbbbaf3799cbf1281b742bcc003d3758.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -66021,14 +66023,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 28293cf1109dd5b1426c764ec04f87f06b5763107ca90189f3dd68fcd80d40f8; PTX 753bd5786dc3ad54672840db1726ed70040af88069b651972c581943f2d155e7; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -66036,53 +66038,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 28293cf1109dd5b1426c764ec04f87f06b5763107ca90189f3dd68fcd80d40f8; PTX 753bd5786dc3ad54672840db1726ed70040af88069b651972c581943f2d155e7; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -66090,33 +66092,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -66226,13 +66228,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -66255,35 +66257,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 5adb0ba90dcd6898fa2d0c4c24e3c51ea093e43063ebf18dfe38ea878b0ca8a0; canonical IR a56a82b531333494713f6d5a0db60af420b3fa722d6c1ed7062db1711c05c7d5.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -66291,14 +66293,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 7f29339d7f2fd4b9d09b844668850bea86b98642fafe218c79a9aa78c7f4e284; PTX 8a2c085b1407c35d2d34d9ee7b00a1d0349bf9d42f8e91f938b1e1ce2aae0465; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -66306,53 +66308,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 7f29339d7f2fd4b9d09b844668850bea86b98642fafe218c79a9aa78c7f4e284; PTX 8a2c085b1407c35d2d34d9ee7b00a1d0349bf9d42f8e91f938b1e1ce2aae0465; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -66360,33 +66362,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -66497,13 +66499,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -66526,35 +66528,35 @@ { "backend": "llvm_nvptx", "mechanism": "inline_ptx", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 73b2dde1bbc35dd06a4cdfacad975668c83260958389e0f67b851336a2f5cea8; canonical IR 3459d1a96892b290f8558de50debc12a1639d3a29fa9ec3dc7bf29a783be0d54.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -66562,14 +66564,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 69d5c2d680514e8c5885272f847cf5acd3fbeb864b769718543b6daced2bfcdb; PTX 9f505074ff997e70b3b20c089c9f3179884f947db85970968f3280648bdeeacb; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -66577,53 +66579,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 69d5c2d680514e8c5885272f847cf5acd3fbeb864b769718543b6daced2bfcdb; PTX 9f505074ff997e70b3b20c089c9f3179884f947db85970968f3280648bdeeacb; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -66631,33 +66633,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -66769,13 +66771,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -66798,35 +66800,35 @@ { "backend": "llvm_nvptx", "mechanism": "inline_ptx", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode f3128180eb7c537006e684e759b3cae3c940141aca6c1095a150d29c2ebeb147; canonical IR 13c4f2ba29b18a55331790f5b715b6a6a74746fa0ee70e798ca56fa1cdfc350e.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -66834,14 +66836,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 52bbb22c08b0aac43c481fe3d4cb2115b7aab82d95511cd849831bc8b73c91e3; PTX 2ec6ab8e284d016c5608c4fbc08fc9261b61c318b5c57559727f40e8b04a6f37; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -66849,53 +66851,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 52bbb22c08b0aac43c481fe3d4cb2115b7aab82d95511cd849831bc8b73c91e3; PTX 2ec6ab8e284d016c5608c4fbc08fc9261b61c318b5c57559727f40e8b04a6f37; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -66903,33 +66905,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -67040,13 +67042,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -67069,35 +67071,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 54180d45e47a904cf0312cf331529a56b59cd001e6aee819caea2d39614e1643; canonical IR aa7e3923594843a16fb0832b022af7f06ce7b975cba947ce987d9bd89cc63fc1.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -67105,14 +67107,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input b7cd6c9d7b48cd3b11fdd39d01a5f8896f17c80fce4b56173f4006d2b82e071a; PTX d1c33fe2201f52f898f83e0730c40a36af9af854431287eb58d30659d82a7ddd; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -67120,53 +67122,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input b7cd6c9d7b48cd3b11fdd39d01a5f8896f17c80fce4b56173f4006d2b82e071a; PTX d1c33fe2201f52f898f83e0730c40a36af9af854431287eb58d30659d82a7ddd; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -67174,33 +67176,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -67310,13 +67312,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -67339,35 +67341,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 2741bdd15c52e81b359f66da821509331d195db43482cd2f0f6a79d0a501bd07; canonical IR 224c49f80622a7de2d3371c6e1d77dd2343d070e8d43a7c2fb9a0b2377619c3a.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -67375,14 +67377,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 48f7c8301e9ace472aafa5b2be92f4ce919b22c9ebefeee737dde6525558c07c; PTX 9c49748568ecf367abcab2b34352f4c3c3f01f1741ecc36105ce6338bf19c897; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -67390,53 +67392,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 48f7c8301e9ace472aafa5b2be92f4ce919b22c9ebefeee737dde6525558c07c; PTX 9c49748568ecf367abcab2b34352f4c3c3f01f1741ecc36105ce6338bf19c897; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -67444,33 +67446,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -67580,13 +67582,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -67609,35 +67611,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode da44e89cd99327a2abfac379c9fbf267678064b94fd9af7816790cc67915b4bd; canonical IR 101d5265424f629753c17b48a1a7672e3b38cc99b4f4f5ffe1cea1a81edf401b.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -67645,14 +67647,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 220914f1c6d2bacc28c39872d28fd45e44c13749997e42697577ca66ca2ed5b1; PTX a225e339ee815afe704f755952f545f31400444034dc6706856474c52d52aaa3; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -67660,53 +67662,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 220914f1c6d2bacc28c39872d28fd45e44c13749997e42697577ca66ca2ed5b1; PTX a225e339ee815afe704f755952f545f31400444034dc6706856474c52d52aaa3; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -67714,33 +67716,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -67851,13 +67853,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -67880,35 +67882,35 @@ { "backend": "llvm_nvptx", "mechanism": "inline_ptx", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 163f5dc7c002c7dd412b3831330908d46e28e08b8888fe713c5558bebd1ffb02; canonical IR d814a00145f9ebd0a8adc3fd3771a7911b21adf7c659d322ac72770011e4e444.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -67916,14 +67918,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e641a019fbf66f94235137abc9daf0559068ec02af921d640cfc330b2c5bb16d; PTX 85025b19c592e3b757f4ce119f982f29c629e20d1e225ab9f88aef73552eaee5; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -67931,53 +67933,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e641a019fbf66f94235137abc9daf0559068ec02af921d640cfc330b2c5bb16d; PTX 85025b19c592e3b757f4ce119f982f29c629e20d1e225ab9f88aef73552eaee5; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -67985,33 +67987,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -68123,13 +68125,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -68152,35 +68154,35 @@ { "backend": "llvm_nvptx", "mechanism": "inline_ptx", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 0e377278eaaa5a805dd7b93627ccc2e6b798cafbd82676d6cf8b4cc1ca70bee5; canonical IR 600555ff3d12ba05c33638fb6860813aa143cbc94cc46d4d3c19b5aee0a97bf8.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -68188,14 +68190,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input f0271423950f061ee102e62b949caaa64e1a8e243472bb45be05fd35bda20115; PTX b9ee18611bea21d9866f12d9dd700c680afc530824691a5ec266603a5f54e73a; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -68203,53 +68205,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input f0271423950f061ee102e62b949caaa64e1a8e243472bb45be05fd35bda20115; PTX b9ee18611bea21d9866f12d9dd700c680afc530824691a5ec266603a5f54e73a; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -68257,33 +68259,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -68394,13 +68396,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -68423,35 +68425,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode f8a2e51bbc2a27856a421b98a9cefe440e8e7f40b4b3244e14442cd382983acf; canonical IR 96e7b7a57e58a41d022b9df4ccd163213711c3b04f4c761554b60a52bd6d9e37.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -68459,14 +68461,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 0c47ae32749372a26cc21ca53ddc5d9a3cf9b30f8105152d4c36df55b730a0fc; PTX 71d6fa1af986706f17ba4b0614708b11d013c91ab391e1928630faa7802e53fe; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -68474,53 +68476,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 0c47ae32749372a26cc21ca53ddc5d9a3cf9b30f8105152d4c36df55b730a0fc; PTX 71d6fa1af986706f17ba4b0614708b11d013c91ab391e1928630faa7802e53fe; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -68528,33 +68530,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -68664,13 +68666,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -68693,35 +68695,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 7f931753069dba54b2b1a739f873076cd47278f7290f7b28d1a10e9a41159c28; canonical IR 86cf0dab0b07f36c1a391d6ef5bdea424c482509c7bed335dc7ffaad6f10a94a.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -68729,14 +68731,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 3539abf0c84e87e58e7bdfb1fc6cb7d2af1e59abca2352f00469f90d6009b2a0; PTX eee8bb584ba8557f3c6680f3901c9dd072f6fb8be0f0389f21a6bf0ac7dfac92; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -68744,53 +68746,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 3539abf0c84e87e58e7bdfb1fc6cb7d2af1e59abca2352f00469f90d6009b2a0; PTX eee8bb584ba8557f3c6680f3901c9dd072f6fb8be0f0389f21a6bf0ac7dfac92; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -68798,33 +68800,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -68934,13 +68936,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -68963,35 +68965,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode bfb93816d3eb2756e1092d6f7f8ebea859a642e93279b9177feb3aa604c450a5; canonical IR c75d6f03df4fae85085280a5eee649951c396dc6a0a25ebeadca54d86a493606.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -68999,14 +69001,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 13e70f0d9b41dc657eb143da4bd571db025c7347b82cc8ca85c0aa50bdc5c19a; PTX 0ecad3ff0311a611bf200d8194f5b55d07e2f7e8a62e3aebec1078789d2bd5f4; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -69014,53 +69016,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 13e70f0d9b41dc657eb143da4bd571db025c7347b82cc8ca85c0aa50bdc5c19a; PTX 0ecad3ff0311a611bf200d8194f5b55d07e2f7e8a62e3aebec1078789d2bd5f4; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -69068,33 +69070,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -69205,13 +69207,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -69234,35 +69236,35 @@ { "backend": "llvm_nvptx", "mechanism": "inline_ptx", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode be9edc2447dfa0b2f412a918bca8c65316e6d104e01651c3ffb783c55da60767; canonical IR 304ee17c2325f899e49518450f51602a1511b0b6144ab51035923633607b1b91.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -69270,14 +69272,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 0ff3f0581f3253fd6277d9888cee45e568cd11b3f9aa1648c5ef59847729b196; PTX fe877234081dfb1e2de7fc7829e4fb32f969ceafc066f559bed70856ee76d341; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -69285,53 +69287,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 0ff3f0581f3253fd6277d9888cee45e568cd11b3f9aa1648c5ef59847729b196; PTX fe877234081dfb1e2de7fc7829e4fb32f969ceafc066f559bed70856ee76d341; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -69339,33 +69341,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -69477,13 +69479,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -69506,35 +69508,35 @@ { "backend": "llvm_nvptx", "mechanism": "inline_ptx", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode a187273ab5cf42bb8453c44a7dc6f12868f6458c37349b2f3a267ea9eeea8a7b; canonical IR f9f7da4245bcb759d8d2312ed19be0565a1f44127d535453d69b166f2fc749b4.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -69542,14 +69544,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 25ed2e0a2d7f7cebba2a7705f972689cd82dacc0ee808c9f0276df15b445ac16; PTX c42fd81a29b65aba246c3426b4f33d05aca80b7c027da42a0e3afb9406c3da5a; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -69557,53 +69559,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 25ed2e0a2d7f7cebba2a7705f972689cd82dacc0ee808c9f0276df15b445ac16; PTX c42fd81a29b65aba246c3426b4f33d05aca80b7c027da42a0e3afb9406c3da5a; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -69611,33 +69613,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -229108,13 +229110,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -229137,35 +229139,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode b90b1b6c4208eeb312b44c9c3494caf675c99c1cd5b0596f13347603fbccfe2f; canonical IR c1183a8ed7e19fe260da51de3ac27a8222c6f28d99466b9da6a1d0f375fb808f.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -229173,14 +229175,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 034376f88915dab5030d26883d1ffe29e1dc1ed09f3a19d94402186509026572; PTX 9a460cf935f93844e8a8efb6b5adf66071f68a7085019457b0f4060d8fef22c3; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -229188,53 +229190,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 034376f88915dab5030d26883d1ffe29e1dc1ed09f3a19d94402186509026572; PTX 9a460cf935f93844e8a8efb6b5adf66071f68a7085019457b0f4060d8fef22c3; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -229242,33 +229244,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -229373,13 +229375,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -229402,35 +229404,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode b386fc98703aa1f6e67e33df89de8d5f64dc97394ec19b519bfe7d9fad1b58ad; canonical IR d903c0af2796fc501a950d3702a0c5148d0374f1c862e97388112dadc7d9d79f.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -229438,14 +229440,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 99153e8944475f97a09b211bbbead885b4f280f8fe9c4fd4985e0b045f8083e4; PTX fa839061c256570295a3bd0b3a156e5acdafe8fdef37fa49309d5576e7b6e08c; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -229453,53 +229455,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 99153e8944475f97a09b211bbbead885b4f280f8fe9c4fd4985e0b045f8083e4; PTX fa839061c256570295a3bd0b3a156e5acdafe8fdef37fa49309d5576e7b6e08c; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -229507,33 +229509,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -229638,13 +229640,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -229667,35 +229669,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode e894c3bbf96f860d81764879bd373f7a8798e40927ad9e6e2aece86320eaf73e; canonical IR 6e126e70b3717156c435b8eea6c9bd53edb8a9aa4ea56af5644ecaf709497dc9.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -229703,14 +229705,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input b7e19938a7338de5766a3bfaba5d96b632c308085d0093d5053cefc6638c3bbc; PTX 6c0e437cd9e623360f26ed663c86ce3cce77c77e41614afd6a43bb304788d0ba; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -229718,53 +229720,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input b7e19938a7338de5766a3bfaba5d96b632c308085d0093d5053cefc6638c3bbc; PTX 6c0e437cd9e623360f26ed663c86ce3cce77c77e41614afd6a43bb304788d0ba; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -229772,33 +229774,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -229904,13 +229906,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -229933,35 +229935,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 3bc654c7a9d03d4a190db6f216f1290ad9d1add251d13f5b4fced5daec393b3d; canonical IR 2848f43455486c5f4ec8c7447af12743ac52ec0f36f1a553b110b021fe20eb2c.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -229969,14 +229971,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 0acb71ff6e03bc51b40ac1e5c0e5d62d77a3cabb4e26873456d0052db05425d0; PTX 7d3e865593af237eb6e0ff999491ac31c154eea8d4126ae266a949b18e4000ae; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -229984,53 +229986,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 0acb71ff6e03bc51b40ac1e5c0e5d62d77a3cabb4e26873456d0052db05425d0; PTX 7d3e865593af237eb6e0ff999491ac31c154eea8d4126ae266a949b18e4000ae; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -230038,33 +230040,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -230169,13 +230171,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -230198,35 +230200,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 847b0edc3cfe51da8cbcf0ec12f24a8c52f8c105e7566dac97ecc866f44df38e; canonical IR 4ec90d6af7ff11875291c2b17845826daeb6723d230d055b023c8981829fb1d3.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -230234,14 +230236,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input ccc4a2d9e134b008bb3131dc83895740c988e492bbc934e79dd07223f1937861; PTX 6d3499c10ef3b1282256f4b12802c67d8fe46bf25b9b2e8428b06244a258a27b; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -230249,53 +230251,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input ccc4a2d9e134b008bb3131dc83895740c988e492bbc934e79dd07223f1937861; PTX 6d3499c10ef3b1282256f4b12802c67d8fe46bf25b9b2e8428b06244a258a27b; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -230303,33 +230305,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -230434,13 +230436,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -230463,35 +230465,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode c2c0a3078136a5dc32ff7709a633f8363c4153cd595018d1242ac35310d26336; canonical IR 1662ad706c50df1f21722277dc4bcfb60e32bbe4fb114de96d112170bcb6aea3.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -230499,14 +230501,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input ea69a9b28d42294ead60b53eac1a129c3af9f53a321b734eb39fa3716dd42c83; PTX 02ed11051bb3fcd97bd49d8a3c7e92737376500d1ac018ab0e9c98d7d93dc1e2; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -230514,53 +230516,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input ea69a9b28d42294ead60b53eac1a129c3af9f53a321b734eb39fa3716dd42c83; PTX 02ed11051bb3fcd97bd49d8a3c7e92737376500d1ac018ab0e9c98d7d93dc1e2; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -230568,33 +230570,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -230700,13 +230702,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -230729,35 +230731,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 62852bac99ac31b4f9cd8148ca426b5a19206369c4786be9f92d8a67907c5ee3; canonical IR 01bed53f970711a88f32c51fe02f0c4b6c61e5a28d9d19ed2cb636adc97bb645.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -230765,14 +230767,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 4ed53bc44fb3f5383051847b0b0dcb9a8573cca09c816e8518e9cef3c6979fa9; PTX 5c4b24214435d505131900a38fd6e6ecfbc4b1bdd112066cb58fcc86e9ca6c69; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -230780,53 +230782,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 4ed53bc44fb3f5383051847b0b0dcb9a8573cca09c816e8518e9cef3c6979fa9; PTX 5c4b24214435d505131900a38fd6e6ecfbc4b1bdd112066cb58fcc86e9ca6c69; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -230834,33 +230836,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -230965,13 +230967,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -230994,35 +230996,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 996c98022d1e52214806002a9e2d04fac9b8b7cb824dcac0047894f07361bdc5; canonical IR b898ed733cfb96c9b64fb6bc046edf07d6664f88f9d2e0a7d9b6f69b2ebd908a.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -231030,14 +231032,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 0fc22041afb2d7adec4715f1ebd7acc418d6a4d87bef8190eac8260d82a9f117; PTX b4ef87b3c8c013b4374a326ca11fa7422056ad6ce0b28bcc96160434991512db; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -231045,53 +231047,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 0fc22041afb2d7adec4715f1ebd7acc418d6a4d87bef8190eac8260d82a9f117; PTX b4ef87b3c8c013b4374a326ca11fa7422056ad6ce0b28bcc96160434991512db; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -231099,33 +231101,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -231230,13 +231232,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -231259,35 +231261,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode ddffce2e49822e170d5c18b08e1a7ac526a347b28a6d7e7e56b6f2b357664e0d; canonical IR fd9c0cac606566f82e72a554d99c42afe6753e6befb7a825467bd363ac1065d8.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -231295,14 +231297,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 69cba07ac6cf5b9549b893d23193d9ddc6d41e23c7cfa91a99be8341afae3fb7; PTX ce2e2c5cb48b36abd59a7d948bf0971982b6ca0b0ff029da5455a209fa1921cb; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -231310,53 +231312,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 69cba07ac6cf5b9549b893d23193d9ddc6d41e23c7cfa91a99be8341afae3fb7; PTX ce2e2c5cb48b36abd59a7d948bf0971982b6ca0b0ff029da5455a209fa1921cb; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -231364,33 +231366,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -231496,13 +231498,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -231525,35 +231527,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 668877e65c649511fe67669c239a36a829d346722be1fba394b6239bae020c58; canonical IR 32c57aeb44f7e4f622445748400354b39447d2155776cdcc200e5dfe752d296f.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -231561,14 +231563,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 4c2086c8726ffaeafea1c17fc5628c3d9f26bd6700921da2bd55a5eba332ec49; PTX dfa8b8ad9d76a5df7bb842bfc0e9c1f974b33c528d14c820db04e99fde9599be; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -231576,53 +231578,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 4c2086c8726ffaeafea1c17fc5628c3d9f26bd6700921da2bd55a5eba332ec49; PTX dfa8b8ad9d76a5df7bb842bfc0e9c1f974b33c528d14c820db04e99fde9599be; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -231630,33 +231632,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -231761,13 +231763,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -231790,35 +231792,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 49887f8e3e0513873ed4eb2f50ad85cfffdec9bbd146bb5ea9e761d06bfa376e; canonical IR 04f77581c93c253802656a4c34f11a578cea1eac74a6e210b9589d6a28509fb4.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -231826,14 +231828,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 476323a9997468694c0f804d68cc12ecd9ffe843ed46e7c342199e981a0f1665; PTX 294a215ea45217f30e5a271f05514d31dc9de9c47bdab355cc70db82903cfdb7; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -231841,53 +231843,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 476323a9997468694c0f804d68cc12ecd9ffe843ed46e7c342199e981a0f1665; PTX 294a215ea45217f30e5a271f05514d31dc9de9c47bdab355cc70db82903cfdb7; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -231895,33 +231897,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } @@ -232026,13 +232028,13 @@ "execution_scope": "thread" }, "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "2.0", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] }, @@ -232055,35 +232057,35 @@ { "backend": "llvm_nvptx", "mechanism": "typed_nvvm", - "evidence_profile": "rust-llvm-23.1.3-aab11ee0", + "evidence_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "3.2", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 20 } ] } }, "version": "LLVM version 23.1.3-rust-1.101.0-nightly", - "sha256": "7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449", - "artifact_path": null, + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate typed LLVM declaration probes", + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", "stage": "declaration_canonicalization", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d.", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode edcc72559512cd001cc6a769b6af6481106dc9817ebc290c519f9b4b7da1372d; canonical IR 6f2f7658c3dbf5f86d29d6173dd89d49ff003a46805b70523a8f1f62c923042c.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -232091,14 +232093,14 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_20", + "ptx32" ], - "representation": "separate probes for the recorded lowering mechanism", + "representation": "one retained scalar operation per generated LLVM probe", "stage": "backend_codegen", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 7697785ef64c733f2a1c90474449fcfabea10a09646ff8dc3d9e7b9bf1823add; PTX 2370b3fa3a374b125a36c1dd37591eb3561835dd7006852989eee3b0a7af479a; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -232106,53 +232108,53 @@ }, { "targets": [ - "sm_80", - "ptx70" + "sm_75", + "ptx32" ], - "representation": "separate PTX outputs assembled for the recorded target", + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", "stage": "ptx_assembly", "mechanism": "typed_nvvm", "outcome": "succeeded", - "detail": "Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb.", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 7697785ef64c733f2a1c90474449fcfabea10a09646ff8dc3d9e7b9bf1823add; PTX 2370b3fa3a374b125a36c1dd37591eb3561835dd7006852989eee3b0a7af479a; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0", - "tool_sha256": "afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" } ] }, { "backend": "lib_nvvm", "mechanism": "inline_ptx", - "evidence_profile": "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic", + "evidence_profile": "cuda-13.3-sm75-scalar-arithmetic", "target": { - "minimum_ptx": "7.0", + "minimum_ptx": "6.3", "hardware": { "kind": "any_of", "alternatives": [ { "kind": "minimum_sm", - "sm": 80 + "sm": 75 } ] } }, - "version": "CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2", - "sha256": "b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0", - "artifact_path": "/usr/local/cuda-13.3/nvvm/lib64/libnvvm.so.4.0.0", - "build_id_prefix": "2330c0", + "version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "build_id_prefix": null, "status": "validated", "stages": [ { "targets": [ - "compute_80", + "compute_75", "ptx93" ], - "representation": "44 pure inline-PTX scalar arithmetic calls in one retained NVVM IR kernel", + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", "stage": "backend_codegen", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": null, "tool_path": null, "tool_version": null, @@ -232160,33 +232162,33 @@ }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "libNVVM-emitted PTX retaining all 44 scalar arithmetic forms", + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", "stage": "ptx_assembly", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/bin/ptxas", - "tool_version": "Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0", - "tool_sha256": "7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" }, { "targets": [ - "sm_80", + "sm_75", "ptx93" ], - "representation": "retained libNVVM LTOIR linked to an sm_80 cubin", + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", "stage": "device_link", "mechanism": "inline_ptx", "outcome": "succeeded", - "detail": "CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section.", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", "artifact_kind": "cubin", - "tool_path": "/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33", - "tool_version": "nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33", - "tool_sha256": "3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8" + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" } ] } diff --git a/cuda-oxide/intrinsics/evidence/cuda-13.3-sm75-scalar-arithmetic.json b/cuda-oxide/intrinsics/evidence/cuda-13.3-sm75-scalar-arithmetic.json new file mode 100644 index 0000000000..e5539abf20 --- /dev/null +++ b/cuda-oxide/intrinsics/evidence/cuda-13.3-sm75-scalar-arithmetic.json @@ -0,0 +1,5317 @@ +{ + "schema": 5, + "backend_profile": "cuda-13.3-sm75-scalar-arithmetic", + "backend_kind": "lib_nvvm", + "llvm_revision": "not-applicable-libnvvm-ir-2.0", + "backend_version": "CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2", + "backend_sha256": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "artifact_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll", + "nvvm_ir_version": "2.0", + "debug_ir_version": "3.2", + "records": [ + { + "id": "add_rm_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rm_f" + }, + "llvm_symbol": "llvm.nvvm.add.rm.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rm", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rm_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rm_d" + }, + "llvm_symbol": "llvm.nvvm.add.rm.d", + "llvm_arguments": [ + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rm", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rm_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rm_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.add.rm.ftz.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rm", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rm_ftz_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rm_ftz_sat_f" + }, + "llvm_symbol": "llvm.nvvm.add.rm.ftz.sat.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rm", + "sat", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rm_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rm_sat_f" + }, + "llvm_symbol": "llvm.nvvm.add.rm.sat.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rm", + "sat", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rn_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rn_f" + }, + "llvm_symbol": "llvm.nvvm.add.rn.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rn", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rn_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rn_d" + }, + "llvm_symbol": "llvm.nvvm.add.rn.d", + "llvm_arguments": [ + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rn", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rn_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rn_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.add.rn.ftz.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rn", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rn_ftz_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rn_ftz_sat_f" + }, + "llvm_symbol": "llvm.nvvm.add.rn.ftz.sat.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rn", + "sat", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rn_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rn_sat_f" + }, + "llvm_symbol": "llvm.nvvm.add.rn.sat.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rn", + "sat", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rp_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rp_f" + }, + "llvm_symbol": "llvm.nvvm.add.rp.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rp", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rp_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rp_d" + }, + "llvm_symbol": "llvm.nvvm.add.rp.d", + "llvm_arguments": [ + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rp", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rp_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rp_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.add.rp.ftz.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rp", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rp_ftz_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rp_ftz_sat_f" + }, + "llvm_symbol": "llvm.nvvm.add.rp.ftz.sat.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rp", + "sat", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rp_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rp_sat_f" + }, + "llvm_symbol": "llvm.nvvm.add.rp.sat.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rp", + "sat", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rz_f" + }, + "llvm_symbol": "llvm.nvvm.add.rz.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rz_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rz_d" + }, + "llvm_symbol": "llvm.nvvm.add.rz.d", + "llvm_arguments": [ + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rz", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rz_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rz_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.add.rz.ftz.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rz", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rz_ftz_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rz_ftz_sat_f" + }, + "llvm_symbol": "llvm.nvvm.add.rz.ftz.sat.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rz", + "sat", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rz_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rz_sat_f" + }, + "llvm_symbol": "llvm.nvvm.add.rz.sat.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rz", + "sat", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "div_rm_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_div_rm_f" + }, + "llvm_symbol": "llvm.nvvm.div.rm.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "div", + "modifiers": [ + "rm", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "div_rm_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_div_rm_d" + }, + "llvm_symbol": "llvm.nvvm.div.rm.d", + "llvm_arguments": [ + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "div", + "modifiers": [ + "rm", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "div_rm_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_div_rm_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.div.rm.ftz.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "div", + "modifiers": [ + "rm", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "div_rn_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_div_rn_f" + }, + "llvm_symbol": "llvm.nvvm.div.rn.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "div", + "modifiers": [ + "rn", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "div_rn_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_div_rn_d" + }, + "llvm_symbol": "llvm.nvvm.div.rn.d", + "llvm_arguments": [ + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "div", + "modifiers": [ + "rn", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "div_rn_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_div_rn_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.div.rn.ftz.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "div", + "modifiers": [ + "rn", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "div_rp_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_div_rp_f" + }, + "llvm_symbol": "llvm.nvvm.div.rp.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "div", + "modifiers": [ + "rp", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "div_rp_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_div_rp_d" + }, + "llvm_symbol": "llvm.nvvm.div.rp.d", + "llvm_arguments": [ + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "div", + "modifiers": [ + "rp", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "div_rp_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_div_rp_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.div.rp.ftz.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "div", + "modifiers": [ + "rp", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "div_rz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_div_rz_f" + }, + "llvm_symbol": "llvm.nvvm.div.rz.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "div", + "modifiers": [ + "rz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "div_rz_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_div_rz_d" + }, + "llvm_symbol": "llvm.nvvm.div.rz.d", + "llvm_arguments": [ + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "div", + "modifiers": [ + "rz", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "div_rz_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_div_rz_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.div.rz.ftz.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "div", + "modifiers": [ + "rz", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rm_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rm_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rm.f", + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rm", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rm_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rm_d" + }, + "llvm_symbol": "llvm.nvvm.fma.rm.d", + "llvm_arguments": [ + "f64", + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rm", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rm_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rm_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rm.ftz.f", + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rm", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rm_ftz_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rm_ftz_sat_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rm.ftz.sat.f", + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rm", + "ftz", + "sat", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rm_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rm_sat_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rm.sat.f", + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rm", + "sat", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rn_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rn_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rn.f", + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rn", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rn_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rn_d" + }, + "llvm_symbol": "llvm.nvvm.fma.rn.d", + "llvm_arguments": [ + "f64", + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rn", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rn_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rn_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rn.ftz.f", + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rn", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rn_ftz_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rn_ftz_sat_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rn.ftz.sat.f", + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rn", + "ftz", + "sat", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rn_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rn_sat_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rn.sat.f", + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rn", + "sat", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rp_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rp_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rp.f", + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rp", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rp_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rp_d" + }, + "llvm_symbol": "llvm.nvvm.fma.rp.d", + "llvm_arguments": [ + "f64", + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rp", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rp_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rp_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rp.ftz.f", + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rp", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rp_ftz_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rp_ftz_sat_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rp.ftz.sat.f", + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rp", + "ftz", + "sat", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rp_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rp_sat_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rp.sat.f", + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rp", + "sat", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rz_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rz.f", + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rz_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rz_d" + }, + "llvm_symbol": "llvm.nvvm.fma.rz.d", + "llvm_arguments": [ + "f64", + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rz", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rz_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rz_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rz.ftz.f", + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rz", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rz_ftz_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rz_ftz_sat_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rz.ftz.sat.f", + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rz", + "ftz", + "sat", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rz_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rz_sat_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rz.sat.f", + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rz", + "sat", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "mul_rm_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mul_rm_f" + }, + "llvm_symbol": "llvm.nvvm.mul.rm.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "mul", + "modifiers": [ + "rm", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "mul_rm_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mul_rm_d" + }, + "llvm_symbol": "llvm.nvvm.mul.rm.d", + "llvm_arguments": [ + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "mul", + "modifiers": [ + "rm", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "mul_rm_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mul_rm_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.mul.rm.ftz.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "mul", + "modifiers": [ + "rm", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "mul_rn_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mul_rn_f" + }, + "llvm_symbol": "llvm.nvvm.mul.rn.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "mul", + "modifiers": [ + "rn", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "mul_rn_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mul_rn_d" + }, + "llvm_symbol": "llvm.nvvm.mul.rn.d", + "llvm_arguments": [ + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "mul", + "modifiers": [ + "rn", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "mul_rn_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mul_rn_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.mul.rn.ftz.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "mul", + "modifiers": [ + "rn", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "mul_rp_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mul_rp_f" + }, + "llvm_symbol": "llvm.nvvm.mul.rp.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "mul", + "modifiers": [ + "rp", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "mul_rp_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mul_rp_d" + }, + "llvm_symbol": "llvm.nvvm.mul.rp.d", + "llvm_arguments": [ + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "mul", + "modifiers": [ + "rp", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "mul_rp_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mul_rp_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.mul.rp.ftz.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "mul", + "modifiers": [ + "rp", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "mul_rz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mul_rz_f" + }, + "llvm_symbol": "llvm.nvvm.mul.rz.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "mul", + "modifiers": [ + "rz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "mul_rz_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mul_rz_d" + }, + "llvm_symbol": "llvm.nvvm.mul.rz.d", + "llvm_arguments": [ + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "mul", + "modifiers": [ + "rz", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "mul_rz_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mul_rz_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.mul.rz.ftz.f", + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "compute_75", + "ptx_feature": "PTX ISA 6.3 minimum; CUDA 13.3 emits PTX 9.3", + "status": "validated", + "runtime_validation": "unexecuted", + "stages": [ + { + "targets": [ + "compute_75", + "ptx93" + ], + "representation": "64 inline-PTX scalar arithmetic kernels compiled from NVVM IR 2.0", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-emitted PTX retaining every expected scalar operation", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + { + "targets": [ + "sm_75", + "ptx93" + ], + "representation": "libNVVM-generated LTO IR linked to cubin; all 64 kernel text sections retained through llvm.used", + "stage": "device_link", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll", + "tool_version": "nvJitLinkVersion 13.3", + "tool_sha256": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613" + } + ], + "expected_ptx": { + "mnemonic": "mul", + "modifiers": [ + "rz", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + } + ] +} diff --git a/cuda-oxide/intrinsics/evidence/rust-llvm-23.1.3-aab11ee0-scalar-baseline.json b/cuda-oxide/intrinsics/evidence/rust-llvm-23.1.3-aab11ee0-scalar-baseline.json new file mode 100644 index 0000000000..14fa455ae0 --- /dev/null +++ b/cuda-oxide/intrinsics/evidence/rust-llvm-23.1.3-aab11ee0-scalar-baseline.json @@ -0,0 +1,5655 @@ +{ + "schema": 5, + "backend_profile": "rust-llvm-23.1.3-aab11ee0-scalar-baseline", + "backend_kind": "llvm_nvptx", + "llvm_revision": "aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019", + "backend_version": "LLVM version 23.1.3-rust-1.101.0-nightly", + "backend_sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224", + "artifact_path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", + "records": [ + { + "id": "add_rm_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rm_f" + }, + "llvm_symbol": "llvm.nvvm.add.rm.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode f9934d1038a5552cdf55ce0f17df5fcc611c849a241e8453cf3e3f3cf0c15962; canonical IR 8f0ad3024811995830aa253f4ab6c5d75fc39845e2275aabfa13fd8cb942d2d5." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e418177b0c9db7c7573a1dedd369d535ac67ec84b286bc05bed2946bc03dccfc; PTX 81609f9d41d2c795c42f21971cfc190b12f58e3963e328f7f4bf610259c4222d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e418177b0c9db7c7573a1dedd369d535ac67ec84b286bc05bed2946bc03dccfc; PTX 81609f9d41d2c795c42f21971cfc190b12f58e3963e328f7f4bf610259c4222d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rm", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rm_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rm_d" + }, + "llvm_symbol": "llvm.nvvm.add.rm.d", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "concrete_llvm_arguments": [ + "f64", + "f64" + ], + "concrete_llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode bc7f42e0ec5e6483a919837745374eac40281d09f39f28b62c9a75a79fdbb218; canonical IR f3e0c65a40fe5423b8a24ae43593534ed7416ba36180ea74e9d9d56c08178ec2." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 1f3369b959c0ef2aed77091fcd2d3a0736d68a552214b4c56f5d602c806aac12; PTX 78c1ddfd01dc81fe4378cf8eb8ebd1ff0fdf831a4fec301c5ef793d81e12157d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 1f3369b959c0ef2aed77091fcd2d3a0736d68a552214b4c56f5d602c806aac12; PTX 78c1ddfd01dc81fe4378cf8eb8ebd1ff0fdf831a4fec301c5ef793d81e12157d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rm", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rm_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rm_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.add.rm.ftz.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode aa0f77b09603061feab0dc368c0cf23b9718861dfce22e3fc639a6f5ae016b31; canonical IR 6e055be48461eb4ee303d2e2872323b37704ca69db86070cce202079a607022b." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input c5a5565c9597cd3362f58c0ccfeb4e75aff31c586f4aa44f11d1e8eff84bd60e; PTX 324a4ae4a929760832863e3abb0c36808ea3e985eee55e3c941d1baac2403bf9; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input c5a5565c9597cd3362f58c0ccfeb4e75aff31c586f4aa44f11d1e8eff84bd60e; PTX 324a4ae4a929760832863e3abb0c36808ea3e985eee55e3c941d1baac2403bf9; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rm", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rm_ftz_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rm_ftz_sat_f" + }, + "llvm_symbol": "llvm.nvvm.add.rm.ftz.sat.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 4b064c89e5c841dd226829c91b04b7ebfffa55127d7ae8b7da0f7d1a3fb4eda8; canonical IR 4286a12c568dd9269a56d3360215fc8e8e871018627316858f4522243bd9c2e2." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input ce537f54d195eb09538ee0c08ec330fbb0e0d5328ba70686392b44c9943f1f40; PTX 5bfe9e86147ea594b8bb474ebeca67191a4c8c3f3e66a3099b7d50e4542f6d46; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input ce537f54d195eb09538ee0c08ec330fbb0e0d5328ba70686392b44c9943f1f40; PTX 5bfe9e86147ea594b8bb474ebeca67191a4c8c3f3e66a3099b7d50e4542f6d46; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rm", + "sat", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rm_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rm_sat_f" + }, + "llvm_symbol": "llvm.nvvm.add.rm.sat.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode b3df4e3cac222e5f24e857258eaff059b7b0381d691f7932f4b0550bde04e0ea; canonical IR b043345b6aeeb8b04d10d9175f0aa42c81f83cec8aef11d01cffae0733f1e3ef." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e5eb11903f065bbb151bb5ed9d8fb0eb42ae76fd0fb96df02711c774831a866a; PTX 07f1a2d8dab15e1e31ab5686ae546fb5778d0f0765baa6edf9ac198dcb333539; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e5eb11903f065bbb151bb5ed9d8fb0eb42ae76fd0fb96df02711c774831a866a; PTX 07f1a2d8dab15e1e31ab5686ae546fb5778d0f0765baa6edf9ac198dcb333539; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rm", + "sat", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rn_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rn_f" + }, + "llvm_symbol": "llvm.nvvm.add.rn.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 4906c68b31a587e0533836e64102c875cf374a29f4f74f70bc25fad881e09245; canonical IR 86b1abe44c429b97cda1b9d1db97daa3c7ee30e31ea2cf2cb79fb54d357222a1." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input b45258cd817947f5b638831e7de967eb468c87ccf28f611c5b696c0c0b98f0ab; PTX abd80cdfde171f0256da6b509e6aa9d1f2b722e7a6130df8bdd8a6e6f5ebd3b3; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input b45258cd817947f5b638831e7de967eb468c87ccf28f611c5b696c0c0b98f0ab; PTX abd80cdfde171f0256da6b509e6aa9d1f2b722e7a6130df8bdd8a6e6f5ebd3b3; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rn", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rn_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rn_d" + }, + "llvm_symbol": "llvm.nvvm.add.rn.d", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "concrete_llvm_arguments": [ + "f64", + "f64" + ], + "concrete_llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 00eef432ee19e5943038373c6dee49e3bfe18bf9b59402da3af2c57b8f7293d3; canonical IR 743bacc01c90edc19678a94fef121801f06b0674da1fa8d5e76fa6e19f1f30d5." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e55c7674226a23532f5bb5328d349920a690c46d15f0a7aa7a89852ca7a81928; PTX 32662ead78cd9c57c9815970abd619a42754dc8528c330aeba837091faa03c35; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e55c7674226a23532f5bb5328d349920a690c46d15f0a7aa7a89852ca7a81928; PTX 32662ead78cd9c57c9815970abd619a42754dc8528c330aeba837091faa03c35; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rn", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rn_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rn_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.add.rn.ftz.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 714587e2cd143d7c81ae5cf1a2cc5c708765e3012c58c9fe8875f49db12be16d; canonical IR e292a3eaf055ee6842e1fff1eda21edfcd00cf9c10d10b3496092a677013a603." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input c0ffb157cf77ca925bedcf8e54c05a917d41e39346039cf9aa5abfafe68bb93a; PTX 1bd431d9af5cd36fcfcf384185e639c3cc8259823cff60449f82db6f1ab54fea; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input c0ffb157cf77ca925bedcf8e54c05a917d41e39346039cf9aa5abfafe68bb93a; PTX 1bd431d9af5cd36fcfcf384185e639c3cc8259823cff60449f82db6f1ab54fea; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rn", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rn_ftz_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rn_ftz_sat_f" + }, + "llvm_symbol": "llvm.nvvm.add.rn.ftz.sat.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 4051efd46840af83910aff88e4c36e9cf47aff9107fdc7087af8093f4c5d8241; canonical IR 2493f5e594bc53e9508d95ac95d4ee282efcc089aa7ed83e88bff34cd8c44242." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input dec89dc152625c26a321d7f0b80e2feb017c0142e705ddb70067e5617f1fa327; PTX edf6fe12657789f0360aba76a60b3fdcf92d9b5e761859dd283513c32ac4b9a4; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input dec89dc152625c26a321d7f0b80e2feb017c0142e705ddb70067e5617f1fa327; PTX edf6fe12657789f0360aba76a60b3fdcf92d9b5e761859dd283513c32ac4b9a4; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rn", + "sat", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rn_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rn_sat_f" + }, + "llvm_symbol": "llvm.nvvm.add.rn.sat.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 5896c2c6cdf94a8f2e94037455158eaa52a454cb5b6d17e91d0278ec073aed42; canonical IR c3034f8ba93e6c37f8a510d7d8d272c02432162d8a748adc3de3c8846135ebbb." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input f884bd3746714ea7b3d8a3e5e53d975d49446bb049984568c659f184a7f08906; PTX 31b7693cd7be0022424ca48fbe0ad167c77ac540a14685ae4ecd82c903f7d985; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input f884bd3746714ea7b3d8a3e5e53d975d49446bb049984568c659f184a7f08906; PTX 31b7693cd7be0022424ca48fbe0ad167c77ac540a14685ae4ecd82c903f7d985; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rn", + "sat", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rp_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rp_f" + }, + "llvm_symbol": "llvm.nvvm.add.rp.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode f751d4889e5442fe29adaacbcdcbfeed6047a5a806740b9ae070c7713b0bff28; canonical IR 92f40d69575bb2ec86d1f9836719dd74ef86949d97ac301df47e2a5ce6cad2f1." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 744b25875d7093e7fd5e06a09dbb18b9bda9343d139a15fa45f98af2bbd69151; PTX 2b295f742d60f76d98f09523c5e36f5588132f0f52df5a4fc47f2a54809fb6b4; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 744b25875d7093e7fd5e06a09dbb18b9bda9343d139a15fa45f98af2bbd69151; PTX 2b295f742d60f76d98f09523c5e36f5588132f0f52df5a4fc47f2a54809fb6b4; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rp", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rp_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rp_d" + }, + "llvm_symbol": "llvm.nvvm.add.rp.d", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "concrete_llvm_arguments": [ + "f64", + "f64" + ], + "concrete_llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode fa037bb4c69ca5dbb1517a9ae359e58dc559cb985517b467d84946888113f540; canonical IR 756573f679fe11ecfa849dc94ae0164bdb108c02c7774cc37e027b81139da131." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input a43a1bdd8898a1348218e57e0b0cc8a6d34a10bd148857f782d4568947353688; PTX c93b6ea5ce08636f3477781e157c42792144fa710101dca84803ec0d727180be; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input a43a1bdd8898a1348218e57e0b0cc8a6d34a10bd148857f782d4568947353688; PTX c93b6ea5ce08636f3477781e157c42792144fa710101dca84803ec0d727180be; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rp", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rp_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rp_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.add.rp.ftz.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 30afff6d95731313be20be9fc9a5915870a502c69a51ab635f072eb997efc210; canonical IR f6b44a6e746a49e7a299d1da424a6bced1181eab104768ca5295740133b39cd2." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 55cf1156ccc21305c842b6f6e622f4858499e0ddce52fc5c0b4eba00f85a7503; PTX 62f02c47ca6e38b49d7224cd07b962278e8edf7b5e244c3f472f0c11f7f5b41a; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 55cf1156ccc21305c842b6f6e622f4858499e0ddce52fc5c0b4eba00f85a7503; PTX 62f02c47ca6e38b49d7224cd07b962278e8edf7b5e244c3f472f0c11f7f5b41a; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rp", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rp_ftz_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rp_ftz_sat_f" + }, + "llvm_symbol": "llvm.nvvm.add.rp.ftz.sat.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode deeaf0c1aa02868245e3dc087ee1cc0d3716ad73acf402a95e58309ee95f07ce; canonical IR bb60971343d60d8084295441a8d7f7db974afd220d994660224abd3a203b3a10." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input cf99f5e2a7fec608b19984b80f04669853cb9cca3b92b43a5eae0f5e5e5a41bf; PTX a30e859f828718fe375c6376d4678d659d73c1c71ee0b0f01cad23d560d94588; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input cf99f5e2a7fec608b19984b80f04669853cb9cca3b92b43a5eae0f5e5e5a41bf; PTX a30e859f828718fe375c6376d4678d659d73c1c71ee0b0f01cad23d560d94588; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rp", + "sat", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rp_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rp_sat_f" + }, + "llvm_symbol": "llvm.nvvm.add.rp.sat.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 7f58f2252b0ddbcb7ee8e4fe2ebffcaca74d630b8724c5f7a3a170948e4c0f55; canonical IR 9a9d02d9bbfd0a6c00a1aba05fb2e6c8ddf83a74b95aea1cd89758407b2669ff." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 9dc7f6935783ce5d9607ac76b90936509f8e4423ac6a362ea588200179e58995; PTX dced750c42722c8d011f4aa0b0be18e41f86a733ac23a27540aaa09cd5a2d4a7; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 9dc7f6935783ce5d9607ac76b90936509f8e4423ac6a362ea588200179e58995; PTX dced750c42722c8d011f4aa0b0be18e41f86a733ac23a27540aaa09cd5a2d4a7; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rp", + "sat", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rz_f" + }, + "llvm_symbol": "llvm.nvvm.add.rz.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 2a2ce18cd71fe1c891023cc15787bd9e2b74e226d7f4d5f5c4f588481a1a55b4; canonical IR a62381d4152598867d2c00a12a539f92ee42f3e53826aa93374f6b6d7bf95774." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 89e825a3ced8de0eae4f18951bf4f8ca2071c495e1f057788aacb008e564c9c9; PTX 2c916b685c9b74f29e787af934794e4d7f993976722c1cefa2572851b6d300cc; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 89e825a3ced8de0eae4f18951bf4f8ca2071c495e1f057788aacb008e564c9c9; PTX 2c916b685c9b74f29e787af934794e4d7f993976722c1cefa2572851b6d300cc; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rz_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rz_d" + }, + "llvm_symbol": "llvm.nvvm.add.rz.d", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "concrete_llvm_arguments": [ + "f64", + "f64" + ], + "concrete_llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode bcea3bd9a8706c996ef0a934e039e7473f5a1aa849e6de40fbe05f1840da6dbe; canonical IR 261944c7ac7b765072275a41eac4f83e443c70f7600d3ef57f5f06821760e71d." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 10e608479b1706000af7524c4f3bdf3f7cf0ef1a20092c0e55590d19d7a2c81d; PTX 1a7dfcf431854618ba81b43b833d56cc743dd848f8f5b71c34641d644726862b; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 10e608479b1706000af7524c4f3bdf3f7cf0ef1a20092c0e55590d19d7a2c81d; PTX 1a7dfcf431854618ba81b43b833d56cc743dd848f8f5b71c34641d644726862b; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rz", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rz_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rz_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.add.rz.ftz.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode d4dadf6ee4eb21a92873d6f9662158656b7ca18f0a84a823f6affa7697406ead; canonical IR 961a89f3d7517a81429159fef786b2c083227aed53b431af09485eb1b0632538." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 1e4e9b8674798f340b738cd96cc1ac09faeb3cf19c362daceffb2799b434d721; PTX 7618a645d06a5c968510e353670b2aa44c3348d9ab3cc26d0a20abbf3cb335ad; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 1e4e9b8674798f340b738cd96cc1ac09faeb3cf19c362daceffb2799b434d721; PTX 7618a645d06a5c968510e353670b2aa44c3348d9ab3cc26d0a20abbf3cb335ad; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rz", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rz_ftz_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rz_ftz_sat_f" + }, + "llvm_symbol": "llvm.nvvm.add.rz.ftz.sat.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode d6373b162715e509c2ac22077358477b7d825f7da0519c78bf88b3d9b8a6d5cf; canonical IR edad3cbd88093c18d9a600d49bd4ef24e71000bd2c2965a1581febabc0982c11." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input df43766ad4fd2acde4a73dc43c763eae01c5b0ea5d1ca2c0645676fded0a44fd; PTX 4cd16d8f5eed14a0e2935148533ec0c6db2bf5462cda30893b266d037cdadfa6; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input df43766ad4fd2acde4a73dc43c763eae01c5b0ea5d1ca2c0645676fded0a44fd; PTX 4cd16d8f5eed14a0e2935148533ec0c6db2bf5462cda30893b266d037cdadfa6; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rz", + "sat", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "add_rz_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_add_rz_sat_f" + }, + "llvm_symbol": "llvm.nvvm.add.rz.sat.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 6ab5896ae055db562e3de871a22baa8853dd3af1a4e64c8e8fb99a24cd372631; canonical IR 9c7b2e39b1c83b8ea1548f1c26b90d92924e8734c89f3c1a024ccaef436a571b." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 21ab2a705aaf3c687dfe1499c95381a768647f73193804f351e9d8b37778f1b9; PTX 9fc0426b3db8fe567a0cf26c573cd8f178d5777a8b144fc223811aee92ff9fe1; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 21ab2a705aaf3c687dfe1499c95381a768647f73193804f351e9d8b37778f1b9; PTX 9fc0426b3db8fe567a0cf26c573cd8f178d5777a8b144fc223811aee92ff9fe1; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "add", + "modifiers": [ + "rz", + "sat", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "div_rm_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_div_rm_f" + }, + "llvm_symbol": "llvm.nvvm.div.rm.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 4f65929b0778fc4e60e852b68a8b80015704712e34a80c1b00d58574f383cb83; canonical IR 881f29eadb6fe5033bede3eb73b71fdbb822d50fe9de999784fb465e8f2e8b9d." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e64302ecae10b7565d9734062e42a34b9bb580f8f19f433bf20cd96fb4001eb7; PTX 918681e921e79b02f50fd02b0e3bdba181daafcfc1f9d888d0c4114368c79842; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e64302ecae10b7565d9734062e42a34b9bb580f8f19f433bf20cd96fb4001eb7; PTX 918681e921e79b02f50fd02b0e3bdba181daafcfc1f9d888d0c4114368c79842; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "div", + "modifiers": [ + "rm", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "div_rm_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_div_rm_d" + }, + "llvm_symbol": "llvm.nvvm.div.rm.d", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "concrete_llvm_arguments": [ + "f64", + "f64" + ], + "concrete_llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 98eb91e439f3018ae1421d7588f9beead3ef1e27ba544a5bab28a78ac31e7307; canonical IR f965b4b829e00e2569be716b8f8c460dcb05aed9f7c38d65dcad43b576890be0." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input dc5c17b9371227026a8ba8049611debe66237ea5524cb5c264c86eb6a8b6cb82; PTX 4ff2dae1ed54430167e79baff2620975eb201b2978c12fa7805e9c278b1dacf0; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input dc5c17b9371227026a8ba8049611debe66237ea5524cb5c264c86eb6a8b6cb82; PTX 4ff2dae1ed54430167e79baff2620975eb201b2978c12fa7805e9c278b1dacf0; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "div", + "modifiers": [ + "rm", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "div_rm_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_div_rm_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.div.rm.ftz.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 2b91e12e8fee2ade6958192f8c46349bbe8f3bfde8c33b60251ab3849c0e2f0d; canonical IR 09cb0d4613d535f3fab705d2b2c5dd5620df1ab76436515abf068f6117169334." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 45edec0ac37ea1ce73e890423d94409da024e81bde096759ef7f403505a77bc9; PTX 11fd263e2af81736c9de306c3d999d35fb5e85b3bafa066194fbed06b9b5cb35; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 45edec0ac37ea1ce73e890423d94409da024e81bde096759ef7f403505a77bc9; PTX 11fd263e2af81736c9de306c3d999d35fb5e85b3bafa066194fbed06b9b5cb35; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "div", + "modifiers": [ + "rm", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "div_rn_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_div_rn_f" + }, + "llvm_symbol": "llvm.nvvm.div.rn.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode c8f094ad7fe975839748a01d0710de7d5a7c1a82ef87faeedb6ad4bfae05e304; canonical IR d58032888364b71e28147a64a0d6593dff99cb8a98dff79c01e00db5265e55fc." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 70d667e3e5a210087b074a59d905cec7541a295eaacbc2efd97792570780e196; PTX e0b39f1f88d67360fa4a89b086bf1fe943b3cac96a2109c4f0985931deaaae9c; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 70d667e3e5a210087b074a59d905cec7541a295eaacbc2efd97792570780e196; PTX e0b39f1f88d67360fa4a89b086bf1fe943b3cac96a2109c4f0985931deaaae9c; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "div", + "modifiers": [ + "rn", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "div_rn_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_div_rn_d" + }, + "llvm_symbol": "llvm.nvvm.div.rn.d", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "concrete_llvm_arguments": [ + "f64", + "f64" + ], + "concrete_llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 111c4133fdac8a40e94ef182b6690286bef66dc47434ae1321354dc49cb04f47; canonical IR c6164908f74bdafdeefaf52b1a0458cb42b788e83b0dc459f9ea1659dd90d0d9." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 5fa9bb1f4f3960d7205c2f51d22c9495c1d5f84c286fc69af0b37294f4d50f40; PTX 12e2c0e9618b2d9ff96a3522c9826c4fef4bf95baccbab27bf40ae23bb9d5acf; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 5fa9bb1f4f3960d7205c2f51d22c9495c1d5f84c286fc69af0b37294f4d50f40; PTX 12e2c0e9618b2d9ff96a3522c9826c4fef4bf95baccbab27bf40ae23bb9d5acf; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "div", + "modifiers": [ + "rn", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "div_rn_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_div_rn_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.div.rn.ftz.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode a61ab19a202eaa31b721d753a15b2d930600da7261cd9cd47d43bbad0901e59e; canonical IR e976bc7be4c74be02e50e01004cd6b80c662222a5302d57233ccfb4a3f736a2b." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e17a37dd7db077eeb29e37f339cc2079ac2b56493d30ffa84140bac16d9fb672; PTX 271a96d5492a80359857e23bc83a9e45cecfa626404c2cb5088a2ce3a14f6270; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e17a37dd7db077eeb29e37f339cc2079ac2b56493d30ffa84140bac16d9fb672; PTX 271a96d5492a80359857e23bc83a9e45cecfa626404c2cb5088a2ce3a14f6270; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "div", + "modifiers": [ + "rn", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "div_rp_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_div_rp_f" + }, + "llvm_symbol": "llvm.nvvm.div.rp.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode ddc0b85220df5c6bd83cc79d351d0af9b0202230a9b33fa537eabbcc7be500ac; canonical IR 35ed93d9237feffef19d1980b0954279a3f17e890bd771c441ad4e81a9de0039." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input a450ff2e5a2ab7d65f3764d36a943039942f61c44ff592b3e86d26a9f43a9c63; PTX 329257b2135da493cc00d2a3d329dc1e3f144d2b7bb1077e7da0b5ce31edf641; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input a450ff2e5a2ab7d65f3764d36a943039942f61c44ff592b3e86d26a9f43a9c63; PTX 329257b2135da493cc00d2a3d329dc1e3f144d2b7bb1077e7da0b5ce31edf641; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "div", + "modifiers": [ + "rp", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "div_rp_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_div_rp_d" + }, + "llvm_symbol": "llvm.nvvm.div.rp.d", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "concrete_llvm_arguments": [ + "f64", + "f64" + ], + "concrete_llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 3fc32170b5a53e699829cf32e18d0b7a6d8551650c883ccab2b1c1977934e823; canonical IR 706618c58fbe6ad068339c2e81423214a191a39e49319193b5f4b86b65d6476c." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input ba5a45a618f00b184f6f4406f16fe9ff96c2267f76df131653f0a669ab5a539c; PTX 83e1a13980266ec1fa39fd597064f1fa2c57c17c32a27905c0f67105ccf6556f; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input ba5a45a618f00b184f6f4406f16fe9ff96c2267f76df131653f0a669ab5a539c; PTX 83e1a13980266ec1fa39fd597064f1fa2c57c17c32a27905c0f67105ccf6556f; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "div", + "modifiers": [ + "rp", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "div_rp_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_div_rp_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.div.rp.ftz.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode abe750764d37a93c709f987380b7220d81dc476e7e2d799d793eac8e70918063; canonical IR 885798008d8dacb036111605953c74ca804f0c158e62bbf33b5b353b87ae610d." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 2b80a436e4f5ee1dbee2c0375c84f4b9c731ce43b2ac11bec8eeff1ca447e885; PTX 596d076ae134ac7e1292d63be88d7773a0d5da29348e2f41c94e97365bd8fc3d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 2b80a436e4f5ee1dbee2c0375c84f4b9c731ce43b2ac11bec8eeff1ca447e885; PTX 596d076ae134ac7e1292d63be88d7773a0d5da29348e2f41c94e97365bd8fc3d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "div", + "modifiers": [ + "rp", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "div_rz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_div_rz_f" + }, + "llvm_symbol": "llvm.nvvm.div.rz.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode fa4724faa51258f7c5b89753691633b0e8da0e7608884dfe47a476f64be8bf75; canonical IR f29620f20383dfb6fbfc26179e1d8148f04863ec0fbc3c6a1713c78ee68ada17." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 8b8c81889b821917b8312bba62a90d00caa26a0536b6adc911f94e650c1e55b2; PTX 96f72e7886c7b84313f3fcadce27b74d9c733aef3e241bbcaa8d9e00a761b82d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 8b8c81889b821917b8312bba62a90d00caa26a0536b6adc911f94e650c1e55b2; PTX 96f72e7886c7b84313f3fcadce27b74d9c733aef3e241bbcaa8d9e00a761b82d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "div", + "modifiers": [ + "rz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "div_rz_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_div_rz_d" + }, + "llvm_symbol": "llvm.nvvm.div.rz.d", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "concrete_llvm_arguments": [ + "f64", + "f64" + ], + "concrete_llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode dcb6fc41c86e75d1c86f3bec23f4ff7c5c353d61feec52342ce5383ee9f9efa8; canonical IR 32a8e7bd41c2449a4203def04f6d797130f1dc24f566e4b797bfc1716ea2258f." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 1842ad0d6c954014d11e54f571937bdd06c81c60718f85d8c466115e60eb79d8; PTX 0fb8324f7b279ebc55830c5271355bfd6fb504f040b4bb053552e1121123641d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 1842ad0d6c954014d11e54f571937bdd06c81c60718f85d8c466115e60eb79d8; PTX 0fb8324f7b279ebc55830c5271355bfd6fb504f040b4bb053552e1121123641d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "div", + "modifiers": [ + "rz", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "div_rz_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_div_rz_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.div.rz.ftz.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 7ee1df4e5f45a6e3e85f5a08250ba5390ff9c7d0cb562af08e427a1b567f9559; canonical IR 986ab2872c78e953894629e6c3b1e2109ccee9734160df27a3e4db534d000b9e." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input f5a74f740ad4453d9c3298bceb38f8a9c0c8719d6c77d228fe450b07ef91a6ec; PTX e5e4867abc2832760637bae848db4f56a016129b46a9fc001cd8a6af2a58cb26; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input f5a74f740ad4453d9c3298bceb38f8a9c0c8719d6c77d228fe450b07ef91a6ec; PTX e5e4867abc2832760637bae848db4f56a016129b46a9fc001cd8a6af2a58cb26; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "div", + "modifiers": [ + "rz", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rm_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rm_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rm.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 09f44ef419ab05d10716cfdf7cfaa75003586a915ae79227d75e7e0bb854c731; canonical IR 682cd88ea120fca5d8fc349177cd50f25aec5317b8d82d61c20af031cba1b677." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input d5539e68e09bfb47670eafa13256aacaa6c96cfa523d20a8bb585402242fc193; PTX 7e66354f63b1bcea7ba4b3e2ea4879c8886d3ad8130bdf2a36afe1b70f79855c; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input d5539e68e09bfb47670eafa13256aacaa6c96cfa523d20a8bb585402242fc193; PTX 7e66354f63b1bcea7ba4b3e2ea4879c8886d3ad8130bdf2a36afe1b70f79855c; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rm", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rm_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rm_d" + }, + "llvm_symbol": "llvm.nvvm.fma.rm.d", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f64", + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "concrete_llvm_arguments": [ + "f64", + "f64", + "f64" + ], + "concrete_llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 287228c3e60fca183b467eae3fb33dc34f80f3754455410112c68382f8582905; canonical IR 56af89bc7ea141713a822b6bcf855795a5c342c26b8bdcdd54255a5adf034e5a." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input d696e9725b3705b7d1e0fb5ce20940fc87fe6c421f6c72ded81254aac1599687; PTX ca75a5ccec41516cec2fae78bdc4fe06257793dbf1eebe64cdc60e78fcb24f8f; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input d696e9725b3705b7d1e0fb5ce20940fc87fe6c421f6c72ded81254aac1599687; PTX ca75a5ccec41516cec2fae78bdc4fe06257793dbf1eebe64cdc60e78fcb24f8f; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rm", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rm_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rm_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rm.ftz.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 8e8bb6b338bf9038d039666038697594955b04e3a83dede5a93242461cdff9f3; canonical IR 76b88eceb3713395ec477c604f5e1a5e85dc5670c6905348cffaa0ddb81e6811." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 6f95c7b5351094db59a0a27a6dd635486eb7a03a3dbb1a25c39bc0b55c98682c; PTX c7ce37008e99cd502baddb447b2da136f24a0f5c65b2da03ce3f521845f7e002; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 6f95c7b5351094db59a0a27a6dd635486eb7a03a3dbb1a25c39bc0b55c98682c; PTX c7ce37008e99cd502baddb447b2da136f24a0f5c65b2da03ce3f521845f7e002; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rm", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rm_ftz_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rm_ftz_sat_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rm.ftz.sat.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 8566544060a4270d2cf4e7652bb7b97260e32afe5d947c2344dfb9b785a5ee78; canonical IR 62b57361073aebd859f86d5ad74efa479414d8c0c05a8e6852d775110ac7f8de." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 9d1de2389ecb6f7613144bf5a9da7a59d669bf8eeb6277cc6897053507201d4e; PTX 51f350e8dcc5b924c6429d3842dce981057454ef8eb4c2a3f86220e5b0cffb80; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 9d1de2389ecb6f7613144bf5a9da7a59d669bf8eeb6277cc6897053507201d4e; PTX 51f350e8dcc5b924c6429d3842dce981057454ef8eb4c2a3f86220e5b0cffb80; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rm", + "ftz", + "sat", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rm_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rm_sat_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rm.sat.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 24fd4bbd321a3f0e826b86875021c09bbfa8925654eee29d384382de9252f55d; canonical IR 875c85c382022f334f8a76beb04c8a4699b384f8014007a55f85f589fcc2d38e." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 4e7a2be5dbf69315081568647203ac80416f52c3bf521d8be3345d599fb739c6; PTX e73ddd10405009b75e8856eaff39d7b5bd0f2b01c8e9a545099280740ac0b508; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 4e7a2be5dbf69315081568647203ac80416f52c3bf521d8be3345d599fb739c6; PTX e73ddd10405009b75e8856eaff39d7b5bd0f2b01c8e9a545099280740ac0b508; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rm", + "sat", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rn_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rn_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rn.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 96a5b9daa9c3e9dc8d6c0e779e3240fc72595f1c5bea3cc1cc8d77796fb3a86b; canonical IR fbc9eb19bcab3691fce05b2f12755b9c999b6a98ab828084374b8bde103296e1." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e013026b2457bce1f4d453774ff2efc20ace0b2cbb58f40f544bacdefa873efc; PTX c341c3549c334576726ea141782dc0d45ae7f8a92588197a6b03440e37043407; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e013026b2457bce1f4d453774ff2efc20ace0b2cbb58f40f544bacdefa873efc; PTX c341c3549c334576726ea141782dc0d45ae7f8a92588197a6b03440e37043407; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rn", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rn_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rn_d" + }, + "llvm_symbol": "llvm.nvvm.fma.rn.d", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f64", + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "concrete_llvm_arguments": [ + "f64", + "f64", + "f64" + ], + "concrete_llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 6e2610170f4565cbcad389a3d8841476dca4fbe49c290754dcff3c5ba5c25102; canonical IR 5bc7f5846c57b1e22f7f1b85ce7384cdbbbbaf3799cbf1281b742bcc003d3758." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 28293cf1109dd5b1426c764ec04f87f06b5763107ca90189f3dd68fcd80d40f8; PTX 753bd5786dc3ad54672840db1726ed70040af88069b651972c581943f2d155e7; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 28293cf1109dd5b1426c764ec04f87f06b5763107ca90189f3dd68fcd80d40f8; PTX 753bd5786dc3ad54672840db1726ed70040af88069b651972c581943f2d155e7; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rn", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rn_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rn_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rn.ftz.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 5adb0ba90dcd6898fa2d0c4c24e3c51ea093e43063ebf18dfe38ea878b0ca8a0; canonical IR a56a82b531333494713f6d5a0db60af420b3fa722d6c1ed7062db1711c05c7d5." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 7f29339d7f2fd4b9d09b844668850bea86b98642fafe218c79a9aa78c7f4e284; PTX 8a2c085b1407c35d2d34d9ee7b00a1d0349bf9d42f8e91f938b1e1ce2aae0465; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 7f29339d7f2fd4b9d09b844668850bea86b98642fafe218c79a9aa78c7f4e284; PTX 8a2c085b1407c35d2d34d9ee7b00a1d0349bf9d42f8e91f938b1e1ce2aae0465; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rn", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rn_ftz_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rn_ftz_sat_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rn.ftz.sat.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 73b2dde1bbc35dd06a4cdfacad975668c83260958389e0f67b851336a2f5cea8; canonical IR 3459d1a96892b290f8558de50debc12a1639d3a29fa9ec3dc7bf29a783be0d54." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 69d5c2d680514e8c5885272f847cf5acd3fbeb864b769718543b6daced2bfcdb; PTX 9f505074ff997e70b3b20c089c9f3179884f947db85970968f3280648bdeeacb; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 69d5c2d680514e8c5885272f847cf5acd3fbeb864b769718543b6daced2bfcdb; PTX 9f505074ff997e70b3b20c089c9f3179884f947db85970968f3280648bdeeacb; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rn", + "ftz", + "sat", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rn_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rn_sat_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rn.sat.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode f3128180eb7c537006e684e759b3cae3c940141aca6c1095a150d29c2ebeb147; canonical IR 13c4f2ba29b18a55331790f5b715b6a6a74746fa0ee70e798ca56fa1cdfc350e." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 52bbb22c08b0aac43c481fe3d4cb2115b7aab82d95511cd849831bc8b73c91e3; PTX 2ec6ab8e284d016c5608c4fbc08fc9261b61c318b5c57559727f40e8b04a6f37; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 52bbb22c08b0aac43c481fe3d4cb2115b7aab82d95511cd849831bc8b73c91e3; PTX 2ec6ab8e284d016c5608c4fbc08fc9261b61c318b5c57559727f40e8b04a6f37; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rn", + "sat", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rp_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rp_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rp.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 54180d45e47a904cf0312cf331529a56b59cd001e6aee819caea2d39614e1643; canonical IR aa7e3923594843a16fb0832b022af7f06ce7b975cba947ce987d9bd89cc63fc1." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input b7cd6c9d7b48cd3b11fdd39d01a5f8896f17c80fce4b56173f4006d2b82e071a; PTX d1c33fe2201f52f898f83e0730c40a36af9af854431287eb58d30659d82a7ddd; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input b7cd6c9d7b48cd3b11fdd39d01a5f8896f17c80fce4b56173f4006d2b82e071a; PTX d1c33fe2201f52f898f83e0730c40a36af9af854431287eb58d30659d82a7ddd; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rp", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rp_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rp_d" + }, + "llvm_symbol": "llvm.nvvm.fma.rp.d", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f64", + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "concrete_llvm_arguments": [ + "f64", + "f64", + "f64" + ], + "concrete_llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 2741bdd15c52e81b359f66da821509331d195db43482cd2f0f6a79d0a501bd07; canonical IR 224c49f80622a7de2d3371c6e1d77dd2343d070e8d43a7c2fb9a0b2377619c3a." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 48f7c8301e9ace472aafa5b2be92f4ce919b22c9ebefeee737dde6525558c07c; PTX 9c49748568ecf367abcab2b34352f4c3c3f01f1741ecc36105ce6338bf19c897; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 48f7c8301e9ace472aafa5b2be92f4ce919b22c9ebefeee737dde6525558c07c; PTX 9c49748568ecf367abcab2b34352f4c3c3f01f1741ecc36105ce6338bf19c897; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rp", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rp_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rp_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rp.ftz.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode da44e89cd99327a2abfac379c9fbf267678064b94fd9af7816790cc67915b4bd; canonical IR 101d5265424f629753c17b48a1a7672e3b38cc99b4f4f5ffe1cea1a81edf401b." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 220914f1c6d2bacc28c39872d28fd45e44c13749997e42697577ca66ca2ed5b1; PTX a225e339ee815afe704f755952f545f31400444034dc6706856474c52d52aaa3; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 220914f1c6d2bacc28c39872d28fd45e44c13749997e42697577ca66ca2ed5b1; PTX a225e339ee815afe704f755952f545f31400444034dc6706856474c52d52aaa3; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rp", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rp_ftz_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rp_ftz_sat_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rp.ftz.sat.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 163f5dc7c002c7dd412b3831330908d46e28e08b8888fe713c5558bebd1ffb02; canonical IR d814a00145f9ebd0a8adc3fd3771a7911b21adf7c659d322ac72770011e4e444." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e641a019fbf66f94235137abc9daf0559068ec02af921d640cfc330b2c5bb16d; PTX 85025b19c592e3b757f4ce119f982f29c629e20d1e225ab9f88aef73552eaee5; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e641a019fbf66f94235137abc9daf0559068ec02af921d640cfc330b2c5bb16d; PTX 85025b19c592e3b757f4ce119f982f29c629e20d1e225ab9f88aef73552eaee5; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rp", + "ftz", + "sat", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rp_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rp_sat_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rp.sat.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 0e377278eaaa5a805dd7b93627ccc2e6b798cafbd82676d6cf8b4cc1ca70bee5; canonical IR 600555ff3d12ba05c33638fb6860813aa143cbc94cc46d4d3c19b5aee0a97bf8." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input f0271423950f061ee102e62b949caaa64e1a8e243472bb45be05fd35bda20115; PTX b9ee18611bea21d9866f12d9dd700c680afc530824691a5ec266603a5f54e73a; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input f0271423950f061ee102e62b949caaa64e1a8e243472bb45be05fd35bda20115; PTX b9ee18611bea21d9866f12d9dd700c680afc530824691a5ec266603a5f54e73a; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rp", + "sat", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rz_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rz.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode f8a2e51bbc2a27856a421b98a9cefe440e8e7f40b4b3244e14442cd382983acf; canonical IR 96e7b7a57e58a41d022b9df4ccd163213711c3b04f4c761554b60a52bd6d9e37." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 0c47ae32749372a26cc21ca53ddc5d9a3cf9b30f8105152d4c36df55b730a0fc; PTX 71d6fa1af986706f17ba4b0614708b11d013c91ab391e1928630faa7802e53fe; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 0c47ae32749372a26cc21ca53ddc5d9a3cf9b30f8105152d4c36df55b730a0fc; PTX 71d6fa1af986706f17ba4b0614708b11d013c91ab391e1928630faa7802e53fe; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rz_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rz_d" + }, + "llvm_symbol": "llvm.nvvm.fma.rz.d", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f64", + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "concrete_llvm_arguments": [ + "f64", + "f64", + "f64" + ], + "concrete_llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 7f931753069dba54b2b1a739f873076cd47278f7290f7b28d1a10e9a41159c28; canonical IR 86cf0dab0b07f36c1a391d6ef5bdea424c482509c7bed335dc7ffaad6f10a94a." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 3539abf0c84e87e58e7bdfb1fc6cb7d2af1e59abca2352f00469f90d6009b2a0; PTX eee8bb584ba8557f3c6680f3901c9dd072f6fb8be0f0389f21a6bf0ac7dfac92; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 3539abf0c84e87e58e7bdfb1fc6cb7d2af1e59abca2352f00469f90d6009b2a0; PTX eee8bb584ba8557f3c6680f3901c9dd072f6fb8be0f0389f21a6bf0ac7dfac92; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rz", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rz_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rz_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rz.ftz.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode bfb93816d3eb2756e1092d6f7f8ebea859a642e93279b9177feb3aa604c450a5; canonical IR c75d6f03df4fae85085280a5eee649951c396dc6a0a25ebeadca54d86a493606." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 13e70f0d9b41dc657eb143da4bd571db025c7347b82cc8ca85c0aa50bdc5c19a; PTX 0ecad3ff0311a611bf200d8194f5b55d07e2f7e8a62e3aebec1078789d2bd5f4; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 13e70f0d9b41dc657eb143da4bd571db025c7347b82cc8ca85c0aa50bdc5c19a; PTX 0ecad3ff0311a611bf200d8194f5b55d07e2f7e8a62e3aebec1078789d2bd5f4; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rz", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rz_ftz_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rz_ftz_sat_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rz.ftz.sat.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode be9edc2447dfa0b2f412a918bca8c65316e6d104e01651c3ffb783c55da60767; canonical IR 304ee17c2325f899e49518450f51602a1511b0b6144ab51035923633607b1b91." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 0ff3f0581f3253fd6277d9888cee45e568cd11b3f9aa1648c5ef59847729b196; PTX fe877234081dfb1e2de7fc7829e4fb32f969ceafc066f559bed70856ee76d341; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 0ff3f0581f3253fd6277d9888cee45e568cd11b3f9aa1648c5ef59847729b196; PTX fe877234081dfb1e2de7fc7829e4fb32f969ceafc066f559bed70856ee76d341; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rz", + "ftz", + "sat", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "fma_rz_sat_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_fma_rz_sat_f" + }, + "llvm_symbol": "llvm.nvvm.fma.rz.sat.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode a187273ab5cf42bb8453c44a7dc6f12868f6458c37349b2f3a267ea9eeea8a7b; canonical IR f9f7da4245bcb759d8d2312ed19be0565a1f44127d535453d69b166f2fc749b4." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 25ed2e0a2d7f7cebba2a7705f972689cd82dacc0ee808c9f0276df15b445ac16; PTX c42fd81a29b65aba246c3426b4f33d05aca80b7c027da42a0e3afb9406c3da5a; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "inline_ptx", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 25ed2e0a2d7f7cebba2a7705f972689cd82dacc0ee808c9f0276df15b445ac16; PTX c42fd81a29b65aba246c3426b4f33d05aca80b7c027da42a0e3afb9406c3da5a; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "fma", + "modifiers": [ + "rz", + "sat", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "mul_rm_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mul_rm_f" + }, + "llvm_symbol": "llvm.nvvm.mul.rm.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode b90b1b6c4208eeb312b44c9c3494caf675c99c1cd5b0596f13347603fbccfe2f; canonical IR c1183a8ed7e19fe260da51de3ac27a8222c6f28d99466b9da6a1d0f375fb808f." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 034376f88915dab5030d26883d1ffe29e1dc1ed09f3a19d94402186509026572; PTX 9a460cf935f93844e8a8efb6b5adf66071f68a7085019457b0f4060d8fef22c3; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 034376f88915dab5030d26883d1ffe29e1dc1ed09f3a19d94402186509026572; PTX 9a460cf935f93844e8a8efb6b5adf66071f68a7085019457b0f4060d8fef22c3; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "mul", + "modifiers": [ + "rm", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "mul_rm_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mul_rm_d" + }, + "llvm_symbol": "llvm.nvvm.mul.rm.d", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "concrete_llvm_arguments": [ + "f64", + "f64" + ], + "concrete_llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode b386fc98703aa1f6e67e33df89de8d5f64dc97394ec19b519bfe7d9fad1b58ad; canonical IR d903c0af2796fc501a950d3702a0c5148d0374f1c862e97388112dadc7d9d79f." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 99153e8944475f97a09b211bbbead885b4f280f8fe9c4fd4985e0b045f8083e4; PTX fa839061c256570295a3bd0b3a156e5acdafe8fdef37fa49309d5576e7b6e08c; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 99153e8944475f97a09b211bbbead885b4f280f8fe9c4fd4985e0b045f8083e4; PTX fa839061c256570295a3bd0b3a156e5acdafe8fdef37fa49309d5576e7b6e08c; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "mul", + "modifiers": [ + "rm", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "mul_rm_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mul_rm_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.mul.rm.ftz.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode e894c3bbf96f860d81764879bd373f7a8798e40927ad9e6e2aece86320eaf73e; canonical IR 6e126e70b3717156c435b8eea6c9bd53edb8a9aa4ea56af5644ecaf709497dc9." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input b7e19938a7338de5766a3bfaba5d96b632c308085d0093d5053cefc6638c3bbc; PTX 6c0e437cd9e623360f26ed663c86ce3cce77c77e41614afd6a43bb304788d0ba; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input b7e19938a7338de5766a3bfaba5d96b632c308085d0093d5053cefc6638c3bbc; PTX 6c0e437cd9e623360f26ed663c86ce3cce77c77e41614afd6a43bb304788d0ba; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "mul", + "modifiers": [ + "rm", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "mul_rn_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mul_rn_f" + }, + "llvm_symbol": "llvm.nvvm.mul.rn.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 3bc654c7a9d03d4a190db6f216f1290ad9d1add251d13f5b4fced5daec393b3d; canonical IR 2848f43455486c5f4ec8c7447af12743ac52ec0f36f1a553b110b021fe20eb2c." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 0acb71ff6e03bc51b40ac1e5c0e5d62d77a3cabb4e26873456d0052db05425d0; PTX 7d3e865593af237eb6e0ff999491ac31c154eea8d4126ae266a949b18e4000ae; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 0acb71ff6e03bc51b40ac1e5c0e5d62d77a3cabb4e26873456d0052db05425d0; PTX 7d3e865593af237eb6e0ff999491ac31c154eea8d4126ae266a949b18e4000ae; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "mul", + "modifiers": [ + "rn", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "mul_rn_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mul_rn_d" + }, + "llvm_symbol": "llvm.nvvm.mul.rn.d", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "concrete_llvm_arguments": [ + "f64", + "f64" + ], + "concrete_llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 847b0edc3cfe51da8cbcf0ec12f24a8c52f8c105e7566dac97ecc866f44df38e; canonical IR 4ec90d6af7ff11875291c2b17845826daeb6723d230d055b023c8981829fb1d3." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input ccc4a2d9e134b008bb3131dc83895740c988e492bbc934e79dd07223f1937861; PTX 6d3499c10ef3b1282256f4b12802c67d8fe46bf25b9b2e8428b06244a258a27b; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input ccc4a2d9e134b008bb3131dc83895740c988e492bbc934e79dd07223f1937861; PTX 6d3499c10ef3b1282256f4b12802c67d8fe46bf25b9b2e8428b06244a258a27b; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "mul", + "modifiers": [ + "rn", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "mul_rn_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mul_rn_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.mul.rn.ftz.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode c2c0a3078136a5dc32ff7709a633f8363c4153cd595018d1242ac35310d26336; canonical IR 1662ad706c50df1f21722277dc4bcfb60e32bbe4fb114de96d112170bcb6aea3." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input ea69a9b28d42294ead60b53eac1a129c3af9f53a321b734eb39fa3716dd42c83; PTX 02ed11051bb3fcd97bd49d8a3c7e92737376500d1ac018ab0e9c98d7d93dc1e2; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input ea69a9b28d42294ead60b53eac1a129c3af9f53a321b734eb39fa3716dd42c83; PTX 02ed11051bb3fcd97bd49d8a3c7e92737376500d1ac018ab0e9c98d7d93dc1e2; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "mul", + "modifiers": [ + "rn", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "mul_rp_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mul_rp_f" + }, + "llvm_symbol": "llvm.nvvm.mul.rp.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 62852bac99ac31b4f9cd8148ca426b5a19206369c4786be9f92d8a67907c5ee3; canonical IR 01bed53f970711a88f32c51fe02f0c4b6c61e5a28d9d19ed2cb636adc97bb645." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 4ed53bc44fb3f5383051847b0b0dcb9a8573cca09c816e8518e9cef3c6979fa9; PTX 5c4b24214435d505131900a38fd6e6ecfbc4b1bdd112066cb58fcc86e9ca6c69; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 4ed53bc44fb3f5383051847b0b0dcb9a8573cca09c816e8518e9cef3c6979fa9; PTX 5c4b24214435d505131900a38fd6e6ecfbc4b1bdd112066cb58fcc86e9ca6c69; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "mul", + "modifiers": [ + "rp", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "mul_rp_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mul_rp_d" + }, + "llvm_symbol": "llvm.nvvm.mul.rp.d", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "concrete_llvm_arguments": [ + "f64", + "f64" + ], + "concrete_llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 996c98022d1e52214806002a9e2d04fac9b8b7cb824dcac0047894f07361bdc5; canonical IR b898ed733cfb96c9b64fb6bc046edf07d6664f88f9d2e0a7d9b6f69b2ebd908a." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 0fc22041afb2d7adec4715f1ebd7acc418d6a4d87bef8190eac8260d82a9f117; PTX b4ef87b3c8c013b4374a326ca11fa7422056ad6ce0b28bcc96160434991512db; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 0fc22041afb2d7adec4715f1ebd7acc418d6a4d87bef8190eac8260d82a9f117; PTX b4ef87b3c8c013b4374a326ca11fa7422056ad6ce0b28bcc96160434991512db; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "mul", + "modifiers": [ + "rp", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "mul_rp_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mul_rp_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.mul.rp.ftz.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode ddffce2e49822e170d5c18b08e1a7ac526a347b28a6d7e7e56b6f2b357664e0d; canonical IR fd9c0cac606566f82e72a554d99c42afe6753e6befb7a825467bd363ac1065d8." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 69cba07ac6cf5b9549b893d23193d9ddc6d41e23c7cfa91a99be8341afae3fb7; PTX ce2e2c5cb48b36abd59a7d948bf0971982b6ca0b0ff029da5455a209fa1921cb; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 69cba07ac6cf5b9549b893d23193d9ddc6d41e23c7cfa91a99be8341afae3fb7; PTX ce2e2c5cb48b36abd59a7d948bf0971982b6ca0b0ff029da5455a209fa1921cb; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "mul", + "modifiers": [ + "rp", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "mul_rz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mul_rz_f" + }, + "llvm_symbol": "llvm.nvvm.mul.rz.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 668877e65c649511fe67669c239a36a829d346722be1fba394b6239bae020c58; canonical IR 32c57aeb44f7e4f622445748400354b39447d2155776cdcc200e5dfe752d296f." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 4c2086c8726ffaeafea1c17fc5628c3d9f26bd6700921da2bd55a5eba332ec49; PTX dfa8b8ad9d76a5df7bb842bfc0e9c1f974b33c528d14c820db04e99fde9599be; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 4c2086c8726ffaeafea1c17fc5628c3d9f26bd6700921da2bd55a5eba332ec49; PTX dfa8b8ad9d76a5df7bb842bfc0e9c1f974b33c528d14c820db04e99fde9599be; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "mul", + "modifiers": [ + "rz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "mul_rz_f64", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mul_rz_d" + }, + "llvm_symbol": "llvm.nvvm.mul.rz.d", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f64", + "f64" + ], + "llvm_results": [ + "f64" + ], + "concrete_llvm_arguments": [ + "f64", + "f64" + ], + "concrete_llvm_results": [ + "f64" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode 49887f8e3e0513873ed4eb2f50ad85cfffdec9bbd146bb5ea9e761d06bfa376e; canonical IR 04f77581c93c253802656a4c34f11a578cea1eac74a6e210b9589d6a28509fb4." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 476323a9997468694c0f804d68cc12ecd9ffe843ed46e7c342199e981a0f1665; PTX 294a215ea45217f30e5a271f05514d31dc9de9c47bdab355cc70db82903cfdb7; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 476323a9997468694c0f804d68cc12ecd9ffe843ed46e7c342199e981a0f1665; PTX 294a215ea45217f30e5a271f05514d31dc9de9c47bdab355cc70db82903cfdb7; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "mul", + "modifiers": [ + "rz", + "f64" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + }, + { + "id": "mul_rz_ftz_f32", + "source": { + "kind": "llvm_imported", + "source_record": "int_nvvm_mul_rz_ftz_f" + }, + "llvm_symbol": "llvm.nvvm.mul.rz.ftz.f", + "resolved_llvm_symbol": null, + "llvm_arguments": [ + "f32", + "f32" + ], + "llvm_results": [ + "f32" + ], + "concrete_llvm_arguments": [ + "f32", + "f32" + ], + "concrete_llvm_results": [ + "f32" + ], + "target_triple": "nvptx64-nvidia-cuda", + "gpu_target": "sm_20", + "ptx_feature": "+ptx32", + "status": "validated", + "stages": [ + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "typed intrinsic declaration assembled and disassembled with llvm-as/llvm-dis", + "stage": "declaration_canonicalization", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "Canonical declaration and required imported IR properties checked. Bitcode edcc72559512cd001cc6a769b6af6481106dc9817ebc290c519f9b4b7da1372d; canonical IR 6f2f7658c3dbf5f86d29d6173dd89d49ff003a46805b70523a8f1f62c923042c." + }, + { + "targets": [ + "sm_20", + "ptx32" + ], + "representation": "one retained scalar operation per generated LLVM probe", + "stage": "backend_codegen", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 7697785ef64c733f2a1c90474449fcfabea10a09646ff8dc3d9e7b9bf1823add; PTX 2370b3fa3a374b125a36c1dd37591eb3561835dd7006852989eee3b0a7af479a; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed." + }, + { + "targets": [ + "sm_75", + "ptx32" + ], + "representation": "LLVM-emitted PTX assembled by CUDA 13.3 ptxas", + "stage": "ptx_assembly", + "mechanism": "typed_nvvm", + "outcome": "succeeded", + "artifact_kind": "cubin", + "detail": "LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 7697785ef64c733f2a1c90474449fcfabea10a09646ff8dc3d9e7b9bf1823add; PTX 2370b3fa3a374b125a36c1dd37591eb3561835dd7006852989eee3b0a7af479a; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed.", + "tool_path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "tool_version": "Cuda compilation tools, release 13.3, V13.3.73", + "tool_sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } + ], + "declaration_attributes_canonicalized": true, + "runtime_validation": "unexecuted", + "expected_ptx": { + "mnemonic": "mul", + "modifiers": [ + "rz", + "ftz", + "f32" + ], + "operands": [ + { + "kind": "register" + }, + { + "kind": "register" + }, + { + "kind": "register" + } + ] + } + } + ] +} diff --git a/cuda-oxide/intrinsics/evidence/scalar-arithmetic-sm20-20261013/README.md b/cuda-oxide/intrinsics/evidence/scalar-arithmetic-sm20-20261013/README.md new file mode 100644 index 0000000000..b6413359e9 --- /dev/null +++ b/cuda-oxide/intrinsics/evidence/scalar-arithmetic-sm20-20261013/README.md @@ -0,0 +1,62 @@ +# Scalar arithmetic floor verification (2026-10-13) + +The 64 scalar arithmetic variants were previously assigned PTX 7.0 / sm_80 +for both backends. That was the original probe target, not an instruction +requirement. The generator now separates a conservative family-wide native +contract (PTX 2.0 / sm_20) from LLVM's verified sm_20 / PTX 3.2 route and CUDA +13.3 libNVVM's verified compute_75 route. The compiler's existing recorded +target vocabulary is unchanged. + +The native contract covers every variant, including preserved f32 subnormals, +directed division, and f32 FMA. The instruction requirements are documented +in the PTX ISA sections for [mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul), +[add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add), +[div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div), +and [fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma). + +`captures.json` records 192 successful LLVM codegen/assembly checks: all 64 +variants at sm_20/+ptx32, sm_75/+ptx63, and sm_80/+ptx70. CUDA 13.3 no longer +assembles sm_20 cubins, so the sm_20 PTX is assembled for sm_75. This is an +instruction/lowering check, not a claim of sm_20 hardware execution. +`inputs.jsonl` preserves the exact probe text and the auxiliary typed +declarations. All 64 declarations were canonicalized with llvm-as/llvm-dis; +their required imported IR properties were checked. Canonical IR hashes can +change with input and output paths. The captures identify the actual tools +and artifacts, including the nightly-2026-10-11 LLVM 23.1.3 binary. + +Run from `cuda-oxide/` with that nightly's LLVM tools and CUDA 13.3 ptxas: + +```sh +python scripts/probe_scalar_llvm_floors.py --llc /path/to/llc \ + --ptxas /path/to/ptxas --out target/scalar-llvm-floors +``` + +The script restores either LF or CRLF to match every recorded input hash, +checks the exact retained opcode and absence of unresolved extern functions, +and assembles every PTX output. Its output ledger contains fresh tool and +artifact hashes. No driver or GPU is required. + +The companion `../scalar-arithmetic-sm75-20261013/` capture uses libNVVM IR +2.0, validates all 64 exact inline-PTX operations for compute_75, assembles +the resulting PTX for sm_75, and compiles/links LTO IR with nvJitLink. Its +fixture uses `llvm.used` so optimization cannot discard the kernel entries. +Both cubins were checked for all 64 kernel text sections. libNVVM's +architecture query accepts compute_75/compute_80 and rejects compute_70 and +compute_72. The admitted libNVVM floor is therefore sm_75 / PTX 6.3; the +current toolkit emits PTX 9.3. Run with the actual CUDA 13.3 libraries: + +```sh +python scripts/probe_scalar_nvvm_floors.py --libnvvm /path/to/libnvvm \ + --nvjitlink /path/to/libnvJitLink --ptxas /path/to/ptxas \ + --out target/scalar-nvvm-floors +``` + +On Windows these are `nvvm/bin/x64/nvvm64_40_0.dll`, +`bin/x64/nvJitLink_130_0.dll`, and `bin/ptxas.exe` in the CUDA toolkit. +The script checks the exact operations and both cubin entry sets, records +the library identities and IR/API versions, and leaves runtime validation +unexecuted. These captures do not claim execution of the 64 kernels on a GPU. + +Regressions cover all 64 ABI markers through the generator and the compiler's +real target validation, including the distinct LLVM/libNVVM boundary. +Other instruction families and all 1029 existing ABI identities are unchanged. diff --git a/cuda-oxide/intrinsics/evidence/scalar-arithmetic-sm20-20261013/captures.json b/cuda-oxide/intrinsics/evidence/scalar-arithmetic-sm20-20261013/captures.json new file mode 100644 index 0000000000..ec643b9d4f --- /dev/null +++ b/cuda-oxide/intrinsics/evidence/scalar-arithmetic-sm20-20261013/captures.json @@ -0,0 +1,1935 @@ +{ + "llvm_source": "aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019", + "llc": { + "path": "C:\\projects\\projects.rust.cg\\cglibs\\warpbro-rs\\target\\mis-fix\\tools\\llvm-tools-nightly-x86_64-pc-windows-msvc\\llvm-tools-preview\\lib\\rustlib\\x86_64-pc-windows-msvc\\bin\\llc.exe", + "version": "LLVM (http://llvm.org/):\n LLVM version 23.1.3-rust-1.101.0-nightly\n Optimized build.\n Default target: x86_64-pc-windows-msvc\n Host CPU: znver3\n\n Registered Targets:\n aarch64 - AArch64 (little endian)\n aarch64_32 - AArch64 (little endian ILP32)\n aarch64_be - AArch64 (big endian)\n amdgcn - legacy name for amdgpu\n amdgpu - AMDGPU gfx6+\n arm - ARM\n arm64 - ARM64 (little endian)\n arm64_32 - ARM64 (little endian ILP32)\n armeb - ARM (big endian)\n avr - Atmel AVR Microcontroller\n bpf - BPF (host endian)\n bpfeb - BPF (big endian)\n bpfel - BPF (little endian)\n csky - C-SKY\n hexagon - Hexagon\n loongarch32 - 32-bit LoongArch\n loongarch64 - 64-bit LoongArch\n m68k - Motorola 68000 family\n mips - MIPS (32-bit big endian)\n mips64 - MIPS (64-bit big endian)\n mips64el - MIPS (64-bit little endian)\n mipsel - MIPS (32-bit little endian)\n msp430 - MSP430 [experimental]\n nvptx - NVIDIA PTX 32-bit\n nvptx64 - NVIDIA PTX 64-bit\n ppc32 - PowerPC 32\n ppc32le - PowerPC 32 LE\n ppc64 - PowerPC 64\n ppc64le - PowerPC 64 LE\n r600 - AMD GPUs HD2XXX-HD6XXX\n riscv32 - 32-bit RISC-V\n riscv32be - 32-bit big endian RISC-V\n riscv64 - 64-bit RISC-V\n riscv64be - 64-bit big endian RISC-V\n sparc - Sparc\n sparcel - Sparc LE\n sparcv9 - Sparc V9\n systemz - SystemZ\n thumb - Thumb\n thumbeb - Thumb (big endian)\n wasm32 - WebAssembly 32-bit\n wasm64 - WebAssembly 64-bit\n x86 - 32-bit X86: Pentium-Pro and above\n x86-64 - 64-bit X86: EM64T and AMD64\n xtensa - Xtensa 32\n", + "sha256": "c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224" + }, + "ptxas": { + "path": "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe", + "version": "ptxas: NVIDIA (R) Ptx optimizing assembler\nCopyright (c) 2005-2026 NVIDIA Corporation\nBuilt on Tue_Jun__9_14:30:19_Pacific_Daylight_Time_2026\nCuda compilation tools, release 13.3, V13.3.73\nBuild cuda_13.3.r13.3/compiler.38244171_0\n", + "sha256": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + }, + "captures": [ + { + "id": "add_rm_f32", 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{ + "id": "mul_rz_ftz_f32", + "codegen_gpu": "sm_80", + "ptx_feature": "+ptx70", + "terminal_gpu": "sm_80", + "input_sha256": "7697785ef64c733f2a1c90474449fcfabea10a09646ff8dc3d9e7b9bf1823add", + "ptx_sha256": "b8e690a9135468f4f9be004390541244c6a9352a527885c8508f7eb27c1c07dd", + "cubin_sha256": "597b86955db03bad4e230701c2144c1790aa549cb78dd554ffe7316794b4045e", + "instruction": "mul.rz.ftz.f32" + } + ] +} diff --git a/cuda-oxide/intrinsics/evidence/scalar-arithmetic-sm20-20261013/inputs.jsonl b/cuda-oxide/intrinsics/evidence/scalar-arithmetic-sm20-20261013/inputs.jsonl new file mode 100644 index 0000000000..93bbd5e5e6 --- /dev/null +++ b/cuda-oxide/intrinsics/evidence/scalar-arithmetic-sm20-20261013/inputs.jsonl @@ -0,0 +1,64 @@ +{"id": "add_rm_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.add.rm.f(float, float)\n\ndefine float @probe_add_rm_f32(float %arg0, float %arg1) {\n %result = call float @llvm.nvvm.add.rm.f(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.add.rm.f(float, float)\n", "bitcode_sha256": "f9934d1038a5552cdf55ce0f17df5fcc611c849a241e8453cf3e3f3cf0c15962", "canonical_sha256": "8f0ad3024811995830aa253f4ab6c5d75fc39845e2275aabfa13fd8cb942d2d5"} +{"id": "add_rm_f64", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare double @llvm.nvvm.add.rm.d(double, double)\n\ndefine double @probe_add_rm_f64(double %arg0, double %arg1) {\n %result = call double @llvm.nvvm.add.rm.d(double %arg0, double %arg1)\n ret double %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare double @llvm.nvvm.add.rm.d(double, double)\n", "bitcode_sha256": "bc7f42e0ec5e6483a919837745374eac40281d09f39f28b62c9a75a79fdbb218", "canonical_sha256": "f3e0c65a40fe5423b8a24ae43593534ed7416ba36180ea74e9d9d56c08178ec2"} +{"id": "add_rm_ftz_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.add.rm.ftz.f(float, float)\n\ndefine float @probe_add_rm_ftz_f32(float %arg0, float %arg1) {\n %result = call float @llvm.nvvm.add.rm.ftz.f(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.add.rm.ftz.f(float, float)\n", "bitcode_sha256": "aa0f77b09603061feab0dc368c0cf23b9718861dfce22e3fc639a6f5ae016b31", "canonical_sha256": "6e055be48461eb4ee303d2e2872323b37704ca69db86070cce202079a607022b"} +{"id": "add_rm_ftz_sat_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndefine float @probe_add_rm_ftz_sat_f32(float %arg0, float %arg1) {\n %result = call float asm \"add.rm.sat.ftz.f32 $0, $1, $2;\", \"=f,f,f\"(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.add.rm.ftz.sat.f(float, float)\n", "bitcode_sha256": "4b064c89e5c841dd226829c91b04b7ebfffa55127d7ae8b7da0f7d1a3fb4eda8", "canonical_sha256": "4286a12c568dd9269a56d3360215fc8e8e871018627316858f4522243bd9c2e2"} +{"id": "add_rm_sat_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndefine float @probe_add_rm_sat_f32(float %arg0, float %arg1) {\n %result = call float asm \"add.rm.sat.f32 $0, $1, $2;\", \"=f,f,f\"(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.add.rm.sat.f(float, float)\n", "bitcode_sha256": "b3df4e3cac222e5f24e857258eaff059b7b0381d691f7932f4b0550bde04e0ea", "canonical_sha256": "b043345b6aeeb8b04d10d9175f0aa42c81f83cec8aef11d01cffae0733f1e3ef"} +{"id": "add_rn_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.add.rn.f(float, float)\n\ndefine float @probe_add_rn_f32(float %arg0, float %arg1) {\n %result = call float @llvm.nvvm.add.rn.f(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.add.rn.f(float, float)\n", "bitcode_sha256": "4906c68b31a587e0533836e64102c875cf374a29f4f74f70bc25fad881e09245", "canonical_sha256": "86b1abe44c429b97cda1b9d1db97daa3c7ee30e31ea2cf2cb79fb54d357222a1"} +{"id": "add_rn_f64", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare double @llvm.nvvm.add.rn.d(double, double)\n\ndefine double @probe_add_rn_f64(double %arg0, double %arg1) {\n %result = call double @llvm.nvvm.add.rn.d(double %arg0, double %arg1)\n ret double %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare double @llvm.nvvm.add.rn.d(double, double)\n", "bitcode_sha256": "00eef432ee19e5943038373c6dee49e3bfe18bf9b59402da3af2c57b8f7293d3", "canonical_sha256": "743bacc01c90edc19678a94fef121801f06b0674da1fa8d5e76fa6e19f1f30d5"} +{"id": "add_rn_ftz_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.add.rn.ftz.f(float, float)\n\ndefine float @probe_add_rn_ftz_f32(float %arg0, float %arg1) {\n %result = call float @llvm.nvvm.add.rn.ftz.f(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.add.rn.ftz.f(float, float)\n", "bitcode_sha256": "714587e2cd143d7c81ae5cf1a2cc5c708765e3012c58c9fe8875f49db12be16d", "canonical_sha256": "e292a3eaf055ee6842e1fff1eda21edfcd00cf9c10d10b3496092a677013a603"} +{"id": "add_rn_ftz_sat_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndefine float @probe_add_rn_ftz_sat_f32(float %arg0, float %arg1) {\n %result = call float asm \"add.rn.sat.ftz.f32 $0, $1, $2;\", \"=f,f,f\"(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.add.rn.ftz.sat.f(float, float)\n", "bitcode_sha256": "4051efd46840af83910aff88e4c36e9cf47aff9107fdc7087af8093f4c5d8241", "canonical_sha256": "2493f5e594bc53e9508d95ac95d4ee282efcc089aa7ed83e88bff34cd8c44242"} +{"id": "add_rn_sat_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndefine float @probe_add_rn_sat_f32(float %arg0, float %arg1) {\n %result = call float asm \"add.rn.sat.f32 $0, $1, $2;\", \"=f,f,f\"(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.add.rn.sat.f(float, float)\n", "bitcode_sha256": "5896c2c6cdf94a8f2e94037455158eaa52a454cb5b6d17e91d0278ec073aed42", "canonical_sha256": "c3034f8ba93e6c37f8a510d7d8d272c02432162d8a748adc3de3c8846135ebbb"} +{"id": "add_rp_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.add.rp.f(float, float)\n\ndefine float @probe_add_rp_f32(float %arg0, float %arg1) {\n %result = call float @llvm.nvvm.add.rp.f(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.add.rp.f(float, float)\n", "bitcode_sha256": "f751d4889e5442fe29adaacbcdcbfeed6047a5a806740b9ae070c7713b0bff28", "canonical_sha256": "92f40d69575bb2ec86d1f9836719dd74ef86949d97ac301df47e2a5ce6cad2f1"} +{"id": "add_rp_f64", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare double @llvm.nvvm.add.rp.d(double, double)\n\ndefine double @probe_add_rp_f64(double %arg0, double %arg1) {\n %result = call double @llvm.nvvm.add.rp.d(double %arg0, double %arg1)\n ret double %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare double @llvm.nvvm.add.rp.d(double, double)\n", "bitcode_sha256": "fa037bb4c69ca5dbb1517a9ae359e58dc559cb985517b467d84946888113f540", "canonical_sha256": "756573f679fe11ecfa849dc94ae0164bdb108c02c7774cc37e027b81139da131"} +{"id": "add_rp_ftz_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.add.rp.ftz.f(float, float)\n\ndefine float @probe_add_rp_ftz_f32(float %arg0, float %arg1) {\n %result = call float @llvm.nvvm.add.rp.ftz.f(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.add.rp.ftz.f(float, float)\n", "bitcode_sha256": "30afff6d95731313be20be9fc9a5915870a502c69a51ab635f072eb997efc210", "canonical_sha256": "f6b44a6e746a49e7a299d1da424a6bced1181eab104768ca5295740133b39cd2"} +{"id": "add_rp_ftz_sat_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndefine float @probe_add_rp_ftz_sat_f32(float %arg0, float %arg1) {\n %result = call float asm \"add.rp.sat.ftz.f32 $0, $1, $2;\", \"=f,f,f\"(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.add.rp.ftz.sat.f(float, float)\n", "bitcode_sha256": "deeaf0c1aa02868245e3dc087ee1cc0d3716ad73acf402a95e58309ee95f07ce", "canonical_sha256": "bb60971343d60d8084295441a8d7f7db974afd220d994660224abd3a203b3a10"} +{"id": "add_rp_sat_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndefine float @probe_add_rp_sat_f32(float %arg0, float %arg1) {\n %result = call float asm \"add.rp.sat.f32 $0, $1, $2;\", \"=f,f,f\"(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.add.rp.sat.f(float, float)\n", "bitcode_sha256": "7f58f2252b0ddbcb7ee8e4fe2ebffcaca74d630b8724c5f7a3a170948e4c0f55", "canonical_sha256": "9a9d02d9bbfd0a6c00a1aba05fb2e6c8ddf83a74b95aea1cd89758407b2669ff"} +{"id": "add_rz_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.add.rz.f(float, float)\n\ndefine float @probe_add_rz_f32(float %arg0, float %arg1) {\n %result = call float @llvm.nvvm.add.rz.f(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.add.rz.f(float, float)\n", "bitcode_sha256": "2a2ce18cd71fe1c891023cc15787bd9e2b74e226d7f4d5f5c4f588481a1a55b4", "canonical_sha256": "a62381d4152598867d2c00a12a539f92ee42f3e53826aa93374f6b6d7bf95774"} +{"id": "add_rz_f64", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare double @llvm.nvvm.add.rz.d(double, double)\n\ndefine double @probe_add_rz_f64(double %arg0, double %arg1) {\n %result = call double @llvm.nvvm.add.rz.d(double %arg0, double %arg1)\n ret double %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare double @llvm.nvvm.add.rz.d(double, double)\n", "bitcode_sha256": "bcea3bd9a8706c996ef0a934e039e7473f5a1aa849e6de40fbe05f1840da6dbe", "canonical_sha256": "261944c7ac7b765072275a41eac4f83e443c70f7600d3ef57f5f06821760e71d"} +{"id": "add_rz_ftz_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.add.rz.ftz.f(float, float)\n\ndefine float @probe_add_rz_ftz_f32(float %arg0, float %arg1) {\n %result = call float @llvm.nvvm.add.rz.ftz.f(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.add.rz.ftz.f(float, float)\n", "bitcode_sha256": "d4dadf6ee4eb21a92873d6f9662158656b7ca18f0a84a823f6affa7697406ead", "canonical_sha256": "961a89f3d7517a81429159fef786b2c083227aed53b431af09485eb1b0632538"} +{"id": "add_rz_ftz_sat_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndefine float @probe_add_rz_ftz_sat_f32(float %arg0, float %arg1) {\n %result = call float asm \"add.rz.sat.ftz.f32 $0, $1, $2;\", \"=f,f,f\"(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.add.rz.ftz.sat.f(float, float)\n", "bitcode_sha256": "d6373b162715e509c2ac22077358477b7d825f7da0519c78bf88b3d9b8a6d5cf", "canonical_sha256": "edad3cbd88093c18d9a600d49bd4ef24e71000bd2c2965a1581febabc0982c11"} +{"id": "add_rz_sat_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndefine float @probe_add_rz_sat_f32(float %arg0, float %arg1) {\n %result = call float asm \"add.rz.sat.f32 $0, $1, $2;\", \"=f,f,f\"(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.add.rz.sat.f(float, float)\n", "bitcode_sha256": "6ab5896ae055db562e3de871a22baa8853dd3af1a4e64c8e8fb99a24cd372631", "canonical_sha256": "9c7b2e39b1c83b8ea1548f1c26b90d92924e8734c89f3c1a024ccaef436a571b"} +{"id": "div_rm_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.div.rm.f(float, float)\n\ndefine float @probe_div_rm_f32(float %arg0, float %arg1) {\n %result = call float @llvm.nvvm.div.rm.f(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.div.rm.f(float, float)\n", "bitcode_sha256": "4f65929b0778fc4e60e852b68a8b80015704712e34a80c1b00d58574f383cb83", "canonical_sha256": "881f29eadb6fe5033bede3eb73b71fdbb822d50fe9de999784fb465e8f2e8b9d"} +{"id": "div_rm_f64", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare double @llvm.nvvm.div.rm.d(double, double)\n\ndefine double @probe_div_rm_f64(double %arg0, double %arg1) {\n %result = call double @llvm.nvvm.div.rm.d(double %arg0, double %arg1)\n ret double %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare double @llvm.nvvm.div.rm.d(double, double)\n", "bitcode_sha256": "98eb91e439f3018ae1421d7588f9beead3ef1e27ba544a5bab28a78ac31e7307", "canonical_sha256": "f965b4b829e00e2569be716b8f8c460dcb05aed9f7c38d65dcad43b576890be0"} +{"id": "div_rm_ftz_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.div.rm.ftz.f(float, float)\n\ndefine float @probe_div_rm_ftz_f32(float %arg0, float %arg1) {\n %result = call float @llvm.nvvm.div.rm.ftz.f(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.div.rm.ftz.f(float, float)\n", "bitcode_sha256": "2b91e12e8fee2ade6958192f8c46349bbe8f3bfde8c33b60251ab3849c0e2f0d", "canonical_sha256": "09cb0d4613d535f3fab705d2b2c5dd5620df1ab76436515abf068f6117169334"} +{"id": "div_rn_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.div.rn.f(float, float)\n\ndefine float @probe_div_rn_f32(float %arg0, float %arg1) {\n %result = call float @llvm.nvvm.div.rn.f(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.div.rn.f(float, float)\n", "bitcode_sha256": "c8f094ad7fe975839748a01d0710de7d5a7c1a82ef87faeedb6ad4bfae05e304", "canonical_sha256": "d58032888364b71e28147a64a0d6593dff99cb8a98dff79c01e00db5265e55fc"} +{"id": "div_rn_f64", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare double @llvm.nvvm.div.rn.d(double, double)\n\ndefine double @probe_div_rn_f64(double %arg0, double %arg1) {\n %result = call double @llvm.nvvm.div.rn.d(double %arg0, double %arg1)\n ret double %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare double @llvm.nvvm.div.rn.d(double, double)\n", "bitcode_sha256": "111c4133fdac8a40e94ef182b6690286bef66dc47434ae1321354dc49cb04f47", "canonical_sha256": "c6164908f74bdafdeefaf52b1a0458cb42b788e83b0dc459f9ea1659dd90d0d9"} +{"id": "div_rn_ftz_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.div.rn.ftz.f(float, float)\n\ndefine float @probe_div_rn_ftz_f32(float %arg0, float %arg1) {\n %result = call float @llvm.nvvm.div.rn.ftz.f(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.div.rn.ftz.f(float, float)\n", "bitcode_sha256": "a61ab19a202eaa31b721d753a15b2d930600da7261cd9cd47d43bbad0901e59e", "canonical_sha256": "e976bc7be4c74be02e50e01004cd6b80c662222a5302d57233ccfb4a3f736a2b"} +{"id": "div_rp_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.div.rp.f(float, float)\n\ndefine float @probe_div_rp_f32(float %arg0, float %arg1) {\n %result = call float @llvm.nvvm.div.rp.f(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.div.rp.f(float, float)\n", "bitcode_sha256": "ddc0b85220df5c6bd83cc79d351d0af9b0202230a9b33fa537eabbcc7be500ac", "canonical_sha256": "35ed93d9237feffef19d1980b0954279a3f17e890bd771c441ad4e81a9de0039"} +{"id": "div_rp_f64", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare double @llvm.nvvm.div.rp.d(double, double)\n\ndefine double @probe_div_rp_f64(double %arg0, double %arg1) {\n %result = call double @llvm.nvvm.div.rp.d(double %arg0, double %arg1)\n ret double %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare double @llvm.nvvm.div.rp.d(double, double)\n", "bitcode_sha256": "3fc32170b5a53e699829cf32e18d0b7a6d8551650c883ccab2b1c1977934e823", "canonical_sha256": "706618c58fbe6ad068339c2e81423214a191a39e49319193b5f4b86b65d6476c"} +{"id": "div_rp_ftz_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.div.rp.ftz.f(float, float)\n\ndefine float @probe_div_rp_ftz_f32(float %arg0, float %arg1) {\n %result = call float @llvm.nvvm.div.rp.ftz.f(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.div.rp.ftz.f(float, float)\n", "bitcode_sha256": "abe750764d37a93c709f987380b7220d81dc476e7e2d799d793eac8e70918063", "canonical_sha256": "885798008d8dacb036111605953c74ca804f0c158e62bbf33b5b353b87ae610d"} +{"id": "div_rz_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.div.rz.f(float, float)\n\ndefine float @probe_div_rz_f32(float %arg0, float %arg1) {\n %result = call float @llvm.nvvm.div.rz.f(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.div.rz.f(float, float)\n", "bitcode_sha256": "fa4724faa51258f7c5b89753691633b0e8da0e7608884dfe47a476f64be8bf75", "canonical_sha256": "f29620f20383dfb6fbfc26179e1d8148f04863ec0fbc3c6a1713c78ee68ada17"} +{"id": "div_rz_f64", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare double @llvm.nvvm.div.rz.d(double, double)\n\ndefine double @probe_div_rz_f64(double %arg0, double %arg1) {\n %result = call double @llvm.nvvm.div.rz.d(double %arg0, double %arg1)\n ret double %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare double @llvm.nvvm.div.rz.d(double, double)\n", "bitcode_sha256": "dcb6fc41c86e75d1c86f3bec23f4ff7c5c353d61feec52342ce5383ee9f9efa8", "canonical_sha256": "32a8e7bd41c2449a4203def04f6d797130f1dc24f566e4b797bfc1716ea2258f"} +{"id": "div_rz_ftz_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.div.rz.ftz.f(float, float)\n\ndefine float @probe_div_rz_ftz_f32(float %arg0, float %arg1) {\n %result = call float @llvm.nvvm.div.rz.ftz.f(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.div.rz.ftz.f(float, float)\n", "bitcode_sha256": "7ee1df4e5f45a6e3e85f5a08250ba5390ff9c7d0cb562af08e427a1b567f9559", "canonical_sha256": "986ab2872c78e953894629e6c3b1e2109ccee9734160df27a3e4db534d000b9e"} +{"id": "fma_rm_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.fma.rm.f(float, float, float)\n\ndefine float @probe_fma_rm_f32(float %arg0, float %arg1, float %arg2) {\n %result = call float @llvm.nvvm.fma.rm.f(float %arg0, float %arg1, float %arg2)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.fma.rm.f(float, float, float)\n", "bitcode_sha256": "09f44ef419ab05d10716cfdf7cfaa75003586a915ae79227d75e7e0bb854c731", "canonical_sha256": "682cd88ea120fca5d8fc349177cd50f25aec5317b8d82d61c20af031cba1b677"} +{"id": "fma_rm_f64", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare double @llvm.nvvm.fma.rm.d(double, double, double)\n\ndefine double @probe_fma_rm_f64(double %arg0, double %arg1, double %arg2) {\n %result = call double @llvm.nvvm.fma.rm.d(double %arg0, double %arg1, double %arg2)\n ret double %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare double @llvm.nvvm.fma.rm.d(double, double, double)\n", "bitcode_sha256": "287228c3e60fca183b467eae3fb33dc34f80f3754455410112c68382f8582905", "canonical_sha256": "56af89bc7ea141713a822b6bcf855795a5c342c26b8bdcdd54255a5adf034e5a"} +{"id": "fma_rm_ftz_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.fma.rm.ftz.f(float, float, float)\n\ndefine float @probe_fma_rm_ftz_f32(float %arg0, float %arg1, float %arg2) {\n %result = call float @llvm.nvvm.fma.rm.ftz.f(float %arg0, float %arg1, float %arg2)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.fma.rm.ftz.f(float, float, float)\n", "bitcode_sha256": "8e8bb6b338bf9038d039666038697594955b04e3a83dede5a93242461cdff9f3", "canonical_sha256": "76b88eceb3713395ec477c604f5e1a5e85dc5670c6905348cffaa0ddb81e6811"} +{"id": "fma_rm_ftz_sat_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndefine float @probe_fma_rm_ftz_sat_f32(float %arg0, float %arg1, float %arg2) {\n %result = call float asm \"fma.rm.ftz.sat.f32 $0, $1, $2, $3;\", \"=f,f,f,f\"(float %arg0, float %arg1, float %arg2)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.fma.rm.ftz.sat.f(float, float, float)\n", "bitcode_sha256": "8566544060a4270d2cf4e7652bb7b97260e32afe5d947c2344dfb9b785a5ee78", "canonical_sha256": "62b57361073aebd859f86d5ad74efa479414d8c0c05a8e6852d775110ac7f8de"} +{"id": "fma_rm_sat_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndefine float @probe_fma_rm_sat_f32(float %arg0, float %arg1, float %arg2) {\n %result = call float asm \"fma.rm.sat.f32 $0, $1, $2, $3;\", \"=f,f,f,f\"(float %arg0, float %arg1, float %arg2)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.fma.rm.sat.f(float, float, float)\n", "bitcode_sha256": "24fd4bbd321a3f0e826b86875021c09bbfa8925654eee29d384382de9252f55d", "canonical_sha256": "875c85c382022f334f8a76beb04c8a4699b384f8014007a55f85f589fcc2d38e"} +{"id": "fma_rn_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.fma.rn.f(float, float, float)\n\ndefine float @probe_fma_rn_f32(float %arg0, float %arg1, float %arg2) {\n %result = call float @llvm.nvvm.fma.rn.f(float %arg0, float %arg1, float %arg2)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.fma.rn.f(float, float, float)\n", "bitcode_sha256": "96a5b9daa9c3e9dc8d6c0e779e3240fc72595f1c5bea3cc1cc8d77796fb3a86b", "canonical_sha256": "fbc9eb19bcab3691fce05b2f12755b9c999b6a98ab828084374b8bde103296e1"} +{"id": "fma_rn_f64", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare double @llvm.nvvm.fma.rn.d(double, double, double)\n\ndefine double @probe_fma_rn_f64(double %arg0, double %arg1, double %arg2) {\n %result = call double @llvm.nvvm.fma.rn.d(double %arg0, double %arg1, double %arg2)\n ret double %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare double @llvm.nvvm.fma.rn.d(double, double, double)\n", "bitcode_sha256": "6e2610170f4565cbcad389a3d8841476dca4fbe49c290754dcff3c5ba5c25102", "canonical_sha256": "5bc7f5846c57b1e22f7f1b85ce7384cdbbbbaf3799cbf1281b742bcc003d3758"} +{"id": "fma_rn_ftz_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.fma.rn.ftz.f(float, float, float)\n\ndefine float @probe_fma_rn_ftz_f32(float %arg0, float %arg1, float %arg2) {\n %result = call float @llvm.nvvm.fma.rn.ftz.f(float %arg0, float %arg1, float %arg2)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.fma.rn.ftz.f(float, float, float)\n", "bitcode_sha256": "5adb0ba90dcd6898fa2d0c4c24e3c51ea093e43063ebf18dfe38ea878b0ca8a0", "canonical_sha256": "a56a82b531333494713f6d5a0db60af420b3fa722d6c1ed7062db1711c05c7d5"} +{"id": "fma_rn_ftz_sat_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndefine float @probe_fma_rn_ftz_sat_f32(float %arg0, float %arg1, float %arg2) {\n %result = call float asm \"fma.rn.ftz.sat.f32 $0, $1, $2, $3;\", \"=f,f,f,f\"(float %arg0, float %arg1, float %arg2)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.fma.rn.ftz.sat.f(float, float, float)\n", "bitcode_sha256": "73b2dde1bbc35dd06a4cdfacad975668c83260958389e0f67b851336a2f5cea8", "canonical_sha256": "3459d1a96892b290f8558de50debc12a1639d3a29fa9ec3dc7bf29a783be0d54"} +{"id": "fma_rn_sat_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndefine float @probe_fma_rn_sat_f32(float %arg0, float %arg1, float %arg2) {\n %result = call float asm \"fma.rn.sat.f32 $0, $1, $2, $3;\", \"=f,f,f,f\"(float %arg0, float %arg1, float %arg2)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.fma.rn.sat.f(float, float, float)\n", "bitcode_sha256": "f3128180eb7c537006e684e759b3cae3c940141aca6c1095a150d29c2ebeb147", "canonical_sha256": "13c4f2ba29b18a55331790f5b715b6a6a74746fa0ee70e798ca56fa1cdfc350e"} +{"id": "fma_rp_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.fma.rp.f(float, float, float)\n\ndefine float @probe_fma_rp_f32(float %arg0, float %arg1, float %arg2) {\n %result = call float @llvm.nvvm.fma.rp.f(float %arg0, float %arg1, float %arg2)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.fma.rp.f(float, float, float)\n", "bitcode_sha256": "54180d45e47a904cf0312cf331529a56b59cd001e6aee819caea2d39614e1643", "canonical_sha256": "aa7e3923594843a16fb0832b022af7f06ce7b975cba947ce987d9bd89cc63fc1"} +{"id": "fma_rp_f64", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare double @llvm.nvvm.fma.rp.d(double, double, double)\n\ndefine double @probe_fma_rp_f64(double %arg0, double %arg1, double %arg2) {\n %result = call double @llvm.nvvm.fma.rp.d(double %arg0, double %arg1, double %arg2)\n ret double %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare double @llvm.nvvm.fma.rp.d(double, double, double)\n", "bitcode_sha256": "2741bdd15c52e81b359f66da821509331d195db43482cd2f0f6a79d0a501bd07", "canonical_sha256": "224c49f80622a7de2d3371c6e1d77dd2343d070e8d43a7c2fb9a0b2377619c3a"} +{"id": "fma_rp_ftz_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.fma.rp.ftz.f(float, float, float)\n\ndefine float @probe_fma_rp_ftz_f32(float %arg0, float %arg1, float %arg2) {\n %result = call float @llvm.nvvm.fma.rp.ftz.f(float %arg0, float %arg1, float %arg2)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.fma.rp.ftz.f(float, float, float)\n", "bitcode_sha256": "da44e89cd99327a2abfac379c9fbf267678064b94fd9af7816790cc67915b4bd", "canonical_sha256": "101d5265424f629753c17b48a1a7672e3b38cc99b4f4f5ffe1cea1a81edf401b"} +{"id": "fma_rp_ftz_sat_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndefine float @probe_fma_rp_ftz_sat_f32(float %arg0, float %arg1, float %arg2) {\n %result = call float asm \"fma.rp.ftz.sat.f32 $0, $1, $2, $3;\", \"=f,f,f,f\"(float %arg0, float %arg1, float %arg2)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.fma.rp.ftz.sat.f(float, float, float)\n", "bitcode_sha256": "163f5dc7c002c7dd412b3831330908d46e28e08b8888fe713c5558bebd1ffb02", "canonical_sha256": "d814a00145f9ebd0a8adc3fd3771a7911b21adf7c659d322ac72770011e4e444"} +{"id": "fma_rp_sat_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndefine float @probe_fma_rp_sat_f32(float %arg0, float %arg1, float %arg2) {\n %result = call float asm \"fma.rp.sat.f32 $0, $1, $2, $3;\", \"=f,f,f,f\"(float %arg0, float %arg1, float %arg2)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.fma.rp.sat.f(float, float, float)\n", "bitcode_sha256": "0e377278eaaa5a805dd7b93627ccc2e6b798cafbd82676d6cf8b4cc1ca70bee5", "canonical_sha256": "600555ff3d12ba05c33638fb6860813aa143cbc94cc46d4d3c19b5aee0a97bf8"} +{"id": "fma_rz_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.fma.rz.f(float, float, float)\n\ndefine float @probe_fma_rz_f32(float %arg0, float %arg1, float %arg2) {\n %result = call float @llvm.nvvm.fma.rz.f(float %arg0, float %arg1, float %arg2)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.fma.rz.f(float, float, float)\n", "bitcode_sha256": "f8a2e51bbc2a27856a421b98a9cefe440e8e7f40b4b3244e14442cd382983acf", "canonical_sha256": "96e7b7a57e58a41d022b9df4ccd163213711c3b04f4c761554b60a52bd6d9e37"} +{"id": "fma_rz_f64", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare double @llvm.nvvm.fma.rz.d(double, double, double)\n\ndefine double @probe_fma_rz_f64(double %arg0, double %arg1, double %arg2) {\n %result = call double @llvm.nvvm.fma.rz.d(double %arg0, double %arg1, double %arg2)\n ret double %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare double @llvm.nvvm.fma.rz.d(double, double, double)\n", "bitcode_sha256": "7f931753069dba54b2b1a739f873076cd47278f7290f7b28d1a10e9a41159c28", "canonical_sha256": "86cf0dab0b07f36c1a391d6ef5bdea424c482509c7bed335dc7ffaad6f10a94a"} +{"id": "fma_rz_ftz_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.fma.rz.ftz.f(float, float, float)\n\ndefine float @probe_fma_rz_ftz_f32(float %arg0, float %arg1, float %arg2) {\n %result = call float @llvm.nvvm.fma.rz.ftz.f(float %arg0, float %arg1, float %arg2)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.fma.rz.ftz.f(float, float, float)\n", "bitcode_sha256": "bfb93816d3eb2756e1092d6f7f8ebea859a642e93279b9177feb3aa604c450a5", "canonical_sha256": "c75d6f03df4fae85085280a5eee649951c396dc6a0a25ebeadca54d86a493606"} +{"id": "fma_rz_ftz_sat_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndefine float @probe_fma_rz_ftz_sat_f32(float %arg0, float %arg1, float %arg2) {\n %result = call float asm \"fma.rz.ftz.sat.f32 $0, $1, $2, $3;\", \"=f,f,f,f\"(float %arg0, float %arg1, float %arg2)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.fma.rz.ftz.sat.f(float, float, float)\n", "bitcode_sha256": "be9edc2447dfa0b2f412a918bca8c65316e6d104e01651c3ffb783c55da60767", "canonical_sha256": "304ee17c2325f899e49518450f51602a1511b0b6144ab51035923633607b1b91"} +{"id": "fma_rz_sat_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndefine float @probe_fma_rz_sat_f32(float %arg0, float %arg1, float %arg2) {\n %result = call float asm \"fma.rz.sat.f32 $0, $1, $2, $3;\", \"=f,f,f,f\"(float %arg0, float %arg1, float %arg2)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.fma.rz.sat.f(float, float, float)\n", "bitcode_sha256": "a187273ab5cf42bb8453c44a7dc6f12868f6458c37349b2f3a267ea9eeea8a7b", "canonical_sha256": "f9f7da4245bcb759d8d2312ed19be0565a1f44127d535453d69b166f2fc749b4"} +{"id": "mul_rm_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.mul.rm.f(float, float)\n\ndefine float @probe_mul_rm_f32(float %arg0, float %arg1) {\n %result = call float @llvm.nvvm.mul.rm.f(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.mul.rm.f(float, float)\n", "bitcode_sha256": "b90b1b6c4208eeb312b44c9c3494caf675c99c1cd5b0596f13347603fbccfe2f", "canonical_sha256": "c1183a8ed7e19fe260da51de3ac27a8222c6f28d99466b9da6a1d0f375fb808f"} +{"id": "mul_rm_f64", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare double @llvm.nvvm.mul.rm.d(double, double)\n\ndefine double @probe_mul_rm_f64(double %arg0, double %arg1) {\n %result = call double @llvm.nvvm.mul.rm.d(double %arg0, double %arg1)\n ret double %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare double @llvm.nvvm.mul.rm.d(double, double)\n", "bitcode_sha256": "b386fc98703aa1f6e67e33df89de8d5f64dc97394ec19b519bfe7d9fad1b58ad", "canonical_sha256": "d903c0af2796fc501a950d3702a0c5148d0374f1c862e97388112dadc7d9d79f"} +{"id": "mul_rm_ftz_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.mul.rm.ftz.f(float, float)\n\ndefine float @probe_mul_rm_ftz_f32(float %arg0, float %arg1) {\n %result = call float @llvm.nvvm.mul.rm.ftz.f(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.mul.rm.ftz.f(float, float)\n", "bitcode_sha256": "e894c3bbf96f860d81764879bd373f7a8798e40927ad9e6e2aece86320eaf73e", "canonical_sha256": "6e126e70b3717156c435b8eea6c9bd53edb8a9aa4ea56af5644ecaf709497dc9"} +{"id": "mul_rn_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.mul.rn.f(float, float)\n\ndefine float @probe_mul_rn_f32(float %arg0, float %arg1) {\n %result = call float @llvm.nvvm.mul.rn.f(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.mul.rn.f(float, float)\n", "bitcode_sha256": "3bc654c7a9d03d4a190db6f216f1290ad9d1add251d13f5b4fced5daec393b3d", "canonical_sha256": "2848f43455486c5f4ec8c7447af12743ac52ec0f36f1a553b110b021fe20eb2c"} +{"id": "mul_rn_f64", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare double @llvm.nvvm.mul.rn.d(double, double)\n\ndefine double @probe_mul_rn_f64(double %arg0, double %arg1) {\n %result = call double @llvm.nvvm.mul.rn.d(double %arg0, double %arg1)\n ret double %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare double @llvm.nvvm.mul.rn.d(double, double)\n", "bitcode_sha256": "847b0edc3cfe51da8cbcf0ec12f24a8c52f8c105e7566dac97ecc866f44df38e", "canonical_sha256": "4ec90d6af7ff11875291c2b17845826daeb6723d230d055b023c8981829fb1d3"} +{"id": "mul_rn_ftz_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.mul.rn.ftz.f(float, float)\n\ndefine float @probe_mul_rn_ftz_f32(float %arg0, float %arg1) {\n %result = call float @llvm.nvvm.mul.rn.ftz.f(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.mul.rn.ftz.f(float, float)\n", "bitcode_sha256": "c2c0a3078136a5dc32ff7709a633f8363c4153cd595018d1242ac35310d26336", "canonical_sha256": "1662ad706c50df1f21722277dc4bcfb60e32bbe4fb114de96d112170bcb6aea3"} +{"id": "mul_rp_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.mul.rp.f(float, float)\n\ndefine float @probe_mul_rp_f32(float %arg0, float %arg1) {\n %result = call float @llvm.nvvm.mul.rp.f(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.mul.rp.f(float, float)\n", "bitcode_sha256": "62852bac99ac31b4f9cd8148ca426b5a19206369c4786be9f92d8a67907c5ee3", "canonical_sha256": "01bed53f970711a88f32c51fe02f0c4b6c61e5a28d9d19ed2cb636adc97bb645"} +{"id": "mul_rp_f64", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare double @llvm.nvvm.mul.rp.d(double, double)\n\ndefine double @probe_mul_rp_f64(double %arg0, double %arg1) {\n %result = call double @llvm.nvvm.mul.rp.d(double %arg0, double %arg1)\n ret double %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare double @llvm.nvvm.mul.rp.d(double, double)\n", "bitcode_sha256": "996c98022d1e52214806002a9e2d04fac9b8b7cb824dcac0047894f07361bdc5", "canonical_sha256": "b898ed733cfb96c9b64fb6bc046edf07d6664f88f9d2e0a7d9b6f69b2ebd908a"} +{"id": "mul_rp_ftz_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.mul.rp.ftz.f(float, float)\n\ndefine float @probe_mul_rp_ftz_f32(float %arg0, float %arg1) {\n %result = call float @llvm.nvvm.mul.rp.ftz.f(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.mul.rp.ftz.f(float, float)\n", "bitcode_sha256": "ddffce2e49822e170d5c18b08e1a7ac526a347b28a6d7e7e56b6f2b357664e0d", "canonical_sha256": "fd9c0cac606566f82e72a554d99c42afe6753e6befb7a825467bd363ac1065d8"} +{"id": "mul_rz_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.mul.rz.f(float, float)\n\ndefine float @probe_mul_rz_f32(float %arg0, float %arg1) {\n %result = call float @llvm.nvvm.mul.rz.f(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.mul.rz.f(float, float)\n", "bitcode_sha256": "668877e65c649511fe67669c239a36a829d346722be1fba394b6239bae020c58", "canonical_sha256": "32c57aeb44f7e4f622445748400354b39447d2155776cdcc200e5dfe752d296f"} +{"id": "mul_rz_f64", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare double @llvm.nvvm.mul.rz.d(double, double)\n\ndefine double @probe_mul_rz_f64(double %arg0, double %arg1) {\n %result = call double @llvm.nvvm.mul.rz.d(double %arg0, double %arg1)\n ret double %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare double @llvm.nvvm.mul.rz.d(double, double)\n", "bitcode_sha256": "49887f8e3e0513873ed4eb2f50ad85cfffdec9bbd146bb5ea9e761d06bfa376e", "canonical_sha256": "04f77581c93c253802656a4c34f11a578cea1eac74a6e210b9589d6a28509fb4"} +{"id": "mul_rz_ftz_f32", "probe_source": "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n; SPDX-License-Identifier: Apache-2.0\n; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT.\n; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: c243e568fc16c9f907c9fd87fbacbe9f823043a9badd8633e43e9faa87adbd10.\n; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019.\n\ntarget triple = \"nvptx64-nvidia-cuda\"\n\ndeclare float @llvm.nvvm.mul.rz.ftz.f(float, float)\n\ndefine float @probe_mul_rz_ftz_f32(float %arg0, float %arg1) {\n %result = call float @llvm.nvvm.mul.rz.ftz.f(float %arg0, float %arg1)\n ret float %result\n}\n", "canonical_source": "target triple = \"nvptx64-nvidia-cuda\"\ndeclare float @llvm.nvvm.mul.rz.ftz.f(float, float)\n", "bitcode_sha256": "edcc72559512cd001cc6a769b6af6481106dc9817ebc290c519f9b4b7da1372d", "canonical_sha256": "6f2f7658c3dbf5f86d29d6173dd89d49ff003a46805b70523a8f1f62c923042c"} diff --git a/cuda-oxide/intrinsics/evidence/scalar-arithmetic-sm75-20261013/proof.json b/cuda-oxide/intrinsics/evidence/scalar-arithmetic-sm75-20261013/proof.json new file mode 100644 index 0000000000..7e5bc81106 --- /dev/null +++ b/cuda-oxide/intrinsics/evidence/scalar-arithmetic-sm75-20261013/proof.json @@ -0,0 +1,135 @@ +{ + "compute": "compute_75", + "terminal": "sm_75", + "count": 64, + "runtime": "unexecuted", + "architectures": [ + { + "compute": 70, + "status": 4, + "llvm": 0 + }, + { + "compute": 72, + "status": 4, + "llvm": 0 + }, + { + "compute": 75, + "status": 0, + "llvm": 7 + }, + { + "compute": 80, + "status": 0, + "llvm": 7 + } + ], + "ir_version": [ + 2, + 0, + 3, + 2 + ], + "nvvm_api_version": [ + 2, + 0 + ], + "link_version": [ + 13, + 3 + ], + "cubin_entries": [ + "probe_add_rm_f32", + "probe_add_rm_f64", + "probe_add_rm_ftz_f32", + "probe_add_rm_ftz_sat_f32", + "probe_add_rm_sat_f32", + "probe_add_rn_f32", + "probe_add_rn_f64", + "probe_add_rn_ftz_f32", + "probe_add_rn_ftz_sat_f32", + "probe_add_rn_sat_f32", + "probe_add_rp_f32", + "probe_add_rp_f64", + "probe_add_rp_ftz_f32", + "probe_add_rp_ftz_sat_f32", + "probe_add_rp_sat_f32", + "probe_add_rz_f32", + "probe_add_rz_f64", + "probe_add_rz_ftz_f32", + "probe_add_rz_ftz_sat_f32", + "probe_add_rz_sat_f32", + "probe_div_rm_f32", + "probe_div_rm_f64", + "probe_div_rm_ftz_f32", + "probe_div_rn_f32", + "probe_div_rn_f64", + "probe_div_rn_ftz_f32", + "probe_div_rp_f32", + "probe_div_rp_f64", + "probe_div_rp_ftz_f32", + "probe_div_rz_f32", + "probe_div_rz_f64", + "probe_div_rz_ftz_f32", + "probe_fma_rm_f32", + "probe_fma_rm_f64", + "probe_fma_rm_ftz_f32", + "probe_fma_rm_ftz_sat_f32", + "probe_fma_rm_sat_f32", + "probe_fma_rn_f32", + "probe_fma_rn_f64", + "probe_fma_rn_ftz_f32", + "probe_fma_rn_ftz_sat_f32", + "probe_fma_rn_sat_f32", + "probe_fma_rp_f32", + "probe_fma_rp_f64", + "probe_fma_rp_ftz_f32", + "probe_fma_rp_ftz_sat_f32", + "probe_fma_rp_sat_f32", + "probe_fma_rz_f32", + "probe_fma_rz_f64", + "probe_fma_rz_ftz_f32", + "probe_fma_rz_ftz_sat_f32", + "probe_fma_rz_sat_f32", + "probe_mul_rm_f32", + "probe_mul_rm_f64", + "probe_mul_rm_ftz_f32", + "probe_mul_rn_f32", + "probe_mul_rn_f64", + "probe_mul_rn_ftz_f32", + "probe_mul_rp_f32", + "probe_mul_rp_f64", + "probe_mul_rp_ftz_f32", + "probe_mul_rz_f32", + "probe_mul_rz_f64", + "probe_mul_rz_ftz_f32" + ], + "artifacts": { + "linked.cubin": { + "sha256": "8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76", + "bytes": 110440 + }, + "scalar.cubin": { + "sha256": "9c65d7a987602501bee3a0cf3f582370c2b5c15ddf16bcf7ac61a5d6eb318e1a", + "bytes": 110440 + }, + "scalar.ll": { + "sha256": "437765ab6f4ccd45574dff9df0a4e40bd4b5a153378893b9c48651b8120e9024", + "bytes": 27458 + }, + "scalar.ltoir": { + "sha256": "94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca", + "bytes": 14976 + }, + "scalar.ptx": { + "sha256": "e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7", + "bytes": 34001 + } + }, + "tools": { + "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\nvvm\\bin\\x64\\nvvm64_40_0.dll": "dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b", + "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\x64\\nvJitLink_130_0.dll": "727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613", + "C:\\Program Files\\NVIDIA GPU Computing Toolkit\\CUDA\\v13.3\\bin\\ptxas.exe": "86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693" + } +} diff --git a/cuda-oxide/intrinsics/evidence/scalar-arithmetic-sm75-20261013/scalar.ll b/cuda-oxide/intrinsics/evidence/scalar-arithmetic-sm75-20261013/scalar.ll new file mode 100644 index 0000000000..acbfec00d8 --- /dev/null +++ b/cuda-oxide/intrinsics/evidence/scalar-arithmetic-sm75-20261013/scalar.ll @@ -0,0 +1,393 @@ +; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +; SPDX-FileCopyrightText: Copyright (c) 2026 ssoj13 +; SPDX-License-Identifier: Apache-2.0 +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-i128:128:128-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64" +target triple = "nvptx64-nvidia-cuda" +define void @probe_add_rm_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "add.rm.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_add_rm_f64(double addrspace(1)* %out, double %a0, double %a1) { + %value = call double asm "add.rm.f64 $0, $1, $2;", "=d,d,d"(double %a0, double %a1) + store double %value, double addrspace(1)* %out + ret void +} +define void @probe_add_rm_ftz_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "add.rm.ftz.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_add_rm_ftz_sat_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "add.rm.sat.ftz.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_add_rm_sat_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "add.rm.sat.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_add_rn_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "add.rn.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_add_rn_f64(double addrspace(1)* %out, double %a0, double %a1) { + %value = call double asm "add.rn.f64 $0, $1, $2;", "=d,d,d"(double %a0, double %a1) + store double %value, double addrspace(1)* %out + ret void +} +define void @probe_add_rn_ftz_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "add.rn.ftz.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_add_rn_ftz_sat_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "add.rn.sat.ftz.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_add_rn_sat_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "add.rn.sat.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_add_rp_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "add.rp.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_add_rp_f64(double addrspace(1)* %out, double %a0, double %a1) { + %value = call double asm "add.rp.f64 $0, $1, $2;", "=d,d,d"(double %a0, double %a1) + store double %value, double addrspace(1)* %out + ret void +} +define void @probe_add_rp_ftz_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "add.rp.ftz.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_add_rp_ftz_sat_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "add.rp.sat.ftz.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_add_rp_sat_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "add.rp.sat.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_add_rz_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "add.rz.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_add_rz_f64(double addrspace(1)* %out, double %a0, double %a1) { + %value = call double asm "add.rz.f64 $0, $1, $2;", "=d,d,d"(double %a0, double %a1) + store double %value, double addrspace(1)* %out + ret void +} +define void @probe_add_rz_ftz_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "add.rz.ftz.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_add_rz_ftz_sat_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "add.rz.sat.ftz.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_add_rz_sat_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "add.rz.sat.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_div_rm_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "div.rm.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_div_rm_f64(double addrspace(1)* %out, double %a0, double %a1) { + %value = call double asm "div.rm.f64 $0, $1, $2;", "=d,d,d"(double %a0, double %a1) + store double %value, double addrspace(1)* %out + ret void +} +define void @probe_div_rm_ftz_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "div.rm.ftz.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_div_rn_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "div.rn.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_div_rn_f64(double addrspace(1)* %out, double %a0, double %a1) { + %value = call double asm "div.rn.f64 $0, $1, $2;", "=d,d,d"(double %a0, double %a1) + store double %value, double addrspace(1)* %out + ret void +} +define void @probe_div_rn_ftz_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "div.rn.ftz.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_div_rp_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "div.rp.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_div_rp_f64(double addrspace(1)* %out, double %a0, double %a1) { + %value = call double asm "div.rp.f64 $0, $1, $2;", "=d,d,d"(double %a0, double %a1) + store double %value, double addrspace(1)* %out + ret void +} +define void @probe_div_rp_ftz_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "div.rp.ftz.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_div_rz_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "div.rz.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_div_rz_f64(double addrspace(1)* %out, double %a0, double %a1) { + %value = call double asm "div.rz.f64 $0, $1, $2;", "=d,d,d"(double %a0, double %a1) + store double %value, double addrspace(1)* %out + ret void +} +define void @probe_div_rz_ftz_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "div.rz.ftz.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_fma_rm_f32(float addrspace(1)* %out, float %a0, float %a1, float %a2) { + %value = call float asm "fma.rm.f32 $0, $1, $2, $3;", "=f,f,f,f"(float %a0, float %a1, float %a2) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_fma_rm_f64(double addrspace(1)* %out, double %a0, double %a1, double %a2) { + %value = call double asm "fma.rm.f64 $0, $1, $2, $3;", "=d,d,d,d"(double %a0, double %a1, double %a2) + store double %value, double addrspace(1)* %out + ret void +} +define void @probe_fma_rm_ftz_f32(float addrspace(1)* %out, float %a0, float %a1, float %a2) { + %value = call float asm "fma.rm.ftz.f32 $0, $1, $2, $3;", "=f,f,f,f"(float %a0, float %a1, float %a2) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_fma_rm_ftz_sat_f32(float addrspace(1)* %out, float %a0, float %a1, float %a2) { + %value = call float asm "fma.rm.ftz.sat.f32 $0, $1, $2, $3;", "=f,f,f,f"(float %a0, float %a1, float %a2) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_fma_rm_sat_f32(float addrspace(1)* %out, float %a0, float %a1, float %a2) { + %value = call float asm "fma.rm.sat.f32 $0, $1, $2, $3;", "=f,f,f,f"(float %a0, float %a1, float %a2) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_fma_rn_f32(float addrspace(1)* %out, float %a0, float %a1, float %a2) { + %value = call float asm "fma.rn.f32 $0, $1, $2, $3;", "=f,f,f,f"(float %a0, float %a1, float %a2) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_fma_rn_f64(double addrspace(1)* %out, double %a0, double %a1, double %a2) { + %value = call double asm "fma.rn.f64 $0, $1, $2, $3;", "=d,d,d,d"(double %a0, double %a1, double %a2) + store double %value, double addrspace(1)* %out + ret void +} +define void @probe_fma_rn_ftz_f32(float addrspace(1)* %out, float %a0, float %a1, float %a2) { + %value = call float asm "fma.rn.ftz.f32 $0, $1, $2, $3;", "=f,f,f,f"(float %a0, float %a1, float %a2) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_fma_rn_ftz_sat_f32(float addrspace(1)* %out, float %a0, float %a1, float %a2) { + %value = call float asm "fma.rn.ftz.sat.f32 $0, $1, $2, $3;", "=f,f,f,f"(float %a0, float %a1, float %a2) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_fma_rn_sat_f32(float addrspace(1)* %out, float %a0, float %a1, float %a2) { + %value = call float asm "fma.rn.sat.f32 $0, $1, $2, $3;", "=f,f,f,f"(float %a0, float %a1, float %a2) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_fma_rp_f32(float addrspace(1)* %out, float %a0, float %a1, float %a2) { + %value = call float asm "fma.rp.f32 $0, $1, $2, $3;", "=f,f,f,f"(float %a0, float %a1, float %a2) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_fma_rp_f64(double addrspace(1)* %out, double %a0, double %a1, double %a2) { + %value = call double asm "fma.rp.f64 $0, $1, $2, $3;", "=d,d,d,d"(double %a0, double %a1, double %a2) + store double %value, double addrspace(1)* %out + ret void +} +define void @probe_fma_rp_ftz_f32(float addrspace(1)* %out, float %a0, float %a1, float %a2) { + %value = call float asm "fma.rp.ftz.f32 $0, $1, $2, $3;", "=f,f,f,f"(float %a0, float %a1, float %a2) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_fma_rp_ftz_sat_f32(float addrspace(1)* %out, float %a0, float %a1, float %a2) { + %value = call float asm "fma.rp.ftz.sat.f32 $0, $1, $2, $3;", "=f,f,f,f"(float %a0, float %a1, float %a2) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_fma_rp_sat_f32(float addrspace(1)* %out, float %a0, float %a1, float %a2) { + %value = call float asm "fma.rp.sat.f32 $0, $1, $2, $3;", "=f,f,f,f"(float %a0, float %a1, float %a2) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_fma_rz_f32(float addrspace(1)* %out, float %a0, float %a1, float %a2) { + %value = call float asm "fma.rz.f32 $0, $1, $2, $3;", "=f,f,f,f"(float %a0, float %a1, float %a2) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_fma_rz_f64(double addrspace(1)* %out, double %a0, double %a1, double %a2) { + %value = call double asm "fma.rz.f64 $0, $1, $2, $3;", "=d,d,d,d"(double %a0, double %a1, double %a2) + store double %value, double addrspace(1)* %out + ret void +} +define void @probe_fma_rz_ftz_f32(float addrspace(1)* %out, float %a0, float %a1, float %a2) { + %value = call float asm "fma.rz.ftz.f32 $0, $1, $2, $3;", "=f,f,f,f"(float %a0, float %a1, float %a2) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_fma_rz_ftz_sat_f32(float addrspace(1)* %out, float %a0, float %a1, float %a2) { + %value = call float asm "fma.rz.ftz.sat.f32 $0, $1, $2, $3;", "=f,f,f,f"(float %a0, float %a1, float %a2) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_fma_rz_sat_f32(float addrspace(1)* %out, float %a0, float %a1, float %a2) { + %value = call float asm "fma.rz.sat.f32 $0, $1, $2, $3;", "=f,f,f,f"(float %a0, float %a1, float %a2) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_mul_rm_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "mul.rm.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_mul_rm_f64(double addrspace(1)* %out, double %a0, double %a1) { + %value = call double asm "mul.rm.f64 $0, $1, $2;", "=d,d,d"(double %a0, double %a1) + store double %value, double addrspace(1)* %out + ret void +} +define void @probe_mul_rm_ftz_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "mul.rm.ftz.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_mul_rn_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "mul.rn.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_mul_rn_f64(double addrspace(1)* %out, double %a0, double %a1) { + %value = call double asm "mul.rn.f64 $0, $1, $2;", "=d,d,d"(double %a0, double %a1) + store double %value, double addrspace(1)* %out + ret void +} +define void @probe_mul_rn_ftz_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "mul.rn.ftz.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_mul_rp_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "mul.rp.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_mul_rp_f64(double addrspace(1)* %out, double %a0, double %a1) { + %value = call double asm "mul.rp.f64 $0, $1, $2;", "=d,d,d"(double %a0, double %a1) + store double %value, double addrspace(1)* %out + ret void +} +define void @probe_mul_rp_ftz_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "mul.rp.ftz.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_mul_rz_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "mul.rz.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +define void @probe_mul_rz_f64(double addrspace(1)* %out, double %a0, double %a1) { + %value = call double asm "mul.rz.f64 $0, $1, $2;", "=d,d,d"(double %a0, double %a1) + store double %value, double addrspace(1)* %out + ret void +} +define void @probe_mul_rz_ftz_f32(float addrspace(1)* %out, float %a0, float %a1) { + %value = call float asm "mul.rz.ftz.f32 $0, $1, $2;", "=f,f,f"(float %a0, float %a1) + store float %value, float addrspace(1)* %out + ret void +} +@llvm.used = appending global [64 x i8*] [i8* bitcast (void (float addrspace(1)*, float, float)* @probe_add_rm_f32 to i8*), i8* bitcast (void (double addrspace(1)*, double, double)* @probe_add_rm_f64 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_add_rm_ftz_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_add_rm_ftz_sat_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_add_rm_sat_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_add_rn_f32 to i8*), i8* bitcast (void (double addrspace(1)*, double, double)* @probe_add_rn_f64 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_add_rn_ftz_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_add_rn_ftz_sat_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_add_rn_sat_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_add_rp_f32 to i8*), i8* bitcast (void (double addrspace(1)*, double, double)* @probe_add_rp_f64 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_add_rp_ftz_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_add_rp_ftz_sat_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_add_rp_sat_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_add_rz_f32 to i8*), i8* bitcast (void (double addrspace(1)*, double, double)* @probe_add_rz_f64 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_add_rz_ftz_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_add_rz_ftz_sat_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_add_rz_sat_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_div_rm_f32 to i8*), i8* bitcast (void (double addrspace(1)*, double, double)* @probe_div_rm_f64 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_div_rm_ftz_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_div_rn_f32 to i8*), i8* bitcast (void (double addrspace(1)*, double, double)* @probe_div_rn_f64 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_div_rn_ftz_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_div_rp_f32 to i8*), i8* bitcast (void (double addrspace(1)*, double, double)* @probe_div_rp_f64 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_div_rp_ftz_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_div_rz_f32 to i8*), i8* bitcast (void (double addrspace(1)*, double, double)* @probe_div_rz_f64 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_div_rz_ftz_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float, float)* @probe_fma_rm_f32 to i8*), i8* bitcast (void (double addrspace(1)*, double, double, double)* @probe_fma_rm_f64 to i8*), i8* bitcast (void (float addrspace(1)*, float, float, float)* @probe_fma_rm_ftz_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float, float)* @probe_fma_rm_ftz_sat_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float, float)* @probe_fma_rm_sat_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float, float)* @probe_fma_rn_f32 to i8*), i8* bitcast (void (double addrspace(1)*, double, double, double)* @probe_fma_rn_f64 to i8*), i8* bitcast (void (float addrspace(1)*, float, float, float)* @probe_fma_rn_ftz_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float, float)* @probe_fma_rn_ftz_sat_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float, float)* @probe_fma_rn_sat_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float, float)* @probe_fma_rp_f32 to i8*), i8* bitcast (void (double addrspace(1)*, double, double, double)* @probe_fma_rp_f64 to i8*), i8* bitcast (void (float addrspace(1)*, float, float, float)* @probe_fma_rp_ftz_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float, float)* @probe_fma_rp_ftz_sat_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float, float)* @probe_fma_rp_sat_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float, float)* @probe_fma_rz_f32 to i8*), i8* bitcast (void (double addrspace(1)*, double, double, double)* @probe_fma_rz_f64 to i8*), i8* bitcast (void (float addrspace(1)*, float, float, float)* @probe_fma_rz_ftz_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float, float)* @probe_fma_rz_ftz_sat_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float, float)* @probe_fma_rz_sat_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_mul_rm_f32 to i8*), i8* bitcast (void (double addrspace(1)*, double, double)* @probe_mul_rm_f64 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_mul_rm_ftz_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_mul_rn_f32 to i8*), i8* bitcast (void (double addrspace(1)*, double, double)* @probe_mul_rn_f64 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_mul_rn_ftz_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_mul_rp_f32 to i8*), i8* bitcast (void (double addrspace(1)*, double, double)* @probe_mul_rp_f64 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_mul_rp_ftz_f32 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_mul_rz_f32 to i8*), i8* bitcast (void (double addrspace(1)*, double, double)* @probe_mul_rz_f64 to i8*), i8* bitcast (void (float addrspace(1)*, float, float)* @probe_mul_rz_ftz_f32 to i8*)], section "llvm.metadata" +!nvvm.annotations = !{!0, !1, !2, !3, !4, !5, !6, !7, !8, !9, !10, !11, !12, !13, !14, !15, !16, !17, !18, !19, !20, !21, !22, !23, !24, !25, !26, !27, !28, !29, !30, !31, !32, !33, !34, !35, !36, !37, !38, !39, !40, !41, !42, !43, !44, !45, !46, !47, !48, !49, !50, !51, !52, !53, !54, !55, !56, !57, !58, !59, !60, !61, !62, !63} +!0 = !{void (float addrspace(1)*, float, float)* @probe_add_rm_f32, !"kernel", i32 1} +!1 = !{void (double addrspace(1)*, double, double)* @probe_add_rm_f64, !"kernel", i32 1} +!2 = !{void (float addrspace(1)*, float, float)* @probe_add_rm_ftz_f32, !"kernel", i32 1} +!3 = !{void (float addrspace(1)*, float, float)* @probe_add_rm_ftz_sat_f32, !"kernel", i32 1} +!4 = !{void (float addrspace(1)*, float, float)* @probe_add_rm_sat_f32, !"kernel", i32 1} +!5 = !{void (float addrspace(1)*, float, float)* @probe_add_rn_f32, !"kernel", i32 1} +!6 = !{void (double addrspace(1)*, double, double)* @probe_add_rn_f64, !"kernel", i32 1} +!7 = !{void (float addrspace(1)*, float, float)* @probe_add_rn_ftz_f32, !"kernel", i32 1} +!8 = !{void (float addrspace(1)*, float, float)* @probe_add_rn_ftz_sat_f32, !"kernel", i32 1} +!9 = !{void (float addrspace(1)*, float, float)* @probe_add_rn_sat_f32, !"kernel", i32 1} +!10 = !{void (float addrspace(1)*, float, float)* @probe_add_rp_f32, !"kernel", i32 1} +!11 = !{void (double addrspace(1)*, double, double)* @probe_add_rp_f64, !"kernel", i32 1} +!12 = !{void (float addrspace(1)*, float, float)* @probe_add_rp_ftz_f32, !"kernel", i32 1} +!13 = !{void (float addrspace(1)*, float, float)* @probe_add_rp_ftz_sat_f32, !"kernel", i32 1} +!14 = !{void (float addrspace(1)*, float, float)* @probe_add_rp_sat_f32, !"kernel", i32 1} +!15 = !{void (float addrspace(1)*, float, float)* @probe_add_rz_f32, !"kernel", i32 1} +!16 = !{void (double addrspace(1)*, double, double)* @probe_add_rz_f64, !"kernel", i32 1} +!17 = !{void (float addrspace(1)*, float, float)* @probe_add_rz_ftz_f32, !"kernel", i32 1} +!18 = !{void (float addrspace(1)*, float, float)* @probe_add_rz_ftz_sat_f32, !"kernel", i32 1} +!19 = !{void (float addrspace(1)*, float, float)* @probe_add_rz_sat_f32, !"kernel", i32 1} +!20 = !{void (float addrspace(1)*, float, float)* @probe_div_rm_f32, !"kernel", i32 1} +!21 = !{void (double addrspace(1)*, double, double)* @probe_div_rm_f64, !"kernel", i32 1} +!22 = !{void (float addrspace(1)*, float, float)* @probe_div_rm_ftz_f32, !"kernel", i32 1} +!23 = !{void (float addrspace(1)*, float, float)* @probe_div_rn_f32, !"kernel", i32 1} +!24 = !{void (double addrspace(1)*, double, double)* @probe_div_rn_f64, !"kernel", i32 1} +!25 = !{void (float addrspace(1)*, float, float)* @probe_div_rn_ftz_f32, !"kernel", i32 1} +!26 = !{void (float addrspace(1)*, float, float)* @probe_div_rp_f32, !"kernel", i32 1} +!27 = !{void (double addrspace(1)*, double, double)* @probe_div_rp_f64, !"kernel", i32 1} +!28 = !{void (float addrspace(1)*, float, float)* @probe_div_rp_ftz_f32, !"kernel", i32 1} +!29 = !{void (float addrspace(1)*, float, float)* @probe_div_rz_f32, !"kernel", i32 1} +!30 = !{void (double addrspace(1)*, double, double)* @probe_div_rz_f64, !"kernel", i32 1} +!31 = !{void (float addrspace(1)*, float, float)* @probe_div_rz_ftz_f32, !"kernel", i32 1} +!32 = !{void (float addrspace(1)*, float, float, float)* @probe_fma_rm_f32, !"kernel", i32 1} +!33 = !{void (double addrspace(1)*, double, double, double)* @probe_fma_rm_f64, !"kernel", i32 1} +!34 = !{void (float addrspace(1)*, float, float, float)* @probe_fma_rm_ftz_f32, !"kernel", i32 1} +!35 = !{void (float addrspace(1)*, float, float, float)* @probe_fma_rm_ftz_sat_f32, !"kernel", i32 1} +!36 = !{void (float addrspace(1)*, float, float, float)* @probe_fma_rm_sat_f32, !"kernel", i32 1} +!37 = !{void (float addrspace(1)*, float, float, float)* @probe_fma_rn_f32, !"kernel", i32 1} +!38 = !{void (double addrspace(1)*, double, double, double)* @probe_fma_rn_f64, !"kernel", i32 1} +!39 = !{void (float addrspace(1)*, float, float, float)* @probe_fma_rn_ftz_f32, !"kernel", i32 1} +!40 = !{void (float addrspace(1)*, float, float, float)* @probe_fma_rn_ftz_sat_f32, !"kernel", i32 1} +!41 = !{void (float addrspace(1)*, float, float, float)* @probe_fma_rn_sat_f32, !"kernel", i32 1} +!42 = !{void (float addrspace(1)*, float, float, float)* @probe_fma_rp_f32, !"kernel", i32 1} +!43 = !{void (double addrspace(1)*, double, double, double)* @probe_fma_rp_f64, !"kernel", i32 1} +!44 = !{void (float addrspace(1)*, float, float, float)* @probe_fma_rp_ftz_f32, !"kernel", i32 1} +!45 = !{void (float addrspace(1)*, float, float, float)* @probe_fma_rp_ftz_sat_f32, !"kernel", i32 1} +!46 = !{void (float addrspace(1)*, float, float, float)* @probe_fma_rp_sat_f32, !"kernel", i32 1} +!47 = !{void (float addrspace(1)*, float, float, float)* @probe_fma_rz_f32, !"kernel", i32 1} +!48 = !{void (double addrspace(1)*, double, double, double)* @probe_fma_rz_f64, !"kernel", i32 1} +!49 = !{void (float addrspace(1)*, float, float, float)* @probe_fma_rz_ftz_f32, !"kernel", i32 1} +!50 = !{void (float addrspace(1)*, float, float, float)* @probe_fma_rz_ftz_sat_f32, !"kernel", i32 1} +!51 = !{void (float addrspace(1)*, float, float, float)* @probe_fma_rz_sat_f32, !"kernel", i32 1} +!52 = !{void (float addrspace(1)*, float, float)* @probe_mul_rm_f32, !"kernel", i32 1} +!53 = !{void (double addrspace(1)*, double, double)* @probe_mul_rm_f64, !"kernel", i32 1} +!54 = !{void (float addrspace(1)*, float, float)* @probe_mul_rm_ftz_f32, !"kernel", i32 1} +!55 = !{void (float addrspace(1)*, float, float)* @probe_mul_rn_f32, !"kernel", i32 1} +!56 = !{void (double addrspace(1)*, double, double)* @probe_mul_rn_f64, !"kernel", i32 1} +!57 = !{void (float addrspace(1)*, float, float)* @probe_mul_rn_ftz_f32, !"kernel", i32 1} +!58 = !{void (float addrspace(1)*, float, float)* @probe_mul_rp_f32, !"kernel", i32 1} +!59 = !{void (double addrspace(1)*, double, double)* @probe_mul_rp_f64, !"kernel", i32 1} +!60 = !{void (float addrspace(1)*, float, float)* @probe_mul_rp_ftz_f32, !"kernel", i32 1} +!61 = !{void (float addrspace(1)*, float, float)* @probe_mul_rz_f32, !"kernel", i32 1} +!62 = !{void (double addrspace(1)*, double, double)* @probe_mul_rz_f64, !"kernel", i32 1} +!63 = !{void (float addrspace(1)*, float, float)* @probe_mul_rz_ftz_f32, !"kernel", i32 1} +!nvvmir.version = !{!64} +!64 = !{i32 2, i32 0, i32 3, i32 2} diff --git a/cuda-oxide/intrinsics/generated-reference.md b/cuda-oxide/intrinsics/generated-reference.md index 05b8f88d85..f10841bcb4 100644 --- a/cuda-oxide/intrinsics/generated-reference.md +++ b/cuda-oxide/intrinsics/generated-reference.md @@ -2,7 +2,7 @@ SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. SPDX-License-Identifier: Apache-2.0 @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. --> @@ -19,26 +19,26 @@ This table is generated from the resolved catalog. Evidence stages below disting | `cuda_intrinsics::f16x2::add_f16x2` | `nvvm.add_f16x2` | PTX-native `add.rn.f16x2` | safe; scope thread; pure; memory none; convergent false | PTX 4.2 on sm_70+ ([PTX ISA 9.3, 9.7.4.1 Half Precision Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#half-precision-floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rn.f16x2 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::f32x2::add_f32x2` | `nvvm.add_f32x2` | PTX-native `add.rn.f32x2` | safe; scope thread; pure; memory none; convergent false | PTX 8.6 on sm_100+ ([PTX ISA 9.3, 9.7.3.1 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rn.f32x2 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::f32x2::add_ftz_f32x2` | `nvvm.add_ftz_f32x2` | PTX-native `add.rn.ftz.f32x2` | safe; scope thread; pure; memory none; convergent false | PTX 8.6 on sm_100+ ([PTX ISA 9.3, 9.7.3.1 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rn.ftz.f32x2 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::add_rm_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rm.f` from `int_nvvm_add_rm_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rm.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::add_rm_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rm.d` from `int_nvvm_add_rm_d` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rm.f64 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::add_rm_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rm.ftz.f` from `int_nvvm_add_rm_ftz_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rm.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::add_rm_ftz_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rm.ftz.sat.f` from `int_nvvm_add_rm_ftz_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rm.sat.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::add_rm_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rm.sat.f` from `int_nvvm_add_rm_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rm.sat.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::add_rn_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rn.f` from `int_nvvm_add_rn_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rn.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::add_rn_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rn.d` from `int_nvvm_add_rn_d` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rn.f64 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::add_rn_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rn.ftz.f` from `int_nvvm_add_rn_ftz_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rn.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::add_rn_ftz_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rn.ftz.sat.f` from `int_nvvm_add_rn_ftz_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rn.sat.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::add_rn_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rn.sat.f` from `int_nvvm_add_rn_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rn.sat.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::add_rp_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rp.f` from `int_nvvm_add_rp_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rp.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::add_rp_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rp.d` from `int_nvvm_add_rp_d` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rp.f64 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::add_rp_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rp.ftz.f` from `int_nvvm_add_rp_ftz_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rp.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::add_rp_ftz_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rp.ftz.sat.f` from `int_nvvm_add_rp_ftz_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rp.sat.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::add_rp_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rp.sat.f` from `int_nvvm_add_rp_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rp.sat.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::add_rz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rz.f` from `int_nvvm_add_rz_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::add_rz_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rz.d` from `int_nvvm_add_rz_d` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rz.f64 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::add_rz_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rz.ftz.f` from `int_nvvm_add_rz_ftz_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rz.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::add_rz_ftz_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rz.ftz.sat.f` from `int_nvvm_add_rz_ftz_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rz.sat.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::add_rz_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rz.sat.f` from `int_nvvm_add_rz_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rz.sat.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::add_rm_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rm.f` from `int_nvvm_add_rm_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rm.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::add_rm_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rm.d` from `int_nvvm_add_rm_d` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rm.f64 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::add_rm_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rm.ftz.f` from `int_nvvm_add_rm_ftz_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rm.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::add_rm_ftz_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rm.ftz.sat.f` from `int_nvvm_add_rm_ftz_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rm.sat.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::add_rm_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rm.sat.f` from `int_nvvm_add_rm_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rm.sat.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::add_rn_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rn.f` from `int_nvvm_add_rn_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rn.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::add_rn_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rn.d` from `int_nvvm_add_rn_d` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rn.f64 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::add_rn_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rn.ftz.f` from `int_nvvm_add_rn_ftz_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rn.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::add_rn_ftz_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rn.ftz.sat.f` from `int_nvvm_add_rn_ftz_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rn.sat.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::add_rn_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rn.sat.f` from `int_nvvm_add_rn_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rn.sat.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::add_rp_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rp.f` from `int_nvvm_add_rp_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rp.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::add_rp_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rp.d` from `int_nvvm_add_rp_d` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rp.f64 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::add_rp_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rp.ftz.f` from `int_nvvm_add_rp_ftz_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rp.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::add_rp_ftz_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rp.ftz.sat.f` from `int_nvvm_add_rp_ftz_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rp.sat.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::add_rp_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rp.sat.f` from `int_nvvm_add_rp_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rp.sat.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::add_rz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rz.f` from `int_nvvm_add_rz_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::add_rz_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rz.d` from `int_nvvm_add_rz_d` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rz.f64 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::add_rz_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rz.ftz.f` from `int_nvvm_add_rz_ftz_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rz.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::add_rz_ftz_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rz.ftz.sat.f` from `int_nvvm_add_rz_ftz_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rz.sat.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::add_rz_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.add.rz.sat.f` from `int_nvvm_add_rz_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: add](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `add.rz.sat.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::warp::all_sync` | `nvvm.vote_sync_all` | LLVM `llvm.nvvm.vote.all.sync` from `int_nvvm_vote_all_sync` | unsafe; scope warp; impure; memory inaccessible_read_write; convergent true | PTX 6.0 on sm_30+ ([PTX ISA 9.3, 9.7.14.10 Warp Vote Instructions: vote.sync](https://docs.nvidia.com/cuda/parallel-thread-execution/#parallel-synchronization-and-communication-instructions-vote-sync)) | lowered on `rust-llvm-23.1.3-aab11ee0`; expects `vote.sync.all.pred , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::warp::any_sync` | `nvvm.vote_sync_any` | LLVM `llvm.nvvm.vote.any.sync` from `int_nvvm_vote_any_sync` | unsafe; scope warp; impure; memory inaccessible_read_write; convergent true | PTX 6.0 on sm_30+ ([PTX ISA 9.3, 9.7.14.10 Warp Vote Instructions: vote.sync](https://docs.nvidia.com/cuda/parallel-thread-execution/#parallel-synchronization-and-communication-instructions-vote-sync)) | lowered on `rust-llvm-23.1.3-aab11ee0`; expects `vote.sync.any.pred , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::warp::ballot_sync` | `nvvm.vote_sync_ballot` | LLVM `llvm.nvvm.vote.ballot.sync` from `int_nvvm_vote_ballot_sync` | unsafe; scope warp; impure; memory inaccessible_read_write; convergent true | PTX 6.0 on sm_30+ ([PTX ISA 9.3, 9.7.14.10 Warp Vote Instructions: vote.sync](https://docs.nvidia.com/cuda/parallel-thread-execution/#parallel-synchronization-and-communication-instructions-vote-sync)) | lowered on `rust-llvm-23.1.3-aab11ee0`; expects `vote.sync.ballot.b32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | @@ -226,18 +226,18 @@ This table is generated from the resolved catalog. Evidence stages below disting | `cuda_intrinsics::convert::cvt_rz_relu_tf32_f32` | `nvvm.scalar_conversion` | LLVM `llvm.nvvm.f2tf32.rz.relu` from `int_nvvm_f2tf32_rz_relu` | safe; scope thread; pure; memory none; convergent false | PTX 7.8 on sm_90+ ([PTX ISA 9.3, 9.7.9.22 Data Movement and Conversion Instructions: cvt](https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cvt)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `cvt.rz.relu.tf32.f32 , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::convert::cvt_rz_satfinite_tf32_f32` | `nvvm.scalar_conversion` | LLVM `llvm.nvvm.f2tf32.rz.satfinite` from `int_nvvm_f2tf32_rz_satfinite` | safe; scope thread; pure; memory none; convergent false | PTX 8.6 on sm_100+ ([PTX ISA 9.3, 9.7.9.22 Data Movement and Conversion Instructions: cvt](https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cvt)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `cvt.rz.satfinite.tf32.f32 , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::convert::cvt_rz_tf32_f32` | `nvvm.scalar_conversion` | LLVM `llvm.nvvm.f2tf32.rz` from `int_nvvm_f2tf32_rz` | safe; scope thread; pure; memory none; convergent false | PTX 7.8 on sm_90+ ([PTX ISA 9.3, 9.7.9.22 Data Movement and Conversion Instructions: cvt](https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cvt)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `cvt.rz.tf32.f32 , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::div_rm_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.div.rm.f` from `int_nvvm_div_rm_f` | safe; scope thread; impure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.8 Floating Point Instructions: div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `div.rm.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::div_rm_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.div.rm.d` from `int_nvvm_div_rm_d` | safe; scope thread; impure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.8 Floating Point Instructions: div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `div.rm.f64 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::div_rm_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.div.rm.ftz.f` from `int_nvvm_div_rm_ftz_f` | safe; scope thread; impure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.8 Floating Point Instructions: div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `div.rm.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::div_rn_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.div.rn.f` from `int_nvvm_div_rn_f` | safe; scope thread; impure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.8 Floating Point Instructions: div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `div.rn.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::div_rn_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.div.rn.d` from `int_nvvm_div_rn_d` | safe; scope thread; impure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.8 Floating Point Instructions: div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `div.rn.f64 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::div_rn_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.div.rn.ftz.f` from `int_nvvm_div_rn_ftz_f` | safe; scope thread; impure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.8 Floating Point Instructions: div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `div.rn.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::div_rp_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.div.rp.f` from `int_nvvm_div_rp_f` | safe; scope thread; impure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.8 Floating Point Instructions: div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `div.rp.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::div_rp_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.div.rp.d` from `int_nvvm_div_rp_d` | safe; scope thread; impure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.8 Floating Point Instructions: div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `div.rp.f64 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::div_rp_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.div.rp.ftz.f` from `int_nvvm_div_rp_ftz_f` | safe; scope thread; impure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.8 Floating Point Instructions: div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `div.rp.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::div_rz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.div.rz.f` from `int_nvvm_div_rz_f` | safe; scope thread; impure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.8 Floating Point Instructions: div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `div.rz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::div_rz_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.div.rz.d` from `int_nvvm_div_rz_d` | safe; scope thread; impure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.8 Floating Point Instructions: div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `div.rz.f64 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::div_rz_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.div.rz.ftz.f` from `int_nvvm_div_rz_ftz_f` | safe; scope thread; impure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.8 Floating Point Instructions: div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `div.rz.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::div_rm_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.div.rm.f` from `int_nvvm_div_rm_f` | safe; scope thread; impure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.8 Floating Point Instructions: div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `div.rm.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::div_rm_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.div.rm.d` from `int_nvvm_div_rm_d` | safe; scope thread; impure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.8 Floating Point Instructions: div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `div.rm.f64 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::div_rm_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.div.rm.ftz.f` from `int_nvvm_div_rm_ftz_f` | safe; scope thread; impure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.8 Floating Point Instructions: div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `div.rm.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::div_rn_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.div.rn.f` from `int_nvvm_div_rn_f` | safe; scope thread; impure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.8 Floating Point Instructions: div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `div.rn.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::div_rn_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.div.rn.d` from `int_nvvm_div_rn_d` | safe; scope thread; impure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.8 Floating Point Instructions: div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `div.rn.f64 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::div_rn_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.div.rn.ftz.f` from `int_nvvm_div_rn_ftz_f` | safe; scope thread; impure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.8 Floating Point Instructions: div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `div.rn.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::div_rp_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.div.rp.f` from `int_nvvm_div_rp_f` | safe; scope thread; impure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.8 Floating Point Instructions: div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `div.rp.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::div_rp_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.div.rp.d` from `int_nvvm_div_rp_d` | safe; scope thread; impure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.8 Floating Point Instructions: div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `div.rp.f64 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::div_rp_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.div.rp.ftz.f` from `int_nvvm_div_rp_ftz_f` | safe; scope thread; impure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.8 Floating Point Instructions: div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `div.rp.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::div_rz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.div.rz.f` from `int_nvvm_div_rz_f` | safe; scope thread; impure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.8 Floating Point Instructions: div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `div.rz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::div_rz_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.div.rz.d` from `int_nvvm_div_rz_d` | safe; scope thread; impure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.8 Floating Point Instructions: div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `div.rz.f64 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::div_rz_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.div.rz.ftz.f` from `int_nvvm_div_rz_ftz_f` | safe; scope thread; impure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.8 Floating Point Instructions: div](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-div)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `div.rz.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::dotprod::dp2a_s32` | `nvvm.dp2a_s32` | LLVM `llvm.nvvm.idp2a.s.s` from `int_nvvm_idp2a_s_s` | safe; scope thread; pure; memory none; convergent false | PTX 5.0 on sm_61+ ([PTX ISA 9.3, 9.7.1.25 Integer Arithmetic Instructions: dp2a](https://docs.nvidia.com/cuda/parallel-thread-execution/#integer-arithmetic-instructions-dp2a)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `dp2a.lo.s32.s32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::dotprod::dp2a_u32` | `nvvm.dp2a_u32` | LLVM `llvm.nvvm.idp2a.u.u` from `int_nvvm_idp2a_u_u` | safe; scope thread; pure; memory none; convergent false | PTX 5.0 on sm_61+ ([PTX ISA 9.3, 9.7.1.25 Integer Arithmetic Instructions: dp2a](https://docs.nvidia.com/cuda/parallel-thread-execution/#integer-arithmetic-instructions-dp2a)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `dp2a.lo.u32.u32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::dotprod::dp4a_s32` | `nvvm.dp4a_s32` | LLVM `llvm.nvvm.idp4a.s.s` from `int_nvvm_idp4a_s_s` | safe; scope thread; pure; memory none; convergent false | PTX 5.0 on sm_61+ ([PTX ISA 9.3, 9.7.1.24 Integer Arithmetic Instructions: dp4a](https://docs.nvidia.com/cuda/parallel-thread-execution/#integer-arithmetic-instructions-dp4a)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `dp4a.s32.s32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | @@ -272,26 +272,26 @@ This table is generated from the resolved catalog. Evidence stages below disting | `cuda_intrinsics::f16x2::fma_ftz_sat_f16x2` | `nvvm.fma_ftz_sat_f16x2` | LLVM `llvm.nvvm.fma.rn.ftz.sat.f16x2` from `int_nvvm_fma_rn_ftz_sat_f16x2` | safe; scope thread; pure; memory none; convergent false | PTX 4.2 on sm_70+ ([PTX ISA 9.3, 9.7.4.4 Half Precision Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#half-precision-floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rn.ftz.sat.f16x2 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::bf16x2::fma_relu_bf16x2` | `nvvm.fma_relu_bf16x2` | LLVM `llvm.nvvm.fma.rn.relu.bf16x2` from `int_nvvm_fma_rn_relu_bf16x2` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.4.4 Half Precision Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#half-precision-floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rn.relu.bf16x2 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::f16x2::fma_relu_f16x2` | `nvvm.fma_relu_f16x2` | LLVM `llvm.nvvm.fma.rn.relu.f16x2` from `int_nvvm_fma_rn_relu_f16x2` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.4.4 Half Precision Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#half-precision-floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rn.relu.f16x2 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::fma_rm_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rm.f` from `int_nvvm_fma_rm_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rm.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::fma_rm_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rm.d` from `int_nvvm_fma_rm_d` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rm.f64 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::fma_rm_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rm.ftz.f` from `int_nvvm_fma_rm_ftz_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rm.ftz.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::fma_rm_ftz_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rm.ftz.sat.f` from `int_nvvm_fma_rm_ftz_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rm.ftz.sat.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::fma_rm_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rm.sat.f` from `int_nvvm_fma_rm_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rm.sat.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::fma_rn_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rn.f` from `int_nvvm_fma_rn_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rn.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::fma_rn_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rn.d` from `int_nvvm_fma_rn_d` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rn.f64 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::fma_rn_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rn.ftz.f` from `int_nvvm_fma_rn_ftz_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rn.ftz.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::fma_rn_ftz_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rn.ftz.sat.f` from `int_nvvm_fma_rn_ftz_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rn.ftz.sat.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::fma_rn_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rn.sat.f` from `int_nvvm_fma_rn_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rn.sat.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::fma_rp_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rp.f` from `int_nvvm_fma_rp_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rp.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::fma_rp_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rp.d` from `int_nvvm_fma_rp_d` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rp.f64 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::fma_rp_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rp.ftz.f` from `int_nvvm_fma_rp_ftz_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rp.ftz.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::fma_rp_ftz_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rp.ftz.sat.f` from `int_nvvm_fma_rp_ftz_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rp.ftz.sat.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::fma_rp_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rp.sat.f` from `int_nvvm_fma_rp_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rp.sat.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::fma_rz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rz.f` from `int_nvvm_fma_rz_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rz.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::fma_rz_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rz.d` from `int_nvvm_fma_rz_d` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rz.f64 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::fma_rz_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rz.ftz.f` from `int_nvvm_fma_rz_ftz_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rz.ftz.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::fma_rz_ftz_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rz.ftz.sat.f` from `int_nvvm_fma_rz_ftz_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rz.ftz.sat.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::fma_rz_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rz.sat.f` from `int_nvvm_fma_rz_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rz.sat.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::fma_rm_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rm.f` from `int_nvvm_fma_rm_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rm.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::fma_rm_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rm.d` from `int_nvvm_fma_rm_d` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rm.f64 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::fma_rm_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rm.ftz.f` from `int_nvvm_fma_rm_ftz_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rm.ftz.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::fma_rm_ftz_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rm.ftz.sat.f` from `int_nvvm_fma_rm_ftz_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rm.ftz.sat.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::fma_rm_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rm.sat.f` from `int_nvvm_fma_rm_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rm.sat.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::fma_rn_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rn.f` from `int_nvvm_fma_rn_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rn.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::fma_rn_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rn.d` from `int_nvvm_fma_rn_d` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rn.f64 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::fma_rn_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rn.ftz.f` from `int_nvvm_fma_rn_ftz_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rn.ftz.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::fma_rn_ftz_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rn.ftz.sat.f` from `int_nvvm_fma_rn_ftz_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rn.ftz.sat.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::fma_rn_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rn.sat.f` from `int_nvvm_fma_rn_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rn.sat.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::fma_rp_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rp.f` from `int_nvvm_fma_rp_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rp.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::fma_rp_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rp.d` from `int_nvvm_fma_rp_d` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rp.f64 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::fma_rp_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rp.ftz.f` from `int_nvvm_fma_rp_ftz_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rp.ftz.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::fma_rp_ftz_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rp.ftz.sat.f` from `int_nvvm_fma_rp_ftz_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rp.ftz.sat.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::fma_rp_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rp.sat.f` from `int_nvvm_fma_rp_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rp.sat.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::fma_rz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rz.f` from `int_nvvm_fma_rz_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rz.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::fma_rz_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rz.d` from `int_nvvm_fma_rz_d` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rz.f64 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::fma_rz_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rz.ftz.f` from `int_nvvm_fma_rz_ftz_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rz.ftz.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::fma_rz_ftz_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rz.ftz.sat.f` from `int_nvvm_fma_rz_ftz_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rz.ftz.sat.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::fma_rz_sat_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.fma.rz.sat.f` from `int_nvvm_fma_rz_sat_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.6 Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rz.sat.f32 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::f16x2::fma_sat_f16x2` | `nvvm.fma_sat_f16x2` | LLVM `llvm.nvvm.fma.rn.sat.f16x2` from `int_nvvm_fma_rn_sat_f16x2` | safe; scope thread; pure; memory none; convergent false | PTX 4.2 on sm_70+ ([PTX ISA 9.3, 9.7.4.4 Half Precision Floating Point Instructions: fma](https://docs.nvidia.com/cuda/parallel-thread-execution/#half-precision-floating-point-instructions-fma)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `fma.rn.sat.f16x2 , , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::debug::globaltimer` | `nvvm.read_ptx_sreg_globaltimer` | LLVM `llvm.nvvm.read.ptx.sreg.globaltimer` from `int_nvvm_read_ptx_sreg_globaltimer` | safe; scope device; impure; memory inaccessible_read_write; convergent false | PTX 3.1 on sm_30+ ([PTX ISA 9.3, 10.28 Special Registers: %globaltimer, %globaltimer_lo, %globaltimer_hi](https://docs.nvidia.com/cuda/parallel-thread-execution/#special-registers-globaltimer)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mov.u64 , %globaltimer;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::grid::grid_dependency_launch_dependents` | `nvvm.grid_dependency_launch_dependents` | LLVM `llvm.nvvm.griddepcontrol.launch.dependents` from `int_nvvm_griddepcontrol_launch_dependents` | unsafe; scope grid; impure; memory none; convergent false | PTX 7.8 on sm_90+ ([PTX ISA 9.3, 9.7.15.1 Parallel Synchronization and Communication Instructions: griddepcontrol](https://docs.nvidia.com/cuda/parallel-thread-execution/#parallel-synchronization-and-communication-instructions-griddepcontrol)) | validated on `rust-llvm-23.1.3-aab11ee0-execution-control`; expects `griddepcontrol.launch_dependents;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | @@ -694,18 +694,18 @@ This table is generated from the resolved catalog. Evidence stages below disting | `cuda_intrinsics::f16x2::mul_f16x2` | `nvvm.mul_f16x2` | PTX-native `mul.rn.f16x2` | safe; scope thread; pure; memory none; convergent false | PTX 4.2 on sm_70+ ([PTX ISA 9.3, 9.7.4.3 Half Precision Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#half-precision-floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rn.f16x2 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::f32x2::mul_f32x2` | `nvvm.mul_f32x2` | PTX-native `mul.rn.f32x2` | safe; scope thread; pure; memory none; convergent false | PTX 8.6 on sm_100+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rn.f32x2 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::f32x2::mul_ftz_f32x2` | `nvvm.mul_ftz_f32x2` | PTX-native `mul.rn.ftz.f32x2` | safe; scope thread; pure; memory none; convergent false | PTX 8.6 on sm_100+ ([PTX ISA 9.3, 9.7.3.3 Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rn.ftz.f32x2 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::mul_rm_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.mul.rm.f` from `int_nvvm_mul_rm_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.5 Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rm.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::mul_rm_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.mul.rm.d` from `int_nvvm_mul_rm_d` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.5 Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rm.f64 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::mul_rm_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.mul.rm.ftz.f` from `int_nvvm_mul_rm_ftz_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.5 Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rm.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::mul_rn_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.mul.rn.f` from `int_nvvm_mul_rn_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.5 Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rn.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::mul_rn_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.mul.rn.d` from `int_nvvm_mul_rn_d` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.5 Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rn.f64 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::mul_rn_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.mul.rn.ftz.f` from `int_nvvm_mul_rn_ftz_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.5 Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rn.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::mul_rp_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.mul.rp.f` from `int_nvvm_mul_rp_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.5 Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rp.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::mul_rp_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.mul.rp.d` from `int_nvvm_mul_rp_d` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.5 Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rp.f64 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::mul_rp_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.mul.rp.ftz.f` from `int_nvvm_mul_rp_ftz_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.5 Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rp.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::mul_rz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.mul.rz.f` from `int_nvvm_mul_rz_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.5 Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::mul_rz_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.mul.rz.d` from `int_nvvm_mul_rz_d` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.5 Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rz.f64 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | -| `cuda_intrinsics::float::mul_rz_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.mul.rz.ftz.f` from `int_nvvm_mul_rz_ftz_f` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.3.5 Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rz.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::mul_rm_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.mul.rm.f` from `int_nvvm_mul_rm_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.5 Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rm.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::mul_rm_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.mul.rm.d` from `int_nvvm_mul_rm_d` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.5 Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rm.f64 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::mul_rm_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.mul.rm.ftz.f` from `int_nvvm_mul_rm_ftz_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.5 Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rm.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::mul_rn_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.mul.rn.f` from `int_nvvm_mul_rn_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.5 Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rn.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::mul_rn_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.mul.rn.d` from `int_nvvm_mul_rn_d` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.5 Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rn.f64 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::mul_rn_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.mul.rn.ftz.f` from `int_nvvm_mul_rn_ftz_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.5 Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rn.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::mul_rp_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.mul.rp.f` from `int_nvvm_mul_rp_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.5 Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rp.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::mul_rp_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.mul.rp.d` from `int_nvvm_mul_rp_d` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.5 Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rp.f64 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::mul_rp_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.mul.rp.ftz.f` from `int_nvvm_mul_rp_ftz_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.5 Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rp.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::mul_rz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.mul.rz.f` from `int_nvvm_mul_rz_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.5 Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::mul_rz_f64` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.mul.rz.d` from `int_nvvm_mul_rz_d` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.5 Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rz.f64 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | +| `cuda_intrinsics::float::mul_rz_ftz_f32` | `nvvm.scalar_arithmetic` | LLVM `llvm.nvvm.mul.rz.ftz.f` from `int_nvvm_mul_rz_ftz_f` | safe; scope thread; pure; memory none; convergent false | PTX 2.0 on sm_20+ ([PTX ISA 9.3, 9.7.3.5 Floating Point Instructions: mul](https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-mul)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `mul.rz.ftz.f32 , , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::barrier::nanosleep` | `nvvm.nanosleep` | LLVM `llvm.nvvm.nanosleep` from `int_nvvm_nanosleep` | unsafe; scope thread; impure; memory read_write; convergent true | PTX 6.3 on sm_70+ ([PTX ISA 9.3, Parallel Synchronization and Communication Instructions: nanosleep](https://docs.nvidia.com/cuda/parallel-thread-execution/#parallel-synchronization-and-communication-instructions-nanosleep)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `nanosleep.u32 ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::bf16x2::neg_bf16x2` | `nvvm.neg_bf16x2` | LLVM `llvm.nvvm.neg.bf16x2` from `int_nvvm_neg_bf16x2` | safe; scope thread; pure; memory none; convergent false | PTX 7.0 on sm_80+ ([PTX ISA 9.3, 9.7.4.5 Half Precision Floating Point Instructions: neg](https://docs.nvidia.com/cuda/parallel-thread-execution/#half-precision-floating-point-instructions-neg)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `neg.bf16x2 , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | | `cuda_intrinsics::f16x2::neg_f16x2` | `nvvm.neg_f16x2` | PTX-native `neg.f16x2` | safe; scope thread; pure; memory none; convergent false | PTX 6.0 on sm_70+ ([PTX ISA 9.3, 9.7.4.5 Half Precision Floating Point Instructions: neg](https://docs.nvidia.com/cuda/parallel-thread-execution/#half-precision-floating-point-instructions-neg)) | validated on `rust-llvm-23.1.3-aab11ee0`; expects `neg.f16x2 , ;` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) | @@ -6886,185 +6886,185 @@ This table is generated from the resolved catalog. Evidence stages below disting - backend codegen on `compute_100, ptx88`: `succeeded` — CUDA 12.9 libNVVM accepted the 1,794-byte module (SHA-256 3bb81df41493fd8254071078d5423dcdf5bbcdea542b46a77cf14d4d62081620), produced 3,060-byte LTOIR (SHA-256 623cfd620ace08aa14f84559fe9297b89f032ebac8eee747c38f3f499469e02a), and nvJitLink emitted 1,558-byte PTX 8.8 (SHA-256 8920b773f314dd4a60cdc620d168dd2acd0c6ee453a8f231ec1303f62665355f) retaining every exact instruction. - device link on `sm_100, ptx88`: `succeeded` — CUDA 12.9 nvJitLink produced a valid 6,008-byte CUDA ELF cubin (SHA-256 dc9e6034e77cb3fa6d4046a4b6bf5aa5e2b0d804bf7884638b093cd804e2caff). nvdisasm contains the expected FADD2, FMUL2, FFMA2 and .FTZ forms; subtraction appears as FADD2 with a negated source. Tool `/usr/local/cuda-12.9/lib64/libnvJitLink.so.12.9.86` reports `CUDA 12.9 nvJitLink V12.9.86` (SHA-256 `02d3acb5fe598dd20f0fca3cc03734ad164037a22747a01900561a42d0b8448f`). Artifact `cubin`. - `add_rm_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9dd11e1e9f47084b276eb70bc5ad65ca42d3c1a5f357e490477b10e470b5ae8d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3b17c7a77acdeaccbb6ffd876b1efe91d4507ecb15d7e9a2515c04f96dc44807. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0736508303112b799ebabcdcfa600ecfdef2a3c9ea9548cd80e1bb5316831c64. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode f9934d1038a5552cdf55ce0f17df5fcc611c849a241e8453cf3e3f3cf0c15962; canonical IR 8f0ad3024811995830aa253f4ab6c5d75fc39845e2275aabfa13fd8cb942d2d5. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e418177b0c9db7c7573a1dedd369d535ac67ec84b286bc05bed2946bc03dccfc; PTX 81609f9d41d2c795c42f21971cfc190b12f58e3963e328f7f4bf610259c4222d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e418177b0c9db7c7573a1dedd369d535ac67ec84b286bc05bed2946bc03dccfc; PTX 81609f9d41d2c795c42f21971cfc190b12f58e3963e328f7f4bf610259c4222d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `add_rm_f64`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9dd11e1e9f47084b276eb70bc5ad65ca42d3c1a5f357e490477b10e470b5ae8d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3b17c7a77acdeaccbb6ffd876b1efe91d4507ecb15d7e9a2515c04f96dc44807. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0736508303112b799ebabcdcfa600ecfdef2a3c9ea9548cd80e1bb5316831c64. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode bc7f42e0ec5e6483a919837745374eac40281d09f39f28b62c9a75a79fdbb218; canonical IR f3e0c65a40fe5423b8a24ae43593534ed7416ba36180ea74e9d9d56c08178ec2. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 1f3369b959c0ef2aed77091fcd2d3a0736d68a552214b4c56f5d602c806aac12; PTX 78c1ddfd01dc81fe4378cf8eb8ebd1ff0fdf831a4fec301c5ef793d81e12157d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 1f3369b959c0ef2aed77091fcd2d3a0736d68a552214b4c56f5d602c806aac12; PTX 78c1ddfd01dc81fe4378cf8eb8ebd1ff0fdf831a4fec301c5ef793d81e12157d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `add_rm_ftz_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9dd11e1e9f47084b276eb70bc5ad65ca42d3c1a5f357e490477b10e470b5ae8d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3b17c7a77acdeaccbb6ffd876b1efe91d4507ecb15d7e9a2515c04f96dc44807. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0736508303112b799ebabcdcfa600ecfdef2a3c9ea9548cd80e1bb5316831c64. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode aa0f77b09603061feab0dc368c0cf23b9718861dfce22e3fc639a6f5ae016b31; canonical IR 6e055be48461eb4ee303d2e2872323b37704ca69db86070cce202079a607022b. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input c5a5565c9597cd3362f58c0ccfeb4e75aff31c586f4aa44f11d1e8eff84bd60e; PTX 324a4ae4a929760832863e3abb0c36808ea3e985eee55e3c941d1baac2403bf9; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input c5a5565c9597cd3362f58c0ccfeb4e75aff31c586f4aa44f11d1e8eff84bd60e; PTX 324a4ae4a929760832863e3abb0c36808ea3e985eee55e3c941d1baac2403bf9; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `add_rm_ftz_sat_f32`: runtime `not recorded` - - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 4b064c89e5c841dd226829c91b04b7ebfffa55127d7ae8b7da0f7d1a3fb4eda8; canonical IR 4286a12c568dd9269a56d3360215fc8e8e871018627316858f4522243bd9c2e2. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input ce537f54d195eb09538ee0c08ec330fbb0e0d5328ba70686392b44c9943f1f40; PTX 5bfe9e86147ea594b8bb474ebeca67191a4c8c3f3e66a3099b7d50e4542f6d46; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input ce537f54d195eb09538ee0c08ec330fbb0e0d5328ba70686392b44c9943f1f40; PTX 5bfe9e86147ea594b8bb474ebeca67191a4c8c3f3e66a3099b7d50e4542f6d46; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `add_rm_sat_f32`: runtime `not recorded` - - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode b3df4e3cac222e5f24e857258eaff059b7b0381d691f7932f4b0550bde04e0ea; canonical IR b043345b6aeeb8b04d10d9175f0aa42c81f83cec8aef11d01cffae0733f1e3ef. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e5eb11903f065bbb151bb5ed9d8fb0eb42ae76fd0fb96df02711c774831a866a; PTX 07f1a2d8dab15e1e31ab5686ae546fb5778d0f0765baa6edf9ac198dcb333539; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e5eb11903f065bbb151bb5ed9d8fb0eb42ae76fd0fb96df02711c774831a866a; PTX 07f1a2d8dab15e1e31ab5686ae546fb5778d0f0765baa6edf9ac198dcb333539; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `add_rn_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9dd11e1e9f47084b276eb70bc5ad65ca42d3c1a5f357e490477b10e470b5ae8d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3b17c7a77acdeaccbb6ffd876b1efe91d4507ecb15d7e9a2515c04f96dc44807. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0736508303112b799ebabcdcfa600ecfdef2a3c9ea9548cd80e1bb5316831c64. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 4906c68b31a587e0533836e64102c875cf374a29f4f74f70bc25fad881e09245; canonical IR 86b1abe44c429b97cda1b9d1db97daa3c7ee30e31ea2cf2cb79fb54d357222a1. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input b45258cd817947f5b638831e7de967eb468c87ccf28f611c5b696c0c0b98f0ab; PTX abd80cdfde171f0256da6b509e6aa9d1f2b722e7a6130df8bdd8a6e6f5ebd3b3; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input b45258cd817947f5b638831e7de967eb468c87ccf28f611c5b696c0c0b98f0ab; PTX abd80cdfde171f0256da6b509e6aa9d1f2b722e7a6130df8bdd8a6e6f5ebd3b3; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `add_rn_f64`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9dd11e1e9f47084b276eb70bc5ad65ca42d3c1a5f357e490477b10e470b5ae8d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3b17c7a77acdeaccbb6ffd876b1efe91d4507ecb15d7e9a2515c04f96dc44807. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0736508303112b799ebabcdcfa600ecfdef2a3c9ea9548cd80e1bb5316831c64. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 00eef432ee19e5943038373c6dee49e3bfe18bf9b59402da3af2c57b8f7293d3; canonical IR 743bacc01c90edc19678a94fef121801f06b0674da1fa8d5e76fa6e19f1f30d5. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e55c7674226a23532f5bb5328d349920a690c46d15f0a7aa7a89852ca7a81928; PTX 32662ead78cd9c57c9815970abd619a42754dc8528c330aeba837091faa03c35; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e55c7674226a23532f5bb5328d349920a690c46d15f0a7aa7a89852ca7a81928; PTX 32662ead78cd9c57c9815970abd619a42754dc8528c330aeba837091faa03c35; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `add_rn_ftz_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9dd11e1e9f47084b276eb70bc5ad65ca42d3c1a5f357e490477b10e470b5ae8d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3b17c7a77acdeaccbb6ffd876b1efe91d4507ecb15d7e9a2515c04f96dc44807. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0736508303112b799ebabcdcfa600ecfdef2a3c9ea9548cd80e1bb5316831c64. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 714587e2cd143d7c81ae5cf1a2cc5c708765e3012c58c9fe8875f49db12be16d; canonical IR e292a3eaf055ee6842e1fff1eda21edfcd00cf9c10d10b3496092a677013a603. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input c0ffb157cf77ca925bedcf8e54c05a917d41e39346039cf9aa5abfafe68bb93a; PTX 1bd431d9af5cd36fcfcf384185e639c3cc8259823cff60449f82db6f1ab54fea; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input c0ffb157cf77ca925bedcf8e54c05a917d41e39346039cf9aa5abfafe68bb93a; PTX 1bd431d9af5cd36fcfcf384185e639c3cc8259823cff60449f82db6f1ab54fea; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `add_rn_ftz_sat_f32`: runtime `not recorded` - - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 4051efd46840af83910aff88e4c36e9cf47aff9107fdc7087af8093f4c5d8241; canonical IR 2493f5e594bc53e9508d95ac95d4ee282efcc089aa7ed83e88bff34cd8c44242. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input dec89dc152625c26a321d7f0b80e2feb017c0142e705ddb70067e5617f1fa327; PTX edf6fe12657789f0360aba76a60b3fdcf92d9b5e761859dd283513c32ac4b9a4; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input dec89dc152625c26a321d7f0b80e2feb017c0142e705ddb70067e5617f1fa327; PTX edf6fe12657789f0360aba76a60b3fdcf92d9b5e761859dd283513c32ac4b9a4; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `add_rn_sat_f32`: runtime `not recorded` - - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 5896c2c6cdf94a8f2e94037455158eaa52a454cb5b6d17e91d0278ec073aed42; canonical IR c3034f8ba93e6c37f8a510d7d8d272c02432162d8a748adc3de3c8846135ebbb. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input f884bd3746714ea7b3d8a3e5e53d975d49446bb049984568c659f184a7f08906; PTX 31b7693cd7be0022424ca48fbe0ad167c77ac540a14685ae4ecd82c903f7d985; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input f884bd3746714ea7b3d8a3e5e53d975d49446bb049984568c659f184a7f08906; PTX 31b7693cd7be0022424ca48fbe0ad167c77ac540a14685ae4ecd82c903f7d985; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `add_rp_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9dd11e1e9f47084b276eb70bc5ad65ca42d3c1a5f357e490477b10e470b5ae8d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3b17c7a77acdeaccbb6ffd876b1efe91d4507ecb15d7e9a2515c04f96dc44807. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0736508303112b799ebabcdcfa600ecfdef2a3c9ea9548cd80e1bb5316831c64. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode f751d4889e5442fe29adaacbcdcbfeed6047a5a806740b9ae070c7713b0bff28; canonical IR 92f40d69575bb2ec86d1f9836719dd74ef86949d97ac301df47e2a5ce6cad2f1. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 744b25875d7093e7fd5e06a09dbb18b9bda9343d139a15fa45f98af2bbd69151; PTX 2b295f742d60f76d98f09523c5e36f5588132f0f52df5a4fc47f2a54809fb6b4; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 744b25875d7093e7fd5e06a09dbb18b9bda9343d139a15fa45f98af2bbd69151; PTX 2b295f742d60f76d98f09523c5e36f5588132f0f52df5a4fc47f2a54809fb6b4; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `add_rp_f64`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9dd11e1e9f47084b276eb70bc5ad65ca42d3c1a5f357e490477b10e470b5ae8d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3b17c7a77acdeaccbb6ffd876b1efe91d4507ecb15d7e9a2515c04f96dc44807. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0736508303112b799ebabcdcfa600ecfdef2a3c9ea9548cd80e1bb5316831c64. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode fa037bb4c69ca5dbb1517a9ae359e58dc559cb985517b467d84946888113f540; canonical IR 756573f679fe11ecfa849dc94ae0164bdb108c02c7774cc37e027b81139da131. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input a43a1bdd8898a1348218e57e0b0cc8a6d34a10bd148857f782d4568947353688; PTX c93b6ea5ce08636f3477781e157c42792144fa710101dca84803ec0d727180be; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input a43a1bdd8898a1348218e57e0b0cc8a6d34a10bd148857f782d4568947353688; PTX c93b6ea5ce08636f3477781e157c42792144fa710101dca84803ec0d727180be; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `add_rp_ftz_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9dd11e1e9f47084b276eb70bc5ad65ca42d3c1a5f357e490477b10e470b5ae8d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3b17c7a77acdeaccbb6ffd876b1efe91d4507ecb15d7e9a2515c04f96dc44807. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0736508303112b799ebabcdcfa600ecfdef2a3c9ea9548cd80e1bb5316831c64. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 30afff6d95731313be20be9fc9a5915870a502c69a51ab635f072eb997efc210; canonical IR f6b44a6e746a49e7a299d1da424a6bced1181eab104768ca5295740133b39cd2. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 55cf1156ccc21305c842b6f6e622f4858499e0ddce52fc5c0b4eba00f85a7503; PTX 62f02c47ca6e38b49d7224cd07b962278e8edf7b5e244c3f472f0c11f7f5b41a; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 55cf1156ccc21305c842b6f6e622f4858499e0ddce52fc5c0b4eba00f85a7503; PTX 62f02c47ca6e38b49d7224cd07b962278e8edf7b5e244c3f472f0c11f7f5b41a; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `add_rp_ftz_sat_f32`: runtime `not recorded` - - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode deeaf0c1aa02868245e3dc087ee1cc0d3716ad73acf402a95e58309ee95f07ce; canonical IR bb60971343d60d8084295441a8d7f7db974afd220d994660224abd3a203b3a10. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input cf99f5e2a7fec608b19984b80f04669853cb9cca3b92b43a5eae0f5e5e5a41bf; PTX a30e859f828718fe375c6376d4678d659d73c1c71ee0b0f01cad23d560d94588; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input cf99f5e2a7fec608b19984b80f04669853cb9cca3b92b43a5eae0f5e5e5a41bf; PTX a30e859f828718fe375c6376d4678d659d73c1c71ee0b0f01cad23d560d94588; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `add_rp_sat_f32`: runtime `not recorded` - - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 7f58f2252b0ddbcb7ee8e4fe2ebffcaca74d630b8724c5f7a3a170948e4c0f55; canonical IR 9a9d02d9bbfd0a6c00a1aba05fb2e6c8ddf83a74b95aea1cd89758407b2669ff. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 9dc7f6935783ce5d9607ac76b90936509f8e4423ac6a362ea588200179e58995; PTX dced750c42722c8d011f4aa0b0be18e41f86a733ac23a27540aaa09cd5a2d4a7; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 9dc7f6935783ce5d9607ac76b90936509f8e4423ac6a362ea588200179e58995; PTX dced750c42722c8d011f4aa0b0be18e41f86a733ac23a27540aaa09cd5a2d4a7; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `add_rz_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9dd11e1e9f47084b276eb70bc5ad65ca42d3c1a5f357e490477b10e470b5ae8d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3b17c7a77acdeaccbb6ffd876b1efe91d4507ecb15d7e9a2515c04f96dc44807. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0736508303112b799ebabcdcfa600ecfdef2a3c9ea9548cd80e1bb5316831c64. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 2a2ce18cd71fe1c891023cc15787bd9e2b74e226d7f4d5f5c4f588481a1a55b4; canonical IR a62381d4152598867d2c00a12a539f92ee42f3e53826aa93374f6b6d7bf95774. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 89e825a3ced8de0eae4f18951bf4f8ca2071c495e1f057788aacb008e564c9c9; PTX 2c916b685c9b74f29e787af934794e4d7f993976722c1cefa2572851b6d300cc; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 89e825a3ced8de0eae4f18951bf4f8ca2071c495e1f057788aacb008e564c9c9; PTX 2c916b685c9b74f29e787af934794e4d7f993976722c1cefa2572851b6d300cc; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `add_rz_f64`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9dd11e1e9f47084b276eb70bc5ad65ca42d3c1a5f357e490477b10e470b5ae8d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3b17c7a77acdeaccbb6ffd876b1efe91d4507ecb15d7e9a2515c04f96dc44807. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0736508303112b799ebabcdcfa600ecfdef2a3c9ea9548cd80e1bb5316831c64. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode bcea3bd9a8706c996ef0a934e039e7473f5a1aa849e6de40fbe05f1840da6dbe; canonical IR 261944c7ac7b765072275a41eac4f83e443c70f7600d3ef57f5f06821760e71d. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 10e608479b1706000af7524c4f3bdf3f7cf0ef1a20092c0e55590d19d7a2c81d; PTX 1a7dfcf431854618ba81b43b833d56cc743dd848f8f5b71c34641d644726862b; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 10e608479b1706000af7524c4f3bdf3f7cf0ef1a20092c0e55590d19d7a2c81d; PTX 1a7dfcf431854618ba81b43b833d56cc743dd848f8f5b71c34641d644726862b; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `add_rz_ftz_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 9dd11e1e9f47084b276eb70bc5ad65ca42d3c1a5f357e490477b10e470b5ae8d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3b17c7a77acdeaccbb6ffd876b1efe91d4507ecb15d7e9a2515c04f96dc44807. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 12 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 0736508303112b799ebabcdcfa600ecfdef2a3c9ea9548cd80e1bb5316831c64. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode d4dadf6ee4eb21a92873d6f9662158656b7ca18f0a84a823f6affa7697406ead; canonical IR 961a89f3d7517a81429159fef786b2c083227aed53b431af09485eb1b0632538. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 1e4e9b8674798f340b738cd96cc1ac09faeb3cf19c362daceffb2799b434d721; PTX 7618a645d06a5c968510e353670b2aa44c3348d9ab3cc26d0a20abbf3cb335ad; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 1e4e9b8674798f340b738cd96cc1ac09faeb3cf19c362daceffb2799b434d721; PTX 7618a645d06a5c968510e353670b2aa44c3348d9ab3cc26d0a20abbf3cb335ad; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `add_rz_ftz_sat_f32`: runtime `not recorded` - - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode d6373b162715e509c2ac22077358477b7d825f7da0519c78bf88b3d9b8a6d5cf; canonical IR edad3cbd88093c18d9a600d49bd4ef24e71000bd2c2965a1581febabc0982c11. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input df43766ad4fd2acde4a73dc43c763eae01c5b0ea5d1ca2c0645676fded0a44fd; PTX 4cd16d8f5eed14a0e2935148533ec0c6db2bf5462cda30893b266d037cdadfa6; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input df43766ad4fd2acde4a73dc43c763eae01c5b0ea5d1ca2c0645676fded0a44fd; PTX 4cd16d8f5eed14a0e2935148533ec0c6db2bf5462cda30893b266d037cdadfa6; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `add_rz_sat_f32`: runtime `not recorded` - - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 4,719-byte typed-pointer NVVM IR fixture (SHA-256 4115a5696631ec940f8f90cb4f70c21f929f58fa259b34533528e58b11c0968b) to 3,023-byte PTX 9.3 (SHA-256 943adbcba0c1004fe6d4bff9af24f15c965ab426c1b47b878a9425a70ce5bb5f) and 3,540-byte LTOIR (SHA-256 1b10b69dae868b3f058b31d75e855d5433966b87af138cf74cf3b8a99af46e3c). The PTX retained all 20 exact, unique add forms with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 4,008-byte sm_80 cubin with SHA-256 bf08ec6f01a1a355c9d39c967d133ff8146de0cfb5da01bb5f1679cbc0551b27. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 4,008-byte cubin with SHA-256 55b093a238d90be57b1962928326d1ca597ad54189fa2097b3e2207177d708c0. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 6ab5896ae055db562e3de871a22baa8853dd3af1a4e64c8e8fb99a24cd372631; canonical IR 9c7b2e39b1c83b8ea1548f1c26b90d92924e8734c89f3c1a024ccaef436a571b. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 21ab2a705aaf3c687dfe1499c95381a768647f73193804f351e9d8b37778f1b9; PTX 9fc0426b3db8fe567a0cf26c573cd8f178d5777a8b144fc223811aee92ff9fe1; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 21ab2a705aaf3c687dfe1499c95381a768647f73193804f351e9d8b37778f1b9; PTX 9fc0426b3db8fe567a0cf26c573cd8f178d5777a8b144fc223811aee92ff9fe1; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `barrier_cluster_arrive`: runtime `not recorded` - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.8 / sm_90+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - declaration canonicalization on `sm_90`: `succeeded` — Revalidated 4 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 709ac5ee2e1dd7825ecc0de9afa6ac275df2df2edeadc6775491baa136592e22. @@ -8477,113 +8477,113 @@ This table is generated from the resolved catalog. Evidence stages below disting - PTX assembly on `sm_90, ptx78`: `succeeded` — CUDA 13.3 ptxas accepted the 469-byte exact sm_90/PTX 7.8 fixture (SHA-256 7455770182c5f46203de2170777b7bce100e445a41562bbc34945256325fa93a) and produced a 3,704-byte cubin (SHA-256 33f8941a912c4580054123f3ce55e599143c13cdfa161f0b3de1c55158a1780f). It also assembled the libNVVM-emitted PTX to a 3,704-byte cubin (SHA-256 1302e6a89ef1629ad728d8459ca785a8dc0a8901231869bbb56c0435e78922bb). Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - device link on `sm_90, ptx93`: `succeeded` — CUDA 13.3 nvJitLink 13.3 consumed the fresh LTOIR and produced a 3,704-byte sm_90 cubin (SHA-256 7758fa36cb80e9d0f3bd35c3084f710b4dd47870ffb3e9c4f4f1f378a2beefab). Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. - `div_rm_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 4f65929b0778fc4e60e852b68a8b80015704712e34a80c1b00d58574f383cb83; canonical IR 881f29eadb6fe5033bede3eb73b71fdbb822d50fe9de999784fb465e8f2e8b9d. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e64302ecae10b7565d9734062e42a34b9bb580f8f19f433bf20cd96fb4001eb7; PTX 918681e921e79b02f50fd02b0e3bdba181daafcfc1f9d888d0c4114368c79842; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e64302ecae10b7565d9734062e42a34b9bb580f8f19f433bf20cd96fb4001eb7; PTX 918681e921e79b02f50fd02b0e3bdba181daafcfc1f9d888d0c4114368c79842; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `div_rm_f64`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 98eb91e439f3018ae1421d7588f9beead3ef1e27ba544a5bab28a78ac31e7307; canonical IR f965b4b829e00e2569be716b8f8c460dcb05aed9f7c38d65dcad43b576890be0. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input dc5c17b9371227026a8ba8049611debe66237ea5524cb5c264c86eb6a8b6cb82; PTX 4ff2dae1ed54430167e79baff2620975eb201b2978c12fa7805e9c278b1dacf0; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input dc5c17b9371227026a8ba8049611debe66237ea5524cb5c264c86eb6a8b6cb82; PTX 4ff2dae1ed54430167e79baff2620975eb201b2978c12fa7805e9c278b1dacf0; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `div_rm_ftz_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 2b91e12e8fee2ade6958192f8c46349bbe8f3bfde8c33b60251ab3849c0e2f0d; canonical IR 09cb0d4613d535f3fab705d2b2c5dd5620df1ab76436515abf068f6117169334. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 45edec0ac37ea1ce73e890423d94409da024e81bde096759ef7f403505a77bc9; PTX 11fd263e2af81736c9de306c3d999d35fb5e85b3bafa066194fbed06b9b5cb35; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 45edec0ac37ea1ce73e890423d94409da024e81bde096759ef7f403505a77bc9; PTX 11fd263e2af81736c9de306c3d999d35fb5e85b3bafa066194fbed06b9b5cb35; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `div_rn_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode c8f094ad7fe975839748a01d0710de7d5a7c1a82ef87faeedb6ad4bfae05e304; canonical IR d58032888364b71e28147a64a0d6593dff99cb8a98dff79c01e00db5265e55fc. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 70d667e3e5a210087b074a59d905cec7541a295eaacbc2efd97792570780e196; PTX e0b39f1f88d67360fa4a89b086bf1fe943b3cac96a2109c4f0985931deaaae9c; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 70d667e3e5a210087b074a59d905cec7541a295eaacbc2efd97792570780e196; PTX e0b39f1f88d67360fa4a89b086bf1fe943b3cac96a2109c4f0985931deaaae9c; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `div_rn_f64`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 111c4133fdac8a40e94ef182b6690286bef66dc47434ae1321354dc49cb04f47; canonical IR c6164908f74bdafdeefaf52b1a0458cb42b788e83b0dc459f9ea1659dd90d0d9. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 5fa9bb1f4f3960d7205c2f51d22c9495c1d5f84c286fc69af0b37294f4d50f40; PTX 12e2c0e9618b2d9ff96a3522c9826c4fef4bf95baccbab27bf40ae23bb9d5acf; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 5fa9bb1f4f3960d7205c2f51d22c9495c1d5f84c286fc69af0b37294f4d50f40; PTX 12e2c0e9618b2d9ff96a3522c9826c4fef4bf95baccbab27bf40ae23bb9d5acf; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `div_rn_ftz_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode a61ab19a202eaa31b721d753a15b2d930600da7261cd9cd47d43bbad0901e59e; canonical IR e976bc7be4c74be02e50e01004cd6b80c662222a5302d57233ccfb4a3f736a2b. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e17a37dd7db077eeb29e37f339cc2079ac2b56493d30ffa84140bac16d9fb672; PTX 271a96d5492a80359857e23bc83a9e45cecfa626404c2cb5088a2ce3a14f6270; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e17a37dd7db077eeb29e37f339cc2079ac2b56493d30ffa84140bac16d9fb672; PTX 271a96d5492a80359857e23bc83a9e45cecfa626404c2cb5088a2ce3a14f6270; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `div_rp_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode ddc0b85220df5c6bd83cc79d351d0af9b0202230a9b33fa537eabbcc7be500ac; canonical IR 35ed93d9237feffef19d1980b0954279a3f17e890bd771c441ad4e81a9de0039. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input a450ff2e5a2ab7d65f3764d36a943039942f61c44ff592b3e86d26a9f43a9c63; PTX 329257b2135da493cc00d2a3d329dc1e3f144d2b7bb1077e7da0b5ce31edf641; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input a450ff2e5a2ab7d65f3764d36a943039942f61c44ff592b3e86d26a9f43a9c63; PTX 329257b2135da493cc00d2a3d329dc1e3f144d2b7bb1077e7da0b5ce31edf641; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `div_rp_f64`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 3fc32170b5a53e699829cf32e18d0b7a6d8551650c883ccab2b1c1977934e823; canonical IR 706618c58fbe6ad068339c2e81423214a191a39e49319193b5f4b86b65d6476c. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input ba5a45a618f00b184f6f4406f16fe9ff96c2267f76df131653f0a669ab5a539c; PTX 83e1a13980266ec1fa39fd597064f1fa2c57c17c32a27905c0f67105ccf6556f; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input ba5a45a618f00b184f6f4406f16fe9ff96c2267f76df131653f0a669ab5a539c; PTX 83e1a13980266ec1fa39fd597064f1fa2c57c17c32a27905c0f67105ccf6556f; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `div_rp_ftz_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode abe750764d37a93c709f987380b7220d81dc476e7e2d799d793eac8e70918063; canonical IR 885798008d8dacb036111605953c74ca804f0c158e62bbf33b5b353b87ae610d. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 2b80a436e4f5ee1dbee2c0375c84f4b9c731ce43b2ac11bec8eeff1ca447e885; PTX 596d076ae134ac7e1292d63be88d7773a0d5da29348e2f41c94e97365bd8fc3d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 2b80a436e4f5ee1dbee2c0375c84f4b9c731ce43b2ac11bec8eeff1ca447e885; PTX 596d076ae134ac7e1292d63be88d7773a0d5da29348e2f41c94e97365bd8fc3d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `div_rz_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode fa4724faa51258f7c5b89753691633b0e8da0e7608884dfe47a476f64be8bf75; canonical IR f29620f20383dfb6fbfc26179e1d8148f04863ec0fbc3c6a1713c78ee68ada17. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 8b8c81889b821917b8312bba62a90d00caa26a0536b6adc911f94e650c1e55b2; PTX 96f72e7886c7b84313f3fcadce27b74d9c733aef3e241bbcaa8d9e00a761b82d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 8b8c81889b821917b8312bba62a90d00caa26a0536b6adc911f94e650c1e55b2; PTX 96f72e7886c7b84313f3fcadce27b74d9c733aef3e241bbcaa8d9e00a761b82d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `div_rz_f64`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode dcb6fc41c86e75d1c86f3bec23f4ff7c5c353d61feec52342ce5383ee9f9efa8; canonical IR 32a8e7bd41c2449a4203def04f6d797130f1dc24f566e4b797bfc1716ea2258f. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 1842ad0d6c954014d11e54f571937bdd06c81c60718f85d8c466115e60eb79d8; PTX 0fb8324f7b279ebc55830c5271355bfd6fb504f040b4bb053552e1121123641d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 1842ad0d6c954014d11e54f571937bdd06c81c60718f85d8c466115e60eb79d8; PTX 0fb8324f7b279ebc55830c5271355bfd6fb504f040b4bb053552e1121123641d; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `div_rz_ftz_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 7ee1df4e5f45a6e3e85f5a08250ba5390ff9c7d0cb562af08e427a1b567f9559; canonical IR 986ab2872c78e953894629e6c3b1e2109ccee9734160df27a3e4db534d000b9e. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input f5a74f740ad4453d9c3298bceb38f8a9c0c8719d6c77d228fe450b07ef91a6ec; PTX e5e4867abc2832760637bae848db4f56a016129b46a9fc001cd8a6af2a58cb26; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input f5a74f740ad4453d9c3298bceb38f8a9c0c8719d6c77d228fe450b07ef91a6ec; PTX e5e4867abc2832760637bae848db4f56a016129b46a9fc001cd8a6af2a58cb26; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `dp2a_s32`: runtime `not recorded` - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 5.0 / sm_61+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - declaration canonicalization on `sm_61`: `succeeded` — Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 cf14ce2498510d2ccdf8e26062d9dab33a2f018ab44d7402f731ee721edd9586. @@ -8848,185 +8848,185 @@ This table is generated from the resolved catalog. Evidence stages below disting - backend codegen on `sm_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM accepted the exact route at compute_80 as part of the combined three-form upper probe and produced 1,860-byte LTOIR (SHA-256 54983753f6c883e98ddef424042a704c0e38f32fcff6620ef12cf4734543d549). The instruction floor is PTX 7.0/sm_80. - device link on `sm_80, ptx93`: `succeeded` — nvJitLink produced a 3,496-byte sm_80 cubin (SHA-256 f70d50b154c66b2dc59909f29f449274a86d8300048982b8b1aa17b276193fe0). cuobjdump SASS contains HFMA2.MMA.RELU and both HMNMX2 predicate forms, matching the LLVM/ptxas path. A compute_75 LTOIR negative reached nvJitLink but failed terminal PTX compilation because all three forms require sm_80. Tool `/usr/local/cuda-13.3/lib64/libnvJitLink.so.13.3.33` reports `V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. - `fma_rm_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 09f44ef419ab05d10716cfdf7cfaa75003586a915ae79227d75e7e0bb854c731; canonical IR 682cd88ea120fca5d8fc349177cd50f25aec5317b8d82d61c20af031cba1b677. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input d5539e68e09bfb47670eafa13256aacaa6c96cfa523d20a8bb585402242fc193; PTX 7e66354f63b1bcea7ba4b3e2ea4879c8886d3ad8130bdf2a36afe1b70f79855c; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input d5539e68e09bfb47670eafa13256aacaa6c96cfa523d20a8bb585402242fc193; PTX 7e66354f63b1bcea7ba4b3e2ea4879c8886d3ad8130bdf2a36afe1b70f79855c; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `fma_rm_f64`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 287228c3e60fca183b467eae3fb33dc34f80f3754455410112c68382f8582905; canonical IR 56af89bc7ea141713a822b6bcf855795a5c342c26b8bdcdd54255a5adf034e5a. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input d696e9725b3705b7d1e0fb5ce20940fc87fe6c421f6c72ded81254aac1599687; PTX ca75a5ccec41516cec2fae78bdc4fe06257793dbf1eebe64cdc60e78fcb24f8f; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input d696e9725b3705b7d1e0fb5ce20940fc87fe6c421f6c72ded81254aac1599687; PTX ca75a5ccec41516cec2fae78bdc4fe06257793dbf1eebe64cdc60e78fcb24f8f; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `fma_rm_ftz_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 8e8bb6b338bf9038d039666038697594955b04e3a83dede5a93242461cdff9f3; canonical IR 76b88eceb3713395ec477c604f5e1a5e85dc5670c6905348cffaa0ddb81e6811. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 6f95c7b5351094db59a0a27a6dd635486eb7a03a3dbb1a25c39bc0b55c98682c; PTX c7ce37008e99cd502baddb447b2da136f24a0f5c65b2da03ce3f521845f7e002; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 6f95c7b5351094db59a0a27a6dd635486eb7a03a3dbb1a25c39bc0b55c98682c; PTX c7ce37008e99cd502baddb447b2da136f24a0f5c65b2da03ce3f521845f7e002; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `fma_rm_ftz_sat_f32`: runtime `not recorded` - - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 8566544060a4270d2cf4e7652bb7b97260e32afe5d947c2344dfb9b785a5ee78; canonical IR 62b57361073aebd859f86d5ad74efa479414d8c0c05a8e6852d775110ac7f8de. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 9d1de2389ecb6f7613144bf5a9da7a59d669bf8eeb6277cc6897053507201d4e; PTX 51f350e8dcc5b924c6429d3842dce981057454ef8eb4c2a3f86220e5b0cffb80; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 9d1de2389ecb6f7613144bf5a9da7a59d669bf8eeb6277cc6897053507201d4e; PTX 51f350e8dcc5b924c6429d3842dce981057454ef8eb4c2a3f86220e5b0cffb80; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `fma_rm_sat_f32`: runtime `not recorded` - - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 24fd4bbd321a3f0e826b86875021c09bbfa8925654eee29d384382de9252f55d; canonical IR 875c85c382022f334f8a76beb04c8a4699b384f8014007a55f85f589fcc2d38e. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 4e7a2be5dbf69315081568647203ac80416f52c3bf521d8be3345d599fb739c6; PTX e73ddd10405009b75e8856eaff39d7b5bd0f2b01c8e9a545099280740ac0b508; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 4e7a2be5dbf69315081568647203ac80416f52c3bf521d8be3345d599fb739c6; PTX e73ddd10405009b75e8856eaff39d7b5bd0f2b01c8e9a545099280740ac0b508; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `fma_rn_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 96a5b9daa9c3e9dc8d6c0e779e3240fc72595f1c5bea3cc1cc8d77796fb3a86b; canonical IR fbc9eb19bcab3691fce05b2f12755b9c999b6a98ab828084374b8bde103296e1. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e013026b2457bce1f4d453774ff2efc20ace0b2cbb58f40f544bacdefa873efc; PTX c341c3549c334576726ea141782dc0d45ae7f8a92588197a6b03440e37043407; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e013026b2457bce1f4d453774ff2efc20ace0b2cbb58f40f544bacdefa873efc; PTX c341c3549c334576726ea141782dc0d45ae7f8a92588197a6b03440e37043407; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `fma_rn_f64`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 6e2610170f4565cbcad389a3d8841476dca4fbe49c290754dcff3c5ba5c25102; canonical IR 5bc7f5846c57b1e22f7f1b85ce7384cdbbbbaf3799cbf1281b742bcc003d3758. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 28293cf1109dd5b1426c764ec04f87f06b5763107ca90189f3dd68fcd80d40f8; PTX 753bd5786dc3ad54672840db1726ed70040af88069b651972c581943f2d155e7; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 28293cf1109dd5b1426c764ec04f87f06b5763107ca90189f3dd68fcd80d40f8; PTX 753bd5786dc3ad54672840db1726ed70040af88069b651972c581943f2d155e7; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `fma_rn_ftz_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 5adb0ba90dcd6898fa2d0c4c24e3c51ea093e43063ebf18dfe38ea878b0ca8a0; canonical IR a56a82b531333494713f6d5a0db60af420b3fa722d6c1ed7062db1711c05c7d5. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 7f29339d7f2fd4b9d09b844668850bea86b98642fafe218c79a9aa78c7f4e284; PTX 8a2c085b1407c35d2d34d9ee7b00a1d0349bf9d42f8e91f938b1e1ce2aae0465; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 7f29339d7f2fd4b9d09b844668850bea86b98642fafe218c79a9aa78c7f4e284; PTX 8a2c085b1407c35d2d34d9ee7b00a1d0349bf9d42f8e91f938b1e1ce2aae0465; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `fma_rn_ftz_sat_f32`: runtime `not recorded` - - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 73b2dde1bbc35dd06a4cdfacad975668c83260958389e0f67b851336a2f5cea8; canonical IR 3459d1a96892b290f8558de50debc12a1639d3a29fa9ec3dc7bf29a783be0d54. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 69d5c2d680514e8c5885272f847cf5acd3fbeb864b769718543b6daced2bfcdb; PTX 9f505074ff997e70b3b20c089c9f3179884f947db85970968f3280648bdeeacb; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 69d5c2d680514e8c5885272f847cf5acd3fbeb864b769718543b6daced2bfcdb; PTX 9f505074ff997e70b3b20c089c9f3179884f947db85970968f3280648bdeeacb; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `fma_rn_sat_f32`: runtime `not recorded` - - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode f3128180eb7c537006e684e759b3cae3c940141aca6c1095a150d29c2ebeb147; canonical IR 13c4f2ba29b18a55331790f5b715b6a6a74746fa0ee70e798ca56fa1cdfc350e. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 52bbb22c08b0aac43c481fe3d4cb2115b7aab82d95511cd849831bc8b73c91e3; PTX 2ec6ab8e284d016c5608c4fbc08fc9261b61c318b5c57559727f40e8b04a6f37; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 52bbb22c08b0aac43c481fe3d4cb2115b7aab82d95511cd849831bc8b73c91e3; PTX 2ec6ab8e284d016c5608c4fbc08fc9261b61c318b5c57559727f40e8b04a6f37; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `fma_rp_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 54180d45e47a904cf0312cf331529a56b59cd001e6aee819caea2d39614e1643; canonical IR aa7e3923594843a16fb0832b022af7f06ce7b975cba947ce987d9bd89cc63fc1. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input b7cd6c9d7b48cd3b11fdd39d01a5f8896f17c80fce4b56173f4006d2b82e071a; PTX d1c33fe2201f52f898f83e0730c40a36af9af854431287eb58d30659d82a7ddd; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input b7cd6c9d7b48cd3b11fdd39d01a5f8896f17c80fce4b56173f4006d2b82e071a; PTX d1c33fe2201f52f898f83e0730c40a36af9af854431287eb58d30659d82a7ddd; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `fma_rp_f64`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 2741bdd15c52e81b359f66da821509331d195db43482cd2f0f6a79d0a501bd07; canonical IR 224c49f80622a7de2d3371c6e1d77dd2343d070e8d43a7c2fb9a0b2377619c3a. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 48f7c8301e9ace472aafa5b2be92f4ce919b22c9ebefeee737dde6525558c07c; PTX 9c49748568ecf367abcab2b34352f4c3c3f01f1741ecc36105ce6338bf19c897; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 48f7c8301e9ace472aafa5b2be92f4ce919b22c9ebefeee737dde6525558c07c; PTX 9c49748568ecf367abcab2b34352f4c3c3f01f1741ecc36105ce6338bf19c897; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `fma_rp_ftz_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode da44e89cd99327a2abfac379c9fbf267678064b94fd9af7816790cc67915b4bd; canonical IR 101d5265424f629753c17b48a1a7672e3b38cc99b4f4f5ffe1cea1a81edf401b. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 220914f1c6d2bacc28c39872d28fd45e44c13749997e42697577ca66ca2ed5b1; PTX a225e339ee815afe704f755952f545f31400444034dc6706856474c52d52aaa3; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 220914f1c6d2bacc28c39872d28fd45e44c13749997e42697577ca66ca2ed5b1; PTX a225e339ee815afe704f755952f545f31400444034dc6706856474c52d52aaa3; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `fma_rp_ftz_sat_f32`: runtime `not recorded` - - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 163f5dc7c002c7dd412b3831330908d46e28e08b8888fe713c5558bebd1ffb02; canonical IR d814a00145f9ebd0a8adc3fd3771a7911b21adf7c659d322ac72770011e4e444. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e641a019fbf66f94235137abc9daf0559068ec02af921d640cfc330b2c5bb16d; PTX 85025b19c592e3b757f4ce119f982f29c629e20d1e225ab9f88aef73552eaee5; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input e641a019fbf66f94235137abc9daf0559068ec02af921d640cfc330b2c5bb16d; PTX 85025b19c592e3b757f4ce119f982f29c629e20d1e225ab9f88aef73552eaee5; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `fma_rp_sat_f32`: runtime `not recorded` - - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 0e377278eaaa5a805dd7b93627ccc2e6b798cafbd82676d6cf8b4cc1ca70bee5; canonical IR 600555ff3d12ba05c33638fb6860813aa143cbc94cc46d4d3c19b5aee0a97bf8. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input f0271423950f061ee102e62b949caaa64e1a8e243472bb45be05fd35bda20115; PTX b9ee18611bea21d9866f12d9dd700c680afc530824691a5ec266603a5f54e73a; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input f0271423950f061ee102e62b949caaa64e1a8e243472bb45be05fd35bda20115; PTX b9ee18611bea21d9866f12d9dd700c680afc530824691a5ec266603a5f54e73a; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `fma_rz_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode f8a2e51bbc2a27856a421b98a9cefe440e8e7f40b4b3244e14442cd382983acf; canonical IR 96e7b7a57e58a41d022b9df4ccd163213711c3b04f4c761554b60a52bd6d9e37. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 0c47ae32749372a26cc21ca53ddc5d9a3cf9b30f8105152d4c36df55b730a0fc; PTX 71d6fa1af986706f17ba4b0614708b11d013c91ab391e1928630faa7802e53fe; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 0c47ae32749372a26cc21ca53ddc5d9a3cf9b30f8105152d4c36df55b730a0fc; PTX 71d6fa1af986706f17ba4b0614708b11d013c91ab391e1928630faa7802e53fe; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `fma_rz_f64`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 7f931753069dba54b2b1a739f873076cd47278f7290f7b28d1a10e9a41159c28; canonical IR 86cf0dab0b07f36c1a391d6ef5bdea424c482509c7bed335dc7ffaad6f10a94a. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 3539abf0c84e87e58e7bdfb1fc6cb7d2af1e59abca2352f00469f90d6009b2a0; PTX eee8bb584ba8557f3c6680f3901c9dd072f6fb8be0f0389f21a6bf0ac7dfac92; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 3539abf0c84e87e58e7bdfb1fc6cb7d2af1e59abca2352f00469f90d6009b2a0; PTX eee8bb584ba8557f3c6680f3901c9dd072f6fb8be0f0389f21a6bf0ac7dfac92; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `fma_rz_ftz_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode bfb93816d3eb2756e1092d6f7f8ebea859a642e93279b9177feb3aa604c450a5; canonical IR c75d6f03df4fae85085280a5eee649951c396dc6a0a25ebeadca54d86a493606. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 13e70f0d9b41dc657eb143da4bd571db025c7347b82cc8ca85c0aa50bdc5c19a; PTX 0ecad3ff0311a611bf200d8194f5b55d07e2f7e8a62e3aebec1078789d2bd5f4; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 13e70f0d9b41dc657eb143da4bd571db025c7347b82cc8ca85c0aa50bdc5c19a; PTX 0ecad3ff0311a611bf200d8194f5b55d07e2f7e8a62e3aebec1078789d2bd5f4; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `fma_rz_ftz_sat_f32`: runtime `not recorded` - - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode be9edc2447dfa0b2f412a918bca8c65316e6d104e01651c3ffb783c55da60767; canonical IR 304ee17c2325f899e49518450f51602a1511b0b6144ab51035923633607b1b91. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 0ff3f0581f3253fd6277d9888cee45e568cd11b3f9aa1648c5ef59847729b196; PTX fe877234081dfb1e2de7fc7829e4fb32f969ceafc066f559bed70856ee76d341; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 0ff3f0581f3253fd6277d9888cee45e568cd11b3f9aa1648c5ef59847729b196; PTX fe877234081dfb1e2de7fc7829e4fb32f969ceafc066f559bed70856ee76d341; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `fma_rz_sat_f32`: runtime `not recorded` - - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 f71dcf802590ec4ed143c3050ac0f77955b009d0b3fb8d7028de32d14d68d954. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 e5cca2d6d4c97eb2cf997702b416cd5e1cbbd098204583c3f3828ea301d19336. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 16 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 584f9cf756c55613f53213b15ad53e6d8ce2ff767c5d711ed3d360c1a8b01be0. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode a187273ab5cf42bb8453c44a7dc6f12868f6458c37349b2f3a267ea9eeea8a7b; canonical IR f9f7da4245bcb759d8d2312ed19be0565a1f44127d535453d69b166f2fc749b4. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 25ed2e0a2d7f7cebba2a7705f972689cd82dacc0ee808c9f0276df15b445ac16; PTX c42fd81a29b65aba246c3426b4f33d05aca80b7c027da42a0e3afb9406c3da5a; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 25ed2e0a2d7f7cebba2a7705f972689cd82dacc0ee808c9f0276df15b445ac16; PTX c42fd81a29b65aba246c3426b4f33d05aca80b7c027da42a0e3afb9406c3da5a; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `fma_sat_f16x2`: runtime `not recorded` - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 6.0 / sm_70+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - backend codegen on `sm_70, ptx60`: `succeeded` — Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 b7ccf304fffd63a678dec5f5775eb1fbdc60e0a295b7b2a9e878339cf8a0922a. @@ -14812,113 +14812,113 @@ This table is generated from the resolved catalog. Evidence stages below disting - backend codegen on `compute_100, ptx88`: `succeeded` — CUDA 12.9 libNVVM accepted the 1,794-byte module (SHA-256 3bb81df41493fd8254071078d5423dcdf5bbcdea542b46a77cf14d4d62081620), produced 3,060-byte LTOIR (SHA-256 623cfd620ace08aa14f84559fe9297b89f032ebac8eee747c38f3f499469e02a), and nvJitLink emitted 1,558-byte PTX 8.8 (SHA-256 8920b773f314dd4a60cdc620d168dd2acd0c6ee453a8f231ec1303f62665355f) retaining every exact instruction. - device link on `sm_100, ptx88`: `succeeded` — CUDA 12.9 nvJitLink produced a valid 6,008-byte CUDA ELF cubin (SHA-256 dc9e6034e77cb3fa6d4046a4b6bf5aa5e2b0d804bf7884638b093cd804e2caff). nvdisasm contains the expected FADD2, FMUL2, FFMA2 and .FTZ forms; subtraction appears as FADD2 with a negated source. Tool `/usr/local/cuda-12.9/lib64/libnvJitLink.so.12.9.86` reports `CUDA 12.9 nvJitLink V12.9.86` (SHA-256 `02d3acb5fe598dd20f0fca3cc03734ad164037a22747a01900561a42d0b8448f`). Artifact `cubin`. - `mul_rm_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode b90b1b6c4208eeb312b44c9c3494caf675c99c1cd5b0596f13347603fbccfe2f; canonical IR c1183a8ed7e19fe260da51de3ac27a8222c6f28d99466b9da6a1d0f375fb808f. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 034376f88915dab5030d26883d1ffe29e1dc1ed09f3a19d94402186509026572; PTX 9a460cf935f93844e8a8efb6b5adf66071f68a7085019457b0f4060d8fef22c3; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 034376f88915dab5030d26883d1ffe29e1dc1ed09f3a19d94402186509026572; PTX 9a460cf935f93844e8a8efb6b5adf66071f68a7085019457b0f4060d8fef22c3; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `mul_rm_f64`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode b386fc98703aa1f6e67e33df89de8d5f64dc97394ec19b519bfe7d9fad1b58ad; canonical IR d903c0af2796fc501a950d3702a0c5148d0374f1c862e97388112dadc7d9d79f. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 99153e8944475f97a09b211bbbead885b4f280f8fe9c4fd4985e0b045f8083e4; PTX fa839061c256570295a3bd0b3a156e5acdafe8fdef37fa49309d5576e7b6e08c; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 99153e8944475f97a09b211bbbead885b4f280f8fe9c4fd4985e0b045f8083e4; PTX fa839061c256570295a3bd0b3a156e5acdafe8fdef37fa49309d5576e7b6e08c; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `mul_rm_ftz_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode e894c3bbf96f860d81764879bd373f7a8798e40927ad9e6e2aece86320eaf73e; canonical IR 6e126e70b3717156c435b8eea6c9bd53edb8a9aa4ea56af5644ecaf709497dc9. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input b7e19938a7338de5766a3bfaba5d96b632c308085d0093d5053cefc6638c3bbc; PTX 6c0e437cd9e623360f26ed663c86ce3cce77c77e41614afd6a43bb304788d0ba; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input b7e19938a7338de5766a3bfaba5d96b632c308085d0093d5053cefc6638c3bbc; PTX 6c0e437cd9e623360f26ed663c86ce3cce77c77e41614afd6a43bb304788d0ba; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `mul_rn_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 3bc654c7a9d03d4a190db6f216f1290ad9d1add251d13f5b4fced5daec393b3d; canonical IR 2848f43455486c5f4ec8c7447af12743ac52ec0f36f1a553b110b021fe20eb2c. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 0acb71ff6e03bc51b40ac1e5c0e5d62d77a3cabb4e26873456d0052db05425d0; PTX 7d3e865593af237eb6e0ff999491ac31c154eea8d4126ae266a949b18e4000ae; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 0acb71ff6e03bc51b40ac1e5c0e5d62d77a3cabb4e26873456d0052db05425d0; PTX 7d3e865593af237eb6e0ff999491ac31c154eea8d4126ae266a949b18e4000ae; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `mul_rn_f64`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 847b0edc3cfe51da8cbcf0ec12f24a8c52f8c105e7566dac97ecc866f44df38e; canonical IR 4ec90d6af7ff11875291c2b17845826daeb6723d230d055b023c8981829fb1d3. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input ccc4a2d9e134b008bb3131dc83895740c988e492bbc934e79dd07223f1937861; PTX 6d3499c10ef3b1282256f4b12802c67d8fe46bf25b9b2e8428b06244a258a27b; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input ccc4a2d9e134b008bb3131dc83895740c988e492bbc934e79dd07223f1937861; PTX 6d3499c10ef3b1282256f4b12802c67d8fe46bf25b9b2e8428b06244a258a27b; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `mul_rn_ftz_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode c2c0a3078136a5dc32ff7709a633f8363c4153cd595018d1242ac35310d26336; canonical IR 1662ad706c50df1f21722277dc4bcfb60e32bbe4fb114de96d112170bcb6aea3. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input ea69a9b28d42294ead60b53eac1a129c3af9f53a321b734eb39fa3716dd42c83; PTX 02ed11051bb3fcd97bd49d8a3c7e92737376500d1ac018ab0e9c98d7d93dc1e2; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input ea69a9b28d42294ead60b53eac1a129c3af9f53a321b734eb39fa3716dd42c83; PTX 02ed11051bb3fcd97bd49d8a3c7e92737376500d1ac018ab0e9c98d7d93dc1e2; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `mul_rp_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 62852bac99ac31b4f9cd8148ca426b5a19206369c4786be9f92d8a67907c5ee3; canonical IR 01bed53f970711a88f32c51fe02f0c4b6c61e5a28d9d19ed2cb636adc97bb645. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 4ed53bc44fb3f5383051847b0b0dcb9a8573cca09c816e8518e9cef3c6979fa9; PTX 5c4b24214435d505131900a38fd6e6ecfbc4b1bdd112066cb58fcc86e9ca6c69; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 4ed53bc44fb3f5383051847b0b0dcb9a8573cca09c816e8518e9cef3c6979fa9; PTX 5c4b24214435d505131900a38fd6e6ecfbc4b1bdd112066cb58fcc86e9ca6c69; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `mul_rp_f64`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 996c98022d1e52214806002a9e2d04fac9b8b7cb824dcac0047894f07361bdc5; canonical IR b898ed733cfb96c9b64fb6bc046edf07d6664f88f9d2e0a7d9b6f69b2ebd908a. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 0fc22041afb2d7adec4715f1ebd7acc418d6a4d87bef8190eac8260d82a9f117; PTX b4ef87b3c8c013b4374a326ca11fa7422056ad6ce0b28bcc96160434991512db; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 0fc22041afb2d7adec4715f1ebd7acc418d6a4d87bef8190eac8260d82a9f117; PTX b4ef87b3c8c013b4374a326ca11fa7422056ad6ce0b28bcc96160434991512db; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `mul_rp_ftz_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode ddffce2e49822e170d5c18b08e1a7ac526a347b28a6d7e7e56b6f2b357664e0d; canonical IR fd9c0cac606566f82e72a554d99c42afe6753e6befb7a825467bd363ac1065d8. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 69cba07ac6cf5b9549b893d23193d9ddc6d41e23c7cfa91a99be8341afae3fb7; PTX ce2e2c5cb48b36abd59a7d948bf0971982b6ca0b0ff029da5455a209fa1921cb; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 69cba07ac6cf5b9549b893d23193d9ddc6d41e23c7cfa91a99be8341afae3fb7; PTX ce2e2c5cb48b36abd59a7d948bf0971982b6ca0b0ff029da5455a209fa1921cb; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `mul_rz_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 668877e65c649511fe67669c239a36a829d346722be1fba394b6239bae020c58; canonical IR 32c57aeb44f7e4f622445748400354b39447d2155776cdcc200e5dfe752d296f. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 4c2086c8726ffaeafea1c17fc5628c3d9f26bd6700921da2bd55a5eba332ec49; PTX dfa8b8ad9d76a5df7bb842bfc0e9c1f974b33c528d14c820db04e99fde9599be; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 4c2086c8726ffaeafea1c17fc5628c3d9f26bd6700921da2bd55a5eba332ec49; PTX dfa8b8ad9d76a5df7bb842bfc0e9c1f974b33c528d14c820db04e99fde9599be; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `mul_rz_f64`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode 49887f8e3e0513873ed4eb2f50ad85cfffdec9bbd146bb5ea9e761d06bfa376e; canonical IR 04f77581c93c253802656a4c34f11a578cea1eac74a6e210b9589d6a28509fb4. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 476323a9997468694c0f804d68cc12ecd9ffe843ed46e7c342199e981a0f1665; PTX 294a215ea45217f30e5a271f05514d31dc9de9c47bdab355cc70db82903cfdb7; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 476323a9997468694c0f804d68cc12ecd9ffe843ed46e7c342199e981a0f1665; PTX 294a215ea45217f30e5a271f05514d31dc9de9c47bdab355cc70db82903cfdb7; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `mul_rz_ftz_f32`: runtime `not recorded` - - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 7.0 / sm_80+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - - declaration canonicalization on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): canonical typed declarations and their exact imported attributes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 43a540ca3395340b4c26ec20f43a99ca1e3ae000e3a2093b7b8fc75d9d79eb9d. - - backend codegen on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 3464a16f85a7e5b739d5431bfc395f4c4bab660fd1f2dd69cb07aff3cc3d03f2. - - PTX assembly on `sm_80, ptx70`: `succeeded` — Revalidated 36 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): terminal PTX assembly passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 33b20a29f610a5c4588eee9fd60186c17523f8362e82e206a4d2e4c5e28ccecb. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.73; build cuda_13.3.r13.3/compiler.38244171_0` (SHA-256 `afd8d1e1fa6e310f7faee44f6621e4c1315fb7fd6da7d4d87414358e12a651dc`). Artifact `cubin`. - - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-libnvvm-13.3.33-scalar-arithmetic` at PTX 7.0 / sm_80+: status `validated` (`CUDA compilation tools, release 13.3, V13.3.33; libNVVM IR 2.0 debug 3.2`, SHA-256 `b6a5db233133fb0ed693f8cb8aeb1d405254ce0ab10364478985292ec98cfcf0`) - - backend codegen on `compute_80, ptx93`: `succeeded` — CUDA 13.3 libNVVM compiled the 9,966-byte typed-pointer NVVM IR fixture (SHA-256 1887e2d19e9253874b9cc04aa9ddf6fecfe626021185f23c6023da7ec55e1d6f) to 5,956-byte PTX 9.3 (SHA-256 d84a9f54933f0a6d231f81bca8b68939dab13ff12be30ab09f823107dbdce574) and 5,908-byte LTOIR (SHA-256 d11a9ec3ee80833f14fbf0aa68710a1a1e4135a9314f5b7978313ffe6b442ce2). The PTX retained all 44 exact, unique instructions with no extern calls or unresolved llvm.nvvm symbols. - - PTX assembly on `sm_80, ptx93`: `succeeded` — CUDA 13.3 ptxas assembled the retained PTX into a 25,000-byte sm_80 cubin with SHA-256 8d204a91958f0abeeaa94e65dda13f8a3238c941ccfca69f81df16ef1dae42f7. Tool `/usr/local/cuda-13.3/bin/ptxas` reports `Cuda compilation tools, release 13.3, V13.3.33; build cuda_13.3.r13.3/compiler.37862127_0` (SHA-256 `7fdd01a4cf50e30746da98989c9272a907f491e6fd7fecfda14642e4375f88fb`). Artifact `cubin`. - - device link on `sm_80, ptx93`: `succeeded` — CUDA 13.3 nvJitLink emitted linked PTX byte-identical to the direct libNVVM PTX and a 25,000-byte cubin with SHA-256 8a820550050fdd6239eea0a9cc5dc0573926fbb49dc58c94ec226e96c8e21f6e. The cubin exports scalar_arithmetic_inline with a 0x4a00-byte text section. Tool `/usr/local/cuda-13.3/targets/x86_64-linux/lib/libnvJitLink.so.13.3.33` reports `nvJitLinkVersion 13.3; CUDA 13.3 V13.3.33` (SHA-256 `3ba1e744347cd68617b862eccfd98b125482e882b7a6319f42abc9a768513db8`). Artifact `cubin`. + - `llvm_nvptx` uses `typed_nvvm` from profile `rust-llvm-23.1.3-aab11ee0-scalar-baseline` at PTX 3.2 / sm_20+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `c70888baa200f61b3f011900ff39fb048cb6adc670674f441c58d5046826c224`) + - declaration canonicalization on `sm_20, ptx32`: `succeeded` — Canonical declaration and required imported IR properties checked. Bitcode edcc72559512cd001cc6a769b6af6481106dc9817ebc290c519f9b4b7da1372d; canonical IR 6f2f7658c3dbf5f86d29d6173dd89d49ff003a46805b70523a8f1f62c923042c. + - backend codegen on `sm_20, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 7697785ef64c733f2a1c90474449fcfabea10a09646ff8dc3d9e7b9bf1823add; PTX 2370b3fa3a374b125a36c1dd37591eb3561835dd7006852989eee3b0a7af479a; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. + - PTX assembly on `sm_75, ptx32`: `succeeded` — LLVM 23.1.3 nightly-2026-10-11; actual artifact hashes in scalar-arithmetic-sm20-20261013/captures.json. Input 7697785ef64c733f2a1c90474449fcfabea10a09646ff8dc3d9e7b9bf1823add; PTX 2370b3fa3a374b125a36c1dd37591eb3561835dd7006852989eee3b0a7af479a; cubin 64228b359e064593cb479b86c6c493fea7ed182e88586a2066cbc1baf81a3b05. sm_20 codegen is assembled for sm_75; no sm_20 hardware execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3, V13.3.73` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - `lib_nvvm` uses `inline_ptx` from profile `cuda-13.3-sm75-scalar-arithmetic` at PTX 6.3 / sm_75+: status `validated` (`CUDA 13.3; libNVVM API 2.0; IR 2.0 debug 3.2`, SHA-256 `dfcd82a8d6b8f52d1cbaae3fded0055f3d9cbd86d7461d984c776a7d91e73d5b`) + - backend codegen on `compute_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. + - PTX assembly on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\ptxas.exe` reports `Cuda compilation tools, release 13.3` (SHA-256 `86b2ff48655c55f1547edc59b503d39a62aa5c71745b7ecf6be526c29af0b693`). Artifact `cubin`. + - device link on `sm_75, ptx93`: `succeeded` — All 64 forms retained in one typed-pointer IR fixture; exact PTX instructions and all 64 kernel text sections checked in both cubins. Actual input/artifact hashes and negative compute_70/compute_72 architecture checks are in scalar-arithmetic-sm75-20261013/proof.json. PTX e11bbe25e6c4bddb45c265bbfe6fc368e29d3637c1e94d78279fe010db9916c7; LTO IR 94841dac2b6e26bca30a839dfcf0c2aa3fb36cfc9685dc28dfa3d7d8b8f7fcca; linked cubin 8dca9bae03e7dd0bb03447c322fb2e1b8be928e33629a5ea03f3cd9fee0a6d76. No GPU execution is claimed. Tool `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64\nvJitLink_130_0.dll` reports `nvJitLinkVersion 13.3` (SHA-256 `727a0acfc4495b229143b53843004eef36e0a3463fb2e1c7c4215468607fd613`). Artifact `cubin`. - `nanosleep`: runtime `unexecuted` - `llvm_nvptx` uses `inline_ptx` from profile `rust-llvm-23.1.3-aab11ee0` at PTX 6.3 / sm_70+: status `validated` (`LLVM version 23.1.3-rust-1.101.0-nightly`, SHA-256 `7534b0236b9b26c7e6910548038b2285ee1bb5908e4700764dc78a7a1a54b449`) - backend codegen on `sm_70, ptx63`: `succeeded` — Revalidated 1 separate probes with nightly-2026-10-11 (rustc 6f5da406b56c2db6607202b63daee73aa8c61297; LLVM aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019): the exact reviewed PTX instruction shapes passed. The sorted ID/artifact-kind/SHA-256 ledger in refresh-2026-10-11/stages.jsonl has SHA-256 bb1f49e5307d0e617ee6cf95da7ec7a582167ac87e14e8bc4d24cb4185ee7f68. diff --git a/cuda-oxide/intrinsics/overlay/scalar_arithmetic.toml b/cuda-oxide/intrinsics/overlay/scalar_arithmetic.toml index 61b8c983bb..804c83d261 100644 --- a/cuda-oxide/intrinsics/overlay/scalar_arithmetic.toml +++ b/cuda-oxide/intrinsics/overlay/scalar_arithmetic.toml @@ -4,8 +4,8 @@ schema = 45 family = "scalar_arithmetic" [scalar_arithmetic] -llvm_evidence_profile = "rust-llvm-23.1.3-aab11ee0" -libnvvm_evidence_profile = "cuda-13.3-libnvvm-13.3.33-scalar-arithmetic" +llvm_evidence_profile = "rust-llvm-23.1.3-aab11ee0-scalar-baseline" +libnvvm_evidence_profile = "cuda-13.3-sm75-scalar-arithmetic" runtime_validation = "unexecuted" [[scalar_arithmetic.variant]] diff --git a/cuda-oxide/intrinsics/probes/abs_bf16x2.ll b/cuda-oxide/intrinsics/probes/abs_bf16x2.ll index a8cfafecbd..0b728bb5a0 100644 --- a/cuda-oxide/intrinsics/probes/abs_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/abs_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/abs_f16x2.ll b/cuda-oxide/intrinsics/probes/abs_f16x2.ll index 7271575494..e74dbaa8cd 100644 --- a/cuda-oxide/intrinsics/probes/abs_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/abs_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/active_mask.ll b/cuda-oxide/intrinsics/probes/active_mask.ll index 35cc908549..2a993912ad 100644 --- a/cuda-oxide/intrinsics/probes/active_mask.ll +++ b/cuda-oxide/intrinsics/probes/active_mask.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_bf16x2.ll b/cuda-oxide/intrinsics/probes/add_bf16x2.ll index 508efef2ae..61dac9f690 100644 --- a/cuda-oxide/intrinsics/probes/add_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/add_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_f16x2.ll b/cuda-oxide/intrinsics/probes/add_f16x2.ll index 0fb3d86d3c..6d98fbd2e4 100644 --- a/cuda-oxide/intrinsics/probes/add_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/add_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_f32x2.ll b/cuda-oxide/intrinsics/probes/add_f32x2.ll index 46b36a48bd..8167b7ec16 100644 --- a/cuda-oxide/intrinsics/probes/add_f32x2.ll +++ b/cuda-oxide/intrinsics/probes/add_f32x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_ftz_f32x2.ll b/cuda-oxide/intrinsics/probes/add_ftz_f32x2.ll index 64dee32480..2521e58cf0 100644 --- a/cuda-oxide/intrinsics/probes/add_ftz_f32x2.ll +++ b/cuda-oxide/intrinsics/probes/add_ftz_f32x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rm_f32.ll b/cuda-oxide/intrinsics/probes/add_rm_f32.ll index 394b0defb8..a2058019dd 100644 --- a/cuda-oxide/intrinsics/probes/add_rm_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rm_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rm_f64.ll b/cuda-oxide/intrinsics/probes/add_rm_f64.ll index ffa5b39efa..8bfdbbfee3 100644 --- a/cuda-oxide/intrinsics/probes/add_rm_f64.ll +++ b/cuda-oxide/intrinsics/probes/add_rm_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rm_ftz_f32.ll b/cuda-oxide/intrinsics/probes/add_rm_ftz_f32.ll index 7301c89baa..fcee191bf1 100644 --- a/cuda-oxide/intrinsics/probes/add_rm_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rm_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rm_ftz_sat_f32.ll b/cuda-oxide/intrinsics/probes/add_rm_ftz_sat_f32.ll index cc4efee5aa..1f09aed71c 100644 --- a/cuda-oxide/intrinsics/probes/add_rm_ftz_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rm_ftz_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rm_sat_f32.ll b/cuda-oxide/intrinsics/probes/add_rm_sat_f32.ll index a518047f0b..9e9ecab60c 100644 --- a/cuda-oxide/intrinsics/probes/add_rm_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rm_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rn_f32.ll b/cuda-oxide/intrinsics/probes/add_rn_f32.ll index 782caffa14..3406843c19 100644 --- a/cuda-oxide/intrinsics/probes/add_rn_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rn_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rn_f64.ll b/cuda-oxide/intrinsics/probes/add_rn_f64.ll index 9a46447810..47ce64cc66 100644 --- a/cuda-oxide/intrinsics/probes/add_rn_f64.ll +++ b/cuda-oxide/intrinsics/probes/add_rn_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rn_ftz_f32.ll b/cuda-oxide/intrinsics/probes/add_rn_ftz_f32.ll index b083c0005f..37de0e8e86 100644 --- a/cuda-oxide/intrinsics/probes/add_rn_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rn_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rn_ftz_sat_f32.ll b/cuda-oxide/intrinsics/probes/add_rn_ftz_sat_f32.ll index 9282ffe47e..ac8d114592 100644 --- a/cuda-oxide/intrinsics/probes/add_rn_ftz_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rn_ftz_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rn_sat_f32.ll b/cuda-oxide/intrinsics/probes/add_rn_sat_f32.ll index a2f42a2732..41e75678db 100644 --- a/cuda-oxide/intrinsics/probes/add_rn_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rn_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rp_f32.ll b/cuda-oxide/intrinsics/probes/add_rp_f32.ll index 3847a35e0f..c148f983f5 100644 --- a/cuda-oxide/intrinsics/probes/add_rp_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rp_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rp_f64.ll b/cuda-oxide/intrinsics/probes/add_rp_f64.ll index 78e10df229..c261d80f4a 100644 --- a/cuda-oxide/intrinsics/probes/add_rp_f64.ll +++ b/cuda-oxide/intrinsics/probes/add_rp_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rp_ftz_f32.ll b/cuda-oxide/intrinsics/probes/add_rp_ftz_f32.ll index 2b2ceca2ed..ede9d0aa6e 100644 --- a/cuda-oxide/intrinsics/probes/add_rp_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rp_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rp_ftz_sat_f32.ll b/cuda-oxide/intrinsics/probes/add_rp_ftz_sat_f32.ll index 5310c50bc3..c0a7551f6a 100644 --- a/cuda-oxide/intrinsics/probes/add_rp_ftz_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rp_ftz_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rp_sat_f32.ll b/cuda-oxide/intrinsics/probes/add_rp_sat_f32.ll index a9544264ee..58b9e5c6bc 100644 --- a/cuda-oxide/intrinsics/probes/add_rp_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rp_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rz_f32.ll b/cuda-oxide/intrinsics/probes/add_rz_f32.ll index facef96237..c9df7ed3c0 100644 --- a/cuda-oxide/intrinsics/probes/add_rz_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rz_f64.ll b/cuda-oxide/intrinsics/probes/add_rz_f64.ll index d54b8031b4..8f9b8d2c42 100644 --- a/cuda-oxide/intrinsics/probes/add_rz_f64.ll +++ b/cuda-oxide/intrinsics/probes/add_rz_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rz_ftz_f32.ll b/cuda-oxide/intrinsics/probes/add_rz_ftz_f32.ll index 63a23efa84..1863837961 100644 --- a/cuda-oxide/intrinsics/probes/add_rz_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rz_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rz_ftz_sat_f32.ll b/cuda-oxide/intrinsics/probes/add_rz_ftz_sat_f32.ll index ac55d30979..9f2e6dfaaf 100644 --- a/cuda-oxide/intrinsics/probes/add_rz_ftz_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rz_ftz_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/add_rz_sat_f32.ll b/cuda-oxide/intrinsics/probes/add_rz_sat_f32.ll index ff6c759dcb..ad65b1a18b 100644 --- a/cuda-oxide/intrinsics/probes/add_rz_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/add_rz_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/all_sync.ll b/cuda-oxide/intrinsics/probes/all_sync.ll index 33d70a6703..649c2b901e 100644 --- a/cuda-oxide/intrinsics/probes/all_sync.ll +++ b/cuda-oxide/intrinsics/probes/all_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/any_sync.ll b/cuda-oxide/intrinsics/probes/any_sync.ll index ddf917c151..2ba8802f94 100644 --- a/cuda-oxide/intrinsics/probes/any_sync.ll +++ b/cuda-oxide/intrinsics/probes/any_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ballot_sync.ll b/cuda-oxide/intrinsics/probes/ballot_sync.ll index 10dbc65543..e73fd906f5 100644 --- a/cuda-oxide/intrinsics/probes/ballot_sync.ll +++ b/cuda-oxide/intrinsics/probes/ballot_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/barrier_cluster_arrive.ll b/cuda-oxide/intrinsics/probes/barrier_cluster_arrive.ll index 01c2fc96a8..7b03770e55 100644 --- a/cuda-oxide/intrinsics/probes/barrier_cluster_arrive.ll +++ b/cuda-oxide/intrinsics/probes/barrier_cluster_arrive.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/barrier_cluster_arrive_aligned.ll b/cuda-oxide/intrinsics/probes/barrier_cluster_arrive_aligned.ll index 5f267521a2..a802d8564e 100644 --- a/cuda-oxide/intrinsics/probes/barrier_cluster_arrive_aligned.ll +++ b/cuda-oxide/intrinsics/probes/barrier_cluster_arrive_aligned.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/barrier_cluster_arrive_relaxed.ll b/cuda-oxide/intrinsics/probes/barrier_cluster_arrive_relaxed.ll index d702127d78..9eac0b9fbb 100644 --- a/cuda-oxide/intrinsics/probes/barrier_cluster_arrive_relaxed.ll +++ b/cuda-oxide/intrinsics/probes/barrier_cluster_arrive_relaxed.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/barrier_cluster_arrive_relaxed_aligned.ll b/cuda-oxide/intrinsics/probes/barrier_cluster_arrive_relaxed_aligned.ll index 22ec92292c..f685fd075b 100644 --- a/cuda-oxide/intrinsics/probes/barrier_cluster_arrive_relaxed_aligned.ll +++ b/cuda-oxide/intrinsics/probes/barrier_cluster_arrive_relaxed_aligned.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/barrier_cluster_wait.ll b/cuda-oxide/intrinsics/probes/barrier_cluster_wait.ll index 673ad502f4..ba4a5bd361 100644 --- a/cuda-oxide/intrinsics/probes/barrier_cluster_wait.ll +++ b/cuda-oxide/intrinsics/probes/barrier_cluster_wait.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/barrier_cluster_wait_aligned.ll b/cuda-oxide/intrinsics/probes/barrier_cluster_wait_aligned.ll index 476bf71c46..20974e2b66 100644 --- a/cuda-oxide/intrinsics/probes/barrier_cluster_wait_aligned.ll +++ b/cuda-oxide/intrinsics/probes/barrier_cluster_wait_aligned.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/barrier_cta_arrive.ll b/cuda-oxide/intrinsics/probes/barrier_cta_arrive.ll index 7e395001a2..84eebe2356 100644 --- a/cuda-oxide/intrinsics/probes/barrier_cta_arrive.ll +++ b/cuda-oxide/intrinsics/probes/barrier_cta_arrive.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/barrier_cta_arrive_aligned.ll b/cuda-oxide/intrinsics/probes/barrier_cta_arrive_aligned.ll index ce16ecb508..6c16dac185 100644 --- a/cuda-oxide/intrinsics/probes/barrier_cta_arrive_aligned.ll +++ b/cuda-oxide/intrinsics/probes/barrier_cta_arrive_aligned.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/barrier_cta_sync.ll b/cuda-oxide/intrinsics/probes/barrier_cta_sync.ll index f4c169f633..c31d792db3 100644 --- a/cuda-oxide/intrinsics/probes/barrier_cta_sync.ll +++ b/cuda-oxide/intrinsics/probes/barrier_cta_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/barrier_cta_sync_aligned.ll b/cuda-oxide/intrinsics/probes/barrier_cta_sync_aligned.ll index 812781c2b9..08dcd58ac9 100644 --- a/cuda-oxide/intrinsics/probes/barrier_cta_sync_aligned.ll +++ b/cuda-oxide/intrinsics/probes/barrier_cta_sync_aligned.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/block_dim_x.ll b/cuda-oxide/intrinsics/probes/block_dim_x.ll index b595fdb161..578973002a 100644 --- a/cuda-oxide/intrinsics/probes/block_dim_x.ll +++ b/cuda-oxide/intrinsics/probes/block_dim_x.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/block_dim_y.ll b/cuda-oxide/intrinsics/probes/block_dim_y.ll index 1eb484919f..220a292324 100644 --- a/cuda-oxide/intrinsics/probes/block_dim_y.ll +++ b/cuda-oxide/intrinsics/probes/block_dim_y.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/block_dim_z.ll b/cuda-oxide/intrinsics/probes/block_dim_z.ll index 5d2a1dc583..9e84dd4a97 100644 --- a/cuda-oxide/intrinsics/probes/block_dim_z.ll +++ b/cuda-oxide/intrinsics/probes/block_dim_z.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/block_idx_x.ll b/cuda-oxide/intrinsics/probes/block_idx_x.ll index 049dccdcd3..117fb52995 100644 --- a/cuda-oxide/intrinsics/probes/block_idx_x.ll +++ b/cuda-oxide/intrinsics/probes/block_idx_x.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/block_idx_y.ll b/cuda-oxide/intrinsics/probes/block_idx_y.ll index 9e96445567..f67ce357df 100644 --- a/cuda-oxide/intrinsics/probes/block_idx_y.ll +++ b/cuda-oxide/intrinsics/probes/block_idx_y.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/block_idx_z.ll b/cuda-oxide/intrinsics/probes/block_idx_z.ll index eef8084baf..4c6ba59fdf 100644 --- a/cuda-oxide/intrinsics/probes/block_idx_z.ll +++ b/cuda-oxide/intrinsics/probes/block_idx_z.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/breakpoint.ll b/cuda-oxide/intrinsics/probes/breakpoint.ll index 1c68b330c5..8f4fbb8853 100644 --- a/cuda-oxide/intrinsics/probes/breakpoint.ll +++ b/cuda-oxide/intrinsics/probes/breakpoint.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/clc_query_get_first_ctaid_x.ll b/cuda-oxide/intrinsics/probes/clc_query_get_first_ctaid_x.ll index 465fa53ebe..a50f175175 100644 --- a/cuda-oxide/intrinsics/probes/clc_query_get_first_ctaid_x.ll +++ b/cuda-oxide/intrinsics/probes/clc_query_get_first_ctaid_x.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/clc_query_get_first_ctaid_y.ll b/cuda-oxide/intrinsics/probes/clc_query_get_first_ctaid_y.ll index 2b619f00b5..a81d414984 100644 --- a/cuda-oxide/intrinsics/probes/clc_query_get_first_ctaid_y.ll +++ b/cuda-oxide/intrinsics/probes/clc_query_get_first_ctaid_y.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/clc_query_get_first_ctaid_z.ll b/cuda-oxide/intrinsics/probes/clc_query_get_first_ctaid_z.ll index 1bbbaf2bb1..1a6c13211b 100644 --- a/cuda-oxide/intrinsics/probes/clc_query_get_first_ctaid_z.ll +++ b/cuda-oxide/intrinsics/probes/clc_query_get_first_ctaid_z.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/clc_query_is_canceled.ll b/cuda-oxide/intrinsics/probes/clc_query_is_canceled.ll index 0e160a1820..436168f177 100644 --- a/cuda-oxide/intrinsics/probes/clc_query_is_canceled.ll +++ b/cuda-oxide/intrinsics/probes/clc_query_is_canceled.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/clc_try_cancel.ll b/cuda-oxide/intrinsics/probes/clc_try_cancel.ll index 6dff5dab4f..0d95420038 100644 --- a/cuda-oxide/intrinsics/probes/clc_try_cancel.ll +++ b/cuda-oxide/intrinsics/probes/clc_try_cancel.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/clc_try_cancel_multicast.ll b/cuda-oxide/intrinsics/probes/clc_try_cancel_multicast.ll index 99321d44e7..dbc1cf8afb 100644 --- a/cuda-oxide/intrinsics/probes/clc_try_cancel_multicast.ll +++ b/cuda-oxide/intrinsics/probes/clc_try_cancel_multicast.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/clock.lib_nvvm.ll b/cuda-oxide/intrinsics/probes/clock.lib_nvvm.ll index d104c8a99d..2c8e780ecd 100644 --- a/cuda-oxide/intrinsics/probes/clock.lib_nvvm.ll +++ b/cuda-oxide/intrinsics/probes/clock.lib_nvvm.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/clock.llvm_nvptx.ll b/cuda-oxide/intrinsics/probes/clock.llvm_nvptx.ll index 5308a1d861..7c4edda44e 100644 --- a/cuda-oxide/intrinsics/probes/clock.llvm_nvptx.ll +++ b/cuda-oxide/intrinsics/probes/clock.llvm_nvptx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/clock64.lib_nvvm.ll b/cuda-oxide/intrinsics/probes/clock64.lib_nvvm.ll index 685124a38a..8e392a9c1a 100644 --- a/cuda-oxide/intrinsics/probes/clock64.lib_nvvm.ll +++ b/cuda-oxide/intrinsics/probes/clock64.lib_nvvm.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/clock64.llvm_nvptx.ll b/cuda-oxide/intrinsics/probes/clock64.llvm_nvptx.ll index 28b7819a01..e7bb41b415 100644 --- a/cuda-oxide/intrinsics/probes/clock64.llvm_nvptx.ll +++ b/cuda-oxide/intrinsics/probes/clock64.llvm_nvptx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_block_count.ll b/cuda-oxide/intrinsics/probes/cluster_block_count.ll index ad8b68683f..da64bafa38 100644 --- a/cuda-oxide/intrinsics/probes/cluster_block_count.ll +++ b/cuda-oxide/intrinsics/probes/cluster_block_count.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_block_idx_x.ll b/cuda-oxide/intrinsics/probes/cluster_block_idx_x.ll index 3e288ff9ab..8bb3a93798 100644 --- a/cuda-oxide/intrinsics/probes/cluster_block_idx_x.ll +++ b/cuda-oxide/intrinsics/probes/cluster_block_idx_x.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_block_idx_y.ll b/cuda-oxide/intrinsics/probes/cluster_block_idx_y.ll index 22ee0ba22a..fabbadf2a1 100644 --- a/cuda-oxide/intrinsics/probes/cluster_block_idx_y.ll +++ b/cuda-oxide/intrinsics/probes/cluster_block_idx_y.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_block_idx_z.ll b/cuda-oxide/intrinsics/probes/cluster_block_idx_z.ll index 5a00244256..6309507537 100644 --- a/cuda-oxide/intrinsics/probes/cluster_block_idx_z.ll +++ b/cuda-oxide/intrinsics/probes/cluster_block_idx_z.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_block_rank.ll b/cuda-oxide/intrinsics/probes/cluster_block_rank.ll index ead63ae081..18f929dbfe 100644 --- a/cuda-oxide/intrinsics/probes/cluster_block_rank.ll +++ b/cuda-oxide/intrinsics/probes/cluster_block_rank.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_dim_x.ll b/cuda-oxide/intrinsics/probes/cluster_dim_x.ll index 933b8a769a..3463bdff22 100644 --- a/cuda-oxide/intrinsics/probes/cluster_dim_x.ll +++ b/cuda-oxide/intrinsics/probes/cluster_dim_x.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_dim_y.ll b/cuda-oxide/intrinsics/probes/cluster_dim_y.ll index 0519deb690..6c1e1eec69 100644 --- a/cuda-oxide/intrinsics/probes/cluster_dim_y.ll +++ b/cuda-oxide/intrinsics/probes/cluster_dim_y.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_dim_z.ll b/cuda-oxide/intrinsics/probes/cluster_dim_z.ll index 96bf50863b..6a1bc634c9 100644 --- a/cuda-oxide/intrinsics/probes/cluster_dim_z.ll +++ b/cuda-oxide/intrinsics/probes/cluster_dim_z.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_grid_dim_x.ll b/cuda-oxide/intrinsics/probes/cluster_grid_dim_x.ll index 3c33d025b9..4954f5d867 100644 --- a/cuda-oxide/intrinsics/probes/cluster_grid_dim_x.ll +++ b/cuda-oxide/intrinsics/probes/cluster_grid_dim_x.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_grid_dim_y.ll b/cuda-oxide/intrinsics/probes/cluster_grid_dim_y.ll index 320942ece0..39581ef114 100644 --- a/cuda-oxide/intrinsics/probes/cluster_grid_dim_y.ll +++ b/cuda-oxide/intrinsics/probes/cluster_grid_dim_y.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_grid_dim_z.ll b/cuda-oxide/intrinsics/probes/cluster_grid_dim_z.ll index 1795b9eeed..2c5a58f092 100644 --- a/cuda-oxide/intrinsics/probes/cluster_grid_dim_z.ll +++ b/cuda-oxide/intrinsics/probes/cluster_grid_dim_z.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_idx_x.ll b/cuda-oxide/intrinsics/probes/cluster_idx_x.ll index 16550739bb..16a0ff6e0e 100644 --- a/cuda-oxide/intrinsics/probes/cluster_idx_x.ll +++ b/cuda-oxide/intrinsics/probes/cluster_idx_x.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_idx_y.ll b/cuda-oxide/intrinsics/probes/cluster_idx_y.ll index ae4e403df5..ec96813f1c 100644 --- a/cuda-oxide/intrinsics/probes/cluster_idx_y.ll +++ b/cuda-oxide/intrinsics/probes/cluster_idx_y.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cluster_idx_z.ll b/cuda-oxide/intrinsics/probes/cluster_idx_z.ll index 96820b0632..ba8196507f 100644 --- a/cuda-oxide/intrinsics/probes/cluster_idx_z.ll +++ b/cuda-oxide/intrinsics/probes/cluster_idx_z.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cos_approx_f32.ll b/cuda-oxide/intrinsics/probes/cos_approx_f32.ll index d89a5ad74c..98f20b6e54 100644 --- a/cuda-oxide/intrinsics/probes/cos_approx_f32.ll +++ b/cuda-oxide/intrinsics/probes/cos_approx_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cos_approx_ftz_f32.ll b/cuda-oxide/intrinsics/probes/cos_approx_ftz_f32.ll index cfb908db6f..efd163f26f 100644 --- a/cuda-oxide/intrinsics/probes/cos_approx_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/cos_approx_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_commit_group.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_commit_group.ll index 08821c20f1..fe2b860a8e 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_commit_group.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_commit_group.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_1d_l2.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_1d_l2.ll index 62b612bfcc..1a0bcfbc8d 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_1d_l2.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_1d_l2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_1d_l2_cache_hint.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_1d_l2_cache_hint.ll index 82811bd040..93052719f3 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_1d_l2_cache_hint.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_1d_l2_cache_hint.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_2d_l2.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_2d_l2.ll index 5eb85be12c..2cccb50bce 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_2d_l2.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_2d_l2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_2d_l2_cache_hint.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_2d_l2_cache_hint.ll index 16ef260921..8fe8400749 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_2d_l2_cache_hint.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_2d_l2_cache_hint.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_3d_l2.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_3d_l2.ll index 608b809b95..61492339e7 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_3d_l2.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_3d_l2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_3d_l2_cache_hint.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_3d_l2_cache_hint.ll index f4782ee08e..c40b533d7f 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_3d_l2_cache_hint.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_3d_l2_cache_hint.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_4d_l2.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_4d_l2.ll index 750dbcfa62..0dee2d0bcc 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_4d_l2.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_4d_l2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_4d_l2_cache_hint.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_4d_l2_cache_hint.ll index f2d593d0c3..15fc610e7c 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_4d_l2_cache_hint.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_4d_l2_cache_hint.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_5d_l2.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_5d_l2.ll index 69bb79b852..99e49e727e 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_5d_l2.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_5d_l2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_5d_l2_cache_hint.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_5d_l2_cache_hint.ll index 1e48935423..58e239798a 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_5d_l2_cache_hint.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_5d_l2_cache_hint.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_gather4_2d_l2.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_gather4_2d_l2.ll index bc7dc5ba90..6cca03b039 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_gather4_2d_l2.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_gather4_2d_l2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_gather4_2d_l2_cache_hint.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_gather4_2d_l2_cache_hint.ll index 22f0072705..418a2b7c87 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_gather4_2d_l2_cache_hint.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_prefetch_tensor_gather4_2d_l2_cache_hint.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_1d_g2s.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_1d_g2s.ll index cb11b4f7a4..7faa924c79 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_1d_g2s.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_1d_g2s.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_1d_g2s_cta.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_1d_g2s_cta.ll index b152cd93c0..24493521ac 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_1d_g2s_cta.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_1d_g2s_cta.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_1d_s2g.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_1d_s2g.ll index 03de0d0dec..99af371677 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_1d_s2g.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_1d_s2g.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s.ll index 8ad84d0c13..4fad68cc5e 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s_cta.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s_cta.ll index 6209c6475b..19d74dfe52 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s_cta.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s_cta.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s_multicast.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s_multicast.ll index f40dcb6d7a..544e895d64 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s_multicast.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s_multicast.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s_multicast_cg2.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s_multicast_cg2.ll index 2b0a93558d..0d6cbecc7f 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s_multicast_cg2.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_g2s_multicast_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_s2g.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_s2g.ll index 12ea314076..722c71c6c1 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_s2g.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_2d_s2g.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_3d_g2s.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_3d_g2s.ll index cbafc03cc1..aec0deb312 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_3d_g2s.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_3d_g2s.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_3d_g2s_cta.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_3d_g2s_cta.ll index ccaa4da36c..40ffa062c5 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_3d_g2s_cta.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_3d_g2s_cta.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_3d_s2g.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_3d_s2g.ll index 4da12a06bd..e575468a28 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_3d_s2g.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_3d_s2g.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_4d_g2s.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_4d_g2s.ll index ae671b7e91..0dc59cbedc 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_4d_g2s.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_4d_g2s.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_4d_g2s_cta.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_4d_g2s_cta.ll index f52c4c5582..8dd65fc15a 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_4d_g2s_cta.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_4d_g2s_cta.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_4d_s2g.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_4d_s2g.ll index 5191b9e3f9..e88249cf91 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_4d_s2g.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_4d_s2g.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_5d_g2s.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_5d_g2s.ll index ca38b3b1e7..bb468759df 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_5d_g2s.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_5d_g2s.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_5d_g2s_cta.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_5d_g2s_cta.ll index f948f3384f..5f157998ef 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_5d_g2s_cta.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_5d_g2s_cta.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_5d_s2g.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_5d_s2g.ll index 14a6af0024..26740cfa1c 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_5d_s2g.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_5d_s2g.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_im2col_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_im2col_3d.ll index da0d003720..0ab59c4dee 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_im2col_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_im2col_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_im2col_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_im2col_4d.ll index ee8ce35c30..22b47bd435 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_im2col_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_im2col_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_im2col_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_im2col_5d.ll index 57b37e4f9f..e8af0b0b40 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_im2col_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_im2col_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_1d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_1d.ll index fa84b0cba5..a354136d02 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_1d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_1d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_2d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_2d.ll index 38d71830ae..55e6b20b26 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_2d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_2d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_3d.ll index 3a54caa8e0..d1f19a358f 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_4d.ll index 312b4b0e55..8d947bc385 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_5d.ll index 02379c2a2c..18b0751359 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_add_tile_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_im2col_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_im2col_3d.ll index 51db9efa02..b6fbac6e5c 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_im2col_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_im2col_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_im2col_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_im2col_4d.ll index 4b3d5cc3f3..7307716e47 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_im2col_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_im2col_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_im2col_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_im2col_5d.ll index 5669b94a21..f7983687ee 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_im2col_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_im2col_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_1d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_1d.ll index 491dabbce4..78a479e79a 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_1d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_1d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_2d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_2d.ll index 91a82adabb..ef0820658e 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_2d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_2d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_3d.ll index 8156f7979e..b938b0b815 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_4d.ll index b3ac656f3f..5b68a41798 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_5d.ll index 08199fccec..2ff540441d 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_and_tile_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_im2col_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_im2col_3d.ll index a71c244c25..686bf5ebbf 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_im2col_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_im2col_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_im2col_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_im2col_4d.ll index ddc03dc61c..9d55b2578b 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_im2col_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_im2col_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_im2col_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_im2col_5d.ll index 9423befc08..93d55864c5 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_im2col_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_im2col_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_1d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_1d.ll index c7b2c96c19..73d8a44e18 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_1d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_1d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_2d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_2d.ll index 9086cbcc1f..ed059949cf 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_2d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_2d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_3d.ll index 51009fb3f8..ca480b1934 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_4d.ll index ae7d69f664..76a1344d3d 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_5d.ll index 4a02f7d1b4..4dd72f7732 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_dec_tile_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_im2col_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_im2col_3d.ll index 5e555c91c2..3ddf01cc9f 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_im2col_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_im2col_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_im2col_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_im2col_4d.ll index 1aad95e010..941f0f2737 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_im2col_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_im2col_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_im2col_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_im2col_5d.ll index 3f381bf9d5..b50cc83c4f 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_im2col_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_im2col_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_1d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_1d.ll index 9a4e0d6ad1..3c9ecd17c3 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_1d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_1d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_2d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_2d.ll index f9d94125d8..da40038e5f 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_2d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_2d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_3d.ll index d5e6422ed5..05266dde59 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_4d.ll index 87637830a0..bb275e19f8 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_5d.ll index 21cf8fe3bd..b38dd7c6da 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_inc_tile_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_im2col_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_im2col_3d.ll index 99b720ffb5..02c520d8d5 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_im2col_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_im2col_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_im2col_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_im2col_4d.ll index 1fe69180da..9f0591b8bd 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_im2col_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_im2col_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_im2col_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_im2col_5d.ll index be50e4ccd7..20a794ed57 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_im2col_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_im2col_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_1d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_1d.ll index 97c8432921..3a7f8843b6 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_1d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_1d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_2d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_2d.ll index f9cdffb7b0..d8ca4b72a7 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_2d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_2d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_3d.ll index 38b8acb8a0..249495ee75 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_4d.ll index 90fdf3e770..a45cb79b46 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_5d.ll index 28a3501c9c..596fcd50bf 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_max_tile_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_im2col_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_im2col_3d.ll index 165a06bce7..a0682e2137 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_im2col_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_im2col_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_im2col_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_im2col_4d.ll index f7dab23f0d..506d930672 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_im2col_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_im2col_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_im2col_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_im2col_5d.ll index b0176ae371..0948bfce75 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_im2col_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_im2col_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_1d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_1d.ll index f4505283f4..64435c1c8e 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_1d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_1d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_2d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_2d.ll index 31c221f3e9..f3b0dd09f2 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_2d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_2d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_3d.ll index 223e9cce17..4fde6f622a 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_4d.ll index cf3318b2ef..b49dc1cc16 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_5d.ll index 867cd90a03..552e4febcb 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_min_tile_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_im2col_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_im2col_3d.ll index f4be7a4541..34a373f0bb 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_im2col_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_im2col_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_im2col_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_im2col_4d.ll index 3ea7dd39d3..48826636eb 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_im2col_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_im2col_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_im2col_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_im2col_5d.ll index 5cb1be087c..2cbf150674 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_im2col_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_im2col_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_1d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_1d.ll index ea8c17e7f4..8bad9c29ed 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_1d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_1d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_2d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_2d.ll index c474dcd79c..77347ce0a0 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_2d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_2d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_3d.ll index 8224c78f00..e200c7d93d 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_4d.ll index e2a016d839..2d3f31f3c5 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_5d.ll index ec6aedd1bf..6c11546cc7 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_or_tile_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_im2col_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_im2col_3d.ll index e5747cada0..19e8a148af 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_im2col_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_im2col_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_im2col_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_im2col_4d.ll index cacf925661..f3164ffb7f 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_im2col_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_im2col_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_im2col_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_im2col_5d.ll index f7c22df8fa..9503a40a5c 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_im2col_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_im2col_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_1d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_1d.ll index 32e39326ee..0eb484bc9e 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_1d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_1d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_2d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_2d.ll index 2b88fef32e..6a3a3a6a4f 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_2d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_2d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_3d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_3d.ll index 00e6106ac2..31a5287887 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_3d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_3d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_4d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_4d.ll index 24cb23732d..e5471acbab 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_4d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_4d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_5d.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_5d.ll index 16fb10e5b4..082c45c6d1 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_5d.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_tensor_reduce_xor_tile_5d.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_wait_group.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_wait_group.ll index a0167d23c6..613224dd5f 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_wait_group.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_wait_group.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_bulk_wait_group_read.ll b/cuda-oxide/intrinsics/probes/cp_async_bulk_wait_group_read.ll index 032b89cb31..4885cf6027 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_bulk_wait_group_read.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_bulk_wait_group_read.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_ca_16.ll b/cuda-oxide/intrinsics/probes/cp_async_ca_16.ll index c1ba3e065c..e809ffe48c 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_ca_16.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_ca_16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_ca_4.ll b/cuda-oxide/intrinsics/probes/cp_async_ca_4.ll index 080a7c1c73..1e7ed31d23 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_ca_4.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_ca_4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_ca_8.ll b/cuda-oxide/intrinsics/probes/cp_async_ca_8.ll index 3c0ccd937a..b5a53430d4 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_ca_8.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_ca_8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_ca_zfill_16.ll b/cuda-oxide/intrinsics/probes/cp_async_ca_zfill_16.ll index e19e7eabb9..e7a3e49ba5 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_ca_zfill_16.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_ca_zfill_16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_ca_zfill_4.ll b/cuda-oxide/intrinsics/probes/cp_async_ca_zfill_4.ll index b867f3826f..21fdeeefac 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_ca_zfill_4.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_ca_zfill_4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_ca_zfill_8.ll b/cuda-oxide/intrinsics/probes/cp_async_ca_zfill_8.ll index 8404238744..2ec0ce8418 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_ca_zfill_8.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_ca_zfill_8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_cg_16.ll b/cuda-oxide/intrinsics/probes/cp_async_cg_16.ll index 90e58b4436..92224f6cdf 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_cg_16.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_cg_16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_cg_zfill_16.ll b/cuda-oxide/intrinsics/probes/cp_async_cg_zfill_16.ll index 46df6642ea..6bd8465a29 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_cg_zfill_16.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_cg_zfill_16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_commit_group.ll b/cuda-oxide/intrinsics/probes/cp_async_commit_group.ll index 833331eef6..599bd91e8a 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_commit_group.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_commit_group.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive.ll b/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive.ll index efdb6551d3..afe89f60ef 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive_noinc.ll b/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive_noinc.ll index 702c6d3ed1..dfe21789cd 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive_noinc.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive_noinc.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive_noinc_shared.ll b/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive_noinc_shared.ll index 5cdc34b0c3..488ef1c1b8 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive_noinc_shared.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive_noinc_shared.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive_shared.ll b/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive_shared.ll index 7feda3076e..d2e7e0ec92 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive_shared.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_mbarrier_arrive_shared.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_wait_all.ll b/cuda-oxide/intrinsics/probes/cp_async_wait_all.ll index 0df5678d04..c64c99e7df 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_wait_all.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_wait_all.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cp_async_wait_group.ll b/cuda-oxide/intrinsics/probes/cp_async_wait_group.ll index 24d6223617..72018f1c88 100644 --- a/cuda-oxide/intrinsics/probes/cp_async_wait_group.ll +++ b/cuda-oxide/intrinsics/probes/cp_async_wait_group.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_f16x2_f32.ll b/cuda-oxide/intrinsics/probes/cvt_f16x2_f32.ll index c38689d26a..62cc1690ff 100644 --- a/cuda-oxide/intrinsics/probes/cvt_f16x2_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_f16x2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_f32x2_bf16x2.ll b/cuda-oxide/intrinsics/probes/cvt_f32x2_bf16x2.ll index d22737fc10..577d5558c3 100644 --- a/cuda-oxide/intrinsics/probes/cvt_f32x2_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/cvt_f32x2_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_f16x2_e4m3x2.ll b/cuda-oxide/intrinsics/probes/cvt_rn_f16x2_e4m3x2.ll index 34e712459b..dd5bf08bf5 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_f16x2_e4m3x2.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_f16x2_e4m3x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_f16x2_e5m2x2.ll b/cuda-oxide/intrinsics/probes/cvt_rn_f16x2_e5m2x2.ll index 8676e6ba0e..bef2fca371 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_f16x2_e5m2x2.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_f16x2_e5m2x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_relu_bf16x2_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rn_relu_bf16x2_f32.ll index 7154bc8fb3..c0479e38b2 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_relu_bf16x2_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_relu_bf16x2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_relu_f16x2_e4m3x2.ll b/cuda-oxide/intrinsics/probes/cvt_rn_relu_f16x2_e4m3x2.ll index 50f750a96d..0d5514a888 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_relu_f16x2_e4m3x2.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_relu_f16x2_e4m3x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_relu_f16x2_e5m2x2.ll b/cuda-oxide/intrinsics/probes/cvt_rn_relu_f16x2_e5m2x2.ll index 6687a4bc8a..c157e3322e 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_relu_f16x2_e5m2x2.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_relu_f16x2_e5m2x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_relu_f16x2_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rn_relu_f16x2_f32.ll index c50aa1699e..a5a5d436a8 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_relu_f16x2_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_relu_f16x2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_relu_satfinite_tf32_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rn_relu_satfinite_tf32_f32.ll index e52fc425e5..87ef32a577 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_relu_satfinite_tf32_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_relu_satfinite_tf32_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_relu_tf32_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rn_relu_tf32_f32.ll index b04e60361f..b1e5384f66 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_relu_tf32_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_relu_tf32_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e4m3x2_bf16x2.ll b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e4m3x2_bf16x2.ll index 6325ec4637..ec06101d3c 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e4m3x2_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e4m3x2_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e4m3x2_f16x2.ll b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e4m3x2_f16x2.ll index 95d59bfb1a..58d05de351 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e4m3x2_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e4m3x2_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e4m3x2_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e4m3x2_f32.ll index 98a0a70f09..c98229e3b6 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e4m3x2_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e4m3x2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e5m2x2_bf16x2.ll b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e5m2x2_bf16x2.ll index aa29beff89..548c267399 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e5m2x2_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e5m2x2_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e5m2x2_f16x2.ll b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e5m2x2_f16x2.ll index 285799ebea..93ebc74101 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e5m2x2_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e5m2x2_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e5m2x2_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e5m2x2_f32.ll index 50652e540c..1b22a4369a 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e5m2x2_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_e5m2x2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e4m3x2_bf16x2.ll b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e4m3x2_bf16x2.ll index 3c02959a40..781d0bb4b0 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e4m3x2_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e4m3x2_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e4m3x2_f16x2.ll b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e4m3x2_f16x2.ll index fbc93ad8c1..a1504f1d9f 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e4m3x2_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e4m3x2_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e4m3x2_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e4m3x2_f32.ll index f67873a197..f002f04411 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e4m3x2_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e4m3x2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e5m2x2_bf16x2.ll b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e5m2x2_bf16x2.ll index 0bb9cbfe0d..8e917711ed 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e5m2x2_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e5m2x2_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e5m2x2_f16x2.ll b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e5m2x2_f16x2.ll index 0bda39c129..b01291ced6 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e5m2x2_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e5m2x2_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e5m2x2_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e5m2x2_f32.ll index d24c076a6c..a325973bff 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e5m2x2_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_relu_e5m2x2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_tf32_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_tf32_f32.ll index f9c8c59e19..2f040f356b 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_tf32_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_satfinite_tf32_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rn_tf32_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rn_tf32_f32.ll index eef392a851..0d54c57f16 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rn_tf32_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rn_tf32_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rna_satfinite_tf32_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rna_satfinite_tf32_f32.ll index c93e1ad4ef..68d024789e 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rna_satfinite_tf32_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rna_satfinite_tf32_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rna_tf32_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rna_tf32_f32.ll index e2edff9694..674a9763af 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rna_tf32_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rna_tf32_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rz_bf16x2_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rz_bf16x2_f32.ll index 7e6db38d16..c72b31c748 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rz_bf16x2_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rz_bf16x2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rz_f16x2_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rz_f16x2_f32.ll index 1746a4959e..e072c50b9a 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rz_f16x2_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rz_f16x2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rz_relu_satfinite_tf32_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rz_relu_satfinite_tf32_f32.ll index 16f1f038e8..b8093292cb 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rz_relu_satfinite_tf32_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rz_relu_satfinite_tf32_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rz_relu_tf32_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rz_relu_tf32_f32.ll index 7526353be1..5d27501678 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rz_relu_tf32_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rz_relu_tf32_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rz_satfinite_tf32_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rz_satfinite_tf32_f32.ll index 5f5be58e7d..bf1bf92ed5 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rz_satfinite_tf32_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rz_satfinite_tf32_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/cvt_rz_tf32_f32.ll b/cuda-oxide/intrinsics/probes/cvt_rz_tf32_f32.ll index f8303842e9..892b398f69 100644 --- a/cuda-oxide/intrinsics/probes/cvt_rz_tf32_f32.ll +++ b/cuda-oxide/intrinsics/probes/cvt_rz_tf32_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/div_rm_f32.ll b/cuda-oxide/intrinsics/probes/div_rm_f32.ll index 62325d24ce..54a664ebb4 100644 --- a/cuda-oxide/intrinsics/probes/div_rm_f32.ll +++ b/cuda-oxide/intrinsics/probes/div_rm_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/div_rm_f64.ll b/cuda-oxide/intrinsics/probes/div_rm_f64.ll index 88dc8f01fa..1c017b7dd1 100644 --- a/cuda-oxide/intrinsics/probes/div_rm_f64.ll +++ b/cuda-oxide/intrinsics/probes/div_rm_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/div_rm_ftz_f32.ll b/cuda-oxide/intrinsics/probes/div_rm_ftz_f32.ll index 77b4653625..37b00c26b1 100644 --- a/cuda-oxide/intrinsics/probes/div_rm_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/div_rm_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/div_rn_f32.ll b/cuda-oxide/intrinsics/probes/div_rn_f32.ll index 5a6bb99468..d586fca09f 100644 --- a/cuda-oxide/intrinsics/probes/div_rn_f32.ll +++ b/cuda-oxide/intrinsics/probes/div_rn_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/div_rn_f64.ll b/cuda-oxide/intrinsics/probes/div_rn_f64.ll index 37abf06579..cd4daf2de0 100644 --- a/cuda-oxide/intrinsics/probes/div_rn_f64.ll +++ b/cuda-oxide/intrinsics/probes/div_rn_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/div_rn_ftz_f32.ll b/cuda-oxide/intrinsics/probes/div_rn_ftz_f32.ll index e692e22c1a..1f4697065b 100644 --- a/cuda-oxide/intrinsics/probes/div_rn_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/div_rn_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/div_rp_f32.ll b/cuda-oxide/intrinsics/probes/div_rp_f32.ll index 8ff6e7a55c..cffc43b130 100644 --- a/cuda-oxide/intrinsics/probes/div_rp_f32.ll +++ b/cuda-oxide/intrinsics/probes/div_rp_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/div_rp_f64.ll b/cuda-oxide/intrinsics/probes/div_rp_f64.ll index 5f1c1c84ff..ff2a755de4 100644 --- a/cuda-oxide/intrinsics/probes/div_rp_f64.ll +++ b/cuda-oxide/intrinsics/probes/div_rp_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/div_rp_ftz_f32.ll b/cuda-oxide/intrinsics/probes/div_rp_ftz_f32.ll index b12332b36c..d80c11f92f 100644 --- a/cuda-oxide/intrinsics/probes/div_rp_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/div_rp_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/div_rz_f32.ll b/cuda-oxide/intrinsics/probes/div_rz_f32.ll index 05ce5d8fea..49abe32790 100644 --- a/cuda-oxide/intrinsics/probes/div_rz_f32.ll +++ b/cuda-oxide/intrinsics/probes/div_rz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/div_rz_f64.ll b/cuda-oxide/intrinsics/probes/div_rz_f64.ll index 7f743367db..55332ef8f3 100644 --- a/cuda-oxide/intrinsics/probes/div_rz_f64.ll +++ b/cuda-oxide/intrinsics/probes/div_rz_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/div_rz_ftz_f32.ll b/cuda-oxide/intrinsics/probes/div_rz_ftz_f32.ll index 8cc401f48a..17918bb11b 100644 --- a/cuda-oxide/intrinsics/probes/div_rz_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/div_rz_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/dp2a_s32.ll b/cuda-oxide/intrinsics/probes/dp2a_s32.ll index 6f4e9a2485..e3db4cc81e 100644 --- a/cuda-oxide/intrinsics/probes/dp2a_s32.ll +++ b/cuda-oxide/intrinsics/probes/dp2a_s32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/dp2a_u32.ll b/cuda-oxide/intrinsics/probes/dp2a_u32.ll index 5359dc039e..c8c70a330e 100644 --- a/cuda-oxide/intrinsics/probes/dp2a_u32.ll +++ b/cuda-oxide/intrinsics/probes/dp2a_u32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/dp4a_s32.ll b/cuda-oxide/intrinsics/probes/dp4a_s32.ll index ce3c39e5da..42876fa8f6 100644 --- a/cuda-oxide/intrinsics/probes/dp4a_s32.ll +++ b/cuda-oxide/intrinsics/probes/dp4a_s32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/dp4a_u32.ll b/cuda-oxide/intrinsics/probes/dp4a_u32.ll index 48447f1ea6..8887f68794 100644 --- a/cuda-oxide/intrinsics/probes/dp4a_u32.ll +++ b/cuda-oxide/intrinsics/probes/dp4a_u32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/dsmem_read_u32.ll b/cuda-oxide/intrinsics/probes/dsmem_read_u32.ll index d2827058ea..e6615386fe 100644 --- a/cuda-oxide/intrinsics/probes/dsmem_read_u32.ll +++ b/cuda-oxide/intrinsics/probes/dsmem_read_u32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/dynamic_smem_size.lib_nvvm.ll b/cuda-oxide/intrinsics/probes/dynamic_smem_size.lib_nvvm.ll index 8964b1638e..6b80f45e0d 100644 --- a/cuda-oxide/intrinsics/probes/dynamic_smem_size.lib_nvvm.ll +++ b/cuda-oxide/intrinsics/probes/dynamic_smem_size.lib_nvvm.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/dynamic_smem_size.llvm_nvptx.ll b/cuda-oxide/intrinsics/probes/dynamic_smem_size.llvm_nvptx.ll index f91c061b93..5fae4d270d 100644 --- a/cuda-oxide/intrinsics/probes/dynamic_smem_size.llvm_nvptx.ll +++ b/cuda-oxide/intrinsics/probes/dynamic_smem_size.llvm_nvptx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/elect_sync.lib_nvvm.ll b/cuda-oxide/intrinsics/probes/elect_sync.lib_nvvm.ll index 292612e652..70b785292e 100644 --- a/cuda-oxide/intrinsics/probes/elect_sync.lib_nvvm.ll +++ b/cuda-oxide/intrinsics/probes/elect_sync.lib_nvvm.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/elect_sync.llvm_nvptx.ll b/cuda-oxide/intrinsics/probes/elect_sync.llvm_nvptx.ll index 2e40afc45c..24fa2cc701 100644 --- a/cuda-oxide/intrinsics/probes/elect_sync.llvm_nvptx.ll +++ b/cuda-oxide/intrinsics/probes/elect_sync.llvm_nvptx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/envreg1.lib_nvvm.ll b/cuda-oxide/intrinsics/probes/envreg1.lib_nvvm.ll index 56c345f4b7..5b2515d6ca 100644 --- a/cuda-oxide/intrinsics/probes/envreg1.lib_nvvm.ll +++ b/cuda-oxide/intrinsics/probes/envreg1.lib_nvvm.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/envreg1.llvm_nvptx.ll b/cuda-oxide/intrinsics/probes/envreg1.llvm_nvptx.ll index 9e21fc2227..b03925b5cb 100644 --- a/cuda-oxide/intrinsics/probes/envreg1.llvm_nvptx.ll +++ b/cuda-oxide/intrinsics/probes/envreg1.llvm_nvptx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/envreg2.lib_nvvm.ll b/cuda-oxide/intrinsics/probes/envreg2.lib_nvvm.ll index f27853f74a..f79412cd60 100644 --- a/cuda-oxide/intrinsics/probes/envreg2.lib_nvvm.ll +++ b/cuda-oxide/intrinsics/probes/envreg2.lib_nvvm.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/envreg2.llvm_nvptx.ll b/cuda-oxide/intrinsics/probes/envreg2.llvm_nvptx.ll index f206d76c49..86c17442b8 100644 --- a/cuda-oxide/intrinsics/probes/envreg2.llvm_nvptx.ll +++ b/cuda-oxide/intrinsics/probes/envreg2.llvm_nvptx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ex2_approx_f16.ll b/cuda-oxide/intrinsics/probes/ex2_approx_f16.ll index a06fde2cd1..efee748842 100644 --- a/cuda-oxide/intrinsics/probes/ex2_approx_f16.ll +++ b/cuda-oxide/intrinsics/probes/ex2_approx_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ex2_approx_f32.ll b/cuda-oxide/intrinsics/probes/ex2_approx_f32.ll index cf37724aea..b5c9de90ed 100644 --- a/cuda-oxide/intrinsics/probes/ex2_approx_f32.ll +++ b/cuda-oxide/intrinsics/probes/ex2_approx_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ex2_approx_ftz_f32.ll b/cuda-oxide/intrinsics/probes/ex2_approx_ftz_f32.ll index 39a9b3dc5c..10d14811f2 100644 --- a/cuda-oxide/intrinsics/probes/ex2_approx_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/ex2_approx_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fence_acquire_shared_cluster_cluster.ll b/cuda-oxide/intrinsics/probes/fence_acquire_shared_cluster_cluster.ll index 4cb8dbc265..489cdc2026 100644 --- a/cuda-oxide/intrinsics/probes/fence_acquire_shared_cluster_cluster.ll +++ b/cuda-oxide/intrinsics/probes/fence_acquire_shared_cluster_cluster.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fence_mbarrier_init_release_cluster.ll b/cuda-oxide/intrinsics/probes/fence_mbarrier_init_release_cluster.ll index 5166739440..f031a256f5 100644 --- a/cuda-oxide/intrinsics/probes/fence_mbarrier_init_release_cluster.ll +++ b/cuda-oxide/intrinsics/probes/fence_mbarrier_init_release_cluster.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fence_proxy_async_generic_acquire_shared_cluster_cluster.ll b/cuda-oxide/intrinsics/probes/fence_proxy_async_generic_acquire_shared_cluster_cluster.ll index cbe3bbe2d4..a6c40310c1 100644 --- a/cuda-oxide/intrinsics/probes/fence_proxy_async_generic_acquire_shared_cluster_cluster.ll +++ b/cuda-oxide/intrinsics/probes/fence_proxy_async_generic_acquire_shared_cluster_cluster.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fence_proxy_async_generic_release_shared_cta_cluster.ll b/cuda-oxide/intrinsics/probes/fence_proxy_async_generic_release_shared_cta_cluster.ll index bfa753ffc3..dd2ee8471b 100644 --- a/cuda-oxide/intrinsics/probes/fence_proxy_async_generic_release_shared_cta_cluster.ll +++ b/cuda-oxide/intrinsics/probes/fence_proxy_async_generic_release_shared_cta_cluster.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fence_proxy_async_shared_cta.ll b/cuda-oxide/intrinsics/probes/fence_proxy_async_shared_cta.ll index 99649aeaa6..944c8baba4 100644 --- a/cuda-oxide/intrinsics/probes/fence_proxy_async_shared_cta.ll +++ b/cuda-oxide/intrinsics/probes/fence_proxy_async_shared_cta.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_cluster.ll b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_cluster.ll index 5ad62bae83..10707b2e6d 100644 --- a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_cluster.ll +++ b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_cluster.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_cta.ll b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_cta.ll index 6c2ec31dd4..60292cd1cb 100644 --- a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_cta.ll +++ b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_cta.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_gpu.ll b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_gpu.ll index 8cac2bbeac..6fdae78627 100644 --- a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_gpu.ll +++ b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_gpu.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_system.ll b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_system.ll index 7e3470d564..afca8f1d2a 100644 --- a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_system.ll +++ b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_acquire_system.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_cluster.ll b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_cluster.ll index cdae9744a0..a388226614 100644 --- a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_cluster.ll +++ b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_cluster.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_cta.ll b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_cta.ll index 582767b734..ad135c8414 100644 --- a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_cta.ll +++ b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_cta.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_gpu.ll b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_gpu.ll index 92ea7460b4..cdf35de718 100644 --- a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_gpu.ll +++ b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_gpu.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_system.ll b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_system.ll index 0544ee6773..d11e53617f 100644 --- a/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_system.ll +++ b/cuda-oxide/intrinsics/probes/fence_proxy_tensormap_generic_release_system.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_bf16x2.ll b/cuda-oxide/intrinsics/probes/fma_bf16x2.ll index 4230d4b9f4..3d69663efd 100644 --- a/cuda-oxide/intrinsics/probes/fma_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/fma_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_f16x2.ll b/cuda-oxide/intrinsics/probes/fma_f16x2.ll index 67b00faa0c..9db84aa9e9 100644 --- a/cuda-oxide/intrinsics/probes/fma_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/fma_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_f32x2.ll b/cuda-oxide/intrinsics/probes/fma_f32x2.ll index 38e7038c1e..016a1b2d7d 100644 --- a/cuda-oxide/intrinsics/probes/fma_f32x2.ll +++ b/cuda-oxide/intrinsics/probes/fma_f32x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_ftz_f16x2.ll b/cuda-oxide/intrinsics/probes/fma_ftz_f16x2.ll index 63fc197761..b59c15c4a9 100644 --- a/cuda-oxide/intrinsics/probes/fma_ftz_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/fma_ftz_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_ftz_f32x2.ll b/cuda-oxide/intrinsics/probes/fma_ftz_f32x2.ll index ac68639427..7e879ed616 100644 --- a/cuda-oxide/intrinsics/probes/fma_ftz_f32x2.ll +++ b/cuda-oxide/intrinsics/probes/fma_ftz_f32x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_ftz_relu_f16x2.ll b/cuda-oxide/intrinsics/probes/fma_ftz_relu_f16x2.ll index d03ce49914..7f81bb1cda 100644 --- a/cuda-oxide/intrinsics/probes/fma_ftz_relu_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/fma_ftz_relu_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_ftz_sat_f16x2.ll b/cuda-oxide/intrinsics/probes/fma_ftz_sat_f16x2.ll index 1bceed890d..10936525bf 100644 --- a/cuda-oxide/intrinsics/probes/fma_ftz_sat_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/fma_ftz_sat_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_relu_bf16x2.ll b/cuda-oxide/intrinsics/probes/fma_relu_bf16x2.ll index 887cbc146d..6dd3923b21 100644 --- a/cuda-oxide/intrinsics/probes/fma_relu_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/fma_relu_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_relu_f16x2.ll b/cuda-oxide/intrinsics/probes/fma_relu_f16x2.ll index a8098b7770..467a74f8a5 100644 --- a/cuda-oxide/intrinsics/probes/fma_relu_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/fma_relu_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rm_f32.ll b/cuda-oxide/intrinsics/probes/fma_rm_f32.ll index d241487d9a..d7393e8b7d 100644 --- a/cuda-oxide/intrinsics/probes/fma_rm_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rm_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rm_f64.ll b/cuda-oxide/intrinsics/probes/fma_rm_f64.ll index 1d694ace96..d69f488ab5 100644 --- a/cuda-oxide/intrinsics/probes/fma_rm_f64.ll +++ b/cuda-oxide/intrinsics/probes/fma_rm_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rm_ftz_f32.ll b/cuda-oxide/intrinsics/probes/fma_rm_ftz_f32.ll index 772a6a5084..1c9b2b69f8 100644 --- a/cuda-oxide/intrinsics/probes/fma_rm_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rm_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rm_ftz_sat_f32.ll b/cuda-oxide/intrinsics/probes/fma_rm_ftz_sat_f32.ll index b0ba9c9bc0..70906cc858 100644 --- a/cuda-oxide/intrinsics/probes/fma_rm_ftz_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rm_ftz_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rm_sat_f32.ll b/cuda-oxide/intrinsics/probes/fma_rm_sat_f32.ll index e5571ad6d1..6a255d38f6 100644 --- a/cuda-oxide/intrinsics/probes/fma_rm_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rm_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rn_f32.ll b/cuda-oxide/intrinsics/probes/fma_rn_f32.ll index 4b842a4cc6..517490895b 100644 --- a/cuda-oxide/intrinsics/probes/fma_rn_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rn_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rn_f64.ll b/cuda-oxide/intrinsics/probes/fma_rn_f64.ll index a29477818f..59966bea6d 100644 --- a/cuda-oxide/intrinsics/probes/fma_rn_f64.ll +++ b/cuda-oxide/intrinsics/probes/fma_rn_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rn_ftz_f32.ll b/cuda-oxide/intrinsics/probes/fma_rn_ftz_f32.ll index de90b4fcd9..9f25c108c4 100644 --- a/cuda-oxide/intrinsics/probes/fma_rn_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rn_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rn_ftz_sat_f32.ll b/cuda-oxide/intrinsics/probes/fma_rn_ftz_sat_f32.ll index 991d70a570..319dd954f9 100644 --- a/cuda-oxide/intrinsics/probes/fma_rn_ftz_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rn_ftz_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rn_sat_f32.ll b/cuda-oxide/intrinsics/probes/fma_rn_sat_f32.ll index 9cd95584a9..e734a924a3 100644 --- a/cuda-oxide/intrinsics/probes/fma_rn_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rn_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rp_f32.ll b/cuda-oxide/intrinsics/probes/fma_rp_f32.ll index 55cabe15e8..58539d5664 100644 --- a/cuda-oxide/intrinsics/probes/fma_rp_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rp_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rp_f64.ll b/cuda-oxide/intrinsics/probes/fma_rp_f64.ll index 17722ece0e..4e67467710 100644 --- a/cuda-oxide/intrinsics/probes/fma_rp_f64.ll +++ b/cuda-oxide/intrinsics/probes/fma_rp_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rp_ftz_f32.ll b/cuda-oxide/intrinsics/probes/fma_rp_ftz_f32.ll index fdb11fb06e..b85b2c04dd 100644 --- a/cuda-oxide/intrinsics/probes/fma_rp_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rp_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rp_ftz_sat_f32.ll b/cuda-oxide/intrinsics/probes/fma_rp_ftz_sat_f32.ll index 75d9a3e693..f0a024207d 100644 --- a/cuda-oxide/intrinsics/probes/fma_rp_ftz_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rp_ftz_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rp_sat_f32.ll b/cuda-oxide/intrinsics/probes/fma_rp_sat_f32.ll index b8d46816dd..4b73163fa0 100644 --- a/cuda-oxide/intrinsics/probes/fma_rp_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rp_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rz_f32.ll b/cuda-oxide/intrinsics/probes/fma_rz_f32.ll index 38effaaba5..40f805ebea 100644 --- a/cuda-oxide/intrinsics/probes/fma_rz_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rz_f64.ll b/cuda-oxide/intrinsics/probes/fma_rz_f64.ll index 97bba683fd..bea2314297 100644 --- a/cuda-oxide/intrinsics/probes/fma_rz_f64.ll +++ b/cuda-oxide/intrinsics/probes/fma_rz_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rz_ftz_f32.ll b/cuda-oxide/intrinsics/probes/fma_rz_ftz_f32.ll index b8359fb8da..87fdb97808 100644 --- a/cuda-oxide/intrinsics/probes/fma_rz_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rz_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rz_ftz_sat_f32.ll b/cuda-oxide/intrinsics/probes/fma_rz_ftz_sat_f32.ll index 3021c77165..06c35d961c 100644 --- a/cuda-oxide/intrinsics/probes/fma_rz_ftz_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rz_ftz_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_rz_sat_f32.ll b/cuda-oxide/intrinsics/probes/fma_rz_sat_f32.ll index 2499353dd4..a3f3f59c4b 100644 --- a/cuda-oxide/intrinsics/probes/fma_rz_sat_f32.ll +++ b/cuda-oxide/intrinsics/probes/fma_rz_sat_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/fma_sat_f16x2.ll b/cuda-oxide/intrinsics/probes/fma_sat_f16x2.ll index 6b6fc66902..324cd0283e 100644 --- a/cuda-oxide/intrinsics/probes/fma_sat_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/fma_sat_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/globaltimer.lib_nvvm.ll b/cuda-oxide/intrinsics/probes/globaltimer.lib_nvvm.ll index a9f5c145d2..28d2c0bbf2 100644 --- a/cuda-oxide/intrinsics/probes/globaltimer.lib_nvvm.ll +++ b/cuda-oxide/intrinsics/probes/globaltimer.lib_nvvm.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/globaltimer.llvm_nvptx.ll b/cuda-oxide/intrinsics/probes/globaltimer.llvm_nvptx.ll index 8918071749..9b8eab649c 100644 --- a/cuda-oxide/intrinsics/probes/globaltimer.llvm_nvptx.ll +++ b/cuda-oxide/intrinsics/probes/globaltimer.llvm_nvptx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/grid_dependency_launch_dependents.ll b/cuda-oxide/intrinsics/probes/grid_dependency_launch_dependents.ll index 8d9ba6c33e..1b52e7947e 100644 --- a/cuda-oxide/intrinsics/probes/grid_dependency_launch_dependents.ll +++ b/cuda-oxide/intrinsics/probes/grid_dependency_launch_dependents.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/grid_dependency_wait.ll b/cuda-oxide/intrinsics/probes/grid_dependency_wait.ll index 7e3e60cc9c..9b224a336c 100644 --- a/cuda-oxide/intrinsics/probes/grid_dependency_wait.ll +++ b/cuda-oxide/intrinsics/probes/grid_dependency_wait.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/grid_dim_x.ll b/cuda-oxide/intrinsics/probes/grid_dim_x.ll index 31aaeb1ede..51649cef62 100644 --- a/cuda-oxide/intrinsics/probes/grid_dim_x.ll +++ b/cuda-oxide/intrinsics/probes/grid_dim_x.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/grid_dim_y.ll b/cuda-oxide/intrinsics/probes/grid_dim_y.ll index 512f73df13..837f6d60dc 100644 --- a/cuda-oxide/intrinsics/probes/grid_dim_y.ll +++ b/cuda-oxide/intrinsics/probes/grid_dim_y.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/grid_dim_z.ll b/cuda-oxide/intrinsics/probes/grid_dim_z.ll index 16e3e547fc..ad94c8329e 100644 --- a/cuda-oxide/intrinsics/probes/grid_dim_z.ll +++ b/cuda-oxide/intrinsics/probes/grid_dim_z.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/gridid.lib_nvvm.ll b/cuda-oxide/intrinsics/probes/gridid.lib_nvvm.ll index 2f9afece4f..af55aef1e5 100644 --- a/cuda-oxide/intrinsics/probes/gridid.lib_nvvm.ll +++ b/cuda-oxide/intrinsics/probes/gridid.lib_nvvm.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/gridid.llvm_nvptx.ll b/cuda-oxide/intrinsics/probes/gridid.llvm_nvptx.ll index 19c2a29711..17c9f0ddf1 100644 --- a/cuda-oxide/intrinsics/probes/gridid.llvm_nvptx.ll +++ b/cuda-oxide/intrinsics/probes/gridid.llvm_nvptx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/lane_id.ll b/cuda-oxide/intrinsics/probes/lane_id.ll index f262b855ec..5d087b65c8 100644 --- a/cuda-oxide/intrinsics/probes/lane_id.ll +++ b/cuda-oxide/intrinsics/probes/lane_id.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/lanemask_eq.ll b/cuda-oxide/intrinsics/probes/lanemask_eq.ll index ab8d421f63..a54646f9ff 100644 --- a/cuda-oxide/intrinsics/probes/lanemask_eq.ll +++ b/cuda-oxide/intrinsics/probes/lanemask_eq.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/lanemask_ge.ll b/cuda-oxide/intrinsics/probes/lanemask_ge.ll index 16f9f64063..85c562bb5b 100644 --- a/cuda-oxide/intrinsics/probes/lanemask_ge.ll +++ b/cuda-oxide/intrinsics/probes/lanemask_ge.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/lanemask_gt.ll b/cuda-oxide/intrinsics/probes/lanemask_gt.ll index 4510bd51b6..f79f55a601 100644 --- a/cuda-oxide/intrinsics/probes/lanemask_gt.ll +++ b/cuda-oxide/intrinsics/probes/lanemask_gt.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/lanemask_le.ll b/cuda-oxide/intrinsics/probes/lanemask_le.ll index dd8a097727..692e894ef9 100644 --- a/cuda-oxide/intrinsics/probes/lanemask_le.ll +++ b/cuda-oxide/intrinsics/probes/lanemask_le.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/lanemask_lt.ll b/cuda-oxide/intrinsics/probes/lanemask_lt.ll index 23f1abebb9..60435bbcf1 100644 --- a/cuda-oxide/intrinsics/probes/lanemask_lt.ll +++ b/cuda-oxide/intrinsics/probes/lanemask_lt.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x1_trans_b8.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x1_trans_b8.ll index 6afa88042e..dc86ad515f 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x1_trans_b8.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x1_trans_b8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x1_trans_b8x16_b4x16_p64.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x1_trans_b8x16_b4x16_p64.ll index 35c95c479b..32ca4ba789 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x1_trans_b8x16_b4x16_p64.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x1_trans_b8x16_b4x16_p64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x1_trans_b8x16_b6x16_p32.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x1_trans_b8x16_b6x16_p32.ll index 577b74a2f7..dab2797a41 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x1_trans_b8x16_b6x16_p32.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x1_trans_b8x16_b6x16_p32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x2_trans_b8.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x2_trans_b8.ll index 16c8a4df96..2184807ea8 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x2_trans_b8.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x2_trans_b8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x2_trans_b8x16_b4x16_p64.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x2_trans_b8x16_b4x16_p64.ll index 949c145722..718e7bcfed 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x2_trans_b8x16_b4x16_p64.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x2_trans_b8x16_b4x16_p64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x2_trans_b8x16_b6x16_p32.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x2_trans_b8x16_b6x16_p32.ll index c7c01d6c7d..60a1520894 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x2_trans_b8x16_b6x16_p32.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m16n16_x2_trans_b8x16_b6x16_p32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x1_b8x16_b4x16_p64.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x1_b8x16_b4x16_p64.ll index b8492d4101..203b2df95f 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x1_b8x16_b4x16_p64.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x1_b8x16_b4x16_p64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x1_b8x16_b6x16_p32.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x1_b8x16_b6x16_p32.ll index 449199e117..c25dee4529 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x1_b8x16_b6x16_p32.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x1_b8x16_b6x16_p32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x2_b8x16_b4x16_p64.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x2_b8x16_b4x16_p64.ll index d28da6f674..b52a45a364 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x2_b8x16_b4x16_p64.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x2_b8x16_b4x16_p64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x2_b8x16_b6x16_p32.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x2_b8x16_b6x16_p32.ll index 11a518df40..4bb7fdd1aa 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x2_b8x16_b6x16_p32.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x2_b8x16_b6x16_p32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x4_b8x16_b4x16_p64.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x4_b8x16_b4x16_p64.ll index b55959d0cc..9373aadd44 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x4_b8x16_b4x16_p64.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x4_b8x16_b4x16_p64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x4_b8x16_b6x16_p32.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x4_b8x16_b6x16_p32.ll index 9752e61aba..b80d7b9e27 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x4_b8x16_b6x16_p32.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m8n16_x4_b8x16_b6x16_p32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x1_b16.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x1_b16.ll index 200bb631a4..61edccaf98 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x1_b16.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x1_b16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x1_trans_b16.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x1_trans_b16.ll index 5ddd2c76da..709b6f740a 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x1_trans_b16.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x1_trans_b16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x2_b16.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x2_b16.ll index 59343c6a3c..482a807f52 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x2_b16.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x2_b16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x2_trans_b16.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x2_trans_b16.ll index 49d293cb27..9de328223a 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x2_trans_b16.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x2_trans_b16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x4_b16.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x4_b16.ll index f848c66cc1..ebebe23608 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x4_b16.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x4_b16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x4_trans_b16.ll b/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x4_trans_b16.ll index 2d01ccc733..e3f2d70a87 100644 --- a/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x4_trans_b16.ll +++ b/cuda-oxide/intrinsics/probes/ldmatrix_m8n8_x4_trans_b16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/lg2_approx_f32.ll b/cuda-oxide/intrinsics/probes/lg2_approx_f32.ll index 8d8f59bc4a..fe7abbc0be 100644 --- a/cuda-oxide/intrinsics/probes/lg2_approx_f32.ll +++ b/cuda-oxide/intrinsics/probes/lg2_approx_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/lg2_approx_ftz_f32.ll b/cuda-oxide/intrinsics/probes/lg2_approx_ftz_f32.ll index dafd4c5f71..e01b4e6c8d 100644 --- a/cuda-oxide/intrinsics/probes/lg2_approx_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/lg2_approx_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/map_shared_rank.ll b/cuda-oxide/intrinsics/probes/map_shared_rank.ll index ae18fd7e58..2c6041d76b 100644 --- a/cuda-oxide/intrinsics/probes/map_shared_rank.ll +++ b/cuda-oxide/intrinsics/probes/map_shared_rank.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/match_all_i64_sync.ll b/cuda-oxide/intrinsics/probes/match_all_i64_sync.ll index 3e4d169fe0..753b04fd4e 100644 --- a/cuda-oxide/intrinsics/probes/match_all_i64_sync.ll +++ b/cuda-oxide/intrinsics/probes/match_all_i64_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/match_all_sync.ll b/cuda-oxide/intrinsics/probes/match_all_sync.ll index 55c383866f..bdc07440be 100644 --- a/cuda-oxide/intrinsics/probes/match_all_sync.ll +++ b/cuda-oxide/intrinsics/probes/match_all_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/match_any_i64_sync.ll b/cuda-oxide/intrinsics/probes/match_any_i64_sync.ll index 1091c835a3..a76e50f156 100644 --- a/cuda-oxide/intrinsics/probes/match_any_i64_sync.ll +++ b/cuda-oxide/intrinsics/probes/match_any_i64_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/match_any_sync.ll b/cuda-oxide/intrinsics/probes/match_any_sync.ll index 69f7ad73e6..3fa2d7bc89 100644 --- a/cuda-oxide/intrinsics/probes/match_any_sync.ll +++ b/cuda-oxide/intrinsics/probes/match_any_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_bf16.ll b/cuda-oxide/intrinsics/probes/max_bf16.ll index 847af2f391..2fa084ea66 100644 --- a/cuda-oxide/intrinsics/probes/max_bf16.ll +++ b/cuda-oxide/intrinsics/probes/max_bf16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_bf16x2.ll b/cuda-oxide/intrinsics/probes/max_bf16x2.ll index d36197271d..417b16cebf 100644 --- a/cuda-oxide/intrinsics/probes/max_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_f16.ll b/cuda-oxide/intrinsics/probes/max_f16.ll index 95db2c0124..0b4a63531e 100644 --- a/cuda-oxide/intrinsics/probes/max_f16.ll +++ b/cuda-oxide/intrinsics/probes/max_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_f16x2.ll b/cuda-oxide/intrinsics/probes/max_f16x2.ll index 83b0b07d7d..168fe4e908 100644 --- a/cuda-oxide/intrinsics/probes/max_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_ftz_f16.ll b/cuda-oxide/intrinsics/probes/max_ftz_f16.ll index d252b3a229..98ce03b587 100644 --- a/cuda-oxide/intrinsics/probes/max_ftz_f16.ll +++ b/cuda-oxide/intrinsics/probes/max_ftz_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_ftz_f16x2.ll b/cuda-oxide/intrinsics/probes/max_ftz_f16x2.ll index 8487010340..525797beb5 100644 --- a/cuda-oxide/intrinsics/probes/max_ftz_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_ftz_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_ftz_nan_f16.ll b/cuda-oxide/intrinsics/probes/max_ftz_nan_f16.ll index 14b36fb927..a15f6ae6a3 100644 --- a/cuda-oxide/intrinsics/probes/max_ftz_nan_f16.ll +++ b/cuda-oxide/intrinsics/probes/max_ftz_nan_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_ftz_nan_f16x2.ll b/cuda-oxide/intrinsics/probes/max_ftz_nan_f16x2.ll index b8b6afa1cb..29efa5d47b 100644 --- a/cuda-oxide/intrinsics/probes/max_ftz_nan_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_ftz_nan_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_ftz_nan_xorsign_abs_f16.ll b/cuda-oxide/intrinsics/probes/max_ftz_nan_xorsign_abs_f16.ll index 3feec022f3..a6480b9ef3 100644 --- a/cuda-oxide/intrinsics/probes/max_ftz_nan_xorsign_abs_f16.ll +++ b/cuda-oxide/intrinsics/probes/max_ftz_nan_xorsign_abs_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_ftz_nan_xorsign_abs_f16x2.ll b/cuda-oxide/intrinsics/probes/max_ftz_nan_xorsign_abs_f16x2.ll index 8b8d348a62..91c324ba63 100644 --- a/cuda-oxide/intrinsics/probes/max_ftz_nan_xorsign_abs_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_ftz_nan_xorsign_abs_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_ftz_nan_xorsign_abs_f32.ll b/cuda-oxide/intrinsics/probes/max_ftz_nan_xorsign_abs_f32.ll index 199c0b3d62..aa066b6370 100644 --- a/cuda-oxide/intrinsics/probes/max_ftz_nan_xorsign_abs_f32.ll +++ b/cuda-oxide/intrinsics/probes/max_ftz_nan_xorsign_abs_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_ftz_xorsign_abs_f16.ll b/cuda-oxide/intrinsics/probes/max_ftz_xorsign_abs_f16.ll index 6c06597baa..f72ef3cc51 100644 --- a/cuda-oxide/intrinsics/probes/max_ftz_xorsign_abs_f16.ll +++ b/cuda-oxide/intrinsics/probes/max_ftz_xorsign_abs_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_ftz_xorsign_abs_f16x2.ll b/cuda-oxide/intrinsics/probes/max_ftz_xorsign_abs_f16x2.ll index 575da5f593..c208074824 100644 --- a/cuda-oxide/intrinsics/probes/max_ftz_xorsign_abs_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_ftz_xorsign_abs_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_ftz_xorsign_abs_f32.ll b/cuda-oxide/intrinsics/probes/max_ftz_xorsign_abs_f32.ll index c92c1d6bed..1fad54f414 100644 --- a/cuda-oxide/intrinsics/probes/max_ftz_xorsign_abs_f32.ll +++ b/cuda-oxide/intrinsics/probes/max_ftz_xorsign_abs_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_nan_bf16.ll b/cuda-oxide/intrinsics/probes/max_nan_bf16.ll index b9b6e20c24..696873e21e 100644 --- a/cuda-oxide/intrinsics/probes/max_nan_bf16.ll +++ b/cuda-oxide/intrinsics/probes/max_nan_bf16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_nan_bf16x2.ll b/cuda-oxide/intrinsics/probes/max_nan_bf16x2.ll index abdf91365f..92d377ef3f 100644 --- a/cuda-oxide/intrinsics/probes/max_nan_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_nan_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_nan_f16.ll b/cuda-oxide/intrinsics/probes/max_nan_f16.ll index 98baba38da..02e68f2330 100644 --- a/cuda-oxide/intrinsics/probes/max_nan_f16.ll +++ b/cuda-oxide/intrinsics/probes/max_nan_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_nan_f16x2.ll b/cuda-oxide/intrinsics/probes/max_nan_f16x2.ll index 44d1283852..87ffa156df 100644 --- a/cuda-oxide/intrinsics/probes/max_nan_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_nan_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_bf16.ll b/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_bf16.ll index 551e91a6e8..11277c677b 100644 --- a/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_bf16.ll +++ b/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_bf16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_bf16x2.ll b/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_bf16x2.ll index 56c2a5ef81..ce7d4ac47e 100644 --- a/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_f16.ll b/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_f16.ll index a0128623fc..8c9a356a94 100644 --- a/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_f16.ll +++ b/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_f16x2.ll b/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_f16x2.ll index 65d9e0a2f1..a8a67218ec 100644 --- a/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_f32.ll b/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_f32.ll index 3e709f4028..b71a4b4389 100644 --- a/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_f32.ll +++ b/cuda-oxide/intrinsics/probes/max_nan_xorsign_abs_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_relu_s16x2.ll b/cuda-oxide/intrinsics/probes/max_relu_s16x2.ll index 40e7ea2718..7fa783d1d4 100644 --- a/cuda-oxide/intrinsics/probes/max_relu_s16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_relu_s16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_relu_s32.ll b/cuda-oxide/intrinsics/probes/max_relu_s32.ll index 5ba3b22fd6..b3bde53d2d 100644 --- a/cuda-oxide/intrinsics/probes/max_relu_s32.ll +++ b/cuda-oxide/intrinsics/probes/max_relu_s32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_s16x2.ll b/cuda-oxide/intrinsics/probes/max_s16x2.ll index a57b59b1f8..bd8dd97de4 100644 --- a/cuda-oxide/intrinsics/probes/max_s16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_s16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_u16x2.ll b/cuda-oxide/intrinsics/probes/max_u16x2.ll index f3b203a724..a018987e89 100644 --- a/cuda-oxide/intrinsics/probes/max_u16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_u16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_xorsign_abs_bf16.ll b/cuda-oxide/intrinsics/probes/max_xorsign_abs_bf16.ll index 8adbfdcb35..4f4cd3edc4 100644 --- a/cuda-oxide/intrinsics/probes/max_xorsign_abs_bf16.ll +++ b/cuda-oxide/intrinsics/probes/max_xorsign_abs_bf16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_xorsign_abs_bf16x2.ll b/cuda-oxide/intrinsics/probes/max_xorsign_abs_bf16x2.ll index 80bbd397b9..2577248c4e 100644 --- a/cuda-oxide/intrinsics/probes/max_xorsign_abs_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_xorsign_abs_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_xorsign_abs_f16.ll b/cuda-oxide/intrinsics/probes/max_xorsign_abs_f16.ll index a7a87bf464..b26a02e376 100644 --- a/cuda-oxide/intrinsics/probes/max_xorsign_abs_f16.ll +++ b/cuda-oxide/intrinsics/probes/max_xorsign_abs_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_xorsign_abs_f16x2.ll b/cuda-oxide/intrinsics/probes/max_xorsign_abs_f16x2.ll index 8b2a3d4673..1a50eb504d 100644 --- a/cuda-oxide/intrinsics/probes/max_xorsign_abs_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/max_xorsign_abs_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/max_xorsign_abs_f32.ll b/cuda-oxide/intrinsics/probes/max_xorsign_abs_f32.ll index 73407207cb..2c70114bcf 100644 --- a/cuda-oxide/intrinsics/probes/max_xorsign_abs_f32.ll +++ b/cuda-oxide/intrinsics/probes/max_xorsign_abs_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mbarrier_arrive.ll b/cuda-oxide/intrinsics/probes/mbarrier_arrive.ll index 9f6362b70e..c11d698f6e 100644 --- a/cuda-oxide/intrinsics/probes/mbarrier_arrive.ll +++ b/cuda-oxide/intrinsics/probes/mbarrier_arrive.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mbarrier_arrive_cluster.ll b/cuda-oxide/intrinsics/probes/mbarrier_arrive_cluster.ll index a4b0a9bee1..cbef0bd6fa 100644 --- a/cuda-oxide/intrinsics/probes/mbarrier_arrive_cluster.ll +++ b/cuda-oxide/intrinsics/probes/mbarrier_arrive_cluster.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mbarrier_arrive_cluster_relaxed.ll b/cuda-oxide/intrinsics/probes/mbarrier_arrive_cluster_relaxed.ll index adfb5c62d7..eb46b824d6 100644 --- a/cuda-oxide/intrinsics/probes/mbarrier_arrive_cluster_relaxed.ll +++ b/cuda-oxide/intrinsics/probes/mbarrier_arrive_cluster_relaxed.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mbarrier_arrive_expect_tx.ll b/cuda-oxide/intrinsics/probes/mbarrier_arrive_expect_tx.ll index 2a780ab093..c902b59f79 100644 --- a/cuda-oxide/intrinsics/probes/mbarrier_arrive_expect_tx.ll +++ b/cuda-oxide/intrinsics/probes/mbarrier_arrive_expect_tx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mbarrier_arrive_expect_tx_cluster.ll b/cuda-oxide/intrinsics/probes/mbarrier_arrive_expect_tx_cluster.ll index 2dc60e1d4f..15345b8bce 100644 --- a/cuda-oxide/intrinsics/probes/mbarrier_arrive_expect_tx_cluster.ll +++ b/cuda-oxide/intrinsics/probes/mbarrier_arrive_expect_tx_cluster.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mbarrier_arrive_no_complete.ll b/cuda-oxide/intrinsics/probes/mbarrier_arrive_no_complete.ll index a868b3a7c7..4a7fccd857 100644 --- a/cuda-oxide/intrinsics/probes/mbarrier_arrive_no_complete.ll +++ b/cuda-oxide/intrinsics/probes/mbarrier_arrive_no_complete.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mbarrier_init.ll b/cuda-oxide/intrinsics/probes/mbarrier_init.ll index 1d33f1dcd4..85de4c5ac2 100644 --- a/cuda-oxide/intrinsics/probes/mbarrier_init.ll +++ b/cuda-oxide/intrinsics/probes/mbarrier_init.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mbarrier_inval.ll b/cuda-oxide/intrinsics/probes/mbarrier_inval.ll index 021af598d6..8f86dcc2a3 100644 --- a/cuda-oxide/intrinsics/probes/mbarrier_inval.ll +++ b/cuda-oxide/intrinsics/probes/mbarrier_inval.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mbarrier_test_wait.ll b/cuda-oxide/intrinsics/probes/mbarrier_test_wait.ll index 843e9e14de..8eb69349cf 100644 --- a/cuda-oxide/intrinsics/probes/mbarrier_test_wait.ll +++ b/cuda-oxide/intrinsics/probes/mbarrier_test_wait.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mbarrier_try_wait.ll b/cuda-oxide/intrinsics/probes/mbarrier_try_wait.ll index 1e705c0486..dc56784f53 100644 --- a/cuda-oxide/intrinsics/probes/mbarrier_try_wait.ll +++ b/cuda-oxide/intrinsics/probes/mbarrier_try_wait.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mbarrier_try_wait_parity.ll b/cuda-oxide/intrinsics/probes/mbarrier_try_wait_parity.ll index b62f2522bb..a9fb9153a0 100644 --- a/cuda-oxide/intrinsics/probes/mbarrier_try_wait_parity.ll +++ b/cuda-oxide/intrinsics/probes/mbarrier_try_wait_parity.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mbarrier_try_wait_parity_cluster.ll b/cuda-oxide/intrinsics/probes/mbarrier_try_wait_parity_cluster.ll index bf6f9221d9..651a2ef729 100644 --- a/cuda-oxide/intrinsics/probes/mbarrier_try_wait_parity_cluster.ll +++ b/cuda-oxide/intrinsics/probes/mbarrier_try_wait_parity_cluster.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mbarrier_try_wait_parity_cluster_relaxed.ll b/cuda-oxide/intrinsics/probes/mbarrier_try_wait_parity_cluster_relaxed.ll index 3a9eaea78e..53d367999a 100644 --- a/cuda-oxide/intrinsics/probes/mbarrier_try_wait_parity_cluster_relaxed.ll +++ b/cuda-oxide/intrinsics/probes/mbarrier_try_wait_parity_cluster_relaxed.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_bf16.ll b/cuda-oxide/intrinsics/probes/min_bf16.ll index b199e3d152..86b9d670f3 100644 --- a/cuda-oxide/intrinsics/probes/min_bf16.ll +++ b/cuda-oxide/intrinsics/probes/min_bf16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_bf16x2.ll b/cuda-oxide/intrinsics/probes/min_bf16x2.ll index 703afcb371..0fda38e737 100644 --- a/cuda-oxide/intrinsics/probes/min_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_f16.ll b/cuda-oxide/intrinsics/probes/min_f16.ll index ad8ca175c5..aa54ef333d 100644 --- a/cuda-oxide/intrinsics/probes/min_f16.ll +++ b/cuda-oxide/intrinsics/probes/min_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_f16x2.ll b/cuda-oxide/intrinsics/probes/min_f16x2.ll index 38bf49d950..193c20471f 100644 --- a/cuda-oxide/intrinsics/probes/min_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_ftz_f16.ll b/cuda-oxide/intrinsics/probes/min_ftz_f16.ll index 04ee601860..6772f11fc0 100644 --- a/cuda-oxide/intrinsics/probes/min_ftz_f16.ll +++ b/cuda-oxide/intrinsics/probes/min_ftz_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_ftz_f16x2.ll b/cuda-oxide/intrinsics/probes/min_ftz_f16x2.ll index 41a4ea1586..959a899dbe 100644 --- a/cuda-oxide/intrinsics/probes/min_ftz_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_ftz_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_ftz_nan_f16.ll b/cuda-oxide/intrinsics/probes/min_ftz_nan_f16.ll index f0d605fae8..9d9990d5a3 100644 --- a/cuda-oxide/intrinsics/probes/min_ftz_nan_f16.ll +++ b/cuda-oxide/intrinsics/probes/min_ftz_nan_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_ftz_nan_f16x2.ll b/cuda-oxide/intrinsics/probes/min_ftz_nan_f16x2.ll index f127d3c881..e4a1252ac5 100644 --- a/cuda-oxide/intrinsics/probes/min_ftz_nan_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_ftz_nan_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_ftz_nan_xorsign_abs_f16.ll b/cuda-oxide/intrinsics/probes/min_ftz_nan_xorsign_abs_f16.ll index 7f672a7b41..c2a7d884c1 100644 --- a/cuda-oxide/intrinsics/probes/min_ftz_nan_xorsign_abs_f16.ll +++ b/cuda-oxide/intrinsics/probes/min_ftz_nan_xorsign_abs_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_ftz_nan_xorsign_abs_f16x2.ll b/cuda-oxide/intrinsics/probes/min_ftz_nan_xorsign_abs_f16x2.ll index fe83ac48ce..12eb011dae 100644 --- a/cuda-oxide/intrinsics/probes/min_ftz_nan_xorsign_abs_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_ftz_nan_xorsign_abs_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_ftz_nan_xorsign_abs_f32.ll b/cuda-oxide/intrinsics/probes/min_ftz_nan_xorsign_abs_f32.ll index 2822667ba2..1b8d2c9814 100644 --- a/cuda-oxide/intrinsics/probes/min_ftz_nan_xorsign_abs_f32.ll +++ b/cuda-oxide/intrinsics/probes/min_ftz_nan_xorsign_abs_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_ftz_xorsign_abs_f16.ll b/cuda-oxide/intrinsics/probes/min_ftz_xorsign_abs_f16.ll index 866f9e64ef..672a5a3ff3 100644 --- a/cuda-oxide/intrinsics/probes/min_ftz_xorsign_abs_f16.ll +++ b/cuda-oxide/intrinsics/probes/min_ftz_xorsign_abs_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_ftz_xorsign_abs_f16x2.ll b/cuda-oxide/intrinsics/probes/min_ftz_xorsign_abs_f16x2.ll index 528160a8d1..7c2142b57d 100644 --- a/cuda-oxide/intrinsics/probes/min_ftz_xorsign_abs_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_ftz_xorsign_abs_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_ftz_xorsign_abs_f32.ll b/cuda-oxide/intrinsics/probes/min_ftz_xorsign_abs_f32.ll index 11609c3d7e..4cfd5c251a 100644 --- a/cuda-oxide/intrinsics/probes/min_ftz_xorsign_abs_f32.ll +++ b/cuda-oxide/intrinsics/probes/min_ftz_xorsign_abs_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_nan_bf16.ll b/cuda-oxide/intrinsics/probes/min_nan_bf16.ll index af8b43de51..e191e1c181 100644 --- a/cuda-oxide/intrinsics/probes/min_nan_bf16.ll +++ b/cuda-oxide/intrinsics/probes/min_nan_bf16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_nan_bf16x2.ll b/cuda-oxide/intrinsics/probes/min_nan_bf16x2.ll index 7dcf3a1ef9..370e96fe9e 100644 --- a/cuda-oxide/intrinsics/probes/min_nan_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_nan_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_nan_f16.ll b/cuda-oxide/intrinsics/probes/min_nan_f16.ll index e8bb317e86..16d9bf7bdb 100644 --- a/cuda-oxide/intrinsics/probes/min_nan_f16.ll +++ b/cuda-oxide/intrinsics/probes/min_nan_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_nan_f16x2.ll b/cuda-oxide/intrinsics/probes/min_nan_f16x2.ll index dcd8cd7268..fe0038153e 100644 --- a/cuda-oxide/intrinsics/probes/min_nan_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_nan_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_bf16.ll b/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_bf16.ll index fcfd3d9be6..bf15fff3c2 100644 --- a/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_bf16.ll +++ b/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_bf16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_bf16x2.ll b/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_bf16x2.ll index da376d93b1..ad43654246 100644 --- a/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_f16.ll b/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_f16.ll index 10e7bc1e7e..21842876b7 100644 --- a/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_f16.ll +++ b/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_f16x2.ll b/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_f16x2.ll index 2be39078c0..abc77b1eab 100644 --- a/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_f32.ll b/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_f32.ll index c213c5dad6..83d38d7e77 100644 --- a/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_f32.ll +++ b/cuda-oxide/intrinsics/probes/min_nan_xorsign_abs_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_relu_s16x2.ll b/cuda-oxide/intrinsics/probes/min_relu_s16x2.ll index a5710ae817..3445aa0028 100644 --- a/cuda-oxide/intrinsics/probes/min_relu_s16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_relu_s16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_relu_s32.ll b/cuda-oxide/intrinsics/probes/min_relu_s32.ll index 776bebe468..2ed1cde6e7 100644 --- a/cuda-oxide/intrinsics/probes/min_relu_s32.ll +++ b/cuda-oxide/intrinsics/probes/min_relu_s32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_s16x2.ll b/cuda-oxide/intrinsics/probes/min_s16x2.ll index 7ed84b1750..90e9364f9a 100644 --- a/cuda-oxide/intrinsics/probes/min_s16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_s16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_u16x2.ll b/cuda-oxide/intrinsics/probes/min_u16x2.ll index f9074152dc..1fbf471ac0 100644 --- a/cuda-oxide/intrinsics/probes/min_u16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_u16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_xorsign_abs_bf16.ll b/cuda-oxide/intrinsics/probes/min_xorsign_abs_bf16.ll index 8e5a490815..2527bccfec 100644 --- a/cuda-oxide/intrinsics/probes/min_xorsign_abs_bf16.ll +++ b/cuda-oxide/intrinsics/probes/min_xorsign_abs_bf16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_xorsign_abs_bf16x2.ll b/cuda-oxide/intrinsics/probes/min_xorsign_abs_bf16x2.ll index 2738237572..c328ff7a3e 100644 --- a/cuda-oxide/intrinsics/probes/min_xorsign_abs_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_xorsign_abs_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_xorsign_abs_f16.ll b/cuda-oxide/intrinsics/probes/min_xorsign_abs_f16.ll index fb6bb071f2..930d9cdad6 100644 --- a/cuda-oxide/intrinsics/probes/min_xorsign_abs_f16.ll +++ b/cuda-oxide/intrinsics/probes/min_xorsign_abs_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_xorsign_abs_f16x2.ll b/cuda-oxide/intrinsics/probes/min_xorsign_abs_f16x2.ll index 8aeeee0330..acccf65683 100644 --- a/cuda-oxide/intrinsics/probes/min_xorsign_abs_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/min_xorsign_abs_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/min_xorsign_abs_f32.ll b/cuda-oxide/intrinsics/probes/min_xorsign_abs_f32.ll index 9a30a23745..408f683a07 100644 --- a/cuda-oxide/intrinsics/probes/min_xorsign_abs_f32.ll +++ b/cuda-oxide/intrinsics/probes/min_xorsign_abs_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k128_s32_b1_and_popc.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k128_s32_b1_and_popc.ll index 4e50c8d716..16f1f27476 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k128_s32_b1_and_popc.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k128_s32_b1_and_popc.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k128_s32_b1_xor_popc.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k128_s32_b1_xor_popc.ll index 16ebc26da9..0f6b977f2f 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k128_s32_b1_xor_popc.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k128_s32_b1_xor_popc.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_f16_f16.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_f16_f16.ll index f87b2d7b5d..dcd5766531 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_f16_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_f16_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_f32_bf16.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_f32_bf16.ll index e59b26b32c..98e6859c56 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_f32_bf16.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_f32_bf16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_f32_f16.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_f32_f16.ll index 48be151905..7a85ae11e8 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_f32_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_f32_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e4m3_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e4m3_e4m3.ll index 6da1ea1957..871a422208 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e4m3_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e4m3_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e4m3_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e4m3_e5m2.ll index 8009093f0e..88ac8e56e7 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e4m3_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e4m3_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e5m2_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e5m2_e4m3.ll index 0c43328c4a..684dbc5563 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e5m2_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e5m2_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e5m2_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e5m2_e5m2.ll index 11e8c769cb..03d6d99462 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e5m2_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f16_e5m2_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e4m3_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e4m3_e4m3.ll index 752540a13e..d1be4d594a 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e4m3_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e4m3_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e4m3_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e4m3_e5m2.ll index 14c50670b2..fb602670cb 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e4m3_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e4m3_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e5m2_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e5m2_e4m3.ll index 5d014c886c..2928ae8ceb 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e5m2_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e5m2_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e5m2_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e5m2_e5m2.ll index 28dd4b075c..415df4f2d0 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e5m2_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_fp8_f32_e5m2_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8.ll index b99927e3c9..84421d517f 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8_satfinite.ll index 72edf18b10..aa00f7e2df 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8_u8.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8_u8.ll index 1f11b25b60..286d7a6a8c 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8_u8_satfinite.ll index 5bcaa8e0e7..a8d8e5f6c5 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_s8_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8.ll index ef45e82abc..7c204fe83e 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8_s8.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8_s8.ll index 998d3641ef..1b9190daec 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8_s8_satfinite.ll index 7613ef60ab..5476e8b5c4 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8_satfinite.ll index b6c5c3b948..bfb74256be 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k16_s32_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k256_s32_b1_and_popc.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k256_s32_b1_and_popc.ll index a87a915dd6..ad09c40167 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k256_s32_b1_and_popc.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k256_s32_b1_and_popc.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k256_s32_b1_xor_popc.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k256_s32_b1_xor_popc.ll index 804e5161d3..3f2ab5e83f 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k256_s32_b1_xor_popc.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k256_s32_b1_xor_popc.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e2m1.ll index 4d3fd5199f..d47b6cc39f 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e2m3.ll index 11d4e30404..0523ce7afc 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e3m2.ll index c62add123b..7d15bdf63a 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e4m3.ll index 390fe7a340..e1ee7fd239 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e5m2.ll index ec1044f34c..dba3f9c3c8 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m1_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e2m1.ll index 0a04b328d9..5ccd197e29 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e2m3.ll index 7c8959a6c5..a0458ae19c 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e3m2.ll index 906b9520f4..177e083866 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e4m3.ll index 276eef85e5..0d01339634 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e5m2.ll index 8cda757780..50fa71827e 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e2m3_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e2m1.ll index e3792de88b..39e377d2c3 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e2m3.ll index 267628f816..30f78eb622 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e3m2.ll index 060930013b..5eba33630d 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e4m3.ll index 03bd712c1f..be18e028d3 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e5m2.ll index 6823c68679..da97b4b173 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e3m2_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e2m1.ll index 1cab073457..7d7eb1a2b4 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e2m3.ll index b2c16dfa16..66227f7d6c 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e3m2.ll index 243ebdaf86..715a6856ac 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e4m3.ll index 0464bc7064..5fc906f336 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e5m2.ll index dae30fef5c..f4bb01a704 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e4m3_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e2m1.ll index 00ccee2ddc..b9b53df77d 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e2m3.ll index 228ff46f26..d4fad57982 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e3m2.ll index 53b7c4ba1a..261b1b3638 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e4m3.ll index cc8bec8b9c..edfaca9b11 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e5m2.ll index 4b028c6931..a93b18cb67 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f16_e5m2_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e2m1.ll index 3cc470c02a..bab05796b8 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e2m3.ll index 7c950e9b08..4b349ebb48 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e3m2.ll index 527159e360..0f6b841091 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e4m3.ll index 56c171bd1b..179eada349 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e5m2.ll index c6db40e31a..0a8e635003 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m1_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e2m1.ll index e765dcf20b..91f121c947 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e2m3.ll index 7febb6635d..9c60c20f26 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e3m2.ll index e48d26f880..838686061c 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e4m3.ll index d9dc351996..f1b8744b62 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e5m2.ll index d3a3849a92..aa918608a4 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e2m3_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e2m1.ll index c5f2cf9c47..d02037ddcd 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e2m3.ll index a5fad4cc5e..7b40102396 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e3m2.ll index 25d5d2bf1f..7e245c3661 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e4m3.ll index b9a8b7ab4c..34587bed0d 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e5m2.ll index 3e452449ce..cd5fdae5a3 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e3m2_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e2m1.ll index ef2d10efab..f544764e46 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e2m3.ll index 58ef695583..f009c168dd 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e3m2.ll index 8fdb75d1f6..35550c74ee 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e4m3.ll index 3da2b5d417..fa719ed44c 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e5m2.ll index 7dcf58bdf6..19f2c664bf 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e4m3_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e2m1.ll index 246de58d53..20ec119d12 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e2m3.ll index 05f6716ac3..18cba74018 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e3m2.ll index 0749f3ca1b..94969ecb9a 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e4m3.ll index df8c56472a..7b0fad2000 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e5m2.ll index 2e04bb2968..fd4cb6c328 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_f32_e5m2_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e4m3_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e4m3_e4m3.ll index 7f1b14b10d..83fc116f29 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e4m3_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e4m3_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e4m3_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e4m3_e5m2.ll index 2efc4d5ad0..6c30cf45a9 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e4m3_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e4m3_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e5m2_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e5m2_e4m3.ll index d578682e44..a87a6e03a0 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e5m2_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e5m2_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e5m2_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e5m2_e5m2.ll index 88a1a452b7..70c4520570 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e5m2_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f16_e5m2_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e4m3_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e4m3_e4m3.ll index f981745e34..f17c521fde 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e4m3_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e4m3_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e4m3_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e4m3_e5m2.ll index f82de7dd00..383af71843 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e4m3_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e4m3_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e5m2_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e5m2_e4m3.ll index 27b3bb8a90..89ecdb3b85 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e5m2_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e5m2_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e5m2_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e5m2_e5m2.ll index ee41a248d2..63be857541 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e5m2_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_fp8_f32_e5m2_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e2m1.ll index cb29027b56..dd581c7564 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e2m3.ll index 1c1130b60d..3eb11eb3d6 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e3m2.ll index 6cfd7835a8..c1acceb6d7 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e4m3.ll index 7a47b56ee7..035ebcffe0 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e5m2.ll index 41b238162a..615a52a2ad 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m1_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e2m1.ll index 9921648e21..7cf803c5e0 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e2m3.ll index 532affc17e..59575bc594 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e3m2.ll index 485b567b04..03e99e3f82 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e4m3.ll index fe2ef0cac0..503625d561 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e5m2.ll index 89d6f2851d..3cac1c15da 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e2m3_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e2m1.ll index 281ea4d999..c4633cf705 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e2m3.ll index db88d70807..ec7578598f 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e3m2.ll index fc797f36ec..12ae04cb66 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e4m3.ll index 031446e73a..3db2d9d5a2 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e5m2.ll index ba0f0f0f26..98489d13e3 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e3m2_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e2m1.ll index 3ede0be696..20bb75a773 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e2m3.ll index 9780f4116c..9db47a5598 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e3m2.ll index 705c32c33d..3d3ade0a9e 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e4m3.ll index e5708f99f6..d02606007f 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e5m2.ll index fb3d33693d..5f2b466ab0 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e4m3_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e2m1.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e2m1.ll index 85a50addfc..5a626d8b6d 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e2m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e2m3.ll index e6e8c9ccdd..c2e590187a 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e3m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e3m2.ll index 820befea77..754ae220fe 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e4m3.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e4m3.ll index a417b0d694..a38bced0a4 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e5m2.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e5m2.ll index 95b9a92143..0bc985c62b 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_mxf8f6f4_f32_e5m2_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4.ll index dd11877d39..7cb8d8d1ee 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4_satfinite.ll index 1a1599a3a1..cecb9ac70a 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4_u4.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4_u4.ll index f391ea266f..124a6d284c 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4_u4_satfinite.ll index 02abd4f2e7..8b0bc3273b 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s4_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8.ll index b793f5f171..54cc96cfe7 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8_satfinite.ll index 6b3b468a6d..c6f141221b 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8_u8.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8_u8.ll index 3cc2500e29..4a65bf5610 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8_u8_satfinite.ll index e508c656db..04f18d21e6 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_s8_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4.ll index 6cdb21daf0..a1879783ba 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4_s4.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4_s4.ll index 30e0a69413..d673725ede 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4_s4_satfinite.ll index 4d77fe0008..ec60841605 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4_satfinite.ll index 77798f2e0c..7ed4a75f35 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8.ll index 63b55521ae..ceaf352e44 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8_s8.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8_s8.ll index 3827d4299b..2d67de2eee 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8_s8_satfinite.ll index 2697f580d0..db60aca1d0 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8_satfinite.ll index 1f0dbdad91..19a9d2725a 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k32_s32_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k4_f32_tf32.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k4_f32_tf32.ll index fab130ae61..7c0034b549 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k4_f32_tf32.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k4_f32_tf32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k64_mxf4_f32.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k64_mxf4_f32.ll index 69046327c0..73f8ceece6 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k64_mxf4_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k64_mxf4_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4.ll index b1c904d4f9..06e979a999 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4_satfinite.ll index 317e32ce79..fc933683ba 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4_u4.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4_u4.ll index ce19a9fe82..d274030f5f 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4_u4_satfinite.ll index 40b1354955..30243d71eb 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_s4_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4.ll index 5403333785..bc9347d666 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4_s4.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4_s4.ll index 45a193936d..b17ee4cfb2 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4_s4_satfinite.ll index 74c71fd1c5..c495e4bd20 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4_satfinite.ll index c5e3d3fb7e..83c74f52ca 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k64_s32_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k8_f16_f16.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k8_f16_f16.ll index 0e3e35a20b..fa8cb123cc 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k8_f16_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k8_f16_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k8_f32_bf16.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k8_f32_bf16.ll index 1cbac0e37e..cfde7ec122 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k8_f32_bf16.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k8_f32_bf16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k8_f32_f16.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k8_f32_f16.ll index ec95633511..edf7d2b5cb 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k8_f32_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k8_f32_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m16n8k8_f32_tf32.ll b/cuda-oxide/intrinsics/probes/mma_m16n8k8_f32_tf32.ll index 4a8db0701e..681e34cd3a 100644 --- a/cuda-oxide/intrinsics/probes/mma_m16n8k8_f32_tf32.ll +++ b/cuda-oxide/intrinsics/probes/mma_m16n8k8_f32_tf32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k128_s32_b1_and_popc.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k128_s32_b1_and_popc.ll index 7a38b9220a..65de3a192e 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k128_s32_b1_and_popc.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k128_s32_b1_and_popc.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k128_s32_b1_xor_popc.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k128_s32_b1_xor_popc.ll index 0019ccce04..2463317f00 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k128_s32_b1_xor_popc.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k128_s32_b1_xor_popc.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8.ll index 36a8ec8683..0cd36dc7b7 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8_satfinite.ll index ad37a6a52a..ef89d62abb 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8_u8.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8_u8.ll index 30deac0412..2fb9c9fecf 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8_u8_satfinite.ll index 2f2bbe5d7a..9c2ef0a6c9 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_s8_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8.ll index b340bb18bf..b6a674a16a 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8_s8.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8_s8.ll index a77a3a0c4e..24fc425dc7 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8_s8_satfinite.ll index 7e011504dc..d40d4cfc7f 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8_satfinite.ll index 997d0e8d9c..b99d18c772 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k16_s32_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4.ll index 8391fcf40a..a8b01a14af 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4_satfinite.ll index 85c9503865..b81cd2480a 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4_u4.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4_u4.ll index 21fa5fcee1..a20063996f 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4_u4_satfinite.ll index 7844da5840..250e37069d 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_s4_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4.ll index fc07d6d095..299d23c0cd 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4_s4.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4_s4.ll index 43020c5891..3c80d1d180 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4_s4_satfinite.ll index aab9acf65e..deef119315 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4_satfinite.ll index daf5651519..0200efb1e2 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k32_s32_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_m8n8k4_f64.ll b/cuda-oxide/intrinsics/probes/mma_m8n8k4_f64.ll index 72d8bd1fdf..aac6730535 100644 --- a/cuda-oxide/intrinsics/probes/mma_m8n8k4_f64.ll +++ b/cuda-oxide/intrinsics/probes/mma_m8n8k4_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4.ll index 380b75ffc7..76b045f068 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4_satfinite.ll index 34c02dd12d..452147d998 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4_u4.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4_u4.ll index 1eab622151..f2d9d00bcf 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4_u4_satfinite.ll index 0fb8f54cdc..43c2114dba 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_s4_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4.ll index 4a25ae3a86..d0e5de05de 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4_s4.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4_s4.ll index 24c89b7b6e..5ea1477a59 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4_s4_satfinite.ll index 6d92bf1bd7..0cf4f30941 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4_satfinite.ll index 47f249507c..20e9da5287 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k128_s32_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8.ll index 376f01b30d..37848762d5 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8_satfinite.ll index 2aa5c776fb..612fae56a5 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8_u8.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8_u8.ll index ee61c262ae..da7e4be705 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8_u8_satfinite.ll index 83a08f0143..b866458814 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_s8_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8.ll index 08b2286bbc..c51e10047d 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8_s8.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8_s8.ll index 9b40d326e3..bb05b90706 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8_s8_satfinite.ll index 71c326293a..da85ea4d6c 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8_satfinite.ll index ffb4ff3f43..6b66e7f469 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k32_s32_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e4m3_e4m3_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e4m3_e4m3_f32.ll index fd05147b64..2d9fdf4ed3 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e4m3_e4m3_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e4m3_e4m3_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e4m3_e5m2_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e4m3_e5m2_f32.ll index 40e74ca29a..36642c4aeb 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e4m3_e5m2_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e4m3_e5m2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e5m2_e4m3_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e5m2_e4m3_f32.ll index e8aa4a82d5..7056eaee3e 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e5m2_e4m3_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e5m2_e4m3_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e5m2_e5m2_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e5m2_e5m2_f32.ll index bce5aa1c54..35511542f0 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e5m2_e5m2_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_f32_e5m2_e5m2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4.ll index 9ec03727d9..6a04307980 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4_satfinite.ll index 8c21941e5d..ff8b43f31d 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4_u4.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4_u4.ll index b946b403c8..d45034cbbd 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4_u4_satfinite.ll index f2f13980a0..6bbd743192 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s4_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8.ll index d2fc7c6cfe..2947921f41 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8_satfinite.ll index bd721ee130..05d493c9af 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8_u8.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8_u8.ll index cf45e1e891..e8c8dec933 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8_u8_satfinite.ll index 44cfea2e39..ae0e26a952 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_s8_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4.ll index 06e415a76d..9bd74fb992 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4_s4.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4_s4.ll index 3d0ad43448..fa1850852a 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4_s4_satfinite.ll index cc15da27a2..95fe0c56aa 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4_satfinite.ll index d35b2d6816..203843020b 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8.ll index dba6be8199..e429502cf1 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8_s8.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8_s8.ll index f4e7d10acb..1ea32346e0 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8_s8_satfinite.ll index ffa79cf928..333f25456c 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8_satfinite.ll index 878173181e..154da6d5de 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_m16n8k64_s32_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4.ll index 23c39aadd5..b3bf4b880f 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4_satfinite.ll index 15bccada10..3c5759426a 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4_u4.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4_u4.ll index daaf68769e..3ed84922eb 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4_u4_satfinite.ll index 798c3d42cb..6743687ca3 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_s4_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4.ll index e265e6188e..de275644bb 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4_s4.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4_s4.ll index 5abb2f9e40..6e2ff1a3eb 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4_s4_satfinite.ll index 3b2318fb4f..14fd0ea314 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4_satfinite.ll index 8bb8fdd1d8..0843b95055 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k128_s32_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f16_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f16_f16.ll index c36fe89e37..6d4d779a7d 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f16_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f16_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f32_bf16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f32_bf16.ll index cf53303044..45ddbc22c7 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f32_bf16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f32_bf16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f32_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f32_f16.ll index 51b7f8cabb..658ff81403 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f32_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f32_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f32_tf32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f32_tf32.ll index 7ed5f4bdd8..215980f7b3 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f32_tf32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k16_f32_tf32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_f16_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_f16_f16.ll index 78f0daf77d..9ab73ff9b7 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_f16_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_f16_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_f32_bf16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_f32_bf16.ll index 2e698fe8e3..e9ef3712f4 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_f32_bf16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_f32_bf16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_f32_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_f32_f16.ll index e88e083a84..00857d0179 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_f32_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_f32_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8.ll index e1e1d05523..3491cd9de7 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8_satfinite.ll index bf6a7a7e8c..8bee61130c 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8_u8.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8_u8.ll index b61157c649..6fbfde454b 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8_u8_satfinite.ll index b1a832e82c..7f25525e03 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_s8_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8.ll index 53c0282081..a777b66b28 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8_s8.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8_s8.ll index f1e159bc30..51762225a5 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8_s8_satfinite.ll index ac2ee4b476..25e60f1c19 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8_satfinite.ll index ef8d329e99..6247c2eae0 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k32_s32_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e2m1_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e2m1_f16.ll index 66255461b9..5f4f9cd2e1 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e2m1_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e2m1_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e2m3_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e2m3_f16.ll index d2ef368497..e91e940237 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e2m3_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e2m3_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e3m2_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e3m2_f16.ll index e0df39bf03..23d25288ee 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e3m2_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e3m2_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e4m3_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e4m3_f16.ll index 3d1c47388d..67ca8d7451 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e4m3_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e4m3_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e5m2_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e5m2_f16.ll index fc1d32500a..d674e75325 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e5m2_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m1_e5m2_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e2m1_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e2m1_f16.ll index 4c5da8c218..db8b8b304f 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e2m1_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e2m1_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e2m3_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e2m3_f16.ll index c052d86c2a..efc509c5ac 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e2m3_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e2m3_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e3m2_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e3m2_f16.ll index e36ebffa42..37e27c4946 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e3m2_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e3m2_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e4m3_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e4m3_f16.ll index ef3e2072ab..5a3b6c9b28 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e4m3_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e4m3_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e5m2_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e5m2_f16.ll index 1c69359e74..be4e1cec66 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e5m2_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e2m3_e5m2_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e2m1_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e2m1_f16.ll index 97eb6fe2e3..560e719ade 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e2m1_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e2m1_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e2m3_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e2m3_f16.ll index eb74ef611f..e3539531bc 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e2m3_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e2m3_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e3m2_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e3m2_f16.ll index 111edc9dc3..5c402cdd97 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e3m2_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e3m2_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e4m3_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e4m3_f16.ll index 24d130ad61..a789d6b8a6 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e4m3_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e4m3_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e5m2_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e5m2_f16.ll index fc66316ec7..198a275b6c 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e5m2_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e3m2_e5m2_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e2m1_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e2m1_f16.ll index 4fa75dbe88..58b1e61c01 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e2m1_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e2m1_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e2m3_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e2m3_f16.ll index f39aff60fa..09ed4c0abb 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e2m3_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e2m3_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e3m2_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e3m2_f16.ll index eabc9e70bf..67e3568868 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e3m2_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e3m2_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e4m3_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e4m3_f16.ll index 8ff021b586..5a25be6e8e 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e4m3_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e4m3_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e5m2_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e5m2_f16.ll index ea5be90791..9bf14e55f1 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e5m2_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e4m3_e5m2_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e2m1_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e2m1_f16.ll index 1ca7c0a303..e8f8af8f28 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e2m1_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e2m1_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e2m3_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e2m3_f16.ll index e6e8d24ee1..12e605cb64 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e2m3_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e2m3_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e3m2_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e3m2_f16.ll index 80063108aa..ad2ba3ca82 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e3m2_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e3m2_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e4m3_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e4m3_f16.ll index 2ff663c30f..6f2bdc5e1f 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e4m3_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e4m3_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e5m2_f16.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e5m2_f16.ll index 2a6a002745..fc5b5e11f2 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e5m2_f16.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f16_e5m2_e5m2_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e2m1_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e2m1_f32.ll index d4b77fd600..99fbcfee7d 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e2m1_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e2m1_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e2m3_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e2m3_f32.ll index 2b0f2c9a7d..e02ff0d079 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e2m3_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e2m3_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e3m2_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e3m2_f32.ll index e8ca8b95a9..2ad6a52b4b 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e3m2_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e3m2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e4m3_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e4m3_f32.ll index 5107432e32..1ddb4214bb 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e4m3_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e4m3_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e5m2_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e5m2_f32.ll index 654aca3dd1..53ebcf6e3b 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e5m2_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m1_e5m2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e2m1_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e2m1_f32.ll index 34f9ea0962..08901dc009 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e2m1_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e2m1_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e2m3_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e2m3_f32.ll index 88017aeac0..9ae6416cd3 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e2m3_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e2m3_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e3m2_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e3m2_f32.ll index 85a7a30645..a0ade7ee58 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e3m2_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e3m2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e4m3_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e4m3_f32.ll index 35a7011a63..c0fc018690 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e4m3_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e4m3_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e5m2_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e5m2_f32.ll index 241e567122..79977d0568 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e5m2_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e2m3_e5m2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e2m1_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e2m1_f32.ll index 048892e913..49405c8d54 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e2m1_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e2m1_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e2m3_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e2m3_f32.ll index a66c8fd56a..9535f732e9 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e2m3_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e2m3_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e3m2_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e3m2_f32.ll index 82c321bb90..5d4969cb3f 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e3m2_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e3m2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e4m3_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e4m3_f32.ll index 3799ab7526..5c996373c3 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e4m3_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e4m3_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e5m2_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e5m2_f32.ll index 0450538f28..19109d560f 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e5m2_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e3m2_e5m2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e2m1_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e2m1_f32.ll index 97fc4e851e..0f6fad0763 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e2m1_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e2m1_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e2m3_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e2m3_f32.ll index b71eb38d2c..37d956b3a5 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e2m3_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e2m3_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e3m2_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e3m2_f32.ll index c867022885..367bd4a762 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e3m2_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e3m2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e4m3_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e4m3_f32.ll index c886336ed8..e6cd8e760e 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e4m3_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e4m3_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e5m2_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e5m2_f32.ll index 108fc3bf71..9243fc6a34 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e5m2_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e4m3_e5m2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e2m1_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e2m1_f32.ll index 2ad77bb07b..363abe8e64 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e2m1_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e2m1_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e2m3_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e2m3_f32.ll index 6b0cf0337a..9db7d62f86 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e2m3_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e2m3_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e3m2_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e3m2_f32.ll index 9b3688cf22..2cb5834c1d 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e3m2_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e3m2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e4m3_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e4m3_f32.ll index 1a4aa49f13..4ded17adac 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e4m3_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e4m3_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e5m2_f32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e5m2_f32.ll index 631dc83898..85a92ef3b4 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e5m2_f32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_kind_f8f6f4_f32_e5m2_e5m2_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4.ll index bfad9d7625..161ba51018 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4_satfinite.ll index 7ae34083dc..c90d0eb06a 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4_u4.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4_u4.ll index bd05a2e344..2c7105ef2c 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4_u4_satfinite.ll index 3f3ee741f6..bcc80a478e 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s4_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8.ll index 897d7cc9bd..eed94a5126 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8_satfinite.ll index b1f1c5c584..8406cc5b04 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8_u8.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8_u8.ll index 51caf5b12f..c9a9c224a4 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8_u8_satfinite.ll index 05ed1a9205..bbda1c18cc 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_s8_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4.ll index a39797bdce..2373c305f6 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4_s4.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4_s4.ll index 80a1853b14..efd5a91377 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4_s4.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4_s4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4_s4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4_s4_satfinite.ll index 0a056822f0..0983a2e518 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4_s4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4_s4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4_satfinite.ll index f169902a45..95707a76a6 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u4_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8.ll index 3a8490004a..2f46a2375a 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8_s8.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8_s8.ll index 282cebade6..d1dc409f98 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8_s8.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8_s8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8_s8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8_s8_satfinite.ll index 7623ea1727..a3ae7e4690 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8_s8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8_s8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8_satfinite.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8_satfinite.ll index 2d571497d9..2a68f2356b 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8_satfinite.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k64_s32_u8_satfinite.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k8_f32_tf32.ll b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k8_f32_tf32.ll index f22edbc77c..79cad9eebe 100644 --- a/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k8_f32_tf32.ll +++ b/cuda-oxide/intrinsics/probes/mma_sp_ordered_metadata_m16n8k8_f32_tf32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/movmatrix_trans_b16.ll b/cuda-oxide/intrinsics/probes/movmatrix_trans_b16.ll index ebae608a7f..79c57554a1 100644 --- a/cuda-oxide/intrinsics/probes/movmatrix_trans_b16.ll +++ b/cuda-oxide/intrinsics/probes/movmatrix_trans_b16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_bf16x2.ll b/cuda-oxide/intrinsics/probes/mul_bf16x2.ll index c3bc310c1f..5a28bd1558 100644 --- a/cuda-oxide/intrinsics/probes/mul_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/mul_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_f16x2.ll b/cuda-oxide/intrinsics/probes/mul_f16x2.ll index f91e933c5b..fda5909e2d 100644 --- a/cuda-oxide/intrinsics/probes/mul_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/mul_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_f32x2.ll b/cuda-oxide/intrinsics/probes/mul_f32x2.ll index 4bec0a56ab..989efdcfe9 100644 --- a/cuda-oxide/intrinsics/probes/mul_f32x2.ll +++ b/cuda-oxide/intrinsics/probes/mul_f32x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_ftz_f32x2.ll b/cuda-oxide/intrinsics/probes/mul_ftz_f32x2.ll index 81aec2377d..1c77710223 100644 --- a/cuda-oxide/intrinsics/probes/mul_ftz_f32x2.ll +++ b/cuda-oxide/intrinsics/probes/mul_ftz_f32x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_rm_f32.ll b/cuda-oxide/intrinsics/probes/mul_rm_f32.ll index 7589f89b47..b39a276372 100644 --- a/cuda-oxide/intrinsics/probes/mul_rm_f32.ll +++ b/cuda-oxide/intrinsics/probes/mul_rm_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_rm_f64.ll b/cuda-oxide/intrinsics/probes/mul_rm_f64.ll index 716b167815..ff8ac9b581 100644 --- a/cuda-oxide/intrinsics/probes/mul_rm_f64.ll +++ b/cuda-oxide/intrinsics/probes/mul_rm_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_rm_ftz_f32.ll b/cuda-oxide/intrinsics/probes/mul_rm_ftz_f32.ll index 6729dea504..fbe6c20ab7 100644 --- a/cuda-oxide/intrinsics/probes/mul_rm_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/mul_rm_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_rn_f32.ll b/cuda-oxide/intrinsics/probes/mul_rn_f32.ll index 97623a4976..b4bd581339 100644 --- a/cuda-oxide/intrinsics/probes/mul_rn_f32.ll +++ b/cuda-oxide/intrinsics/probes/mul_rn_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_rn_f64.ll b/cuda-oxide/intrinsics/probes/mul_rn_f64.ll index 6e6e273af9..815768ab57 100644 --- a/cuda-oxide/intrinsics/probes/mul_rn_f64.ll +++ b/cuda-oxide/intrinsics/probes/mul_rn_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_rn_ftz_f32.ll b/cuda-oxide/intrinsics/probes/mul_rn_ftz_f32.ll index 0e44e4186a..32b55756c9 100644 --- a/cuda-oxide/intrinsics/probes/mul_rn_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/mul_rn_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_rp_f32.ll b/cuda-oxide/intrinsics/probes/mul_rp_f32.ll index 997300acc5..0745095a05 100644 --- a/cuda-oxide/intrinsics/probes/mul_rp_f32.ll +++ b/cuda-oxide/intrinsics/probes/mul_rp_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_rp_f64.ll b/cuda-oxide/intrinsics/probes/mul_rp_f64.ll index 7d6e3f5f27..faa4cb07f3 100644 --- a/cuda-oxide/intrinsics/probes/mul_rp_f64.ll +++ b/cuda-oxide/intrinsics/probes/mul_rp_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_rp_ftz_f32.ll b/cuda-oxide/intrinsics/probes/mul_rp_ftz_f32.ll index d30e226fd3..3e6b40966c 100644 --- a/cuda-oxide/intrinsics/probes/mul_rp_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/mul_rp_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_rz_f32.ll b/cuda-oxide/intrinsics/probes/mul_rz_f32.ll index cd8bf5f695..20383415ce 100644 --- a/cuda-oxide/intrinsics/probes/mul_rz_f32.ll +++ b/cuda-oxide/intrinsics/probes/mul_rz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_rz_f64.ll b/cuda-oxide/intrinsics/probes/mul_rz_f64.ll index d01d63771c..dcc830626a 100644 --- a/cuda-oxide/intrinsics/probes/mul_rz_f64.ll +++ b/cuda-oxide/intrinsics/probes/mul_rz_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/mul_rz_ftz_f32.ll b/cuda-oxide/intrinsics/probes/mul_rz_ftz_f32.ll index e3d4b4ebdf..469ec4ee7b 100644 --- a/cuda-oxide/intrinsics/probes/mul_rz_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/mul_rz_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/nanosleep.ll b/cuda-oxide/intrinsics/probes/nanosleep.ll index 8f14166fe6..8c147b8af2 100644 --- a/cuda-oxide/intrinsics/probes/nanosleep.ll +++ b/cuda-oxide/intrinsics/probes/nanosleep.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/neg_bf16x2.ll b/cuda-oxide/intrinsics/probes/neg_bf16x2.ll index e0e7d4824c..92c07b66b9 100644 --- a/cuda-oxide/intrinsics/probes/neg_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/neg_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/neg_f16x2.ll b/cuda-oxide/intrinsics/probes/neg_f16x2.ll index ef3d5301e0..3bbcbffc74 100644 --- a/cuda-oxide/intrinsics/probes/neg_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/neg_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/nsmid.lib_nvvm.ll b/cuda-oxide/intrinsics/probes/nsmid.lib_nvvm.ll index a33403da3e..e1d00ec1aa 100644 --- a/cuda-oxide/intrinsics/probes/nsmid.lib_nvvm.ll +++ b/cuda-oxide/intrinsics/probes/nsmid.lib_nvvm.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/nsmid.llvm_nvptx.ll b/cuda-oxide/intrinsics/probes/nsmid.llvm_nvptx.ll index dc508cf701..8a91b73fc5 100644 --- a/cuda-oxide/intrinsics/probes/nsmid.llvm_nvptx.ll +++ b/cuda-oxide/intrinsics/probes/nsmid.llvm_nvptx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/nwarpid.lib_nvvm.ll b/cuda-oxide/intrinsics/probes/nwarpid.lib_nvvm.ll index 8d67def42d..5e93c2932c 100644 --- a/cuda-oxide/intrinsics/probes/nwarpid.lib_nvvm.ll +++ b/cuda-oxide/intrinsics/probes/nwarpid.lib_nvvm.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/nwarpid.llvm_nvptx.ll b/cuda-oxide/intrinsics/probes/nwarpid.llvm_nvptx.ll index da84c936fe..70f9df7ac5 100644 --- a/cuda-oxide/intrinsics/probes/nwarpid.llvm_nvptx.ll +++ b/cuda-oxide/intrinsics/probes/nwarpid.llvm_nvptx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/packed_atomic_add_bf16x2.ll b/cuda-oxide/intrinsics/probes/packed_atomic_add_bf16x2.ll index 24b7d89135..7336f2cdc1 100644 --- a/cuda-oxide/intrinsics/probes/packed_atomic_add_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/packed_atomic_add_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/packed_atomic_add_f16x2.ll b/cuda-oxide/intrinsics/probes/packed_atomic_add_f16x2.ll index 6408738f86..4774f5bcd5 100644 --- a/cuda-oxide/intrinsics/probes/packed_atomic_add_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/packed_atomic_add_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/pmevent.ll b/cuda-oxide/intrinsics/probes/pmevent.ll index 9120a32f53..ec89b9b138 100644 --- a/cuda-oxide/intrinsics/probes/pmevent.ll +++ b/cuda-oxide/intrinsics/probes/pmevent.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/prefetch_tma_descriptor.ll b/cuda-oxide/intrinsics/probes/prefetch_tma_descriptor.ll index ec3739120e..b108543a50 100644 --- a/cuda-oxide/intrinsics/probes/prefetch_tma_descriptor.ll +++ b/cuda-oxide/intrinsics/probes/prefetch_tma_descriptor.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/prmt.ll b/cuda-oxide/intrinsics/probes/prmt.ll index 505111c077..9f077eb1f8 100644 --- a/cuda-oxide/intrinsics/probes/prmt.ll +++ b/cuda-oxide/intrinsics/probes/prmt.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/prmt_b4e.ll b/cuda-oxide/intrinsics/probes/prmt_b4e.ll index b3ae2f5e1b..1f2ceac4a5 100644 --- a/cuda-oxide/intrinsics/probes/prmt_b4e.ll +++ b/cuda-oxide/intrinsics/probes/prmt_b4e.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/prmt_ecl.ll b/cuda-oxide/intrinsics/probes/prmt_ecl.ll index 2f046ce3b5..2823af101a 100644 --- a/cuda-oxide/intrinsics/probes/prmt_ecl.ll +++ b/cuda-oxide/intrinsics/probes/prmt_ecl.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/prmt_ecr.ll b/cuda-oxide/intrinsics/probes/prmt_ecr.ll index 457f6fbb4a..45cd6c31d5 100644 --- a/cuda-oxide/intrinsics/probes/prmt_ecr.ll +++ b/cuda-oxide/intrinsics/probes/prmt_ecr.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/prmt_f4e.ll b/cuda-oxide/intrinsics/probes/prmt_f4e.ll index ef9ac24a2a..506b851e79 100644 --- a/cuda-oxide/intrinsics/probes/prmt_f4e.ll +++ b/cuda-oxide/intrinsics/probes/prmt_f4e.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/prmt_rc16.ll b/cuda-oxide/intrinsics/probes/prmt_rc16.ll index 1da5f6e97f..38212fcb02 100644 --- a/cuda-oxide/intrinsics/probes/prmt_rc16.ll +++ b/cuda-oxide/intrinsics/probes/prmt_rc16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/prmt_rc8.ll b/cuda-oxide/intrinsics/probes/prmt_rc8.ll index 269aa1e06b..d111082348 100644 --- a/cuda-oxide/intrinsics/probes/prmt_rc8.ll +++ b/cuda-oxide/intrinsics/probes/prmt_rc8.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_approx_ftz_f32.ll b/cuda-oxide/intrinsics/probes/rcp_approx_ftz_f32.ll index 37d18dca2a..f04bf08b68 100644 --- a/cuda-oxide/intrinsics/probes/rcp_approx_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/rcp_approx_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_approx_ftz_f64.ll b/cuda-oxide/intrinsics/probes/rcp_approx_ftz_f64.ll index eaa85277e5..bc690d21b9 100644 --- a/cuda-oxide/intrinsics/probes/rcp_approx_ftz_f64.ll +++ b/cuda-oxide/intrinsics/probes/rcp_approx_ftz_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_rm_f32.ll b/cuda-oxide/intrinsics/probes/rcp_rm_f32.ll index 12082f8eb8..e870128810 100644 --- a/cuda-oxide/intrinsics/probes/rcp_rm_f32.ll +++ b/cuda-oxide/intrinsics/probes/rcp_rm_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_rm_f64.ll b/cuda-oxide/intrinsics/probes/rcp_rm_f64.ll index 06e19185a9..9d7cf89692 100644 --- a/cuda-oxide/intrinsics/probes/rcp_rm_f64.ll +++ b/cuda-oxide/intrinsics/probes/rcp_rm_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_rm_ftz_f32.ll b/cuda-oxide/intrinsics/probes/rcp_rm_ftz_f32.ll index da7a02821c..f4f06b48dd 100644 --- a/cuda-oxide/intrinsics/probes/rcp_rm_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/rcp_rm_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_rn_f32.ll b/cuda-oxide/intrinsics/probes/rcp_rn_f32.ll index 3d03775e90..4b0eed22b1 100644 --- a/cuda-oxide/intrinsics/probes/rcp_rn_f32.ll +++ b/cuda-oxide/intrinsics/probes/rcp_rn_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_rn_f64.ll b/cuda-oxide/intrinsics/probes/rcp_rn_f64.ll index 880a0bde68..d97d933f4f 100644 --- a/cuda-oxide/intrinsics/probes/rcp_rn_f64.ll +++ b/cuda-oxide/intrinsics/probes/rcp_rn_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_rn_ftz_f32.ll b/cuda-oxide/intrinsics/probes/rcp_rn_ftz_f32.ll index 93d6857747..19c0d5517e 100644 --- a/cuda-oxide/intrinsics/probes/rcp_rn_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/rcp_rn_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_rp_f32.ll b/cuda-oxide/intrinsics/probes/rcp_rp_f32.ll index 461a5475d7..24022dadcf 100644 --- a/cuda-oxide/intrinsics/probes/rcp_rp_f32.ll +++ b/cuda-oxide/intrinsics/probes/rcp_rp_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_rp_f64.ll b/cuda-oxide/intrinsics/probes/rcp_rp_f64.ll index 5531e4891a..776095edc6 100644 --- a/cuda-oxide/intrinsics/probes/rcp_rp_f64.ll +++ b/cuda-oxide/intrinsics/probes/rcp_rp_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_rp_ftz_f32.ll b/cuda-oxide/intrinsics/probes/rcp_rp_ftz_f32.ll index 0f57b5fb93..f571e76593 100644 --- a/cuda-oxide/intrinsics/probes/rcp_rp_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/rcp_rp_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_rz_f32.ll b/cuda-oxide/intrinsics/probes/rcp_rz_f32.ll index bc3e0529f9..7812c678b2 100644 --- a/cuda-oxide/intrinsics/probes/rcp_rz_f32.ll +++ b/cuda-oxide/intrinsics/probes/rcp_rz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_rz_f64.ll b/cuda-oxide/intrinsics/probes/rcp_rz_f64.ll index 777f17f008..1f4ff9f7b5 100644 --- a/cuda-oxide/intrinsics/probes/rcp_rz_f64.ll +++ b/cuda-oxide/intrinsics/probes/rcp_rz_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rcp_rz_ftz_f32.ll b/cuda-oxide/intrinsics/probes/rcp_rz_ftz_f32.ll index db3454c007..667f9cc362 100644 --- a/cuda-oxide/intrinsics/probes/rcp_rz_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/rcp_rz_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_add.ll b/cuda-oxide/intrinsics/probes/redux_sync_add.ll index 8d771a1748..7697bd8151 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_add.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_add.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_and.ll b/cuda-oxide/intrinsics/probes/redux_sync_and.ll index 8d3adb0285..3b95253854 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_and.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_and.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_max_abs_f32.ll b/cuda-oxide/intrinsics/probes/redux_sync_max_abs_f32.ll index d035674578..977b7926e5 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_max_abs_f32.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_max_abs_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_max_abs_nan_f32.ll b/cuda-oxide/intrinsics/probes/redux_sync_max_abs_nan_f32.ll index 098ebcf2b9..4e3c42562b 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_max_abs_nan_f32.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_max_abs_nan_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_max_f32.ll b/cuda-oxide/intrinsics/probes/redux_sync_max_f32.ll index 63db8586d6..1f24bd8b91 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_max_f32.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_max_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_max_i32.ll b/cuda-oxide/intrinsics/probes/redux_sync_max_i32.ll index 555df19f7a..afdf89032f 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_max_i32.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_max_i32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_max_nan_f32.ll b/cuda-oxide/intrinsics/probes/redux_sync_max_nan_f32.ll index c12cc12f83..6e2025e4ca 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_max_nan_f32.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_max_nan_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_max_u32.ll b/cuda-oxide/intrinsics/probes/redux_sync_max_u32.ll index 3ac5bc8dc4..6f32b21292 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_max_u32.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_max_u32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_min_abs_f32.ll b/cuda-oxide/intrinsics/probes/redux_sync_min_abs_f32.ll index f697282d14..7dbab43bf1 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_min_abs_f32.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_min_abs_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_min_abs_nan_f32.ll b/cuda-oxide/intrinsics/probes/redux_sync_min_abs_nan_f32.ll index 66db0dda8c..180482312d 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_min_abs_nan_f32.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_min_abs_nan_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_min_f32.ll b/cuda-oxide/intrinsics/probes/redux_sync_min_f32.ll index ef8e94f2a2..d37b2f268c 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_min_f32.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_min_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_min_i32.ll b/cuda-oxide/intrinsics/probes/redux_sync_min_i32.ll index 810f996493..6df59c32e8 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_min_i32.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_min_i32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_min_nan_f32.ll b/cuda-oxide/intrinsics/probes/redux_sync_min_nan_f32.ll index 6738bbdea4..180dc3dc1b 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_min_nan_f32.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_min_nan_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_min_u32.ll b/cuda-oxide/intrinsics/probes/redux_sync_min_u32.ll index 1c38c76378..2a09704598 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_min_u32.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_min_u32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_or.ll b/cuda-oxide/intrinsics/probes/redux_sync_or.ll index ba6102339a..a416424dee 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_or.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_or.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/redux_sync_xor.ll b/cuda-oxide/intrinsics/probes/redux_sync_xor.ll index 5ca66d75f4..2a0eff21b9 100644 --- a/cuda-oxide/intrinsics/probes/redux_sync_xor.ll +++ b/cuda-oxide/intrinsics/probes/redux_sync_xor.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rsqrt_approx_f32.ll b/cuda-oxide/intrinsics/probes/rsqrt_approx_f32.ll index 0352e9dc25..98ac4c7343 100644 --- a/cuda-oxide/intrinsics/probes/rsqrt_approx_f32.ll +++ b/cuda-oxide/intrinsics/probes/rsqrt_approx_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rsqrt_approx_f64.ll b/cuda-oxide/intrinsics/probes/rsqrt_approx_f64.ll index f136ea0b9e..9821f0a5b1 100644 --- a/cuda-oxide/intrinsics/probes/rsqrt_approx_f64.ll +++ b/cuda-oxide/intrinsics/probes/rsqrt_approx_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/rsqrt_approx_ftz_f32.ll b/cuda-oxide/intrinsics/probes/rsqrt_approx_ftz_f32.ll index d089cc3f1a..9dfa36bdfd 100644 --- a/cuda-oxide/intrinsics/probes/rsqrt_approx_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/rsqrt_approx_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/setmaxnreg_dec.ll b/cuda-oxide/intrinsics/probes/setmaxnreg_dec.ll index 7dc76a0ca3..a03218c9d1 100644 --- a/cuda-oxide/intrinsics/probes/setmaxnreg_dec.ll +++ b/cuda-oxide/intrinsics/probes/setmaxnreg_dec.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/setmaxnreg_inc.ll b/cuda-oxide/intrinsics/probes/setmaxnreg_inc.ll index 3551fe1224..f3780faaad 100644 --- a/cuda-oxide/intrinsics/probes/setmaxnreg_inc.ll +++ b/cuda-oxide/intrinsics/probes/setmaxnreg_inc.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/shuffle_down_f32_sync.ll b/cuda-oxide/intrinsics/probes/shuffle_down_f32_sync.ll index 3490d2f18a..96bfdf7d41 100644 --- a/cuda-oxide/intrinsics/probes/shuffle_down_f32_sync.ll +++ b/cuda-oxide/intrinsics/probes/shuffle_down_f32_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/shuffle_down_sync.ll b/cuda-oxide/intrinsics/probes/shuffle_down_sync.ll index f65cdd00ab..13862d4f8f 100644 --- a/cuda-oxide/intrinsics/probes/shuffle_down_sync.ll +++ b/cuda-oxide/intrinsics/probes/shuffle_down_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/shuffle_down_u64_sync.ll b/cuda-oxide/intrinsics/probes/shuffle_down_u64_sync.ll index 10a614c66d..a86ef7514a 100644 --- a/cuda-oxide/intrinsics/probes/shuffle_down_u64_sync.ll +++ b/cuda-oxide/intrinsics/probes/shuffle_down_u64_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/shuffle_f32_sync.ll b/cuda-oxide/intrinsics/probes/shuffle_f32_sync.ll index e20997a0b7..f980f72857 100644 --- a/cuda-oxide/intrinsics/probes/shuffle_f32_sync.ll +++ b/cuda-oxide/intrinsics/probes/shuffle_f32_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/shuffle_sync.ll b/cuda-oxide/intrinsics/probes/shuffle_sync.ll index 2c435701d6..af3af72ab6 100644 --- a/cuda-oxide/intrinsics/probes/shuffle_sync.ll +++ b/cuda-oxide/intrinsics/probes/shuffle_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/shuffle_u64_sync.ll b/cuda-oxide/intrinsics/probes/shuffle_u64_sync.ll index c6b24328d6..0398d008dd 100644 --- a/cuda-oxide/intrinsics/probes/shuffle_u64_sync.ll +++ b/cuda-oxide/intrinsics/probes/shuffle_u64_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/shuffle_up_f32_sync.ll b/cuda-oxide/intrinsics/probes/shuffle_up_f32_sync.ll index 15cabb01d4..6f5bcebb85 100644 --- a/cuda-oxide/intrinsics/probes/shuffle_up_f32_sync.ll +++ b/cuda-oxide/intrinsics/probes/shuffle_up_f32_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/shuffle_up_sync.ll b/cuda-oxide/intrinsics/probes/shuffle_up_sync.ll index e86d02fb93..05cf499cb2 100644 --- a/cuda-oxide/intrinsics/probes/shuffle_up_sync.ll +++ b/cuda-oxide/intrinsics/probes/shuffle_up_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/shuffle_up_u64_sync.ll b/cuda-oxide/intrinsics/probes/shuffle_up_u64_sync.ll index 80de74b741..0556de8392 100644 --- a/cuda-oxide/intrinsics/probes/shuffle_up_u64_sync.ll +++ b/cuda-oxide/intrinsics/probes/shuffle_up_u64_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/shuffle_xor_f32_sync.ll b/cuda-oxide/intrinsics/probes/shuffle_xor_f32_sync.ll index 8d81711b9a..649599f542 100644 --- a/cuda-oxide/intrinsics/probes/shuffle_xor_f32_sync.ll +++ b/cuda-oxide/intrinsics/probes/shuffle_xor_f32_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/shuffle_xor_sync.ll b/cuda-oxide/intrinsics/probes/shuffle_xor_sync.ll index 1c032b2d7f..ead8bd170f 100644 --- a/cuda-oxide/intrinsics/probes/shuffle_xor_sync.ll +++ b/cuda-oxide/intrinsics/probes/shuffle_xor_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/shuffle_xor_u64_sync.ll b/cuda-oxide/intrinsics/probes/shuffle_xor_u64_sync.ll index 4d7de47df7..dc0b10183a 100644 --- a/cuda-oxide/intrinsics/probes/shuffle_xor_u64_sync.ll +++ b/cuda-oxide/intrinsics/probes/shuffle_xor_u64_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sin_approx_f32.ll b/cuda-oxide/intrinsics/probes/sin_approx_f32.ll index b49d6a3217..4907a5495e 100644 --- a/cuda-oxide/intrinsics/probes/sin_approx_f32.ll +++ b/cuda-oxide/intrinsics/probes/sin_approx_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sin_approx_ftz_f32.ll b/cuda-oxide/intrinsics/probes/sin_approx_ftz_f32.ll index fd5d5e136c..da9b1652c0 100644 --- a/cuda-oxide/intrinsics/probes/sin_approx_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/sin_approx_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/smid.lib_nvvm.ll b/cuda-oxide/intrinsics/probes/smid.lib_nvvm.ll index b78cbf52b9..f835c86867 100644 --- a/cuda-oxide/intrinsics/probes/smid.lib_nvvm.ll +++ b/cuda-oxide/intrinsics/probes/smid.lib_nvvm.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/smid.llvm_nvptx.ll b/cuda-oxide/intrinsics/probes/smid.llvm_nvptx.ll index 1c614d2305..964eb62205 100644 --- a/cuda-oxide/intrinsics/probes/smid.llvm_nvptx.ll +++ b/cuda-oxide/intrinsics/probes/smid.llvm_nvptx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_approx_f32.ll b/cuda-oxide/intrinsics/probes/sqrt_approx_f32.ll index 42e463c8d1..fade8f68e1 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_approx_f32.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_approx_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_approx_ftz_f32.ll b/cuda-oxide/intrinsics/probes/sqrt_approx_ftz_f32.ll index 162c27602c..8e1b5ee6b9 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_approx_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_approx_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_rm_f32.ll b/cuda-oxide/intrinsics/probes/sqrt_rm_f32.ll index 3d65cc796c..d7cbf84f27 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_rm_f32.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_rm_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_rm_f64.ll b/cuda-oxide/intrinsics/probes/sqrt_rm_f64.ll index ac2aa85062..4cd0765462 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_rm_f64.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_rm_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_rm_ftz_f32.ll b/cuda-oxide/intrinsics/probes/sqrt_rm_ftz_f32.ll index 008f208615..913424467f 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_rm_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_rm_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_rn_f32.ll b/cuda-oxide/intrinsics/probes/sqrt_rn_f32.ll index eeb807672c..b163052a5b 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_rn_f32.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_rn_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_rn_f64.ll b/cuda-oxide/intrinsics/probes/sqrt_rn_f64.ll index ec8160e011..fcd63267f4 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_rn_f64.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_rn_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_rn_ftz_f32.ll b/cuda-oxide/intrinsics/probes/sqrt_rn_ftz_f32.ll index 4d593b554e..f2f0e6a015 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_rn_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_rn_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_rp_f32.ll b/cuda-oxide/intrinsics/probes/sqrt_rp_f32.ll index 632298e22e..b3cb2af5d8 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_rp_f32.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_rp_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_rp_f64.ll b/cuda-oxide/intrinsics/probes/sqrt_rp_f64.ll index 7cf4db5a80..08bfc6ecd7 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_rp_f64.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_rp_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_rp_ftz_f32.ll b/cuda-oxide/intrinsics/probes/sqrt_rp_ftz_f32.ll index 0a7be28590..0a034b6298 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_rp_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_rp_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_rz_f32.ll b/cuda-oxide/intrinsics/probes/sqrt_rz_f32.ll index 332d071b2b..82e0230854 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_rz_f32.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_rz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_rz_f64.ll b/cuda-oxide/intrinsics/probes/sqrt_rz_f64.ll index acf7d17b22..766326f7dd 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_rz_f64.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_rz_f64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sqrt_rz_ftz_f32.ll b/cuda-oxide/intrinsics/probes/sqrt_rz_ftz_f32.ll index 7a09abac24..839bee0637 100644 --- a/cuda-oxide/intrinsics/probes/sqrt_rz_ftz_f32.ll +++ b/cuda-oxide/intrinsics/probes/sqrt_rz_ftz_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x2_b16.ll b/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x2_b16.ll index 939ba5dbb5..5ac44d260b 100644 --- a/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x2_b16.ll +++ b/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x2_b16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x2_trans_b16.ll b/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x2_trans_b16.ll index 548265d52f..cd5569ef89 100644 --- a/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x2_trans_b16.ll +++ b/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x2_trans_b16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x4_b16.ll b/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x4_b16.ll index 181c9f0138..bd4dc301a3 100644 --- a/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x4_b16.ll +++ b/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x4_b16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x4_trans_b16.ll b/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x4_trans_b16.ll index f61d494606..08e839c376 100644 --- a/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x4_trans_b16.ll +++ b/cuda-oxide/intrinsics/probes/stmatrix_m8n8_x4_trans_b16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sub_bf16x2.ll b/cuda-oxide/intrinsics/probes/sub_bf16x2.ll index 31cf5c8165..afd4ce4099 100644 --- a/cuda-oxide/intrinsics/probes/sub_bf16x2.ll +++ b/cuda-oxide/intrinsics/probes/sub_bf16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sub_f16x2.ll b/cuda-oxide/intrinsics/probes/sub_f16x2.ll index 22d9d5441d..03aaced7f7 100644 --- a/cuda-oxide/intrinsics/probes/sub_f16x2.ll +++ b/cuda-oxide/intrinsics/probes/sub_f16x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sub_f32x2.ll b/cuda-oxide/intrinsics/probes/sub_f32x2.ll index 53b1c67d22..9c354c9115 100644 --- a/cuda-oxide/intrinsics/probes/sub_f32x2.ll +++ b/cuda-oxide/intrinsics/probes/sub_f32x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sub_ftz_f32x2.ll b/cuda-oxide/intrinsics/probes/sub_ftz_f32x2.ll index 70cab15fd3..1447c89cff 100644 --- a/cuda-oxide/intrinsics/probes/sub_ftz_f32x2.ll +++ b/cuda-oxide/intrinsics/probes/sub_ftz_f32x2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sync_mask.ll b/cuda-oxide/intrinsics/probes/sync_mask.ll index 2594aff2db..d03a40ed33 100644 --- a/cuda-oxide/intrinsics/probes/sync_mask.ll +++ b/cuda-oxide/intrinsics/probes/sync_mask.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/sync_threads.ll b/cuda-oxide/intrinsics/probes/sync_threads.ll index 1894824f4e..edd3ac74d5 100644 --- a/cuda-oxide/intrinsics/probes/sync_threads.ll +++ b/cuda-oxide/intrinsics/probes/sync_threads.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tanh_approx_f32.ll b/cuda-oxide/intrinsics/probes/tanh_approx_f32.ll index fdc74fe3e8..2d54066d27 100644 --- a/cuda-oxide/intrinsics/probes/tanh_approx_f32.ll +++ b/cuda-oxide/intrinsics/probes/tanh_approx_f32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_alloc.ll b/cuda-oxide/intrinsics/probes/tcgen05_alloc.ll index f6f06e68fe..9161556fa3 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_alloc.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_alloc.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_alloc_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_alloc_cg2.ll index cd6c84825c..75d315679f 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_alloc_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_alloc_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_commit.ll b/cuda-oxide/intrinsics/probes/tcgen05_commit.ll index 775ccf8b03..1229b84b41 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_commit.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_commit.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_commit_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_commit_cg2.ll index 5fd08aa1c0..27809c4752 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_commit_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_commit_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_commit_multicast.ll b/cuda-oxide/intrinsics/probes/tcgen05_commit_multicast.ll index e599356ec6..626c5ed5c8 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_commit_multicast.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_commit_multicast.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_commit_multicast_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_commit_multicast_cg2.ll index 78f44d1821..668676ba3e 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_commit_multicast_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_commit_multicast_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_commit_shared_cluster.ll b/cuda-oxide/intrinsics/probes/tcgen05_commit_shared_cluster.ll index 7786a97000..10b94cf4ea 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_commit_shared_cluster.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_commit_shared_cluster.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_commit_shared_cluster_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_commit_shared_cluster_cg2.ll index 57bb78712e..f7aeb1d9f9 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_commit_shared_cluster_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_commit_shared_cluster_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b.ll index 1c7c0e2021..57f3878516 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b4x16_p64.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b4x16_p64.ll index 219f79ee74..4ef1f3eaa1 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b4x16_p64.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b4x16_p64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b4x16_p64_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b4x16_p64_cg2.ll index 8c36ede8af..cc4309fd7c 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b4x16_p64_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b4x16_p64_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b6x16_p32.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b6x16_p32.ll index b2223b1831..d1a6f2ce70 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b6x16_p32.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b6x16_p32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b6x16_p32_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b6x16_p32_cg2.ll index 5eb6d3cc81..c835014e80 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b6x16_p32_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_b6x16_p32_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_cg2.ll index c3f0ff16f3..13e0bdadb2 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x128b_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b4x16_p64.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b4x16_p64.ll index eb82f6f516..be2251bd05 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b4x16_p64.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b4x16_p64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b4x16_p64_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b4x16_p64_cg2.ll index 456192cfac..832619e0e9 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b4x16_p64_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b4x16_p64_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b6x16_p32.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b6x16_p32.ll index 727dfad99d..77867089c7 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b6x16_p32.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b6x16_p32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b6x16_p32_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b6x16_p32_cg2.ll index a64e8094e8..4528978d21 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b6x16_p32_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_128x256b_b6x16_p32_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4.ll index 4157f8c440..597b734c7c 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b4x16_p64.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b4x16_p64.ll index 1c1f8ed1dc..6fbfea48a7 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b4x16_p64.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b4x16_p64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b4x16_p64_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b4x16_p64_cg2.ll index 85ef4d6c80..424783cb19 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b4x16_p64_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b4x16_p64_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b6x16_p32.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b6x16_p32.ll index 2001be71ab..cfc2f9021b 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b6x16_p32.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b6x16_p32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b6x16_p32_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b6x16_p32_cg2.ll index dfa3716e48..62c1798fcb 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b6x16_p32_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_b6x16_p32_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_cg2.ll index 5d1902a438..aac7a6f2b1 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_32x128b_warpx4_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b.ll index 6bb16d2ef9..b620d856d2 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b4x16_p64.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b4x16_p64.ll index aa5b21f92c..731e7674c5 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b4x16_p64.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b4x16_p64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b4x16_p64_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b4x16_p64_cg2.ll index 0a19eac424..c8e51a0edf 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b4x16_p64_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b4x16_p64_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b6x16_p32.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b6x16_p32.ll index b587be1132..f2f1b9f061 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b6x16_p32.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b6x16_p32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b6x16_p32_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b6x16_p32_cg2.ll index 48ca573589..71dce83cfd 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b6x16_p32_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_b6x16_p32_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_cg2.ll index 2af0695819..952341c95b 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_4x256b_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23.ll index 2fe8c78f76..5c594163fb 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b4x16_p64.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b4x16_p64.ll index 8e069cea67..f5219aece5 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b4x16_p64.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b4x16_p64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b4x16_p64_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b4x16_p64_cg2.ll index 1b6c85a80b..d21018479b 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b4x16_p64_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b4x16_p64_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b6x16_p32.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b6x16_p32.ll index 4d63eaef2b..946e344d0f 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b6x16_p32.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b6x16_p32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b6x16_p32_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b6x16_p32_cg2.ll index 07c0c6e856..fb8578fa96 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b6x16_p32_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_b6x16_p32_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_cg2.ll index 693fdcb423..700271716f 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_01_23_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13.ll index 3bc4584ae6..5e577bb1f7 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b4x16_p64.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b4x16_p64.ll index 7a2f095629..480fab8939 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b4x16_p64.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b4x16_p64.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b4x16_p64_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b4x16_p64_cg2.ll index dfd9ddedc3..ea32cc2893 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b4x16_p64_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b4x16_p64_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b6x16_p32.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b6x16_p32.ll index 2109d34bb9..a2f187fd08 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b6x16_p32.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b6x16_p32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b6x16_p32_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b6x16_p32_cg2.ll index df5e0c837b..0dbc0fddef 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b6x16_p32_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_b6x16_p32_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_cg2.ll index 1128a7860f..c8ba16378c 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_64x128b_warpx2_02_13_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_smem_to_tmem.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_smem_to_tmem.ll index d7c9d74ec6..2fb516481f 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_smem_to_tmem.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_smem_to_tmem.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_cp_smem_to_tmem_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_cp_smem_to_tmem_cg2.ll index 0c412d7af7..0093748f45 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_cp_smem_to_tmem_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_cp_smem_to_tmem_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_dealloc.ll b/cuda-oxide/intrinsics/probes/tcgen05_dealloc.ll index ef1c191f4c..c0f9d0172b 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_dealloc.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_dealloc.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_dealloc_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_dealloc_cg2.ll index 221a88f6a6..0e2c1ff056 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_dealloc_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_dealloc_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_fence_after_thread_sync.ll b/cuda-oxide/intrinsics/probes/tcgen05_fence_after_thread_sync.ll index fb816357d7..3e81d5dfc1 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_fence_after_thread_sync.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_fence_after_thread_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_fence_before_thread_sync.ll b/cuda-oxide/intrinsics/probes/tcgen05_fence_before_thread_sync.ll index e7f1c279c1..a34a8a0d08 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_fence_before_thread_sync.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_fence_before_thread_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x16_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x16_pack16.ll index be770a4c90..146726ed03 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x16_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x16_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x16_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x16_raw.ll index 95ff5f2aad..04282812d0 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x16_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x16_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x1_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x1_pack16.ll index b50542a279..a4c6117b73 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x1_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x1_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x1_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x1_raw.ll index 0bdb38219f..ce1bbdaf97 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x1_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x1_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x2_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x2_pack16.ll index 8f026feddf..d6f1ff2bbb 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x2_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x2_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x2_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x2_raw.ll index 2006797c17..8eb85b7572 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x2_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x2_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x32_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x32_pack16.ll index 52b1521b01..e6a9239b04 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x32_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x32_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x32_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x32_raw.ll index ca0a1a3426..f554ffc18c 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x32_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x32_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x4_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x4_pack16.ll index c5e0b65d51..1d96191a0d 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x4_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x4_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x4_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x4_raw.ll index 604831bbb7..7d241702ca 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x4_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x4_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x64_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x64_pack16.ll index 6ce591a606..d98a32915f 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x64_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x64_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x64_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x64_raw.ll index 87851c46bc..1b6518e844 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x64_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x64_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x8_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x8_pack16.ll index 1316db40fd..c54f2f133c 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x8_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x8_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x8_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x8_raw.ll index 55125e458e..375573ccfb 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x8_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x128b_x8_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_pure.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_pure.ll index 22310787c9..5443c6d6ae 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_pure.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_pure.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x16_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x16_pack16.ll index be2388f04b..838d3159b6 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x16_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x16_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x16_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x16_raw.ll index fc881e9928..debe27e94c 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x16_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x16_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x1_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x1_pack16.ll index f7e404171f..add3e81237 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x1_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x1_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x1_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x1_raw.ll index 7fe6278eef..12dea4a01a 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x1_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x1_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x2_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x2_pack16.ll index 12f9363541..1b0033f605 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x2_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x2_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x2_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x2_raw.ll index a6b31cfb9f..cb4a65a66e 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x2_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x2_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x32_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x32_pack16.ll index a45fd0a04a..5fa72b0151 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x32_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x32_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x32_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x32_raw.ll index a5437fa853..5d1b39b41c 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x32_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x32_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x4_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x4_pack16.ll index 48b1c407a8..379c85f76a 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x4_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x4_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x4_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x4_raw.ll index c34ac802d7..aca9176d93 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x4_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x4_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x8_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x8_pack16.ll index 9ab742b256..55cde9e312 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x8_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x8_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x8_pure.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x8_pure.ll index 81df00aa0d..308bc716e2 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x8_pure.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x8_pure.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x8_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x8_raw.ll index dd5d3272c5..4a7d5c03e3 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x8_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x256b_x8_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x128_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x128_pack16.ll index f5004d7eec..317dfdb6f0 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x128_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x128_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x128_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x128_raw.ll index e1ec32b843..ff7303ccdb 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x128_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x128_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x16_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x16_pack16.ll index df9630ce81..e5677b422c 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x16_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x16_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x16_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x16_raw.ll index 487016fb9e..9b8d2f289c 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x16_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x16_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x1_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x1_pack16.ll index a2f4d64155..4676f569c6 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x1_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x1_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x1_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x1_raw.ll index bc4e0e2ac3..a9af7e9405 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x1_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x1_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x2_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x2_pack16.ll index bbd3e580e1..585b749112 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x2_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x2_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x2_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x2_raw.ll index bb0d389d9a..6feff4c53f 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x2_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x2_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x32_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x32_pack16.ll index d0667cc8f9..8d1df4e14f 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x32_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x32_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x32_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x32_raw.ll index f99f2e4a3f..cb1344b744 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x32_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x32_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x4_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x4_pack16.ll index e437360b47..b3156bbfa7 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x4_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x4_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x4_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x4_raw.ll index 7ce40ebacc..43765d05aa 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x4_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x4_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x64_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x64_pack16.ll index 58922ab3ac..98c0dc36bc 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x64_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x64_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x64_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x64_raw.ll index e5857d1c49..19da042b59 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x64_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x64_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x8_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x8_pack16.ll index c6a858644f..c808cbe1c2 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x8_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x8_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x8_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x8_raw.ll index 02aded2143..6f9e60fae6 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x8_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x32bx2_x8_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x128_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x128_pack16.ll index 129f9a1b02..458b0c60d0 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x128_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x128_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x128_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x128_raw.ll index cb2aa05d35..b29a026770 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x128_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x128_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x16_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x16_pack16.ll index 739c94a49f..b04aeb978c 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x16_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x16_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x16_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x16_raw.ll index 30092d9329..aa5e2a2456 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x16_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x16_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x1_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x1_pack16.ll index 22f74e7e00..aaceff68a2 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x1_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x1_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x1_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x1_raw.ll index 85708c5c9d..ca21720327 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x1_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x1_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x2_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x2_pack16.ll index 26083d43b9..eca291e16d 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x2_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x2_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x2_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x2_raw.ll index 8dd2cf4abf..740b788af6 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x2_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x2_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x32_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x32_pack16.ll index a2f83f1a0c..3f86f5618e 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x32_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x32_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x32_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x32_raw.ll index 994e67924f..0fc443c5cf 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x32_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x32_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x4_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x4_pack16.ll index d44fa6b087..be7e4f4639 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x4_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x4_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x4_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x4_raw.ll index 144c911a3e..5be0fe4c2e 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x4_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x4_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x64_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x64_pack16.ll index 1ca50df11d..1f513138ed 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x64_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x64_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x64_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x64_raw.ll index afecd00345..754eadbf15 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x64_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x64_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x8_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x8_pack16.ll index 61fad5bbef..41f057f9c7 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x8_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x8_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x8_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x8_raw.ll index 3fb5ba3e2b..cde1a7f53a 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x8_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_16x64b_x8_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x128_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x128_pack16.ll index a61dedbb66..0cde35e2fd 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x128_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x128_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x128_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x128_raw.ll index 1c11df5a2c..60735a6db0 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x128_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x128_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x16_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x16_pack16.ll index e2014333d0..82fd897cc1 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x16_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x16_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x16_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x16_raw.ll index 3fb0ec5bc1..7be1cfa98d 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x16_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x16_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x1_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x1_pack16.ll index e18df1a366..ac8f00f097 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x1_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x1_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x1_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x1_raw.ll index ee2a5a3203..b6211fd089 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x1_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x1_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x2_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x2_pack16.ll index 7faec39773..dad73669c4 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x2_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x2_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x2_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x2_raw.ll index 22ea5a0f27..90571ff7b7 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x2_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x2_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x32_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x32_pack16.ll index cf437012ba..ff7e69014e 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x32_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x32_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x32_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x32_raw.ll index 19bf3b119f..5da95b5f0d 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x32_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x32_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x4_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x4_pack16.ll index 44039e92f5..288efd2ece 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x4_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x4_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x4_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x4_raw.ll index eb515fc8b9..16faf106f7 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x4_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x4_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x64_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x64_pack16.ll index edbdf13ca1..a30273212b 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x64_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x64_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x64_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x64_raw.ll index a8c525d28d..bcfd35d8c0 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x64_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x64_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x8_pack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x8_pack16.ll index f113f4dd87..f01ed8a293 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x8_pack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x8_pack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x8_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x8_raw.ll index 495b628f58..93c851a99b 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x8_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_ld_32x32b_x8_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_load_wait.ll b/cuda-oxide/intrinsics/probes/tcgen05_load_wait.ll index fb69be07ec..27d3ae4808 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_load_wait.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_load_wait.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_e2m1.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_e2m1.ll index cf6763c9e0..6344798faa 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_e2m3.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_e2m3.ll index 0274f26f2e..a3a9895d03 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_e3m2.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_e3m2.ll index a1313d841c..d2b1f904f4 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_e4m3.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_e4m3.ll index b2767f5049..dad597f3cb 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_e5m2.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_e5m2.ll index 4b472b47fa..311e6a1d15 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_f16.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_f16.ll index 52ecd12816..16f3cf118e 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_f16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_f16_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_f16_cg2.ll index f4a7b82511..0a26a20f0c 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_f16_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_f16_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_shared.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_shared.ll index b7f884affe..53f2e42ebb 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_shared.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_shared.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_sp_shared.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_sp_shared.ll index 0ad4ecff32..fc98268a7e 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_sp_shared.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_sp_shared.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_sp_tensor.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_sp_tensor.ll index 8203d49e3e..eecc6bcba7 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_sp_tensor.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_sp_tensor.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_sp_tensor_ashift.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_sp_tensor_ashift.ll index 2c4fb14751..e580edc099 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_sp_tensor_ashift.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_sp_tensor_ashift.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_tensor.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_tensor.ll index eded860115..e1946ecd29 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_tensor.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_tensor.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_tensor_ashift.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_tensor_ashift.ll index 60aee19101..ac085ee53d 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_tensor_ashift.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_tensor_ashift.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_bf16.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_bf16.ll index d834f87744..917fe7ea49 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_bf16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_bf16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e2m1.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e2m1.ll index d7e6c110b3..76be9bd469 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e2m1.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e2m1.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e2m3.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e2m3.ll index 585f5f8256..950bb56ef2 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e2m3.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e2m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e3m2.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e3m2.ll index a61c7e781d..d08a604efe 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e3m2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e3m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e4m3.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e4m3.ll index 06328ebddc..51a6b20e03 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e4m3.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e4m3.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e5m2.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e5m2.ll index 453a4400f5..83d6de961a 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e5m2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_e5m2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_f16.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_f16.ll index 0830ee71b9..e7e12444c3 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_f16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_f16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_shared.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_shared.ll index 4ba740b47c..65409f371c 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_shared.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_shared.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_shared_zero_col_mask.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_shared_zero_col_mask.ll index 89daaca550..68ae6a52df 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_shared_zero_col_mask.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_shared_zero_col_mask.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_shared.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_shared.ll index 1ca2c8fd56..71c2275fcc 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_shared.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_shared.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_shared_zero_col_mask.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_shared_zero_col_mask.ll index 81f9d74df7..73cc9bb1c3 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_shared_zero_col_mask.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_shared_zero_col_mask.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_tensor.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_tensor.ll index a9f314bdf0..ed72156054 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_tensor.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_tensor.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_tensor_zero_col_mask.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_tensor_zero_col_mask.ll index c4caab3f32..672d7d99ba 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_tensor_zero_col_mask.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_sp_tensor_zero_col_mask.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_tensor.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_tensor.ll index a3a67b9eaa..bd9fa594db 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_tensor.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_tensor.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_tensor_zero_col_mask.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_tensor_zero_col_mask.ll index 4b754dbff2..79f00a3060 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_tensor_zero_col_mask.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_tensor_zero_col_mask.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_tf32.ll b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_tf32.ll index 6d7ca94641..e5ff701454 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_tf32.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_mma_ws_tf32.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_relinquish_alloc_permit.ll b/cuda-oxide/intrinsics/probes/tcgen05_relinquish_alloc_permit.ll index 3df8a72079..a56a242b4b 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_relinquish_alloc_permit.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_relinquish_alloc_permit.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_relinquish_alloc_permit_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_relinquish_alloc_permit_cg2.ll index eecfaeaa50..881d3bb8e1 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_relinquish_alloc_permit_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_relinquish_alloc_permit_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_shift_down.ll b/cuda-oxide/intrinsics/probes/tcgen05_shift_down.ll index 713accf2a8..16a232e8f2 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_shift_down.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_shift_down.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_shift_down_cg2.ll b/cuda-oxide/intrinsics/probes/tcgen05_shift_down_cg2.ll index 7db95af060..51ed99213b 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_shift_down_cg2.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_shift_down_cg2.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x16_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x16_raw.ll index 0d63ee514f..c475bbbc42 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x16_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x16_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x16_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x16_unpack16.ll index 055b2e5f5e..5ea8e9eb88 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x16_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x16_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x1_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x1_raw.ll index 92817feebb..bf0430b59f 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x1_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x1_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x1_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x1_unpack16.ll index d3322f61f0..0350184924 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x1_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x1_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x2_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x2_raw.ll index 59e9134a25..33478bc68d 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x2_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x2_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x2_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x2_unpack16.ll index 1592457fe8..33b957c0c3 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x2_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x2_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x32_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x32_raw.ll index e80862b10d..46f410d506 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x32_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x32_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x32_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x32_unpack16.ll index 45d984229b..a4658e2055 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x32_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x32_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x4_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x4_raw.ll index f6ca308fee..934c9b1e6e 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x4_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x4_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x4_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x4_unpack16.ll index 969bbe8de7..064c4d7689 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x4_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x4_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x64_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x64_raw.ll index 54571f297c..efdee8b961 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x64_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x64_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x64_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x64_unpack16.ll index 313562cc81..cb7873d9dc 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x64_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x64_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x8_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x8_raw.ll index 85f31f5d6a..92dbf6bbe7 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x8_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x8_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x8_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x8_unpack16.ll index 4ec80ed980..fbdf109081 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x8_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x128b_x8_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x16_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x16_raw.ll index 658f757698..08804c0a68 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x16_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x16_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x16_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x16_unpack16.ll index 64a5ea94c6..00bec58ce5 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x16_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x16_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x1_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x1_raw.ll index d1e4fe9770..b73eea4c3c 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x1_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x1_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x1_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x1_unpack16.ll index a7d9b088d5..23223e82cf 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x1_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x1_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x2_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x2_raw.ll index cf73cb8727..d45d225a5f 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x2_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x2_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x2_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x2_unpack16.ll index cbe9be2559..d8d945c987 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x2_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x2_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x32_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x32_raw.ll index 609bdff490..be612833eb 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x32_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x32_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x32_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x32_unpack16.ll index afdaff5dda..85533d7044 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x32_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x32_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x4_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x4_raw.ll index 014de91e94..96541f452a 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x4_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x4_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x4_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x4_unpack16.ll index 2fc45b6780..a24b0bedd8 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x4_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x4_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x8_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x8_raw.ll index c5c4fa1e01..09b6fcbfd6 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x8_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x8_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x8_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x8_unpack16.ll index 14cb79ce4e..0f7b1d753e 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x8_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x256b_x8_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x128_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x128_raw.ll index b968c5c761..e1ff497f32 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x128_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x128_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x128_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x128_unpack16.ll index 82f0a22cb9..c01f7833c5 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x128_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x128_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x16_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x16_raw.ll index 3de5a95837..a360144f83 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x16_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x16_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x16_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x16_unpack16.ll index b66c80c7fd..3eeb8a7cdb 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x16_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x16_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x1_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x1_raw.ll index 02e7ad703a..8677ff79b5 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x1_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x1_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x1_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x1_unpack16.ll index 1b1b204cbe..18e3d8d08b 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x1_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x1_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x2_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x2_raw.ll index 8edf048540..9affd17d37 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x2_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x2_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x2_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x2_unpack16.ll index 471b185a28..9a82792645 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x2_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x2_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x32_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x32_raw.ll index f23ae3e603..c69bb5a98c 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x32_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x32_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x32_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x32_unpack16.ll index 8a2a0cf0af..4f1b330f45 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x32_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x32_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x4_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x4_raw.ll index 0329d34843..afad44c8ad 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x4_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x4_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x4_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x4_unpack16.ll index 38d6902580..001a4fc0a2 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x4_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x4_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x64_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x64_raw.ll index cb8ce56d7a..971718672e 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x64_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x64_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x64_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x64_unpack16.ll index 7e00dca015..a136b8e945 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x64_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x64_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x8_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x8_raw.ll index 7f458c3535..1c0396ebcf 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x8_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x8_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x8_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x8_unpack16.ll index 3ffc910677..9f39343219 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x8_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x32bx2_x8_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x128_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x128_raw.ll index 3436140a8a..a9fcb50c59 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x128_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x128_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x128_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x128_unpack16.ll index 77db391b45..c2f599249d 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x128_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x128_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x16_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x16_raw.ll index e37d9b9b1c..f036d7a010 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x16_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x16_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x16_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x16_unpack16.ll index e5ccaa24ce..da9def8177 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x16_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x16_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x1_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x1_raw.ll index 472585102c..7821f64a74 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x1_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x1_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x1_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x1_unpack16.ll index 879848d2e6..c33ea59213 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x1_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x1_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x2_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x2_raw.ll index d983a76065..7f2b8ac775 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x2_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x2_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x2_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x2_unpack16.ll index fbda37b1ed..02552eae39 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x2_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x2_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x32_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x32_raw.ll index 8ee4b64c62..94ce43d6e6 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x32_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x32_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x32_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x32_unpack16.ll index f4149c508a..5b5c25cae0 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x32_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x32_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x4_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x4_raw.ll index a3d1578fd9..8c223b62b1 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x4_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x4_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x4_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x4_unpack16.ll index 6711d0e8c7..a22638ca91 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x4_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x4_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x64_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x64_raw.ll index a5aac4f3e3..2d5cd43362 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x64_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x64_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x64_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x64_unpack16.ll index ea925d1a27..a4dfc1b3ba 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x64_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x64_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x8_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x8_raw.ll index be7843ea47..6dfbfb2dd6 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x8_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x8_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x8_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x8_unpack16.ll index a3ee88266f..1c17e65982 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x8_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_16x64b_x8_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x128_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x128_raw.ll index 7a799c5e40..2e8ea5eee3 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x128_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x128_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x128_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x128_unpack16.ll index 08052e13e4..51288dbae2 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x128_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x128_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x16_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x16_raw.ll index 857f1b9e6b..f6e9c32855 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x16_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x16_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x16_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x16_unpack16.ll index 3e1374de52..cf1969b8a3 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x16_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x16_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x1_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x1_raw.ll index dbadfaed70..a3227c515d 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x1_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x1_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x1_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x1_unpack16.ll index 5647fa55c9..b24b6f05b5 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x1_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x1_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x2_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x2_raw.ll index ee02fda8a4..0a6ad42975 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x2_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x2_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x2_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x2_unpack16.ll index e8cfe10cd6..e7219e2bf3 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x2_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x2_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x32_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x32_raw.ll index 3789a06d88..5de82d1c70 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x32_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x32_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x32_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x32_unpack16.ll index 0ad846869c..b7fd8869de 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x32_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x32_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x4_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x4_raw.ll index 73a0cee27b..a0750cd9e7 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x4_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x4_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x4_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x4_unpack16.ll index 8ef57a4fcb..4a94728266 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x4_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x4_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x64_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x64_raw.ll index 5d273cb1da..12b2225267 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x64_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x64_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x64_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x64_unpack16.ll index 53fd254771..be11f3d732 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x64_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x64_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x8_raw.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x8_raw.ll index e97dd1c613..bf51105f70 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x8_raw.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x8_raw.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x8_unpack16.ll b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x8_unpack16.ll index 8a0e3ba825..881fee32fd 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x8_unpack16.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_st_32x32b_x8_unpack16.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tcgen05_store_wait.ll b/cuda-oxide/intrinsics/probes/tcgen05_store_wait.ll index 1706cd71a9..5dd92a39b7 100644 --- a/cuda-oxide/intrinsics/probes/tcgen05_store_wait.ll +++ b/cuda-oxide/intrinsics/probes/tcgen05_store_wait.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tensormap_replace_box_dim.ll b/cuda-oxide/intrinsics/probes/tensormap_replace_box_dim.ll index f5028b581f..b040068a39 100644 --- a/cuda-oxide/intrinsics/probes/tensormap_replace_box_dim.ll +++ b/cuda-oxide/intrinsics/probes/tensormap_replace_box_dim.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tensormap_replace_element_stride.ll b/cuda-oxide/intrinsics/probes/tensormap_replace_element_stride.ll index cdd63a854b..0f57222616 100644 --- a/cuda-oxide/intrinsics/probes/tensormap_replace_element_stride.ll +++ b/cuda-oxide/intrinsics/probes/tensormap_replace_element_stride.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tensormap_replace_element_type.ll b/cuda-oxide/intrinsics/probes/tensormap_replace_element_type.ll index fe907c5c4d..b45c88ac67 100644 --- a/cuda-oxide/intrinsics/probes/tensormap_replace_element_type.ll +++ b/cuda-oxide/intrinsics/probes/tensormap_replace_element_type.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tensormap_replace_fill_mode.ll b/cuda-oxide/intrinsics/probes/tensormap_replace_fill_mode.ll index 7008233a74..5c1bdfc82b 100644 --- a/cuda-oxide/intrinsics/probes/tensormap_replace_fill_mode.ll +++ b/cuda-oxide/intrinsics/probes/tensormap_replace_fill_mode.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tensormap_replace_global_address.ll b/cuda-oxide/intrinsics/probes/tensormap_replace_global_address.ll index 20abbb9c63..310ffc3a42 100644 --- a/cuda-oxide/intrinsics/probes/tensormap_replace_global_address.ll +++ b/cuda-oxide/intrinsics/probes/tensormap_replace_global_address.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tensormap_replace_global_dim.ll b/cuda-oxide/intrinsics/probes/tensormap_replace_global_dim.ll index db3eb583f4..a09c5c87a5 100644 --- a/cuda-oxide/intrinsics/probes/tensormap_replace_global_dim.ll +++ b/cuda-oxide/intrinsics/probes/tensormap_replace_global_dim.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tensormap_replace_global_stride.ll b/cuda-oxide/intrinsics/probes/tensormap_replace_global_stride.ll index fa552ac52b..eea84b9522 100644 --- a/cuda-oxide/intrinsics/probes/tensormap_replace_global_stride.ll +++ b/cuda-oxide/intrinsics/probes/tensormap_replace_global_stride.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tensormap_replace_interleave_layout.ll b/cuda-oxide/intrinsics/probes/tensormap_replace_interleave_layout.ll index e8dc9d51f8..8a4adbb1d8 100644 --- a/cuda-oxide/intrinsics/probes/tensormap_replace_interleave_layout.ll +++ b/cuda-oxide/intrinsics/probes/tensormap_replace_interleave_layout.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tensormap_replace_rank.ll b/cuda-oxide/intrinsics/probes/tensormap_replace_rank.ll index 3ebec54a31..92126490fd 100644 --- a/cuda-oxide/intrinsics/probes/tensormap_replace_rank.ll +++ b/cuda-oxide/intrinsics/probes/tensormap_replace_rank.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tensormap_replace_swizzle_atomicity.ll b/cuda-oxide/intrinsics/probes/tensormap_replace_swizzle_atomicity.ll index 7ebf6b1b8a..d5ec2bbafc 100644 --- a/cuda-oxide/intrinsics/probes/tensormap_replace_swizzle_atomicity.ll +++ b/cuda-oxide/intrinsics/probes/tensormap_replace_swizzle_atomicity.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/tensormap_replace_swizzle_mode.ll b/cuda-oxide/intrinsics/probes/tensormap_replace_swizzle_mode.ll index f435999f86..eebc6f7f2a 100644 --- a/cuda-oxide/intrinsics/probes/tensormap_replace_swizzle_mode.ll +++ b/cuda-oxide/intrinsics/probes/tensormap_replace_swizzle_mode.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/thread_idx_x.ll b/cuda-oxide/intrinsics/probes/thread_idx_x.ll index 51853746c6..1b12b57733 100644 --- a/cuda-oxide/intrinsics/probes/thread_idx_x.ll +++ b/cuda-oxide/intrinsics/probes/thread_idx_x.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/thread_idx_y.ll b/cuda-oxide/intrinsics/probes/thread_idx_y.ll index 54f665f285..47015418b7 100644 --- a/cuda-oxide/intrinsics/probes/thread_idx_y.ll +++ b/cuda-oxide/intrinsics/probes/thread_idx_y.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/thread_idx_z.ll b/cuda-oxide/intrinsics/probes/thread_idx_z.ll index d5f4cb3d8a..d940ca248d 100644 --- a/cuda-oxide/intrinsics/probes/thread_idx_z.ll +++ b/cuda-oxide/intrinsics/probes/thread_idx_z.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/threadfence.ll b/cuda-oxide/intrinsics/probes/threadfence.ll index 9e1a0b0c56..3f5937f8bf 100644 --- a/cuda-oxide/intrinsics/probes/threadfence.ll +++ b/cuda-oxide/intrinsics/probes/threadfence.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/threadfence_block.ll b/cuda-oxide/intrinsics/probes/threadfence_block.ll index ed087300c8..50eb0199de 100644 --- a/cuda-oxide/intrinsics/probes/threadfence_block.ll +++ b/cuda-oxide/intrinsics/probes/threadfence_block.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/threadfence_system.ll b/cuda-oxide/intrinsics/probes/threadfence_system.ll index b377c3120d..0ecd74141b 100644 --- a/cuda-oxide/intrinsics/probes/threadfence_system.ll +++ b/cuda-oxide/intrinsics/probes/threadfence_system.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/total_smem_size.lib_nvvm.ll b/cuda-oxide/intrinsics/probes/total_smem_size.lib_nvvm.ll index df96a5c76a..fd398e736b 100644 --- a/cuda-oxide/intrinsics/probes/total_smem_size.lib_nvvm.ll +++ b/cuda-oxide/intrinsics/probes/total_smem_size.lib_nvvm.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/total_smem_size.llvm_nvptx.ll b/cuda-oxide/intrinsics/probes/total_smem_size.llvm_nvptx.ll index c14ddf64e1..4b090bd4ec 100644 --- a/cuda-oxide/intrinsics/probes/total_smem_size.llvm_nvptx.ll +++ b/cuda-oxide/intrinsics/probes/total_smem_size.llvm_nvptx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/trap.ll b/cuda-oxide/intrinsics/probes/trap.ll index 13503b069b..e672afa5ee 100644 --- a/cuda-oxide/intrinsics/probes/trap.ll +++ b/cuda-oxide/intrinsics/probes/trap.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/uni_sync.ll b/cuda-oxide/intrinsics/probes/uni_sync.ll index 119a45810a..e4389d043d 100644 --- a/cuda-oxide/intrinsics/probes/uni_sync.ll +++ b/cuda-oxide/intrinsics/probes/uni_sync.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/warpid.lib_nvvm.ll b/cuda-oxide/intrinsics/probes/warpid.lib_nvvm.ll index 8db1f3593b..48dbbe9784 100644 --- a/cuda-oxide/intrinsics/probes/warpid.lib_nvvm.ll +++ b/cuda-oxide/intrinsics/probes/warpid.lib_nvvm.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/warpid.llvm_nvptx.ll b/cuda-oxide/intrinsics/probes/warpid.llvm_nvptx.ll index 571de6d35d..0493507059 100644 --- a/cuda-oxide/intrinsics/probes/warpid.llvm_nvptx.ll +++ b/cuda-oxide/intrinsics/probes/warpid.llvm_nvptx.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/wgmma_commit_group.ll b/cuda-oxide/intrinsics/probes/wgmma_commit_group.ll index 3431fa8aa0..39c501b5c1 100644 --- a/cuda-oxide/intrinsics/probes/wgmma_commit_group.ll +++ b/cuda-oxide/intrinsics/probes/wgmma_commit_group.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/wgmma_fence.ll b/cuda-oxide/intrinsics/probes/wgmma_fence.ll index e64f4346ca..2d21458e04 100644 --- a/cuda-oxide/intrinsics/probes/wgmma_fence.ll +++ b/cuda-oxide/intrinsics/probes/wgmma_fence.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/intrinsics/probes/wgmma_wait_group.ll b/cuda-oxide/intrinsics/probes/wgmma_wait_group.ll index a64988f83e..5c13039f38 100644 --- a/cuda-oxide/intrinsics/probes/wgmma_wait_group.ll +++ b/cuda-oxide/intrinsics/probes/wgmma_wait_group.ll @@ -1,7 +1,7 @@ ; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ; SPDX-License-Identifier: Apache-2.0 ; @generated by cuda-intrinsics-gen 0.1.0. DO NOT EDIT. -; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 63f8d327315cc3c3753b458364b3dafc962f63eb205b2eca77bff5f2e1f7faf4. +; Catalog schema/version: 46/0.1.0; intrinsic ABI: v1; catalog SHA-256: 6169c166676ff02acc88889da79c8f21681e29146c6c9ed6da50611cd6575572. ; LLVM source: aab11ee0ea5ea9a1d462ad0bc1fae9d9bb643019. target triple = "nvptx64-nvidia-cuda" diff --git a/cuda-oxide/scripts/probe_scalar_llvm_floors.py b/cuda-oxide/scripts/probe_scalar_llvm_floors.py new file mode 100644 index 0000000000..be5f4a625a --- /dev/null +++ b/cuda-oxide/scripts/probe_scalar_llvm_floors.py @@ -0,0 +1,123 @@ +# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-FileCopyrightText: Copyright (c) 2026 ssoj13 +# SPDX-License-Identifier: Apache-2.0 +# Adapted from cuda-intrinsics-gen's licensed probe contracts; retains their attribution. +from pathlib import Path +import json +import hashlib +import subprocess +import re +import argparse +import tomllib + +parser = argparse.ArgumentParser( + description="Reproduce scalar arithmetic LLVM floor evidence" +) +parser.add_argument("--llc", type=Path, required=True) +parser.add_argument("--ptxas", type=Path, required=True) +parser.add_argument("--out", type=Path, required=True) +args = parser.parse_args() +root = Path(__file__).resolve().parents[1] +out = args.out +out.mkdir(parents=True, exist_ok=True) +llc = args.llc +ptxas = args.ptxas + + +def run(args): + r = subprocess.run(list(map(str, args)), capture_output=True, text=True) + if r.returncode: + raise RuntimeError(f"{args}: {r.stdout}\n{r.stderr}") + return r.stdout + r.stderr + + +def digest(p): + return hashlib.sha256(p.read_bytes()).hexdigest() + + +catalog = json.loads((root / "intrinsics/catalog.json").read_text(encoding="utf-8")) +records = [r for r in catalog["intrinsics"] if r["family"] == "scalar_arithmetic"] +assert len(records) == 64 +capture_root = root / "intrinsics/evidence/scalar-arithmetic-sm20-20261013" +inputs = { + r["id"]: r + for r in map( + json.loads, + (capture_root / "inputs.jsonl").read_text(encoding="utf-8").splitlines(), + ) +} +saved = json.loads((capture_root / "captures.json").read_text(encoding="utf-8")) +expected_input = {r["id"]: r["input_sha256"] for r in saved["captures"]} +input_dir = out / "inputs" +input_dir.mkdir(exist_ok=True) +proof = { + "llvm_source": tomllib.loads( + (root / "intrinsics/upstream.lock").read_text(encoding="utf-8") + )["llvm"]["revision"], + "llc": { + "path": str(llc), + "version": run([llc, "--version"]), + "sha256": digest(llc), + }, + "ptxas": { + "path": str(ptxas), + "version": run([ptxas, "--version"]), + "sha256": digest(ptxas), + }, + "captures": [], +} +for r in records: + source = input_dir / f"{r['id']}.ll" + text = inputs[r["id"]]["probe_source"] + candidates = [text.encode("utf-8"), text.replace("\n", "\r\n").encode("utf-8")] + data = next( + b + for b in candidates + if hashlib.sha256(b).hexdigest() == expected_input[r["id"]] + ) + source.write_bytes(data) + instruction = ( + r["expected_ptx"]["mnemonic"] + "." + ".".join(r["expected_ptx"]["modifiers"]) + ) + for arch, feature, terminal in [ + ("sm_20", "+ptx32", "sm_75"), + ("sm_75", "+ptx63", "sm_75"), + ("sm_80", "+ptx70", "sm_80"), + ]: + stem = out / f"{r['id']}-{arch}" + ptx = stem.with_suffix(".ptx") + cubin = stem.with_suffix(".cubin") + run( + [ + llc, + source, + "-march=nvptx64", + f"-mcpu={arch}", + f"-mattr={feature}", + "-o", + ptx, + ] + ) + text = ptx.read_text(encoding="utf-8") + assert len(re.findall(r"\b" + re.escape(instruction) + r"\s", text)) == 1, ( + r["id"], + arch, + instruction, + ) + assert ".extern .func" not in text, (r["id"], arch, "unresolved extern") + run([ptxas, f"-arch={terminal}", ptx, "-o", cubin]) + proof["captures"].append( + { + "id": r["id"], + "codegen_gpu": arch, + "ptx_feature": feature, + "terminal_gpu": terminal, + "input_sha256": digest(source), + "ptx_sha256": digest(ptx), + "cubin_sha256": digest(cubin), + "instruction": instruction, + } + ) + print(r["id"], "3 codegen/assembly targets passed", flush=True) +(out / "proof.json").write_text(json.dumps(proof, indent=2) + "\n") +print(f"All {len(proof['captures'])} captures passed", flush=True) diff --git a/cuda-oxide/scripts/probe_scalar_nvvm_floors.py b/cuda-oxide/scripts/probe_scalar_nvvm_floors.py new file mode 100644 index 0000000000..8dcc271920 --- /dev/null +++ b/cuda-oxide/scripts/probe_scalar_nvvm_floors.py @@ -0,0 +1,247 @@ +# SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-FileCopyrightText: Copyright (c) 2026 ssoj13 +# SPDX-License-Identifier: Apache-2.0 +# Adapted from the licensed scalar catalog and libnvvm-sys fixtures; retains their attribution. +from pathlib import Path +import ctypes as C +import os +import json +import re +import hashlib +import subprocess +import struct +import argparse + +parser = argparse.ArgumentParser( + description="Reproduce scalar arithmetic CUDA 13.3 libNVVM floor evidence" +) +parser.add_argument("--libnvvm", type=Path, required=True) +parser.add_argument("--nvjitlink", type=Path, required=True) +parser.add_argument("--ptxas", type=Path, required=True) +parser.add_argument("--out", type=Path, required=True) +args = parser.parse_args() +out = args.out +out.mkdir(parents=True, exist_ok=True) +nv_path = args.libnvvm +link_path = args.nvjitlink +directories = [] +if hasattr(os, "add_dll_directory"): + for directory in {nv_path.parent, link_path.parent}: + directories.append(os.add_dll_directory(str(directory))) +nv = C.CDLL(str(nv_path)) +link = C.CDLL(str(link_path)) + + +def function(lib, name, args): + f = getattr(lib, name) + f.argtypes = args + f.restype = C.c_int + return f + + +ptr = C.c_void_p +size = C.c_size_t +uint = C.c_uint +chars = C.POINTER(C.c_char_p) +new = function(nv, "nvvmCreateProgram", [C.POINTER(ptr)]) +destroy = function(nv, "nvvmDestroyProgram", [C.POINTER(ptr)]) +add = function(nv, "nvvmAddModuleToProgram", [ptr, ptr, size, C.c_char_p]) +compile_program = function(nv, "nvvmCompileProgram", [ptr, C.c_int, chars]) +get_size = function(nv, "nvvmGetCompiledResultSize", [ptr, C.POINTER(size)]) +get_result = function(nv, "nvvmGetCompiledResult", [ptr, ptr]) +log_size = function(nv, "nvvmGetProgramLogSize", [ptr, C.POINTER(size)]) +get_log = function(nv, "nvvmGetProgramLog", [ptr, ptr]) +version = function(nv, "nvvmLLVMVersion", [C.c_char_p, C.POINTER(C.c_int)]) +architectures = [] +for arch in [70, 72, 75, 80]: + v = C.c_int() + result = version(f"compute_{arch}".encode(), C.byref(v)) + print("architecture", arch, "status", result, "LLVM", v.value, flush=True) + architectures.append({"compute": arch, "status": result, "llvm": v.value}) + assert (result == 0) == (arch >= 75) +ir_version = function(nv, "nvvmIRVersion", [C.POINTER(C.c_int)] * 4) +ir_values = [C.c_int() for _ in range(4)] +assert ir_version(*map(C.byref, ir_values)) == 0 +root = Path(__file__).resolve().parents[1] +records = [ + r + for r in json.loads((root / "intrinsics/catalog.json").read_text(encoding="utf-8"))[ + "intrinsics" + ] + if r["family"] == "scalar_arithmetic" +] +assert len(records) == 64 +parts = [ + "; SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.\n", + "; SPDX-FileCopyrightText: Copyright (c) 2026 ssoj13\n", + "; SPDX-License-Identifier: Apache-2.0\n", + 'target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-i128:128:128-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"\n', + 'target triple = "nvptx64-nvidia-cuda"\n', +] +annotations = [] +used = [] +for i, r in enumerate(records): + typ = {"f32": "float", "f64": "double"}[r["scalar_arithmetic"]["format"]] + count = len(r["llvm"]["arguments"]) + register = "f" if typ == "float" else "d" + params = ", ".join( + [f"{typ} addrspace(1)* %out"] + [f"{typ} %a{j}" for j in range(count)] + ) + opcode = ( + r["expected_ptx"]["mnemonic"] + "." + ".".join(r["expected_ptx"]["modifiers"]) + ) + asm = opcode + " " + ", ".join(f"${j}" for j in range(count + 1)) + ";" + constraint = ",".join(["=" + register] + [register] * count) + inputs = ", ".join(f"{typ} %a{j}" for j in range(count)) + parts.append( + f'define void @probe_{r["id"]}({params}) {{\n %value = call {typ} asm "{asm}", "{constraint}"({inputs})\n store {typ} %value, {typ} addrspace(1)* %out\n ret void\n}}\n' + ) + signature = ", ".join([f"{typ} addrspace(1)*"] + [typ] * count) + annotations.append( + f'!{i} = !{{void ({signature})* @probe_{r["id"]}, !"kernel", i32 1}}\n' + ) + used.append(f"i8* bitcast (void ({signature})* @probe_{r['id']} to i8*)") +parts.append( + "@llvm.used = appending global [64 x i8*] [" + + ", ".join(used) + + '], section "llvm.metadata"\n' +) +parts.append("!nvvm.annotations = !{" + ", ".join(f"!{i}" for i in range(64)) + "}\n") +parts += annotations +parts.append("!nvvmir.version = !{!64}\n!64 = !{i32 2, i32 0, i32 3, i32 2}\n") +source = "".join(parts).encode() +(out / "scalar.ll").write_bytes(source) + + +def nvvm_compile(options): + p = ptr() + assert new(C.byref(p)) == 0 + try: + data = C.create_string_buffer(source) + assert add(p, data, len(source), b"scalar.ll") == 0 + opts = (C.c_char_p * len(options))(*[o.encode() for o in options]) + status = compile_program(p, len(options), opts) + n = size() + log_size(p, C.byref(n)) + log = C.create_string_buffer(n.value or 1) + get_log(p, log) + if status: + raise RuntimeError( + f"nvvm status {status}: {log.value.decode(errors='replace')}" + ) + assert get_size(p, C.byref(n)) == 0 + result = C.create_string_buffer(n.value) + assert get_result(p, result) == 0 + return result.raw + finally: + destroy(C.byref(p)) + + +ptx = nvvm_compile(["-arch=compute_75"]) +(out / "scalar.ptx").write_bytes(ptx.rstrip(b"\0")) +text = ptx.decode(errors="replace") +for r in records: + opcode = ( + r["expected_ptx"]["mnemonic"] + "." + ".".join(r["expected_ptx"]["modifiers"]) + ) + assert len(re.findall(r"\b" + re.escape(opcode) + r"\s", text)) == 1, r["id"] +ptxas = args.ptxas +subprocess.run( + [ + str(ptxas), + "-arch=sm_75", + str(out / "scalar.ptx"), + "-o", + str(out / "scalar.cubin"), + ], + check=True, +) +lto = nvvm_compile(["-arch=compute_75", "-gen-lto"]) +(out / "scalar.ltoir").write_bytes(lto) + + +def linker(name, args): + return function(link, "__" + name + "_13_3", args) + + +link_new = linker("nvJitLinkCreate", [C.POINTER(ptr), uint, chars]) +link_add = linker("nvJitLinkAddData", [ptr, C.c_int, ptr, size, C.c_char_p]) +link_complete = linker("nvJitLinkComplete", [ptr]) +linked_size = linker("nvJitLinkGetLinkedCubinSize", [ptr, C.POINTER(size)]) +linked_result = linker("nvJitLinkGetLinkedCubin", [ptr, ptr]) +link_destroy = linker("nvJitLinkDestroy", [C.POINTER(ptr)]) +h = ptr() +options = (C.c_char_p * 2)(b"-arch=sm_75", b"-lto") +assert link_new(C.byref(h), 2, options) == 0 +try: + lto_buffer = C.create_string_buffer(lto) + assert link_add(h, 3, lto_buffer, len(lto), b"scalar.ltoir") == 0 + status = link_complete(h) + if status: + ls = linker("nvJitLinkGetErrorLogSize", [ptr, C.POINTER(size)]) + lr = linker("nvJitLinkGetErrorLog", [ptr, ptr]) + n = size() + ls(h, C.byref(n)) + buf = C.create_string_buffer(n.value or 1) + lr(h, buf) + raise RuntimeError( + f"link status {status}: {buf.value.decode(errors='replace')}" + ) + n = size() + assert linked_size(h, C.byref(n)) == 0 + buf = C.create_string_buffer(n.value) + assert linked_result(h, buf) == 0 + (out / "linked.cubin").write_bytes(buf.raw) +finally: + link_destroy(C.byref(h)) + + +def entries(file): + data = file.read_bytes() + assert data[:6] == b"\x7fELF\x02\x01" + offset = struct.unpack_from("