Handling fan-in in timeloop v0.4

[SylvanBrocard]

Hi, I'm trying to understand how to handle fan-in in timeloop v0.4.
Let's say you're trying to model an architecture like: DRAM => SRAM banks (x8) => crossbar => PE (x2).
Because of the way spatial fanout works in the timeloop yaml files, if I fan out the SRAM banks with spatial: {meshX: 8}, there will also be 8 crossbars and 16 PEs.
I tried performing the fanout in a sub-hierarchy, but that doesn't work, the fanout is propagated anyway to the outer hierarchy. Something like

- !Component
 name: DRAM
 ...

- !Hierarchical
  nodes:
  - !Container
    name: banks_fanout
    spatial: {meshX: 8}

  - !Component
    name: SRAM
    ...

- !Component
  name: crossbar
  ...

- !Component
  name: PE
  ...

It seems to me older versions supported that scenario with syntax like

local:
- name: SRAM_bank[0..7]
  ...

- name: crossbar
  ...
 
- name: PE[0..1]
  ...

Now, in the current v0.4 version, I'm aware the simple_pim example solves this by having the SRAM be a single component with n_banks: 32.
arch_spec_examples/simple_pim/arch.yaml
However, what if you want your banks to be something more complex? Like a DRAM bank connected to a SRAM smartbuffer?

So my questions are: is there a syntax to express that fan-in, and if not, is it just a limitation of the yaml DSL, or is that not supported by the Timeloop model overall?

[tanner-andrulis]

Unfortunately, there's currently no way to support fan-in in the model. In the older versions, as you've pointed out, we could do something that appeared like fan-in, but under the hood the model would treat the SRAM banks as a single component.

The recommended way to handle fan-in is by grouping your multiple components into a single component, such as in the simple_pim example. The setup is described in the CiMLoop paper section III.B.