[Design Review] [EPS]: EPS v2 PCB Layout Design

[FerretCode]

Subsystem

EPS

Type of work

Layout

Target start date

2026-07-15

Reviewer(s) requested

@OSUSat/osusat-reviewers

What you're about to build

Perform layout and manufacturing preparation for the EPS v2 PCB.

Which requirement(s) does this satisfy?

EPS Subsystem Info - Next steps (v2r1): Design EPS v2 PCB layout.

Pre-work checklist

• Relevant subsystem information doc section (mission context, electrical requirements, part tradeoffs) exists and covers this work
• (Hardware) Relevant part(s) selected with a documented tradeoff, or reusing an already-approved part
• (Hardware) Derating requirements for any new part identified before layout begins
• (Hardware) If this touches envelope, mass, power architecture, RBF, deployment switches, or RF: CDS-compliance checklist reviewed
• (Firmware) Interface sketched out and classified into Question/Command/Loop per the event-driven refactor guideline
• (Firmware) Proposed event UID(s) checked against the existing UID registry for collisions
• Known open questions or risks are listed below

Open questions / risks

What are the thermal considerations for the battery pack and regulators?