diff --git a/Lab9/Lab9.sim/sim_1/behav/xsim/TB_NanoProcessor_behav.wdb b/Lab9/Lab9.sim/sim_1/behav/xsim/TB_NanoProcessor_behav.wdb index 11a935f..a9e8d8b 100644 Binary files a/Lab9/Lab9.sim/sim_1/behav/xsim/TB_NanoProcessor_behav.wdb and b/Lab9/Lab9.sim/sim_1/behav/xsim/TB_NanoProcessor_behav.wdb differ diff --git a/Lab9/Lab9.sim/sim_1/behav/xsim/compile.bat b/Lab9/Lab9.sim/sim_1/behav/xsim/compile.bat index d28a588..9537836 100644 --- a/Lab9/Lab9.sim/sim_1/behav/xsim/compile.bat +++ b/Lab9/Lab9.sim/sim_1/behav/xsim/compile.bat @@ -6,7 +6,7 @@ REM Filename : compile.bat REM Simulator : Xilinx Vivado Simulator REM Description : Script for compiling the simulation design source files REM -REM Generated by Vivado on Thu Jun 15 10:56:22 +0530 2023 +REM Generated by Vivado on Thu Jun 15 14:34:10 +0530 2023 REM SW Build 2258646 on Thu Jun 14 20:03:12 MDT 2018 REM REM Copyright 1986-2018 Xilinx, Inc. All Rights Reserved. diff --git a/Lab9/Lab9.sim/sim_1/behav/xsim/elaborate.bat b/Lab9/Lab9.sim/sim_1/behav/xsim/elaborate.bat index 366ee4c..93af5ed 100644 --- a/Lab9/Lab9.sim/sim_1/behav/xsim/elaborate.bat +++ b/Lab9/Lab9.sim/sim_1/behav/xsim/elaborate.bat @@ -6,7 +6,7 @@ REM Filename : elaborate.bat REM Simulator : Xilinx Vivado Simulator REM Description : Script for elaborating the compiled design REM -REM Generated by Vivado on Thu Jun 15 10:56:24 +0530 2023 +REM Generated by Vivado on Thu Jun 15 14:34:12 +0530 2023 REM SW Build 2258646 on Thu Jun 14 20:03:12 MDT 2018 REM REM Copyright 1986-2018 Xilinx, Inc. All Rights Reserved. diff --git a/Lab9/Lab9.sim/sim_1/behav/xsim/simulate.bat b/Lab9/Lab9.sim/sim_1/behav/xsim/simulate.bat index ff0359e..d910166 100644 --- a/Lab9/Lab9.sim/sim_1/behav/xsim/simulate.bat +++ b/Lab9/Lab9.sim/sim_1/behav/xsim/simulate.bat @@ -6,7 +6,7 @@ REM Filename : simulate.bat REM Simulator : Xilinx Vivado Simulator REM Description : Script for simulating the design by launching the simulator REM -REM Generated by Vivado on Thu Jun 15 10:56:26 +0530 2023 +REM Generated by Vivado on Thu Jun 15 14:34:14 +0530 2023 REM SW Build 2258646 on Thu Jun 14 20:03:12 MDT 2018 REM REM Copyright 1986-2018 Xilinx, Inc. All Rights Reserved. diff --git a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/obj/xsim_0.win64.obj b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/obj/xsim_0.win64.obj index 4ffa0a4..4fa6f30 100644 Binary files a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/obj/xsim_0.win64.obj and b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/obj/xsim_0.win64.obj differ diff --git a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/webtalk/.xsim_webtallk.info b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/webtalk/.xsim_webtallk.info index df1fabb..0bb7366 100644 --- a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/webtalk/.xsim_webtallk.info +++ b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/webtalk/.xsim_webtallk.info @@ -1,5 +1,5 @@ 1686806304 1686806426 -42 +45 1 c036f6d3b11b46258ae2394c8cc98222 diff --git a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/webtalk/xsim_webtalk.tcl b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/webtalk/xsim_webtalk.tcl index 9eacafe..2131075 100644 --- a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/webtalk/xsim_webtalk.tcl +++ b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/webtalk/xsim_webtalk.tcl @@ -1,6 +1,6 @@ webtalk_init -webtalk_dir D:/projects/NanoProcessor-Team-93/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/webtalk/ webtalk_register_client -client project -webtalk_add_data -client project -key date_generated -value "Thu Jun 15 10:56:26 2023" -context "software_version_and_target_device" +webtalk_add_data -client project -key date_generated -value "Thu Jun 15 14:38:25 2023" -context "software_version_and_target_device" webtalk_add_data -client project -key product_version -value "XSIM v2018.2 (64-bit)" -context "software_version_and_target_device" webtalk_add_data -client project -key build_version -value "2258646" -context "software_version_and_target_device" webtalk_add_data -client project -key os_platform -value "WIN64" -context "software_version_and_target_device" @@ -14,7 +14,7 @@ webtalk_add_data -client project -key target_package -value "not_applicable" -co webtalk_add_data -client project -key target_speed -value "not_applicable" -context "software_version_and_target_device" webtalk_add_data -client project -key random_id -value "91ea39e5fcfc55108cea2d38c5723418" -context "software_version_and_target_device" webtalk_add_data -client project -key project_id -value "c036f6d3b11b46258ae2394c8cc98222" -context "software_version_and_target_device" -webtalk_add_data -client project -key project_iteration -value "41" -context "software_version_and_target_device" +webtalk_add_data -client project -key project_iteration -value "44" -context "software_version_and_target_device" webtalk_add_data -client project -key os_name -value "Microsoft Windows 8 or later , 64-bit" -context "user_environment" webtalk_add_data -client project -key os_release -value "major release (build 9200)" -context "user_environment" webtalk_add_data -client project -key cpu_name -value "11th Gen Intel(R) Core(TM) i7-1165G7 @ 2.80GHz" -context "user_environment" @@ -22,21 +22,11 @@ webtalk_add_data -client project -key cpu_speed -value "1690 MHz" -context "user webtalk_add_data -client project -key total_processors -value "1" -context "user_environment" webtalk_add_data -client project -key system_ram -value "8.000 GB" -context "user_environment" webtalk_register_client -client xsim -webtalk_add_data -client xsim -key File_Counter -value "25" -context "xsim\\command_line_options" -webtalk_add_data -client xsim -key Command -value "xelab" -context "xsim\\command_line_options" -webtalk_add_data -client xsim -key Vhdl2008 -value "false" -context "xsim\\command_line_options" -webtalk_add_data -client xsim -key GenDLL -value "false" -context "xsim\\command_line_options" -webtalk_add_data -client xsim -key SDFModeling -value "false" -context "xsim\\command_line_options" -webtalk_add_data -client xsim -key HWCosim -value "false" -context "xsim\\command_line_options" -webtalk_add_data -client xsim -key DPI_Used -value "false" -context "xsim\\command_line_options" -webtalk_add_data -client xsim -key Debug -value "typical" -context "xsim\\command_line_options" -webtalk_add_data -client xsim -key Simulation_Image_Code -value "126 KB" -context "xsim\\usage" -webtalk_add_data -client xsim -key Simulation_Image_Data -value "10 KB" -context "xsim\\usage" -webtalk_add_data -client xsim -key Total_Nets -value "0" -context "xsim\\usage" -webtalk_add_data -client xsim -key Total_Processes -value "180" -context "xsim\\usage" -webtalk_add_data -client xsim -key Total_Instances -value "58" -context "xsim\\usage" -webtalk_add_data -client xsim -key Xilinx_HDL_Libraries_Used -value "secureip " -context "xsim\\usage" -webtalk_add_data -client xsim -key Compiler_Time -value "0.22_sec" -context "xsim\\usage" -webtalk_add_data -client xsim -key Compiler_Memory -value "53468_KB" -context "xsim\\usage" -webtalk_transmit -clientid 2677486177 -regid "" -xml D:/projects/NanoProcessor-Team-93/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/webtalk/usage_statistics_ext_xsim.xml -html D:/projects/NanoProcessor-Team-93/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/webtalk/usage_statistics_ext_xsim.html -wdm D:/projects/NanoProcessor-Team-93/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/webtalk/usage_statistics_ext_xsim.wdm -intro "

XSIM Usage Report


" +webtalk_add_data -client xsim -key Command -value "xsim" -context "xsim\\command_line_options" +webtalk_add_data -client xsim -key trace_waveform -value "true" -context "xsim\\usage" +webtalk_add_data -client xsim -key runtime -value "1 us" -context "xsim\\usage" +webtalk_add_data -client xsim -key iteration -value "3" -context "xsim\\usage" +webtalk_add_data -client xsim -key Simulation_Time -value "0.00_sec" -context "xsim\\usage" +webtalk_add_data -client xsim -key Simulation_Memory -value "7332_KB" -context "xsim\\usage" +webtalk_transmit -clientid 4131901873 -regid "" -xml D:/projects/NanoProcessor-Team-93/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/webtalk/usage_statistics_ext_xsim.xml -html D:/projects/NanoProcessor-Team-93/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/webtalk/usage_statistics_ext_xsim.html -wdm D:/projects/NanoProcessor-Team-93/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/webtalk/usage_statistics_ext_xsim.wdm -intro "

XSIM Usage Report


" webtalk_terminate diff --git a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsim.dbg b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsim.dbg index 5d8bcfc..6356c54 100644 Binary files a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsim.dbg and b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsim.dbg differ diff --git a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsim.mem b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsim.mem index aa9c7f0..5eb4788 100644 Binary files a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsim.mem and b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsim.mem differ diff --git a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsim.rlx b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsim.rlx index 0585574..46b35bc 100644 --- a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsim.rlx +++ b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsim.rlx @@ -1,6 +1,6 @@ { - crc : 7179170433809754358 , + crc : 7179170434661855856 , ccp_crc : 0 , cmdline : " -wto c036f6d3b11b46258ae2394c8cc98222 --incr --debug typical --relax --mt 2 -L xil_defaultlib -L secureip --snapshot TB_NanoProcessor_behav xil_defaultlib.TB_NanoProcessor" , buildDate : "Jun 14 2018" , diff --git a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsim.rtti b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsim.rtti index 64d3d2c..48bdb7b 100644 Binary files a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsim.rtti and b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsim.rtti differ diff --git a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsim.type b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsim.type index 136bc93..d280775 100644 Binary files a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsim.type and b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsim.type differ diff --git a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsim.xdbg b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsim.xdbg index 3e9b6a3..1280084 100644 Binary files a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsim.xdbg and b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsim.xdbg differ diff --git a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsimk.exe b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsimk.exe index 3bdb4cc..b2d2740 100644 Binary files a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsimk.exe and b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/TB_NanoProcessor_behav/xsimk.exe differ diff --git a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/instruction_decoder.vdb b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/instruction_decoder.vdb index 8b5ddba..1ecb34c 100644 Binary files a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/instruction_decoder.vdb and b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/instruction_decoder.vdb differ diff --git a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/lut_16_7.vdb b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/lut_16_7.vdb index adb7bb6..82ec3d3 100644 Binary files a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/lut_16_7.vdb and b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/lut_16_7.vdb differ diff --git a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/rom.vdb b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/rom.vdb index a062bd0..c7ae101 100644 Binary files a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/rom.vdb and b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/rom.vdb differ diff --git a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/slow_clk.vdb b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/slow_clk.vdb index eb01ceb..5765e2d 100644 Binary files a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/slow_clk.vdb and b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/slow_clk.vdb differ diff --git a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx index 4976506..5ba050b 100644 --- a/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx +++ b/Lab9/Lab9.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx @@ -10,16 +10,16 @@ D:/projects/NanoProcessor-Team-93/Lab9/Lab9.srcs/sources_1/new/Decoder_2_to_4.vh D:/projects/NanoProcessor-Team-93/Lab9/Lab9.srcs/sources_1/new/Decoder_3_to_8.vhd,1686232567,vhdl,,,,decoder_3_to_8,,,,,,,, D:/projects/NanoProcessor-Team-93/Lab9/Lab9.srcs/sources_1/new/FA.vhd,1686232567,vhdl,,,,fa,,,,,,,, D:/projects/NanoProcessor-Team-93/Lab9/Lab9.srcs/sources_1/new/HA.vhd,1686232567,vhdl,,,,ha,,,,,,,, -D:/projects/NanoProcessor-Team-93/Lab9/Lab9.srcs/sources_1/new/Instruction_decoder.vhd,1686806263,vhdl,,,,instruction_decoder,,,,,,,, -D:/projects/NanoProcessor-Team-93/Lab9/Lab9.srcs/sources_1/new/LUT_16_7.vhd,1686806695,vhdl,,,,lut_16_7,,,,,,,, +D:/projects/NanoProcessor-Team-93/Lab9/Lab9.srcs/sources_1/new/Instruction_decoder.vhd,1686819780,vhdl,,,,instruction_decoder,,,,,,,, +D:/projects/NanoProcessor-Team-93/Lab9/Lab9.srcs/sources_1/new/LUT_16_7.vhd,1686819780,vhdl,,,,lut_16_7,,,,,,,, D:/projects/NanoProcessor-Team-93/Lab9/Lab9.srcs/sources_1/new/MUX_2_way_3_bit.vhd,1686232567,vhdl,,,,mux_2_way_3_bit,,,,,,,, D:/projects/NanoProcessor-Team-93/Lab9/Lab9.srcs/sources_1/new/MUX_2_way_4_bits.vhd,1686232567,vhdl,,,,mux_2_way_4_bit,,,,,,,, D:/projects/NanoProcessor-Team-93/Lab9/Lab9.srcs/sources_1/new/MUX_8_way_4_bit.vhd,1686232567,vhdl,,,,mux_8_way_4_bit,,,,,,,, D:/projects/NanoProcessor-Team-93/Lab9/Lab9.srcs/sources_1/new/NanoProcessor.vhd,1686232567,vhdl,,,,nanoprocessor,,,,,,,, D:/projects/NanoProcessor-Team-93/Lab9/Lab9.srcs/sources_1/new/Program_Counter.vhd,1686232567,vhdl,,,,program_counter,,,,,,,, D:/projects/NanoProcessor-Team-93/Lab9/Lab9.srcs/sources_1/new/RCA_Adder_Subtractor.vhd,1686232567,vhdl,,,,rca_adder_subtractor,,,,,,,, -D:/projects/NanoProcessor-Team-93/Lab9/Lab9.srcs/sources_1/new/ROM.vhd,1686806592,vhdl,,,,rom,,,,,,,, +D:/projects/NanoProcessor-Team-93/Lab9/Lab9.srcs/sources_1/new/ROM.vhd,1686819780,vhdl,,,,rom,,,,,,,, D:/projects/NanoProcessor-Team-93/Lab9/Lab9.srcs/sources_1/new/Register_Bank.vhd,1686232567,vhdl,,,,register_bank,,,,,,,, D:/projects/NanoProcessor-Team-93/Lab9/Lab9.srcs/sources_1/new/Registers.vhd,1686232567,vhdl,,,,registers,,,,,,,, -D:/projects/NanoProcessor-Team-93/Lab9/Lab9.srcs/sources_1/new/Slow_Clk.vhd,1686806779,vhdl,,,,slow_clk,,,,,,,, +D:/projects/NanoProcessor-Team-93/Lab9/Lab9.srcs/sources_1/new/Slow_Clk.vhd,1686819848,vhdl,,,,slow_clk,,,,,,,, D:/projects/NanoProcessor-Team-93/Lab9/Lab9.srcs/sources_1/new/adder_3bit.vhd,1686232567,vhdl,,,,adder_3bit,,,,,,,, diff --git a/Lab9/Lab9.sim/sim_1/behav/xsim/xvhdl.pb b/Lab9/Lab9.sim/sim_1/behav/xsim/xvhdl.pb index f6caa18..8e2b40a 100644 Binary files a/Lab9/Lab9.sim/sim_1/behav/xsim/xvhdl.pb and b/Lab9/Lab9.sim/sim_1/behav/xsim/xvhdl.pb differ diff --git a/Lab9/Lab9.srcs/sources_1/new/Slow_Clk.vhd b/Lab9/Lab9.srcs/sources_1/new/Slow_Clk.vhd index d02ec9b..ef63429 100644 --- a/Lab9/Lab9.srcs/sources_1/new/Slow_Clk.vhd +++ b/Lab9/Lab9.srcs/sources_1/new/Slow_Clk.vhd @@ -44,8 +44,8 @@ begin process (Clk_in) begin if (rising_edge(Clk_in)) then count <= count +1; - if (count = 4) then - --if (count = 50000000) then + --if (count = 4) then + if (count = 50000000) then clk_status <= not clk_status; Clk_out <= clk_status; count <= 1; diff --git a/Lab9/Lab9.xpr b/Lab9/Lab9.xpr index 2061963..8f0342e 100644 --- a/Lab9/Lab9.xpr +++ b/Lab9/Lab9.xpr @@ -33,7 +33,7 @@