diff --git a/boards/ark/can-flow-mr/nuttx-config/canbootloader/defconfig b/boards/ark/can-flow-mr/nuttx-config/canbootloader/defconfig
index 840e4ca8ac5f..cb4e31277c21 100644
--- a/boards/ark/can-flow-mr/nuttx-config/canbootloader/defconfig
+++ b/boards/ark/can-flow-mr/nuttx-config/canbootloader/defconfig
@@ -16,7 +16,7 @@ CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
 CONFIG_ARCH_CHIP="stm32"
 CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F412CE=y
+CONFIG_ARCH_CHIP_STM32F412VG=y
 CONFIG_ARCH_INTERRUPTSTACK=4096
 CONFIG_ARMV7M_MEMCPY=y
 CONFIG_BOARDCTL=y
diff --git a/boards/ark/can-flow-mr/nuttx-config/nsh/defconfig b/boards/ark/can-flow-mr/nuttx-config/nsh/defconfig
index cf78d731cc70..f2bda2bbf363 100644
--- a/boards/ark/can-flow-mr/nuttx-config/nsh/defconfig
+++ b/boards/ark/can-flow-mr/nuttx-config/nsh/defconfig
@@ -57,7 +57,7 @@ CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
 CONFIG_ARCH_CHIP="stm32"
 CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F412CE=y
+CONFIG_ARCH_CHIP_STM32F412VG=y
 CONFIG_ARCH_INTERRUPTSTACK=768
 CONFIG_ARCH_STACKDUMP=y
 CONFIG_ARMV7M_MEMCPY=y
diff --git a/boards/ark/can-flow-mr/nuttx-config/scripts/canbootloader_script.ld b/boards/ark/can-flow-mr/nuttx-config/scripts/canbootloader_script.ld
index 48a59fe92d0e..ef74be0945b5 100644
--- a/boards/ark/can-flow-mr/nuttx-config/scripts/canbootloader_script.ld
+++ b/boards/ark/can-flow-mr/nuttx-config/scripts/canbootloader_script.ld
@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 1M of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412VG has 1MB of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
     flash (rx)   : ORIGIN = 0x08000000, LENGTH = 32K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)
diff --git a/boards/ark/can-flow-mr/nuttx-config/scripts/script.ld b/boards/ark/can-flow-mr/nuttx-config/scripts/script.ld
index 77322893e35a..6d71ed168a18 100644
--- a/boards/ark/can-flow-mr/nuttx-config/scripts/script.ld
+++ b/boards/ark/can-flow-mr/nuttx-config/scripts/script.ld
@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 1M of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412VG has 1MB of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
-    flash (rx)   : ORIGIN = 0x08010000, LENGTH = 928K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    flash (rx)   : ORIGIN = 0x08010000, LENGTH = 960K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)
diff --git a/boards/ark/can-flow/nuttx-config/scripts/canbootloader_script.ld b/boards/ark/can-flow/nuttx-config/scripts/canbootloader_script.ld
index cbf9fddc32dc..4512b05d5459 100644
--- a/boards/ark/can-flow/nuttx-config/scripts/canbootloader_script.ld
+++ b/boards/ark/can-flow/nuttx-config/scripts/canbootloader_script.ld
@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 512Kb of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412CE has 512Kb of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
     flash (rx)   : ORIGIN = 0x08000000, LENGTH = 32K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)
diff --git a/boards/ark/can-flow/nuttx-config/scripts/script.ld b/boards/ark/can-flow/nuttx-config/scripts/script.ld
index 17a892f885ca..e1c5a84f7c21 100644
--- a/boards/ark/can-flow/nuttx-config/scripts/script.ld
+++ b/boards/ark/can-flow/nuttx-config/scripts/script.ld
@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 512Kb of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412CE has 512Kb of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
     flash (rx)   : ORIGIN = 0x08010000, LENGTH = 448K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)
diff --git a/boards/ark/can-gps/nuttx-config/include/board.h b/boards/ark/can-gps/nuttx-config/include/board.h
index 526392b92bbd..8fbd9a02b44e 100644
--- a/boards/ark/can-gps/nuttx-config/include/board.h
+++ b/boards/ark/can-gps/nuttx-config/include/board.h
@@ -141,8 +141,8 @@
 #define GPIO_I2C2_SCL	GPIO_I2C2_SCL_1
 #define GPIO_I2C2_SDA	GPIO_I2C2_SDA_4
 
-#define GPIO_I2C2_SCL_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN9)
-#define GPIO_I2C2_SDA_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN10)
+#define GPIO_I2C2_SCL_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN10)
+#define GPIO_I2C2_SDA_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN9)
 
 /* SPI */
 #define GPIO_SPI1_MISO  GPIO_SPI1_MISO_1
diff --git a/boards/ark/can-gps/nuttx-config/scripts/canbootloader_script.ld b/boards/ark/can-gps/nuttx-config/scripts/canbootloader_script.ld
index cbf9fddc32dc..4512b05d5459 100644
--- a/boards/ark/can-gps/nuttx-config/scripts/canbootloader_script.ld
+++ b/boards/ark/can-gps/nuttx-config/scripts/canbootloader_script.ld
@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 512Kb of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412CE has 512Kb of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
     flash (rx)   : ORIGIN = 0x08000000, LENGTH = 32K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)
diff --git a/boards/ark/can-gps/nuttx-config/scripts/script.ld b/boards/ark/can-gps/nuttx-config/scripts/script.ld
index 17a892f885ca..e1c5a84f7c21 100644
--- a/boards/ark/can-gps/nuttx-config/scripts/script.ld
+++ b/boards/ark/can-gps/nuttx-config/scripts/script.ld
@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 512Kb of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412CE has 512Kb of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
     flash (rx)   : ORIGIN = 0x08010000, LENGTH = 448K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)
diff --git a/boards/ark/can-rtk-gps/nuttx-config/include/board.h b/boards/ark/can-rtk-gps/nuttx-config/include/board.h
index 526392b92bbd..8fbd9a02b44e 100644
--- a/boards/ark/can-rtk-gps/nuttx-config/include/board.h
+++ b/boards/ark/can-rtk-gps/nuttx-config/include/board.h
@@ -141,8 +141,8 @@
 #define GPIO_I2C2_SCL	GPIO_I2C2_SCL_1
 #define GPIO_I2C2_SDA	GPIO_I2C2_SDA_4
 
-#define GPIO_I2C2_SCL_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN9)
-#define GPIO_I2C2_SDA_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN10)
+#define GPIO_I2C2_SCL_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN10)
+#define GPIO_I2C2_SDA_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN9)
 
 /* SPI */
 #define GPIO_SPI1_MISO  GPIO_SPI1_MISO_1
diff --git a/boards/ark/can-rtk-gps/nuttx-config/scripts/canbootloader_script.ld b/boards/ark/can-rtk-gps/nuttx-config/scripts/canbootloader_script.ld
index cbf9fddc32dc..4512b05d5459 100644
--- a/boards/ark/can-rtk-gps/nuttx-config/scripts/canbootloader_script.ld
+++ b/boards/ark/can-rtk-gps/nuttx-config/scripts/canbootloader_script.ld
@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 512Kb of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412CE has 512Kb of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
     flash (rx)   : ORIGIN = 0x08000000, LENGTH = 32K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)
diff --git a/boards/ark/can-rtk-gps/nuttx-config/scripts/script.ld b/boards/ark/can-rtk-gps/nuttx-config/scripts/script.ld
index 17a892f885ca..e1c5a84f7c21 100644
--- a/boards/ark/can-rtk-gps/nuttx-config/scripts/script.ld
+++ b/boards/ark/can-rtk-gps/nuttx-config/scripts/script.ld
@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 512Kb of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412CE has 512Kb of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
     flash (rx)   : ORIGIN = 0x08010000, LENGTH = 448K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)
diff --git a/boards/ark/can-rtk-gps/src/board_config.h b/boards/ark/can-rtk-gps/src/board_config.h
index 4d18818edcba..88d168581a48 100644
--- a/boards/ark/can-rtk-gps/src/board_config.h
+++ b/boards/ark/can-rtk-gps/src/board_config.h
@@ -82,9 +82,6 @@
 #define GPIO_I2C2_SCL_RESET   /* PB10 */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN10)
 #define GPIO_I2C2_SDA_RESET   /* PB9  */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN9)
 
-#define GPIO_I2C2_SCL_RESET   /* PB10 */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN10)
-#define GPIO_I2C2_SDA_RESET   /* PB9  */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN9)
-
 #define GPIO_USART1_RX_GPIO	(GPIO_INPUT|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN3)
 #define GPIO_USART1_TX_GPIO	(GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN15)
 
diff --git a/boards/ark/cannode/nuttx-config/canbootloader/defconfig b/boards/ark/cannode/nuttx-config/canbootloader/defconfig
index c01fbae7a631..d0808d504a98 100644
--- a/boards/ark/cannode/nuttx-config/canbootloader/defconfig
+++ b/boards/ark/cannode/nuttx-config/canbootloader/defconfig
@@ -16,7 +16,7 @@ CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
 CONFIG_ARCH_CHIP="stm32"
 CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F412CE=y
+CONFIG_ARCH_CHIP_STM32F412CG=y
 CONFIG_ARCH_INTERRUPTSTACK=4096
 CONFIG_ARMV7M_MEMCPY=y
 CONFIG_BOARDCTL=y
diff --git a/boards/ark/cannode/nuttx-config/include/board.h b/boards/ark/cannode/nuttx-config/include/board.h
index aa067118540a..c6be3dacabd2 100644
--- a/boards/ark/cannode/nuttx-config/include/board.h
+++ b/boards/ark/cannode/nuttx-config/include/board.h
@@ -144,6 +144,6 @@
 #define GPIO_I2C1_SDA	GPIO_I2C1_SDA_2
 
 #define GPIO_I2C1_SCL_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN6)
-#define GPIO_I2C1_SDA_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN7)
+#define GPIO_I2C1_SDA_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN9)
 
 #endif /* __ARCH_BOARD_BOARD_H */
diff --git a/boards/ark/cannode/nuttx-config/nsh/defconfig b/boards/ark/cannode/nuttx-config/nsh/defconfig
index 13199bacc706..afa552651809 100644
--- a/boards/ark/cannode/nuttx-config/nsh/defconfig
+++ b/boards/ark/cannode/nuttx-config/nsh/defconfig
@@ -57,7 +57,7 @@ CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
 CONFIG_ARCH_CHIP="stm32"
 CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F412CE=y
+CONFIG_ARCH_CHIP_STM32F412CG=y
 CONFIG_ARCH_INTERRUPTSTACK=768
 CONFIG_ARCH_STACKDUMP=y
 CONFIG_ARMV7M_MEMCPY=y
diff --git a/boards/ark/cannode/nuttx-config/scripts/canbootloader_script.ld b/boards/ark/cannode/nuttx-config/scripts/canbootloader_script.ld
index cbf9fddc32dc..fc6556d70bd1 100644
--- a/boards/ark/cannode/nuttx-config/scripts/canbootloader_script.ld
+++ b/boards/ark/cannode/nuttx-config/scripts/canbootloader_script.ld
@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 512Kb of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412CG has 1MB of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
     flash (rx)   : ORIGIN = 0x08000000, LENGTH = 32K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)
diff --git a/boards/ark/cannode/nuttx-config/scripts/script.ld b/boards/ark/cannode/nuttx-config/scripts/script.ld
index 69d99d59bac9..035933b25b70 100644
--- a/boards/ark/cannode/nuttx-config/scripts/script.ld
+++ b/boards/ark/cannode/nuttx-config/scripts/script.ld
@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412CG has 1Mb of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412CG has 1MB of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
-    flash (rx)   : ORIGIN = 0x08010000, LENGTH = 928K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    flash (rx)   : ORIGIN = 0x08010000, LENGTH = 960K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)
diff --git a/boards/ark/cannode/src/board_config.h b/boards/ark/cannode/src/board_config.h
index aa1225bf193e..6ed173046837 100644
--- a/boards/ark/cannode/src/board_config.h
+++ b/boards/ark/cannode/src/board_config.h
@@ -50,9 +50,6 @@
 #define GPIO_CAN1_TERMINATION /* PC15 */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN15)
 #define GPIO_CAN_TERM                    GPIO_CAN1_TERMINATION
 
-/* Boot config */
-#define GPIO_BOOT_CONFIG      /* PH1 */ (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTH|GPIO_PIN1|GPIO_EXTI)
-
 /* ICM42688p FSYNC */
 #define GPIO_42688P_FSYNC     /* PB8  */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN8)
 
diff --git a/boards/ark/cannode/src/boot_config.h b/boards/ark/cannode/src/boot_config.h
index b43795ac4cb9..0559a920caf0 100644
--- a/boards/ark/cannode/src/boot_config.h
+++ b/boards/ark/cannode/src/boot_config.h
@@ -70,34 +70,7 @@
 #define OPT_NODE_INFO_RATE_MS           50
 #define OPT_BL_NUMBER_TIMERS            7
 
-/*
- *  This Option set is set to 1 ensure a provider of firmware has an
- *  opportunity update the node's firmware.
- *  This Option is the default policy and can be overridden by
- *  a jumper
- *  When this Policy is set, the node will ignore tboot and
- *  wait indefinitely for a GetNodeInfo request before booting.
- *
- *  OPT_WAIT_FOR_GETNODEINFO_JUMPER_GPIO_INVERT is used to allow
- *  the polarity of the jumper to be True Active
- *
- *  wait  OPT_WAIT_FOR_GETNODEINFO  OPT_WAIT_FOR_GETNODEINFO_JUMPER_GPIO
- *                                                 Jumper
- *   yes           1                       0         x
- *   yes           1                       1       Active
- *   no            1                       1       Not Active
- *   no            0                       0         X
- *   yes           0                       1       Active
- *   no            0                       1       Not Active
- *
- */
 #define OPT_WAIT_FOR_GETNODEINFO                    0
-/* The ARK CANnode uses PH1 for GPIO_BOOT_CONFIG but it is not
- * compatible with px4_arch_gpioread as Port H = 7 which is greater
- * than STM32_NPORTS
- * #define OPT_WAIT_FOR_GETNODEINFO_JUMPER_GPIO        0
- */
-#define OPT_WAIT_FOR_GETNODEINFO_JUMPER_GPIO_INVERT 1
 
 #define OPT_ENABLE_WD           1
 
@@ -127,8 +100,3 @@
 /* If this board uses big flash that have large sectors */
 
 #define OPT_USE_YIELD
-
-/* Bootloader Option*****************************************************************
- *
- */
-#define GPIO_GETNODEINFO_JUMPER (GPIO_BOOT_CONFIG & ~GPIO_EXTI)
diff --git a/boards/ark/dist/nuttx-config/canbootloader/defconfig b/boards/ark/dist/nuttx-config/canbootloader/defconfig
index a650a3cbcf3c..784b49988dd3 100644
--- a/boards/ark/dist/nuttx-config/canbootloader/defconfig
+++ b/boards/ark/dist/nuttx-config/canbootloader/defconfig
@@ -16,7 +16,7 @@ CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
 CONFIG_ARCH_CHIP="stm32"
 CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F412CE=y
+CONFIG_ARCH_CHIP_STM32F412VG=y
 CONFIG_ARCH_INTERRUPTSTACK=4096
 CONFIG_ARMV7M_MEMCPY=y
 CONFIG_BOARDCTL=y
diff --git a/boards/ark/dist/nuttx-config/nsh/defconfig b/boards/ark/dist/nuttx-config/nsh/defconfig
index 3bb396bbac66..0f3e846bbe8d 100644
--- a/boards/ark/dist/nuttx-config/nsh/defconfig
+++ b/boards/ark/dist/nuttx-config/nsh/defconfig
@@ -57,7 +57,7 @@ CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
 CONFIG_ARCH_CHIP="stm32"
 CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F412CE=y
+CONFIG_ARCH_CHIP_STM32F412VG=y
 CONFIG_ARCH_INTERRUPTSTACK=768
 CONFIG_ARCH_STACKDUMP=y
 CONFIG_ARMV7M_MEMCPY=y
diff --git a/boards/ark/dist/nuttx-config/scripts/canbootloader_script.ld b/boards/ark/dist/nuttx-config/scripts/canbootloader_script.ld
index 48a59fe92d0e..ef74be0945b5 100644
--- a/boards/ark/dist/nuttx-config/scripts/canbootloader_script.ld
+++ b/boards/ark/dist/nuttx-config/scripts/canbootloader_script.ld
@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 1M of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412VG has 1MB of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
     flash (rx)   : ORIGIN = 0x08000000, LENGTH = 32K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)
diff --git a/boards/ark/dist/nuttx-config/scripts/script.ld b/boards/ark/dist/nuttx-config/scripts/script.ld
index 77322893e35a..6d71ed168a18 100644
--- a/boards/ark/dist/nuttx-config/scripts/script.ld
+++ b/boards/ark/dist/nuttx-config/scripts/script.ld
@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 1M of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412VG has 1MB of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
-    flash (rx)   : ORIGIN = 0x08010000, LENGTH = 928K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    flash (rx)   : ORIGIN = 0x08010000, LENGTH = 960K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)
diff --git a/boards/ark/f9p-gps/nuttx-config/canbootloader/defconfig b/boards/ark/f9p-gps/nuttx-config/canbootloader/defconfig
index 5a4fcefcdec3..02930e91a5e6 100644
--- a/boards/ark/f9p-gps/nuttx-config/canbootloader/defconfig
+++ b/boards/ark/f9p-gps/nuttx-config/canbootloader/defconfig
@@ -16,7 +16,7 @@ CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
 CONFIG_ARCH_CHIP="stm32"
 CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F412CE=y
+CONFIG_ARCH_CHIP_STM32F412VG=y
 CONFIG_ARCH_INTERRUPTSTACK=4096
 CONFIG_ARMV7M_MEMCPY=y
 CONFIG_BOARDCTL=y
diff --git a/boards/ark/f9p-gps/nuttx-config/include/board.h b/boards/ark/f9p-gps/nuttx-config/include/board.h
index 526392b92bbd..8fbd9a02b44e 100644
--- a/boards/ark/f9p-gps/nuttx-config/include/board.h
+++ b/boards/ark/f9p-gps/nuttx-config/include/board.h
@@ -141,8 +141,8 @@
 #define GPIO_I2C2_SCL	GPIO_I2C2_SCL_1
 #define GPIO_I2C2_SDA	GPIO_I2C2_SDA_4
 
-#define GPIO_I2C2_SCL_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN9)
-#define GPIO_I2C2_SDA_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN10)
+#define GPIO_I2C2_SCL_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN10)
+#define GPIO_I2C2_SDA_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN9)
 
 /* SPI */
 #define GPIO_SPI1_MISO  GPIO_SPI1_MISO_1
diff --git a/boards/ark/f9p-gps/nuttx-config/nsh/defconfig b/boards/ark/f9p-gps/nuttx-config/nsh/defconfig
index aed760113ce9..5b0965648045 100644
--- a/boards/ark/f9p-gps/nuttx-config/nsh/defconfig
+++ b/boards/ark/f9p-gps/nuttx-config/nsh/defconfig
@@ -57,7 +57,7 @@ CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
 CONFIG_ARCH_CHIP="stm32"
 CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F412CE=y
+CONFIG_ARCH_CHIP_STM32F412VG=y
 CONFIG_ARCH_INTERRUPTSTACK=768
 CONFIG_ARCH_STACKDUMP=y
 CONFIG_ARMV7M_MEMCPY=y
diff --git a/boards/ark/f9p-gps/nuttx-config/scripts/canbootloader_script.ld b/boards/ark/f9p-gps/nuttx-config/scripts/canbootloader_script.ld
index 6be5cffcd825..0f135b499c2c 100644
--- a/boards/ark/f9p-gps/nuttx-config/scripts/canbootloader_script.ld
+++ b/boards/ark/f9p-gps/nuttx-config/scripts/canbootloader_script.ld
@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 1M of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412VG has 1MB of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
     flash (rx)   : ORIGIN = 0x08000000, LENGTH = 32K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)
diff --git a/boards/ark/f9p-gps/nuttx-config/scripts/script.ld b/boards/ark/f9p-gps/nuttx-config/scripts/script.ld
index 77322893e35a..6d71ed168a18 100644
--- a/boards/ark/f9p-gps/nuttx-config/scripts/script.ld
+++ b/boards/ark/f9p-gps/nuttx-config/scripts/script.ld
@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 1M of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412VG has 1MB of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
-    flash (rx)   : ORIGIN = 0x08010000, LENGTH = 928K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    flash (rx)   : ORIGIN = 0x08010000, LENGTH = 960K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)
diff --git a/boards/ark/f9p-gps/src/board_config.h b/boards/ark/f9p-gps/src/board_config.h
index 2d5f582075f1..81f0394944db 100644
--- a/boards/ark/f9p-gps/src/board_config.h
+++ b/boards/ark/f9p-gps/src/board_config.h
@@ -79,9 +79,6 @@
 #define GPIO_I2C2_SCL_RESET   /* PB10 */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN10)
 #define GPIO_I2C2_SDA_RESET   /* PB9  */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN9)
 
-#define GPIO_I2C2_SCL_RESET   /* PB10 */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN10)
-#define GPIO_I2C2_SDA_RESET   /* PB9  */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN9)
-
 #define GPIO_USART1_RX_GPIO	(GPIO_INPUT|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN3)
 #define GPIO_USART1_TX_GPIO	(GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN15)
 
diff --git a/boards/ark/mag/nuttx-config/canbootloader/defconfig b/boards/ark/mag/nuttx-config/canbootloader/defconfig
index 66d9f4033944..a5a821c11e98 100644
--- a/boards/ark/mag/nuttx-config/canbootloader/defconfig
+++ b/boards/ark/mag/nuttx-config/canbootloader/defconfig
@@ -16,7 +16,7 @@ CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
 CONFIG_ARCH_CHIP="stm32"
 CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F412CE=y
+CONFIG_ARCH_CHIP_STM32F412VG=y
 CONFIG_ARCH_INTERRUPTSTACK=4096
 CONFIG_ARMV7M_MEMCPY=y
 CONFIG_BOARDCTL=y
diff --git a/boards/ark/mag/nuttx-config/nsh/defconfig b/boards/ark/mag/nuttx-config/nsh/defconfig
index 23e92e78046f..c9b4b8db4a36 100644
--- a/boards/ark/mag/nuttx-config/nsh/defconfig
+++ b/boards/ark/mag/nuttx-config/nsh/defconfig
@@ -57,7 +57,7 @@ CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
 CONFIG_ARCH_CHIP="stm32"
 CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F412CE=y
+CONFIG_ARCH_CHIP_STM32F412VG=y
 CONFIG_ARCH_INTERRUPTSTACK=768
 CONFIG_ARCH_STACKDUMP=y
 CONFIG_ARMV7M_MEMCPY=y
diff --git a/boards/ark/mag/nuttx-config/scripts/canbootloader_script.ld b/boards/ark/mag/nuttx-config/scripts/canbootloader_script.ld
index 48a59fe92d0e..ef74be0945b5 100644
--- a/boards/ark/mag/nuttx-config/scripts/canbootloader_script.ld
+++ b/boards/ark/mag/nuttx-config/scripts/canbootloader_script.ld
@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 1M of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412VG has 1MB of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
     flash (rx)   : ORIGIN = 0x08000000, LENGTH = 32K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)
diff --git a/boards/ark/mag/nuttx-config/scripts/script.ld b/boards/ark/mag/nuttx-config/scripts/script.ld
index 77322893e35a..6d71ed168a18 100644
--- a/boards/ark/mag/nuttx-config/scripts/script.ld
+++ b/boards/ark/mag/nuttx-config/scripts/script.ld
@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 1M of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412VG has 1MB of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
-    flash (rx)   : ORIGIN = 0x08010000, LENGTH = 928K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    flash (rx)   : ORIGIN = 0x08010000, LENGTH = 960K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)
diff --git a/boards/ark/septentrio-gps/nuttx-config/canbootloader/defconfig b/boards/ark/septentrio-gps/nuttx-config/canbootloader/defconfig
index a265f04bc5cc..de5784c3ead7 100644
--- a/boards/ark/septentrio-gps/nuttx-config/canbootloader/defconfig
+++ b/boards/ark/septentrio-gps/nuttx-config/canbootloader/defconfig
@@ -16,7 +16,7 @@ CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
 CONFIG_ARCH_CHIP="stm32"
 CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F412CE=y
+CONFIG_ARCH_CHIP_STM32F412VG=y
 CONFIG_ARCH_INTERRUPTSTACK=4096
 CONFIG_ARMV7M_MEMCPY=y
 CONFIG_BOARDCTL=y
diff --git a/boards/ark/septentrio-gps/nuttx-config/include/board.h b/boards/ark/septentrio-gps/nuttx-config/include/board.h
index 526392b92bbd..8fbd9a02b44e 100644
--- a/boards/ark/septentrio-gps/nuttx-config/include/board.h
+++ b/boards/ark/septentrio-gps/nuttx-config/include/board.h
@@ -141,8 +141,8 @@
 #define GPIO_I2C2_SCL	GPIO_I2C2_SCL_1
 #define GPIO_I2C2_SDA	GPIO_I2C2_SDA_4
 
-#define GPIO_I2C2_SCL_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN9)
-#define GPIO_I2C2_SDA_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN10)
+#define GPIO_I2C2_SCL_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN10)
+#define GPIO_I2C2_SDA_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN9)
 
 /* SPI */
 #define GPIO_SPI1_MISO  GPIO_SPI1_MISO_1
diff --git a/boards/ark/septentrio-gps/nuttx-config/nsh/defconfig b/boards/ark/septentrio-gps/nuttx-config/nsh/defconfig
index 638a4b082134..dfb793f5d8fb 100644
--- a/boards/ark/septentrio-gps/nuttx-config/nsh/defconfig
+++ b/boards/ark/septentrio-gps/nuttx-config/nsh/defconfig
@@ -57,7 +57,7 @@ CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
 CONFIG_ARCH_CHIP="stm32"
 CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F412CE=y
+CONFIG_ARCH_CHIP_STM32F412VG=y
 CONFIG_ARCH_INTERRUPTSTACK=768
 CONFIG_ARCH_STACKDUMP=y
 CONFIG_ARMV7M_MEMCPY=y
diff --git a/boards/ark/septentrio-gps/nuttx-config/scripts/canbootloader_script.ld b/boards/ark/septentrio-gps/nuttx-config/scripts/canbootloader_script.ld
index 48a59fe92d0e..ef74be0945b5 100644
--- a/boards/ark/septentrio-gps/nuttx-config/scripts/canbootloader_script.ld
+++ b/boards/ark/septentrio-gps/nuttx-config/scripts/canbootloader_script.ld
@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 1M of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412VG has 1MB of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
     flash (rx)   : ORIGIN = 0x08000000, LENGTH = 32K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)
diff --git a/boards/ark/septentrio-gps/nuttx-config/scripts/script.ld b/boards/ark/septentrio-gps/nuttx-config/scripts/script.ld
index 77322893e35a..6d71ed168a18 100644
--- a/boards/ark/septentrio-gps/nuttx-config/scripts/script.ld
+++ b/boards/ark/septentrio-gps/nuttx-config/scripts/script.ld
@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 1M of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412VG has 1MB of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
-    flash (rx)   : ORIGIN = 0x08010000, LENGTH = 928K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    flash (rx)   : ORIGIN = 0x08010000, LENGTH = 960K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)
diff --git a/boards/ark/septentrio-gps/src/board_config.h b/boards/ark/septentrio-gps/src/board_config.h
index 2d5f582075f1..81f0394944db 100644
--- a/boards/ark/septentrio-gps/src/board_config.h
+++ b/boards/ark/septentrio-gps/src/board_config.h
@@ -79,9 +79,6 @@
 #define GPIO_I2C2_SCL_RESET   /* PB10 */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN10)
 #define GPIO_I2C2_SDA_RESET   /* PB9  */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN9)
 
-#define GPIO_I2C2_SCL_RESET   /* PB10 */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN10)
-#define GPIO_I2C2_SDA_RESET   /* PB9  */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN9)
-
 #define GPIO_USART1_RX_GPIO	(GPIO_INPUT|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN3)
 #define GPIO_USART1_TX_GPIO	(GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN15)
 
diff --git a/boards/ark/teseo-gps/nuttx-config/canbootloader/defconfig b/boards/ark/teseo-gps/nuttx-config/canbootloader/defconfig
index d6cfb24380c7..bd526d13bf34 100644
--- a/boards/ark/teseo-gps/nuttx-config/canbootloader/defconfig
+++ b/boards/ark/teseo-gps/nuttx-config/canbootloader/defconfig
@@ -16,7 +16,7 @@ CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
 CONFIG_ARCH_CHIP="stm32"
 CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F412CE=y
+CONFIG_ARCH_CHIP_STM32F412VG=y
 CONFIG_ARCH_INTERRUPTSTACK=4096
 CONFIG_ARMV7M_MEMCPY=y
 CONFIG_BOARDCTL=y
diff --git a/boards/ark/teseo-gps/nuttx-config/include/board.h b/boards/ark/teseo-gps/nuttx-config/include/board.h
index 526392b92bbd..8fbd9a02b44e 100644
--- a/boards/ark/teseo-gps/nuttx-config/include/board.h
+++ b/boards/ark/teseo-gps/nuttx-config/include/board.h
@@ -141,8 +141,8 @@
 #define GPIO_I2C2_SCL	GPIO_I2C2_SCL_1
 #define GPIO_I2C2_SDA	GPIO_I2C2_SDA_4
 
-#define GPIO_I2C2_SCL_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN9)
-#define GPIO_I2C2_SDA_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN10)
+#define GPIO_I2C2_SCL_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN10)
+#define GPIO_I2C2_SDA_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN9)
 
 /* SPI */
 #define GPIO_SPI1_MISO  GPIO_SPI1_MISO_1
diff --git a/boards/ark/teseo-gps/nuttx-config/nsh/defconfig b/boards/ark/teseo-gps/nuttx-config/nsh/defconfig
index b02b07bb9a83..7eb98be6f618 100644
--- a/boards/ark/teseo-gps/nuttx-config/nsh/defconfig
+++ b/boards/ark/teseo-gps/nuttx-config/nsh/defconfig
@@ -58,7 +58,7 @@ CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
 CONFIG_ARCH_CHIP="stm32"
 CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F412CE=y
+CONFIG_ARCH_CHIP_STM32F412VG=y
 CONFIG_ARCH_INTERRUPTSTACK=768
 CONFIG_ARCH_STACKDUMP=y
 CONFIG_ARMV7M_MEMCPY=y
diff --git a/boards/ark/teseo-gps/nuttx-config/scripts/canbootloader_script.ld b/boards/ark/teseo-gps/nuttx-config/scripts/canbootloader_script.ld
index 48a59fe92d0e..ef74be0945b5 100644
--- a/boards/ark/teseo-gps/nuttx-config/scripts/canbootloader_script.ld
+++ b/boards/ark/teseo-gps/nuttx-config/scripts/canbootloader_script.ld
@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 1M of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412VG has 1MB of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
     flash (rx)   : ORIGIN = 0x08000000, LENGTH = 32K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)
diff --git a/boards/ark/teseo-gps/nuttx-config/scripts/script.ld b/boards/ark/teseo-gps/nuttx-config/scripts/script.ld
index 77322893e35a..6d71ed168a18 100644
--- a/boards/ark/teseo-gps/nuttx-config/scripts/script.ld
+++ b/boards/ark/teseo-gps/nuttx-config/scripts/script.ld
@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 1M of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412VG has 1MB of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
-    flash (rx)   : ORIGIN = 0x08010000, LENGTH = 928K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    flash (rx)   : ORIGIN = 0x08010000, LENGTH = 960K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)
diff --git a/boards/ark/x20-gps/nuttx-config/canbootloader/defconfig b/boards/ark/x20-gps/nuttx-config/canbootloader/defconfig
index 7c87718686bb..7df280d7b026 100644
--- a/boards/ark/x20-gps/nuttx-config/canbootloader/defconfig
+++ b/boards/ark/x20-gps/nuttx-config/canbootloader/defconfig
@@ -16,7 +16,7 @@ CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
 CONFIG_ARCH_CHIP="stm32"
 CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F412CE=y
+CONFIG_ARCH_CHIP_STM32F412VG=y
 CONFIG_ARCH_INTERRUPTSTACK=4096
 CONFIG_ARMV7M_MEMCPY=y
 CONFIG_BOARDCTL=y
diff --git a/boards/ark/x20-gps/nuttx-config/include/board.h b/boards/ark/x20-gps/nuttx-config/include/board.h
index 526392b92bbd..8fbd9a02b44e 100644
--- a/boards/ark/x20-gps/nuttx-config/include/board.h
+++ b/boards/ark/x20-gps/nuttx-config/include/board.h
@@ -141,8 +141,8 @@
 #define GPIO_I2C2_SCL	GPIO_I2C2_SCL_1
 #define GPIO_I2C2_SDA	GPIO_I2C2_SDA_4
 
-#define GPIO_I2C2_SCL_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN9)
-#define GPIO_I2C2_SDA_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN10)
+#define GPIO_I2C2_SCL_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN10)
+#define GPIO_I2C2_SDA_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN9)
 
 /* SPI */
 #define GPIO_SPI1_MISO  GPIO_SPI1_MISO_1
diff --git a/boards/ark/x20-gps/nuttx-config/nsh/defconfig b/boards/ark/x20-gps/nuttx-config/nsh/defconfig
index dcff600355ae..5277ca45db57 100644
--- a/boards/ark/x20-gps/nuttx-config/nsh/defconfig
+++ b/boards/ark/x20-gps/nuttx-config/nsh/defconfig
@@ -57,7 +57,7 @@ CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
 CONFIG_ARCH_CHIP="stm32"
 CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F412CE=y
+CONFIG_ARCH_CHIP_STM32F412VG=y
 CONFIG_ARCH_INTERRUPTSTACK=768
 CONFIG_ARCH_STACKDUMP=y
 CONFIG_ARMV7M_MEMCPY=y
diff --git a/boards/ark/x20-gps/nuttx-config/scripts/canbootloader_script.ld b/boards/ark/x20-gps/nuttx-config/scripts/canbootloader_script.ld
index 6be5cffcd825..0f135b499c2c 100644
--- a/boards/ark/x20-gps/nuttx-config/scripts/canbootloader_script.ld
+++ b/boards/ark/x20-gps/nuttx-config/scripts/canbootloader_script.ld
@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 1M of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412VG has 1MB of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
     flash (rx)   : ORIGIN = 0x08000000, LENGTH = 32K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)
diff --git a/boards/ark/x20-gps/nuttx-config/scripts/script.ld b/boards/ark/x20-gps/nuttx-config/scripts/script.ld
index 77322893e35a..6d71ed168a18 100644
--- a/boards/ark/x20-gps/nuttx-config/scripts/script.ld
+++ b/boards/ark/x20-gps/nuttx-config/scripts/script.ld
@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 1M of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412VG has 1MB of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
-    flash (rx)   : ORIGIN = 0x08010000, LENGTH = 928K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    flash (rx)   : ORIGIN = 0x08010000, LENGTH = 960K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)
diff --git a/boards/ark/x20-gps/src/board_config.h b/boards/ark/x20-gps/src/board_config.h
index 2d5f582075f1..81f0394944db 100644
--- a/boards/ark/x20-gps/src/board_config.h
+++ b/boards/ark/x20-gps/src/board_config.h
@@ -79,9 +79,6 @@
 #define GPIO_I2C2_SCL_RESET   /* PB10 */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN10)
 #define GPIO_I2C2_SDA_RESET   /* PB9  */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN9)
 
-#define GPIO_I2C2_SCL_RESET   /* PB10 */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN10)
-#define GPIO_I2C2_SDA_RESET   /* PB9  */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN9)
-
 #define GPIO_USART1_RX_GPIO	(GPIO_INPUT|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN3)
 #define GPIO_USART1_TX_GPIO	(GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN15)
 
diff --git a/platforms/nuttx/CMakeLists.txt b/platforms/nuttx/CMakeLists.txt
index da052063f3e4..fa55a8abcfe8 100644
--- a/platforms/nuttx/CMakeLists.txt
+++ b/platforms/nuttx/CMakeLists.txt
@@ -589,6 +589,12 @@ if(NOT NUTTX_DIR MATCHES "external")
 	elseif(CONFIG_ARCH_CHIP_STM32F412CE)
 		set(DEBUG_DEVICE "STM32F412CE")
 		set(DEBUG_SVD_FILE "STM32F412.svd")
+	elseif(CONFIG_ARCH_CHIP_STM32F412CG)
+		set(DEBUG_DEVICE "STM32F412CG")
+		set(DEBUG_SVD_FILE "STM32F412.svd")
+	elseif(CONFIG_ARCH_CHIP_STM32F412VG)
+		set(DEBUG_DEVICE "STM32F412VG")
+		set(DEBUG_SVD_FILE "STM32F412.svd")
 	elseif(CONFIG_ARCH_CHIP_STM32F427V)
 		set(DEBUG_DEVICE "STM32F427VI")
 		set(DEBUG_SVD_FILE "STM32F427.svd")