Hello Cocoon Engineering Team,
As we look to scale our infrastructure for the network, we are evaluating the transition from traditional multi-GPU x86 PCIe rigs to unified memory SoC architectures, specifically the Nvidia DGX Spark (GB10 Grace Blackwell).
The primary motivation is the 128GB LPDDR5x unified memory and the elimination of PCIe bottlenecks, which theoretically provides a massive advantage for running heavy LLMs (like the 70B parameter models) natively without the overhead of sharding across multiple discrete GPUs.
The Problem
The challenge is that the Nvidia Grace CPU utilizes an ARM-based architecture (aarch64). Based on the current documentation and available Docker images/binaries for the Cocoon Worker Nodes, the ecosystem appears to be heavily optimized for standard x86_64 environments (Intel TDX / AMD SEV).
Questions & Requests
To help us plan our hardware investments and architecture strategy, could you please clarify the following:
- Roadmap for ARM: Is there an official roadmap or any upcoming plans to release
aarch64 compatible binaries and Docker images for Cocoon Worker Nodes?
- TEE Compatibility: How does the Cocoon protocol currently handle (or plan to handle) Confidential Computing attestations within ARM-based Trusted Execution Environments, specifically on Nvidia's Grace architecture?
- Current Workarounds: Are there any experimental branches, build-from-source guides, or known workarounds for bootstrapping a worker node on an ARM-based host in the meantime?
We believe that supporting efficient, unified-memory ARM architectures will significantly lower the barrier to entry for high-density, low-power node operators in the Cocoon network.
Looking forward to your insights.
Hello Cocoon Engineering Team,
As we look to scale our infrastructure for the network, we are evaluating the transition from traditional multi-GPU x86 PCIe rigs to unified memory SoC architectures, specifically the Nvidia DGX Spark (GB10 Grace Blackwell).
The primary motivation is the 128GB LPDDR5x unified memory and the elimination of PCIe bottlenecks, which theoretically provides a massive advantage for running heavy LLMs (like the 70B parameter models) natively without the overhead of sharding across multiple discrete GPUs.
The Problem
The challenge is that the Nvidia Grace CPU utilizes an ARM-based architecture (
aarch64). Based on the current documentation and available Docker images/binaries for the Cocoon Worker Nodes, the ecosystem appears to be heavily optimized for standardx86_64environments (Intel TDX / AMD SEV).Questions & Requests
To help us plan our hardware investments and architecture strategy, could you please clarify the following:
aarch64compatible binaries and Docker images for Cocoon Worker Nodes?We believe that supporting efficient, unified-memory ARM architectures will significantly lower the barrier to entry for high-density, low-power node operators in the Cocoon network.
Looking forward to your insights.