From 858dcd04068b4f0e0cd5a841e2583987f03b7df5 Mon Sep 17 00:00:00 2001 From: OE3ANC Date: Tue, 30 Jun 2026 13:19:05 +0200 Subject: [PATCH 1/3] Added C62 files to clang_format.sh, fixed formats --- .../drivers-zephyr/baseband/bk1080/bk1080.c | 378 +++--- .../drivers-zephyr/baseband/bk1080/bk1080.h | 45 +- .../drivers-zephyr/baseband/bk4819/bk4819.c | 179 +-- .../drivers-zephyr/baseband/bk4819/bk4819.h | 516 +++++---- platform/targets/c62/audio_c62.c | 1019 +++++++++-------- platform/targets/c62/dsp.c | 84 +- platform/targets/c62/hwconfig.h | 4 +- platform/targets/c62/lsf.c | 63 +- platform/targets/c62/platform.c | 215 ++-- platform/targets/c62/service.h | 13 +- platform/targets/c62/services/service.h | 13 +- platform/targets/c62/services/service_audio.c | 6 +- .../targets/c62/services/service_thinker.c | 195 ++-- platform/targets/c62/services/service_vad.c | 106 +- platform/targets/c62/services/service_wasm.c | 103 +- scripts/clang_format.sh | 20 + 16 files changed, 1528 insertions(+), 1431 deletions(-) mode change 100755 => 100644 platform/targets/c62/audio_c62.c mode change 100755 => 100644 platform/targets/c62/platform.c diff --git a/platform/drivers-zephyr/baseband/bk1080/bk1080.c b/platform/drivers-zephyr/baseband/bk1080/bk1080.c index eb9299163f..fa5602e06a 100644 --- a/platform/drivers-zephyr/baseband/bk1080/bk1080.c +++ b/platform/drivers-zephyr/baseband/bk1080/bk1080.c @@ -6,7 +6,6 @@ #define DT_DRV_COMPAT beken_bk1080 - #include "bk1080.h" #include #include @@ -17,32 +16,32 @@ LOG_MODULE_REGISTER(bk1080, LOG_LEVEL_DBG); - #define BK1080_NODE DT_PATH(bk1080) /* get pin definition from DTS */ -static const struct gpio_dt_spec clk_gpio = GPIO_DT_SPEC_GET(BK1080_NODE, i2c_clk_gpios); -static const struct gpio_dt_spec data_gpio = GPIO_DT_SPEC_GET(BK1080_NODE, i2c_data_gpios); -static const struct gpio_dt_spec power_gpio = GPIO_DT_SPEC_GET(BK1080_NODE, power_gpios); +static const struct gpio_dt_spec clk_gpio = GPIO_DT_SPEC_GET(BK1080_NODE, + i2c_clk_gpios); +static const struct gpio_dt_spec data_gpio = GPIO_DT_SPEC_GET(BK1080_NODE, + i2c_data_gpios); +static const struct gpio_dt_spec power_gpio = GPIO_DT_SPEC_GET(BK1080_NODE, + power_gpios); // GPIO control macros for SCK (Clock) #define BK1080_SCK_DIR_OUT gpio_pin_configure_dt(&clk_gpio, GPIO_OUTPUT) -#define BK1080_SCK_HIGH gpio_pin_set_dt(&clk_gpio, 1) -#define BK1080_SCK_LOW gpio_pin_set_dt(&clk_gpio, 0) +#define BK1080_SCK_HIGH gpio_pin_set_dt(&clk_gpio, 1) +#define BK1080_SCK_LOW gpio_pin_set_dt(&clk_gpio, 0) // GPIO control macros for SDA (Serial Data) #define BK1080_SDA_DIR_OUT gpio_pin_configure_dt(&data_gpio, GPIO_OUTPUT) -#define BK1080_SDA_DIR_IN gpio_pin_configure_dt(&data_gpio, GPIO_INPUT) -#define BK1080_SDA_HIGH gpio_pin_set_dt(&data_gpio, 1) -#define BK1080_SDA_LOW gpio_pin_set_dt(&data_gpio, 0) -#define BK1080_SDA_READ gpio_pin_get_dt(&data_gpio) +#define BK1080_SDA_DIR_IN gpio_pin_configure_dt(&data_gpio, GPIO_INPUT) +#define BK1080_SDA_HIGH gpio_pin_set_dt(&data_gpio, 1) +#define BK1080_SDA_LOW gpio_pin_set_dt(&data_gpio, 0) +#define BK1080_SDA_READ gpio_pin_get_dt(&data_gpio) // GPIO control macros for FM POWER #define BK1080_POWER_DIR_OUT gpio_pin_configure_dt(&power_gpio, GPIO_OUTPUT) -#define BK1080_POWER_OFF gpio_pin_set_dt(&power_gpio, 0) -#define BK1080_POWER_ON gpio_pin_set_dt(&power_gpio, 1) - - +#define BK1080_POWER_OFF gpio_pin_set_dt(&power_gpio, 0) +#define BK1080_POWER_ON gpio_pin_set_dt(&power_gpio, 1) // Forward declaration for device initialization static int bk1080_init_device(const struct device *dev); @@ -57,22 +56,17 @@ static const struct bk1080_config { // Device data structure static struct bk1080_data { bool initialized; -} bk1080_device_data = { - .initialized = false -}; - +} bk1080_device_data = { .initialized = false }; #ifndef ARRAY_SIZE - #define ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0])) +#define ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0])) #endif -static const uint16_t BK1080_RegisterTable[] = -{ - 0x0008, 0x1080, 0x0201, 0x0000, 0x40C0, 0x0A1F, 0x002E, 0x02FF, - 0x5B11, 0x0000, 0x411E, 0x0000, 0xCE00, 0x0000, 0x0000, 0x1000, - 0x3197, 0x0000, 0x13FF, 0x9852, 0x0000, 0x0000, 0x0008, 0x0000, - 0x51E1, 0xA8BC, 0x2645, 0x00E4, 0x1CD8, 0x3A50, 0xEAE0, 0x3000, - 0x0200, 0x0000, +static const uint16_t BK1080_RegisterTable[] = { + 0x0008, 0x1080, 0x0201, 0x0000, 0x40C0, 0x0A1F, 0x002E, 0x02FF, 0x5B11, + 0x0000, 0x411E, 0x0000, 0xCE00, 0x0000, 0x0000, 0x1000, 0x3197, 0x0000, + 0x13FF, 0x9852, 0x0000, 0x0000, 0x0008, 0x0000, 0x51E1, 0xA8BC, 0x2645, + 0x00E4, 0x1CD8, 0x3A50, 0xEAE0, 0x3000, 0x0200, 0x0000, }; static bool gIsInitBK1080; @@ -81,8 +75,8 @@ uint16_t BK1080_BaseFrequency; uint16_t BK1080_FrequencyDeviation; enum { - I2C_WRITE = 0U, - I2C_READ = 1U, + I2C_WRITE = 0U, + I2C_READ = 1U, }; static void I2C_Start(void); @@ -96,234 +90,236 @@ static int I2C_WriteBuffer(const void *pBuffer, uint8_t Size); static void I2C_Start(void) { - BK1080_SDA_HIGH; delayUs(1); - BK1080_SCK_HIGH; delayUs(1); - BK1080_SDA_LOW; delayUs(1); - BK1080_SCK_LOW; delayUs(1); + BK1080_SDA_HIGH; + delayUs(1); + BK1080_SCK_HIGH; + delayUs(1); + BK1080_SDA_LOW; + delayUs(1); + BK1080_SCK_LOW; + delayUs(1); } static void I2C_Stop(void) { - BK1080_SDA_LOW; delayUs(1); - BK1080_SCK_LOW; delayUs(1); - BK1080_SCK_HIGH; delayUs(1); - BK1080_SDA_HIGH; delayUs(1); + BK1080_SDA_LOW; + delayUs(1); + BK1080_SCK_LOW; + delayUs(1); + BK1080_SCK_HIGH; + delayUs(1); + BK1080_SDA_HIGH; + delayUs(1); } static uint8_t I2C_Read(bool bFinal) { - uint8_t i, Data; - - BK1080_SDA_DIR_IN; - - Data = 0; - for (i = 0; i < 8; i++) { - BK1080_SCK_LOW; - delayUs(1); - BK1080_SCK_HIGH; - delayUs(1); - Data <<= 1; - delayUs(1); - if (BK1080_SDA_READ) { - Data |= 1U; - } - BK1080_SCK_LOW; - delayUs(1); - } - - BK1080_SDA_DIR_OUT; - BK1080_SCK_LOW; - delayUs(1); - if (bFinal) { - BK1080_SDA_HIGH; - } else { - BK1080_SDA_LOW; - } - delayUs(1); - BK1080_SCK_HIGH; - delayUs(1); - BK1080_SCK_LOW; - delayUs(1); - - return Data; + uint8_t i, Data; + + BK1080_SDA_DIR_IN; + + Data = 0; + for (i = 0; i < 8; i++) { + BK1080_SCK_LOW; + delayUs(1); + BK1080_SCK_HIGH; + delayUs(1); + Data <<= 1; + delayUs(1); + if (BK1080_SDA_READ) { + Data |= 1U; + } + BK1080_SCK_LOW; + delayUs(1); + } + + BK1080_SDA_DIR_OUT; + BK1080_SCK_LOW; + delayUs(1); + if (bFinal) { + BK1080_SDA_HIGH; + } else { + BK1080_SDA_LOW; + } + delayUs(1); + BK1080_SCK_HIGH; + delayUs(1); + BK1080_SCK_LOW; + delayUs(1); + + return Data; } static int I2C_Write(uint8_t Data) { - uint8_t i; - int ret = -1; - - BK1080_SCK_LOW; - delayUs(1); - for (i = 0; i < 8; i++) { - if ((Data & 0x80) == 0) { - BK1080_SDA_LOW; - } else { - BK1080_SDA_HIGH; - } - Data <<= 1; - delayUs(1); - BK1080_SCK_HIGH; - delayUs(1); - BK1080_SCK_LOW; - delayUs(1); - } - - BK1080_SDA_DIR_IN; - BK1080_SDA_HIGH; - delayUs(1); - BK1080_SCK_HIGH; - delayUs(1); - - for (i = 0; i < 255; i++) { - if (BK1080_SDA_READ == 0) { - ret = 0; - break; - } - } - - BK1080_SCK_LOW; - delayUs(1); - BK1080_SDA_DIR_OUT; - BK1080_SDA_LOW; - - return ret; + uint8_t i; + int ret = -1; + + BK1080_SCK_LOW; + delayUs(1); + for (i = 0; i < 8; i++) { + if ((Data & 0x80) == 0) { + BK1080_SDA_LOW; + } else { + BK1080_SDA_HIGH; + } + Data <<= 1; + delayUs(1); + BK1080_SCK_HIGH; + delayUs(1); + BK1080_SCK_LOW; + delayUs(1); + } + + BK1080_SDA_DIR_IN; + BK1080_SDA_HIGH; + delayUs(1); + BK1080_SCK_HIGH; + delayUs(1); + + for (i = 0; i < 255; i++) { + if (BK1080_SDA_READ == 0) { + ret = 0; + break; + } + } + + BK1080_SCK_LOW; + delayUs(1); + BK1080_SDA_DIR_OUT; + BK1080_SDA_LOW; + + return ret; } static int I2C_ReadBuffer(void *pBuffer, uint8_t Size) { - uint8_t *pData = (uint8_t *)pBuffer; - uint8_t i; + uint8_t *pData = (uint8_t *)pBuffer; + uint8_t i; - for (i = 0; i < Size - 1; i++) { - delayUs(1); - pData[i] = I2C_Read(false); - } + for (i = 0; i < Size - 1; i++) { + delayUs(1); + pData[i] = I2C_Read(false); + } delayUs(1); - pData[i] = I2C_Read(true); + pData[i] = I2C_Read(true); - return Size; + return Size; } static int I2C_WriteBuffer(const void *pBuffer, uint8_t Size) { - const uint8_t *pData = (const uint8_t *)pBuffer; - uint8_t i; + const uint8_t *pData = (const uint8_t *)pBuffer; + uint8_t i; - for (i = 0; i < Size; i++) { - if (I2C_Write(*pData++) < 0) { - return -1; - } - } + for (i = 0; i < Size; i++) { + if (I2C_Write(*pData++) < 0) { + return -1; + } + } - return 0; + return 0; } - - - uint16_t BK1080_ReadRegister(BK1080_Register_t Register) { - uint8_t Value[2]; + uint8_t Value[2]; - I2C_Start(); - I2C_Write(0x80); - I2C_Write((Register << 1) | I2C_READ); - I2C_ReadBuffer(Value, sizeof(Value)); - I2C_Stop(); + I2C_Start(); + I2C_Write(0x80); + I2C_Write((Register << 1) | I2C_READ); + I2C_ReadBuffer(Value, sizeof(Value)); + I2C_Stop(); - return (Value[0] << 8) | Value[1]; + return (Value[0] << 8) | Value[1]; } void BK1080_WriteRegister(BK1080_Register_t Register, uint16_t Value) { - I2C_Start(); - I2C_Write(0x80); - I2C_Write((Register << 1) | I2C_WRITE); - Value = ((Value >> 8) & 0xFF) | ((Value & 0xFF) << 8); - I2C_WriteBuffer(&Value, sizeof(Value)); - I2C_Stop(); + I2C_Start(); + I2C_Write(0x80); + I2C_Write((Register << 1) | I2C_WRITE); + Value = ((Value >> 8) & 0xFF) | ((Value & 0xFF) << 8); + I2C_WriteBuffer(&Value, sizeof(Value)); + I2C_Stop(); } void BK1080_Init(uint32_t freq, uint8_t band) { - unsigned int i; + unsigned int i; - if (freq) { - BK1080_POWER_ON; + if (freq) { + BK1080_POWER_ON; - if (!gIsInitBK1080) { - for (i = 0; i < ARRAY_SIZE(BK1080_RegisterTable); i++) - BK1080_WriteRegister(i, BK1080_RegisterTable[i]); + if (!gIsInitBK1080) { + for (i = 0; i < ARRAY_SIZE(BK1080_RegisterTable); i++) + BK1080_WriteRegister(i, BK1080_RegisterTable[i]); - delayUs(250000); + delayUs(250000); - BK1080_WriteRegister(BK1080_REG_25_INTERNAL, 0xA83C); - BK1080_WriteRegister(BK1080_REG_25_INTERNAL, 0xA8BC); + BK1080_WriteRegister(BK1080_REG_25_INTERNAL, 0xA83C); + BK1080_WriteRegister(BK1080_REG_25_INTERNAL, 0xA8BC); - delayUs(60000); + delayUs(60000); - gIsInitBK1080 = true; - } - else { - BK1080_WriteRegister(BK1080_REG_02_POWER_CONFIGURATION, 0x0201); - } + gIsInitBK1080 = true; + } else { + BK1080_WriteRegister(BK1080_REG_02_POWER_CONFIGURATION, 0x0201); + } - BK1080_WriteRegister(BK1080_REG_05_SYSTEM_CONFIGURATION2, 0x0A1F); - BK1080_SetFrequency(freq, band/*, space*/); - } - else { - BK1080_WriteRegister(BK1080_REG_02_POWER_CONFIGURATION, 0x0241); - BK1080_POWER_OFF; - } + BK1080_WriteRegister(BK1080_REG_05_SYSTEM_CONFIGURATION2, 0x0A1F); + BK1080_SetFrequency(freq, band /*, space*/); + } else { + BK1080_WriteRegister(BK1080_REG_02_POWER_CONFIGURATION, 0x0241); + BK1080_POWER_OFF; + } } void BK1080_Mute(bool Mute) { - BK1080_WriteRegister(BK1080_REG_02_POWER_CONFIGURATION, Mute ? 0x4201 : 0x0201); + BK1080_WriteRegister(BK1080_REG_02_POWER_CONFIGURATION, + Mute ? 0x4201 : 0x0201); } void BK1080_SetFrequency(uint32_t frequency, uint8_t band) { - uint16_t channel = (frequency - BK1080_GetFreqLoLimit(band)) / 100000; + uint16_t channel = (frequency - BK1080_GetFreqLoLimit(band)) / 100000; - uint16_t regval = BK1080_ReadRegister(BK1080_REG_05_SYSTEM_CONFIGURATION2); - regval = (regval & ~(0b11 << 6)) | ((band & 0b11) << 6); + uint16_t regval = BK1080_ReadRegister(BK1080_REG_05_SYSTEM_CONFIGURATION2); + regval = (regval & ~(0b11 << 6)) | ((band & 0b11) << 6); - BK1080_WriteRegister(BK1080_REG_05_SYSTEM_CONFIGURATION2, regval); + BK1080_WriteRegister(BK1080_REG_05_SYSTEM_CONFIGURATION2, regval); - BK1080_WriteRegister(BK1080_REG_03_CHANNEL, channel); - delayMs(10); - BK1080_WriteRegister(BK1080_REG_03_CHANNEL, channel | 0x8000); + BK1080_WriteRegister(BK1080_REG_03_CHANNEL, channel); + delayMs(10); + BK1080_WriteRegister(BK1080_REG_03_CHANNEL, channel | 0x8000); } void BK1080_GetFrequencyDeviation(uint32_t Frequency) { - BK1080_BaseFrequency = Frequency; - BK1080_FrequencyDeviation = BK1080_ReadRegister(BK1080_REG_07) / 16; + BK1080_BaseFrequency = Frequency; + BK1080_FrequencyDeviation = BK1080_ReadRegister(BK1080_REG_07) / 16; } uint32_t BK1080_GetFreqLoLimit(uint8_t band) { - uint32_t lim[] = {87500000, 76000000, 76000000, 64000000}; //Hz - return lim[band % 4]; + uint32_t lim[] = { 87500000, 76000000, 76000000, 64000000 }; //Hz + return lim[band % 4]; } uint32_t BK1080_GetFreqHiLimit(uint8_t band) { - band %= 4; - uint32_t lim[] = {108000000, 108000000, 90000000, 76000000}; //Hz - return lim[band % 4]; + band %= 4; + uint32_t lim[] = { 108000000, 108000000, 90000000, 76000000 }; //Hz + return lim[band % 4]; } - - // Zephyr device initialization function static int bk1080_init_device(const struct device *dev) { LOG_INF("Initializing BK1080 device"); - + // Initialize the BK1080 hardware BK1080_POWER_DIR_OUT; BK1080_POWER_OFF; @@ -332,12 +328,12 @@ static int bk1080_init_device(const struct device *dev) BK1080_SCK_DIR_OUT; BK1080_SDA_DIR_OUT; - BK1080_Init(0,0); - + BK1080_Init(0, 0); + // Mark as initialized struct bk1080_data *data = dev->data; data->initialized = true; - + LOG_INF("BK1080 device initialized successfully"); return 0; } @@ -353,11 +349,11 @@ static const struct bk1080_driver_api { }; // Register the device with Zephyr -DEVICE_DT_INST_DEFINE(0, /* Instance 0 */ - bk1080_init_device, /* Init function */ - NULL, /* PM device */ - &bk1080_device_data, /* Device data */ - &bk1080_cfg, /* Device config */ - POST_KERNEL, /* Init level */ +DEVICE_DT_INST_DEFINE(0, /* Instance 0 */ + bk1080_init_device, /* Init function */ + NULL, /* PM device */ + &bk1080_device_data, /* Device data */ + &bk1080_cfg, /* Device config */ + POST_KERNEL, /* Init level */ CONFIG_BK1080_INIT_PRIORITY, /* Init priority */ - &bk1080_api); /* API */ + &bk1080_api); /* API */ diff --git a/platform/drivers-zephyr/baseband/bk1080/bk1080.h b/platform/drivers-zephyr/baseband/bk1080/bk1080.h index d31a48eb07..89fb13e390 100644 --- a/platform/drivers-zephyr/baseband/bk1080/bk1080.h +++ b/platform/drivers-zephyr/baseband/bk1080/bk1080.h @@ -14,43 +14,44 @@ extern "C" { #endif - enum BK1080_Register_t { - BK1080_REG_00 = 0x00U, - BK1080_REG_02_POWER_CONFIGURATION = 0x02U, - BK1080_REG_03_CHANNEL = 0x03U, - BK1080_REG_05_SYSTEM_CONFIGURATION2 = 0x05U, - BK1080_REG_07 = 0x07U, - BK1080_REG_10 = 0x0AU, - BK1080_REG_25_INTERNAL = 0x19U, + BK1080_REG_00 = 0x00U, + BK1080_REG_02_POWER_CONFIGURATION = 0x02U, + BK1080_REG_03_CHANNEL = 0x03U, + BK1080_REG_05_SYSTEM_CONFIGURATION2 = 0x05U, + BK1080_REG_07 = 0x07U, + BK1080_REG_10 = 0x0AU, + BK1080_REG_25_INTERNAL = 0x19U, }; typedef enum BK1080_Register_t BK1080_Register_t; // REG 07 -#define BK1080_REG_07_SHIFT_FREQD 4 -#define BK1080_REG_07_SHIFT_SNR 0 +#define BK1080_REG_07_SHIFT_FREQD 4 +#define BK1080_REG_07_SHIFT_SNR 0 -#define BK1080_REG_07_MASK_FREQD (0xFFFU << BK1080_REG_07_SHIFT_FREQD) -#define BK1080_REG_07_MASK_SNR (0x00FU << BK1080_REG_07_SHIFT_SNR) +#define BK1080_REG_07_MASK_FREQD (0xFFFU << BK1080_REG_07_SHIFT_FREQD) +#define BK1080_REG_07_MASK_SNR (0x00FU << BK1080_REG_07_SHIFT_SNR) -#define BK1080_REG_07_GET_FREQD(x) (((x) & BK1080_REG_07_MASK_FREQD) >> BK1080_REG_07_SHIFT_FREQD) -#define BK1080_REG_07_GET_SNR(x) (((x) & BK1080_REG_07_MASK_SNR) >> BK1080_REG_07_SHIFT_SNR) +#define BK1080_REG_07_GET_FREQD(x) \ + (((x) & BK1080_REG_07_MASK_FREQD) >> BK1080_REG_07_SHIFT_FREQD) +#define BK1080_REG_07_GET_SNR(x) \ + (((x) & BK1080_REG_07_MASK_SNR) >> BK1080_REG_07_SHIFT_SNR) // REG 10 -#define BK1080_REG_10_SHIFT_AFCRL 12 -#define BK1080_REG_10_SHIFT_RSSI 0 - -#define BK1080_REG_10_MASK_AFCRL (0x01U << BK1080_REG_10_SHIFT_AFCRL) -#define BK1080_REG_10_MASK_RSSI (0xFFU << BK1080_REG_10_SHIFT_RSSI) +#define BK1080_REG_10_SHIFT_AFCRL 12 +#define BK1080_REG_10_SHIFT_RSSI 0 -#define BK1080_REG_10_AFCRL_NOT_RAILED (0U << BK1080_REG_10_SHIFT_AFCRL) -#define BK1080_REG_10_AFCRL_RAILED (1U << BK1080_REG_10_SHIFT_AFCRL) +#define BK1080_REG_10_MASK_AFCRL (0x01U << BK1080_REG_10_SHIFT_AFCRL) +#define BK1080_REG_10_MASK_RSSI (0xFFU << BK1080_REG_10_SHIFT_RSSI) -#define BK1080_REG_10_GET_RSSI(x) (((x) & BK1080_REG_10_MASK_RSSI) >> BK1080_REG_10_SHIFT_RSSI) +#define BK1080_REG_10_AFCRL_NOT_RAILED (0U << BK1080_REG_10_SHIFT_AFCRL) +#define BK1080_REG_10_AFCRL_RAILED (1U << BK1080_REG_10_SHIFT_AFCRL) +#define BK1080_REG_10_GET_RSSI(x) \ + (((x) & BK1080_REG_10_MASK_RSSI) >> BK1080_REG_10_SHIFT_RSSI) extern uint16_t BK1080_BaseFrequency; extern uint16_t BK1080_FrequencyDeviation; diff --git a/platform/drivers-zephyr/baseband/bk4819/bk4819.c b/platform/drivers-zephyr/baseband/bk4819/bk4819.c index ffacb3dcb2..363713108d 100644 --- a/platform/drivers-zephyr/baseband/bk4819/bk4819.c +++ b/platform/drivers-zephyr/baseband/bk4819/bk4819.c @@ -19,27 +19,29 @@ LOG_MODULE_REGISTER(bk4819, LOG_LEVEL_DBG); #define BK4819_NODE DT_PATH(bk4819) /* get pin definition from DTS */ -static const struct gpio_dt_spec clk_gpio = GPIO_DT_SPEC_GET(BK4819_NODE, sclk_gpios); -static const struct gpio_dt_spec data_gpio = GPIO_DT_SPEC_GET(BK4819_NODE, sdata_gpios); -static const struct gpio_dt_spec scn_gpio = GPIO_DT_SPEC_GET(BK4819_NODE, scn_gpios); +static const struct gpio_dt_spec clk_gpio = GPIO_DT_SPEC_GET(BK4819_NODE, + sclk_gpios); +static const struct gpio_dt_spec data_gpio = GPIO_DT_SPEC_GET(BK4819_NODE, + sdata_gpios); +static const struct gpio_dt_spec scn_gpio = GPIO_DT_SPEC_GET(BK4819_NODE, + scn_gpios); // GPIO control macros for SCK (Clock) #define BK4819_SCK_DIR_OUT gpio_pin_configure_dt(&clk_gpio, GPIO_OUTPUT) -#define BK4819_SCK_HIGH gpio_pin_set_dt(&clk_gpio, 1) -#define BK4819_SCK_LOW gpio_pin_set_dt(&clk_gpio, 0) +#define BK4819_SCK_HIGH gpio_pin_set_dt(&clk_gpio, 1) +#define BK4819_SCK_LOW gpio_pin_set_dt(&clk_gpio, 0) // GPIO control macros for SDA (Serial Data) #define BK4819_SDA_DIR_OUT gpio_pin_configure_dt(&data_gpio, GPIO_OUTPUT) -#define BK4819_SDA_DIR_IN gpio_pin_configure_dt(&data_gpio, GPIO_INPUT) -#define BK4819_SDA_HIGH gpio_pin_set_dt(&data_gpio, 1) -#define BK4819_SDA_LOW gpio_pin_set_dt(&data_gpio, 0) -#define BK4819_SDA_READ gpio_pin_get_dt(&data_gpio) +#define BK4819_SDA_DIR_IN gpio_pin_configure_dt(&data_gpio, GPIO_INPUT) +#define BK4819_SDA_HIGH gpio_pin_set_dt(&data_gpio, 1) +#define BK4819_SDA_LOW gpio_pin_set_dt(&data_gpio, 0) +#define BK4819_SDA_READ gpio_pin_get_dt(&data_gpio) // GPIO control macros for FM POWER #define BK4819_SCN_DIR_OUT gpio_pin_configure_dt(&scn_gpio, GPIO_OUTPUT) -#define BK4819_SCN_SELECT gpio_pin_set_dt(&scn_gpio, 1) -#define BK4819_SCN_DESELECT gpio_pin_set_dt(&scn_gpio, 0) - +#define BK4819_SCN_SELECT gpio_pin_set_dt(&scn_gpio, 1) +#define BK4819_SCN_DESELECT gpio_pin_set_dt(&scn_gpio, 0) // Forward declaration for device initialization static int bk4819_init_device(const struct device *dev); @@ -56,18 +58,13 @@ static const struct bk4819_config { // Device data structure static struct bk4819_data { bool initialized; -} bk4819_device_data = { - .initialized = false -}; - - +} bk4819_device_data = { .initialized = false }; static void spi_write_byte(uint8_t data) { BK4819_SCK_LOW; BK4819_SDA_DIR_OUT; - for (uint8_t i = 0; i < 8; i++) - { + for (uint8_t i = 0; i < 8; i++) { if (data & 0x80) BK4819_SDA_HIGH; else @@ -92,8 +89,7 @@ static uint16_t spi_read_half_word(void) uint16_t data = 0; BK4819_SDA_DIR_IN; BK4819_SCK_LOW; - for (uint8_t i = 0; i < 16; i++) - { + for (uint8_t i = 0; i < 16; i++) { data <<= 1; BK4819_SCK_LOW; delayUs(1); @@ -195,7 +191,8 @@ void bk4819_init(void) uint8_t bk4819_int_get(bk4819_int_t interrupt) { - if ((ReadRegister(BK4819_REG_0C) & BIT(0x01)) == 0) return 0; + if ((ReadRegister(BK4819_REG_0C) & BIT(0x01)) == 0) + return 0; return ReadRegister(BK4819_REG_02 & interrupt); } @@ -233,26 +230,27 @@ void bk4819_set_modulation(bool is_FM) void bk4819_tx_on(void) { //gpio_clearPin(MIC_SPK_EN); - WriteRegister(BK4819_REG_30, 0x00); // reset + WriteRegister(BK4819_REG_30, 0x00); // reset WriteRegister(BK4819_REG_30, - BK4819_REG30_REVERSE1_ENABLE | BK4819_REG30_REVERSE2_ENABLE | - BK4819_REG30_VCO_CALIBRATION | - BK4819_REG30_MIC_ADC_ENABLE | BK4819_REG30_TX_DSP_ENABLE | - BK4819_REG30_PLL_VCO_ENABLE | - BK4819_REG30_PA_GAIN_ENABLE); + BK4819_REG30_REVERSE1_ENABLE | BK4819_REG30_REVERSE2_ENABLE + | BK4819_REG30_VCO_CALIBRATION + | BK4819_REG30_MIC_ADC_ENABLE | BK4819_REG30_TX_DSP_ENABLE + | BK4819_REG30_PLL_VCO_ENABLE + | BK4819_REG30_PA_GAIN_ENABLE); } -void bk4819_rtx_off(void){ - WriteRegister(BK4819_REG_30, 0x00); // reset +void bk4819_rtx_off(void) +{ + WriteRegister(BK4819_REG_30, 0x00); // reset WriteRegister(BK4819_REG_30, BK4819_REG_30_ENABLE_AF_DAC); } void bk4819_SetFilterBandwidth(uint8_t bandwidth) { - uint16_t Value = ReadRegister(0x43); + uint16_t Value = ReadRegister(0x43); if (bandwidth) { // 25kHz WriteRegister(0x43, (Value & ~0x30) | 32); - } else { //12.5kHz + } else { //12.5kHz WriteRegister(0x43, (Value & ~0x30) | 0); } } @@ -286,7 +284,7 @@ void bk4819_SetFilterBandwidth(uint8_t bandwidth) // uint16_t reg = 0; // uint8_t PaBias = 0; // uint8_t PaGainValues = 0; - + // // NOTE: PaGainValues taken straight from disassembly. // // Determine the PaGainValues based on power @@ -325,12 +323,9 @@ void bk4819_gpio_pin_set(uint8_t Pin, bool bSet) // Enable GPIO output (set REG_33<15:8> to 0x00) // HACK: this enables all GPIO pins as output BK4819_GpioOutState &= 0x00FF; - if (bSet) - { + if (bSet) { BK4819_GpioOutState |= (0x0080 >> Pin); - } - else - { + } else { BK4819_GpioOutState &= ~(0x0080 >> Pin); } WriteRegister(BK4819_REG_33, BK4819_GpioOutState); @@ -339,18 +334,22 @@ void bk4819_gpio_pin_set(uint8_t Pin, bool bSet) void bk4819_enable_tx_ctcss(uint16_t frequency) { // frequency is in .1 Hz units - uint32_t ctcss_reg_value = frequency * 2064888 / 100000 / 10; // Convert to register value for 26MHz XTAL at BK4918 in C62 + uint32_t ctcss_reg_value = + frequency * 2064888 / 100000 + / 10; // Convert to register value for 26MHz XTAL at BK4918 in C62 uint16_t reg = ReadRegister(BK4819_REG_51); reg |= BK4819_REG51_TX_CTCDSS_ENABLE | BK4819_REG51_CTCSCSS_MODE_SEL; WriteRegister(BK4819_REG_51, reg); - WriteRegister(BK4819_REG_07, (uint16_t) ctcss_reg_value); + WriteRegister(BK4819_REG_07, (uint16_t)ctcss_reg_value); } void bk4819_enable_rx_ctcss(uint16_t frequency) { - // frequency is in .1 Hz units - uint32_t ctcss_reg_value = frequency * 2064888 / 100000 / 10; // Convert to register value for 26MHz XTAL at BK4918 in C62 + // frequency is in .1 Hz units + uint32_t ctcss_reg_value = + frequency * 2064888 / 100000 + / 10; // Convert to register value for 26MHz XTAL at BK4918 in C62 uint16_t reg = ReadRegister(BK4819_REG_51); reg |= BK4819_REG51_CTCSCSS_MODE_SEL; @@ -365,12 +364,14 @@ void bk4819_enable_ctcss2(uint16_t frequency) WriteRegister(BK4819_REG_07, frequency | BIT(13)); } -void bk4819_enable_tx_cdcss(uint8_t code_type, uint8_t bit_sel, uint32_t cdcss_code) +void bk4819_enable_tx_cdcss(uint8_t code_type, uint8_t bit_sel, + uint32_t cdcss_code) { - WriteRegister(BK4819_REG_51, BK4819_REG51_TX_CTCDSS_ENABLE | BITV(code_type, 13) | BITV(bit_sel, 11)); + WriteRegister(BK4819_REG_51, BK4819_REG51_TX_CTCDSS_ENABLE + | BITV(code_type, 13) | BITV(bit_sel, 11)); WriteRegister(BK4819_REG_07, BITV(2, 13) | 0x0AD7); WriteRegister(BK4819_REG_08, BIT(15) | ((cdcss_code >> 12) & 0XFFF)); - WriteRegister(BK4819_REG_08, cdcss_code & 0XFFF); + WriteRegister(BK4819_REG_08, cdcss_code & 0XFFF); } void bk4819_disable_ctdcss(void) @@ -385,26 +386,21 @@ uint16_t bk4819_get_ctcss(void) return ReadRegister(BK4819_REG_0C) & BIT(10); } -void bk4819_enable_vox(uint8_t delay_time, - uint8_t interval_time, - uint16_t threshold_on, - uint16_t threshold_off) +void bk4819_enable_vox(uint8_t delay_time, uint8_t interval_time, + uint16_t threshold_on, uint16_t threshold_off) { WriteRegister(BK4819_REG_31, ReadRegister(BK4819_REG_31) | BIT(2)); WriteRegister(BK4819_REG_79, BITV(interval_time, 10) | threshold_off); WriteRegister(BK4819_REG_46, threshold_on); } -uint8_t bk4819_get_vox(void){ +uint8_t bk4819_get_vox(void) +{ return ReadRegister(BK4819_REG_0C) & BIT(2); } -void bk4819_set_Squelch(uint8_t RTSO, - uint8_t RTSC, - uint8_t ETSO, - uint8_t ETSC, - uint8_t GTSO, - uint8_t GTSC) +void bk4819_set_Squelch(uint8_t RTSO, uint8_t RTSC, uint8_t ETSO, uint8_t ETSC, + uint8_t GTSO, uint8_t GTSC) { WriteRegister(BK4819_REG_78, (RTSO << 8) | RTSC); WriteRegister(BK4819_REG_4F, (ETSC << 8) | ETSO); @@ -423,50 +419,58 @@ uint16_t bk4819_get_mic_level(void) return (ReadRegister(0x6f) & 0x7f) * 2; } -void bk4819_enable_freq_scan(uint8_t scna_time){ - WriteRegister(BK4819_REG_32, ReadRegister(BK4819_REG_32) | BITV(scna_time, 14)); +void bk4819_enable_freq_scan(uint8_t scna_time) +{ + WriteRegister(BK4819_REG_32, + ReadRegister(BK4819_REG_32) | BITV(scna_time, 14)); WriteRegister(BK4819_REG_32, ReadRegister(BK4819_REG_32) | 0x01); } -void bk4819_disable_freq_scan(void){ - WriteRegister(BK4819_REG_32, ReadRegister(BK4819_REG_32) & (~0x01)); +void bk4819_disable_freq_scan(void) +{ + WriteRegister(BK4819_REG_32, ReadRegister(BK4819_REG_32) & (~0x01)); } -uint8_t bk4819_get_scan_freq_flag(void){ +uint8_t bk4819_get_scan_freq_flag(void) +{ return ReadRegister(BK4819_REG_0D) & BIT(15); } -uint32_t bk4819_get_scan_freq(void){ - return ((ReadRegister(BK4819_REG_0D) << 16) | ReadRegister(BK4819_REG_0E)) / 10; +uint32_t bk4819_get_scan_freq(void) +{ + return ((ReadRegister(BK4819_REG_0D) << 16) | ReadRegister(BK4819_REG_0E)) + / 10; } void BK4819_SetAF(uint8_t AF) { - // AF Output Inverse Mode = Inverse - // Undocumented bits 0x2040 - // -// WriteRegister(BK4819_REG_47, 0x6040 | (AF << 8)); - WriteRegister(BK4819_REG_47, (6u << 12) | (AF << 8) | (1u << 6)); + // AF Output Inverse Mode = Inverse + // Undocumented bits 0x2040 + // + // WriteRegister(BK4819_REG_47, 0x6040 | (AF << 8)); + WriteRegister(BK4819_REG_47, (6u << 12) | (AF << 8) | (1u << 6)); } __inline uint16_t scale_freq(const uint16_t freq) { - return (((uint32_t)freq * 1048576u) + 50000u) / 100000u; // with rounding + return (((uint32_t)freq * 1048576u) + 50000u) / 100000u; // with rounding } // Play tone void BK4819_BeepStart(uint16_t Frequency, bool bTuningGainSwitch) { - //gpio_setPin(MIC_SPK_EN); - WriteRegister(BK4819_REG_50, 0x3B20); + //gpio_setPin(MIC_SPK_EN); + WriteRegister(BK4819_REG_50, 0x3B20); BK4819_SetAF(3); // AF Beep - uint16_t ToneConfig = BK4819_REG_70_ENABLE_TONE1; - ToneConfig |= 96u << BK4819_REG_70_SHIFT_TONE1_TUNING_GAIN; - WriteRegister(BK4819_REG_70, ToneConfig); + uint16_t ToneConfig = BK4819_REG_70_ENABLE_TONE1; + ToneConfig |= 96u << BK4819_REG_70_SHIFT_TONE1_TUNING_GAIN; + WriteRegister(BK4819_REG_70, ToneConfig); - WriteRegister(BK4819_REG_71, scale_freq(Frequency)); + WriteRegister(BK4819_REG_71, scale_freq(Frequency)); WriteRegister(BK4819_REG_30, 0); - WriteRegister(BK4819_REG_30, BK4819_REG_30_ENABLE_AF_DAC | BK4819_REG_30_ENABLE_DISC_MODE | BK4819_REG_30_ENABLE_TX_DSP); + WriteRegister(BK4819_REG_30, BK4819_REG_30_ENABLE_AF_DAC + | BK4819_REG_30_ENABLE_DISC_MODE + | BK4819_REG_30_ENABLE_TX_DSP); //usart0_IRQwrite("BK4819_PlayTone\r\n"); WriteRegister(BK4819_REG_50, 0x3B20); // for(int i = 0; i < 1000; i++) @@ -476,11 +480,10 @@ void BK4819_BeepStart(uint16_t Frequency, bool bTuningGainSwitch) // } } - void BK4819_BeepStop(void) { WriteRegister(BK4819_REG_50, 0xBB20); - // WriteRegister(BK4819_REG_30, 0xC1FE); + // WriteRegister(BK4819_REG_30, 0xC1FE); //BK4819_SetAF(1); } @@ -488,14 +491,14 @@ void BK4819_BeepStop(void) static int bk4819_init_device(const struct device *dev) { LOG_INF("Initializing BK4819 device"); - + // Initialize the BK4819 hardware bk4819_init(); - + // Mark as initialized struct bk4819_data *data = dev->data; data->initialized = true; - + LOG_INF("BK4819 device initialized successfully"); return 0; } @@ -511,11 +514,11 @@ static const struct bk4819_driver_api { }; // Register the device with Zephyr -DEVICE_DT_INST_DEFINE(0, /* Instance 0 */ - bk4819_init_device, /* Init function */ - NULL, /* PM device */ - &bk4819_device_data, /* Device data */ - &bk4819_cfg, /* Device config */ - POST_KERNEL, /* Init level */ +DEVICE_DT_INST_DEFINE(0, /* Instance 0 */ + bk4819_init_device, /* Init function */ + NULL, /* PM device */ + &bk4819_device_data, /* Device data */ + &bk4819_cfg, /* Device config */ + POST_KERNEL, /* Init level */ CONFIG_BK4819_INIT_PRIORITY, /* Init priority */ - &bk4819_api); /* API */ + &bk4819_api); /* API */ diff --git a/platform/drivers-zephyr/baseband/bk4819/bk4819.h b/platform/drivers-zephyr/baseband/bk4819/bk4819.h index 096cb242ba..0f3dda14c3 100644 --- a/platform/drivers-zephyr/baseband/bk4819/bk4819.h +++ b/platform/drivers-zephyr/baseband/bk4819/bk4819.h @@ -15,7 +15,6 @@ extern "C" { #endif - #define BK4819_REG_READ 0x80 #define BK4819_REG_WRITE 0x00 @@ -47,8 +46,7 @@ extern "C" { #define BK4819_SCAN_FRE_TIME_8 0x02 #define BK4819_SCAN_FRE_TIME_16 0x03 -typedef enum -{ +typedef enum { BK4819_REG_00 = 0x00, BK4819_REG_02 = 0x02, BK4819_REG_07 = 0x07, @@ -148,8 +146,7 @@ typedef enum BK4819_REG_7E = 0x7E, } bk4819_reg_t; -typedef enum -{ +typedef enum { BK4819_INT_FSKTF = BIT(15), // FSK TX Finished Interrupt BK4819_INT_FSKFFAE = BIT(14), // FSK FIFO Almost Empty interrupt BK4819_INT_FSKRXF = BIT(13), // FSK RX Finished interrupt @@ -167,8 +164,7 @@ typedef enum BK4819_INT_FSKRS = BIT(1) // FSK RX Sync interrupt } bk4819_int_t; -typedef enum -{ +typedef enum { BK4819_FLAG_DTMF_REV = BITV(0x8, 11), // DTMF/5 Tone code received BK4819_FLAG_FSK_RX_SNF = BIT(7), // FSK RX Sync Negative has been found BK4819_FLAG_FSK_RX_SPF = BIT(6), // FSK RX Sync Positive has been found @@ -177,10 +173,7 @@ typedef enum BK4819_FLAG_CDCSS_PNR = BIT(15), // CDCSS negative code received } bk4819_flag_t; -typedef enum -{ - BK4819_RDATA_ -} bk4819_rdata_t; +typedef enum { BK4819_RDATA_ } bk4819_rdata_t; // typedef enum // { @@ -194,7 +187,6 @@ typedef enum // bk4819_RX_ACG_GAIN_PAG = // } bk4819_RX_ACG_GAIN; - uint16_t ReadRegister(unsigned char reg); void WriteRegister(bk4819_reg_t reg, uint16_t data); @@ -298,7 +290,8 @@ void bk4819_enable_ctcss2(uint16_t frequency); * @param bit_sel 0: 23bit 1:24bit * @param cdcss_code cdcss code */ -void bk4819_enable_tx_cdcss(uint8_t code_type, uint8_t bit_sel, uint32_t cdcss_code); +void bk4819_enable_tx_cdcss(uint8_t code_type, uint8_t bit_sel, + uint32_t cdcss_code); /** * @brief Disable CTCSS/CDCSS @@ -326,7 +319,8 @@ void bk4819_SetFilterBandwidth(uint8_t bandwidth); * @param threshold_on Voice amplitude threshold for VOX on * @param threshold_off Voice amplitude threshold for VOX off */ -void bk4819_enable_vox(uint8_t delay_time, uint8_t interval_time, uint16_t threshold_on, uint16_t threshold_off); +void bk4819_enable_vox(uint8_t delay_time, uint8_t interval_time, + uint16_t threshold_on, uint16_t threshold_off); /** * @brief Get VOX indicator @@ -345,7 +339,8 @@ uint8_t bk4819_get_vox(void); * @param GTSO Glitch threshold for Squelch =1 * @param GTSC Glitch threshold for Squelch =0 */ -void bk4819_set_Squelch(uint8_t RTSO, uint8_t RTSC, uint8_t ETSO, uint8_t ETSC, uint8_t GTSO, uint8_t GTSC); +void bk4819_set_Squelch(uint8_t RTSO, uint8_t RTSC, uint8_t ETSO, uint8_t ETSC, + uint8_t GTSO, uint8_t GTSC); void BK4819_SetAF(uint8_t AF); @@ -391,257 +386,320 @@ void bk4819_gpio_pin_set(uint8_t Pin, bool bSet); void BK4819_BeepStart(uint16_t Frequency, bool bTuningGainSwitch); enum BK4819_GPIO_PIN_t { - BK4819_GPIO0_PIN28_RX_ENABLE = 0, - BK4819_GPIO1_PIN29_PA_ENABLE = 1, - BK4819_GPIO3_PIN31_UHF_LNA = 3, - BK4819_GPIO4_PIN32_VHF_LNA = 4, - BK4819_GPIO5_PIN1_RED = 5, - BK4819_GPIO6_PIN2_GREEN = 6, + BK4819_GPIO0_PIN28_RX_ENABLE = 0, + BK4819_GPIO1_PIN29_PA_ENABLE = 1, + BK4819_GPIO3_PIN31_UHF_LNA = 3, + BK4819_GPIO4_PIN32_VHF_LNA = 4, + BK4819_GPIO5_PIN1_RED = 5, + BK4819_GPIO6_PIN2_GREEN = 6, }; typedef enum BK4819_GPIO_PIN_t BK4819_GPIO_PIN_t; // REG 02 -#define BK4819_REG_02_SHIFT_FSK_TX_FINISHED 15 -#define BK4819_REG_02_SHIFT_FSK_FIFO_ALMOST_EMPTY 14 -#define BK4819_REG_02_SHIFT_FSK_RX_FINISHED 13 -#define BK4819_REG_02_SHIFT_FSK_FIFO_ALMOST_FULL 12 -#define BK4819_REG_02_SHIFT_DTMF_5TONE_FOUND 11 -#define BK4819_REG_02_SHIFT_CxCSS_TAIL 10 -#define BK4819_REG_02_SHIFT_CDCSS_FOUND 9 -#define BK4819_REG_02_SHIFT_CDCSS_LOST 8 -#define BK4819_REG_02_SHIFT_CTCSS_FOUND 7 -#define BK4819_REG_02_SHIFT_CTCSS_LOST 6 -#define BK4819_REG_02_SHIFT_VOX_FOUND 5 -#define BK4819_REG_02_SHIFT_VOX_LOST 4 -#define BK4819_REG_02_SHIFT_SQUELCH_FOUND 3 -#define BK4819_REG_02_SHIFT_SQUELCH_LOST 2 -#define BK4819_REG_02_SHIFT_FSK_RX_SYNC 1 - -#define BK4819_REG_02_MASK_FSK_TX_FINISHED (1U << BK4819_REG_02_SHIFT_FSK_TX) -#define BK4819_REG_02_MASK_FSK_FIFO_ALMOST_EMPTY (1U << BK4819_REG_02_SHIFT_FSK_FIFO_ALMOST_EMPTY) -#define BK4819_REG_02_MASK_FSK_RX_FINISHED (1U << BK4819_REG_02_SHIFT_FSK_RX_FINISHED) -#define BK4819_REG_02_MASK_FSK_FIFO_ALMOST_FULL (1U << BK4819_REG_02_SHIFT_FSK_FIFO_ALMOST_FULL) -#define BK4819_REG_02_MASK_DTMF_5TONE_FOUND (1U << BK4819_REG_02_SHIFT_DTMF_5TONE_FOUND) -#define BK4819_REG_02_MASK_CxCSS_TAIL (1U << BK4819_REG_02_SHIFT_CxCSS_TAIL) -#define BK4819_REG_02_MASK_CDCSS_FOUND (1U << BK4819_REG_02_SHIFT_CDCSS_FOUND) -#define BK4819_REG_02_MASK_CDCSS_LOST (1U << BK4819_REG_02_SHIFT_CDCSS_LOST) -#define BK4819_REG_02_MASK_CTCSS_FOUND (1U << BK4819_REG_02_SHIFT_CTCSS_FOUND) -#define BK4819_REG_02_MASK_CTCSS_LOST (1U << BK4819_REG_02_SHIFT_CTCSS_LOST) -#define BK4819_REG_02_MASK_VOX_FOUND (1U << BK4819_REG_02_SHIFT_VOX_FOUND) -#define BK4819_REG_02_MASK_VOX_LOST (1U << BK4819_REG_02_SHIFT_VOX_LOST) -#define BK4819_REG_02_MASK_SQUELCH_FOUND (1U << BK4819_REG_02_SHIFT_SQUELCH_FOUND) -#define BK4819_REG_02_MASK_SQUELCH_LOST (1U << BK4819_REG_02_SHIFT_SQUELCH_LOST) -#define BK4819_REG_02_MASK_FSK_RX_SYNC (1U << BK4819_REG_02_SHIFT_FSK_RX_SYNC) - -#define BK4819_REG_02_FSK_TX_FINISHED (1U << BK4819_REG_02_SHIFT_FSK_TX_FINISHED) -#define BK4819_REG_02_FSK_FIFO_ALMOST_EMPTY (1U << BK4819_REG_02_SHIFT_FSK_FIFO_ALMOST_EMPTY) -#define BK4819_REG_02_FSK_RX_FINISHED (1U << BK4819_REG_02_SHIFT_FSK_RX_FINISHED) -#define BK4819_REG_02_FSK_FIFO_ALMOST_FULL (1U << BK4819_REG_02_SHIFT_FSK_FIFO_ALMOST_FULL) -#define BK4819_REG_02_DTMF_5TONE_FOUND (1U << BK4819_REG_02_SHIFT_DTMF_5TONE_FOUND) -#define BK4819_REG_02_CxCSS_TAIL (1U << BK4819_REG_02_SHIFT_CxCSS_TAIL) -#define BK4819_REG_02_CDCSS_FOUND (1U << BK4819_REG_02_SHIFT_CDCSS_FOUND) -#define BK4819_REG_02_CDCSS_LOST (1U << BK4819_REG_02_SHIFT_CDCSS_LOST) -#define BK4819_REG_02_CTCSS_FOUND (1U << BK4819_REG_02_SHIFT_CTCSS_FOUND) -#define BK4819_REG_02_CTCSS_LOST (1U << BK4819_REG_02_SHIFT_CTCSS_LOST) -#define BK4819_REG_02_VOX_FOUND (1U << BK4819_REG_02_SHIFT_VOX_FOUND) -#define BK4819_REG_02_VOX_LOST (1U << BK4819_REG_02_SHIFT_VOX_LOST) -#define BK4819_REG_02_SQUELCH_FOUND (1U << BK4819_REG_02_SHIFT_SQUELCH_FOUND) -#define BK4819_REG_02_SQUELCH_LOST (1U << BK4819_REG_02_SHIFT_SQUELCH_LOST) -#define BK4819_REG_02_FSK_RX_SYNC (1U << BK4819_REG_02_SHIFT_FSK_RX_SYNC) +#define BK4819_REG_02_SHIFT_FSK_TX_FINISHED 15 +#define BK4819_REG_02_SHIFT_FSK_FIFO_ALMOST_EMPTY 14 +#define BK4819_REG_02_SHIFT_FSK_RX_FINISHED 13 +#define BK4819_REG_02_SHIFT_FSK_FIFO_ALMOST_FULL 12 +#define BK4819_REG_02_SHIFT_DTMF_5TONE_FOUND 11 +#define BK4819_REG_02_SHIFT_CxCSS_TAIL 10 +#define BK4819_REG_02_SHIFT_CDCSS_FOUND 9 +#define BK4819_REG_02_SHIFT_CDCSS_LOST 8 +#define BK4819_REG_02_SHIFT_CTCSS_FOUND 7 +#define BK4819_REG_02_SHIFT_CTCSS_LOST 6 +#define BK4819_REG_02_SHIFT_VOX_FOUND 5 +#define BK4819_REG_02_SHIFT_VOX_LOST 4 +#define BK4819_REG_02_SHIFT_SQUELCH_FOUND 3 +#define BK4819_REG_02_SHIFT_SQUELCH_LOST 2 +#define BK4819_REG_02_SHIFT_FSK_RX_SYNC 1 + +#define BK4819_REG_02_MASK_FSK_TX_FINISHED (1U << BK4819_REG_02_SHIFT_FSK_TX) +#define BK4819_REG_02_MASK_FSK_FIFO_ALMOST_EMPTY \ + (1U << BK4819_REG_02_SHIFT_FSK_FIFO_ALMOST_EMPTY) +#define BK4819_REG_02_MASK_FSK_RX_FINISHED \ + (1U << BK4819_REG_02_SHIFT_FSK_RX_FINISHED) +#define BK4819_REG_02_MASK_FSK_FIFO_ALMOST_FULL \ + (1U << BK4819_REG_02_SHIFT_FSK_FIFO_ALMOST_FULL) +#define BK4819_REG_02_MASK_DTMF_5TONE_FOUND \ + (1U << BK4819_REG_02_SHIFT_DTMF_5TONE_FOUND) +#define BK4819_REG_02_MASK_CxCSS_TAIL (1U << BK4819_REG_02_SHIFT_CxCSS_TAIL) +#define BK4819_REG_02_MASK_CDCSS_FOUND (1U << BK4819_REG_02_SHIFT_CDCSS_FOUND) +#define BK4819_REG_02_MASK_CDCSS_LOST (1U << BK4819_REG_02_SHIFT_CDCSS_LOST) +#define BK4819_REG_02_MASK_CTCSS_FOUND (1U << BK4819_REG_02_SHIFT_CTCSS_FOUND) +#define BK4819_REG_02_MASK_CTCSS_LOST (1U << BK4819_REG_02_SHIFT_CTCSS_LOST) +#define BK4819_REG_02_MASK_VOX_FOUND (1U << BK4819_REG_02_SHIFT_VOX_FOUND) +#define BK4819_REG_02_MASK_VOX_LOST (1U << BK4819_REG_02_SHIFT_VOX_LOST) +#define BK4819_REG_02_MASK_SQUELCH_FOUND \ + (1U << BK4819_REG_02_SHIFT_SQUELCH_FOUND) +#define BK4819_REG_02_MASK_SQUELCH_LOST (1U << BK4819_REG_02_SHIFT_SQUELCH_LOST) +#define BK4819_REG_02_MASK_FSK_RX_SYNC (1U << BK4819_REG_02_SHIFT_FSK_RX_SYNC) + +#define BK4819_REG_02_FSK_TX_FINISHED \ + (1U << BK4819_REG_02_SHIFT_FSK_TX_FINISHED) +#define BK4819_REG_02_FSK_FIFO_ALMOST_EMPTY \ + (1U << BK4819_REG_02_SHIFT_FSK_FIFO_ALMOST_EMPTY) +#define BK4819_REG_02_FSK_RX_FINISHED \ + (1U << BK4819_REG_02_SHIFT_FSK_RX_FINISHED) +#define BK4819_REG_02_FSK_FIFO_ALMOST_FULL \ + (1U << BK4819_REG_02_SHIFT_FSK_FIFO_ALMOST_FULL) +#define BK4819_REG_02_DTMF_5TONE_FOUND \ + (1U << BK4819_REG_02_SHIFT_DTMF_5TONE_FOUND) +#define BK4819_REG_02_CxCSS_TAIL (1U << BK4819_REG_02_SHIFT_CxCSS_TAIL) +#define BK4819_REG_02_CDCSS_FOUND (1U << BK4819_REG_02_SHIFT_CDCSS_FOUND) +#define BK4819_REG_02_CDCSS_LOST (1U << BK4819_REG_02_SHIFT_CDCSS_LOST) +#define BK4819_REG_02_CTCSS_FOUND (1U << BK4819_REG_02_SHIFT_CTCSS_FOUND) +#define BK4819_REG_02_CTCSS_LOST (1U << BK4819_REG_02_SHIFT_CTCSS_LOST) +#define BK4819_REG_02_VOX_FOUND (1U << BK4819_REG_02_SHIFT_VOX_FOUND) +#define BK4819_REG_02_VOX_LOST (1U << BK4819_REG_02_SHIFT_VOX_LOST) +#define BK4819_REG_02_SQUELCH_FOUND (1U << BK4819_REG_02_SHIFT_SQUELCH_FOUND) +#define BK4819_REG_02_SQUELCH_LOST (1U << BK4819_REG_02_SHIFT_SQUELCH_LOST) +#define BK4819_REG_02_FSK_RX_SYNC (1U << BK4819_REG_02_SHIFT_FSK_RX_SYNC) // REG 07 -#define BK4819_REG_07_SHIFT_FREQUENCY_MODE 13 -#define BK4819_REG_07_SHIFT_FREQUENCY 0 +#define BK4819_REG_07_SHIFT_FREQUENCY_MODE 13 +#define BK4819_REG_07_SHIFT_FREQUENCY 0 -#define BK4819_REG_07_MASK_FREQUENCY_MODE (0x0007U << BK4819_REG_07_SHIFT_FREQUENCY_MODE) -#define BK4819_REG_07_MASK_FREQUENCY (0x1FFFU << BK4819_REG_07_SHIFT_FREQUENCY) +#define BK4819_REG_07_MASK_FREQUENCY_MODE \ + (0x0007U << BK4819_REG_07_SHIFT_FREQUENCY_MODE) +#define BK4819_REG_07_MASK_FREQUENCY (0x1FFFU << BK4819_REG_07_SHIFT_FREQUENCY) -#define BK4819_REG_07_MODE_CTC1 (0U << BK4819_REG_07_SHIFT_FREQUENCY_MODE) -#define BK4819_REG_07_MODE_CTC2 (1U << BK4819_REG_07_SHIFT_FREQUENCY_MODE) -#define BK4819_REG_07_MODE_CDCSS (2U << BK4819_REG_07_SHIFT_FREQUENCY_MODE) +#define BK4819_REG_07_MODE_CTC1 (0U << BK4819_REG_07_SHIFT_FREQUENCY_MODE) +#define BK4819_REG_07_MODE_CTC2 (1U << BK4819_REG_07_SHIFT_FREQUENCY_MODE) +#define BK4819_REG_07_MODE_CDCSS (2U << BK4819_REG_07_SHIFT_FREQUENCY_MODE) // REG 24 -#define BK4819_REG_24_SHIFT_UNKNOWN_15 15 -#define BK4819_REG_24_SHIFT_THRESHOLD 7 -#define BK4819_REG_24_SHIFT_UNKNOWN_6 6 -#define BK4819_REG_24_SHIFT_ENABLE 5 -#define BK4819_REG_24_SHIFT_SELECT 4 -#define BK4819_REG_24_SHIFT_MAX_SYMBOLS 0 +#define BK4819_REG_24_SHIFT_UNKNOWN_15 15 +#define BK4819_REG_24_SHIFT_THRESHOLD 7 +#define BK4819_REG_24_SHIFT_UNKNOWN_6 6 +#define BK4819_REG_24_SHIFT_ENABLE 5 +#define BK4819_REG_24_SHIFT_SELECT 4 +#define BK4819_REG_24_SHIFT_MAX_SYMBOLS 0 -#define BK4819_REG_24_MASK_THRESHOLD (0x2Fu << BK4819_REG_24_SHIFT_THRESHOLD) -#define BK4819_REG_24_MASK_ENABLE (0x01u << BK4819_REG_24_SHIFT_ENABLE) -#define BK4819_REG_24_MASK_SELECT (0x04u << BK4819_REG_24_SHIFT_SELECT) -#define BK4819_REG_24_MASK_MAX_SYMBOLS (0x0Fu << BK4819_REG_24_SHIFT_MAX_SYMBOLS) +#define BK4819_REG_24_MASK_THRESHOLD (0x2Fu << BK4819_REG_24_SHIFT_THRESHOLD) +#define BK4819_REG_24_MASK_ENABLE (0x01u << BK4819_REG_24_SHIFT_ENABLE) +#define BK4819_REG_24_MASK_SELECT (0x04u << BK4819_REG_24_SHIFT_SELECT) +#define BK4819_REG_24_MASK_MAX_SYMBOLS \ + (0x0Fu << BK4819_REG_24_SHIFT_MAX_SYMBOLS) -#define BK4819_REG_24_ENABLE (1u << BK4819_REG_24_SHIFT_ENABLE) -#define BK4819_REG_24_DISABLE (0u << BK4819_REG_24_SHIFT_ENABLE) -#define BK4819_REG_24_SELECT_DTMF (1u << BK4819_REG_24_SHIFT_SELECT) -#define BK4819_REG_24_SELECT_SELCALL (0u << BK4819_REG_24_SHIFT_SELECT) +#define BK4819_REG_24_ENABLE (1u << BK4819_REG_24_SHIFT_ENABLE) +#define BK4819_REG_24_DISABLE (0u << BK4819_REG_24_SHIFT_ENABLE) +#define BK4819_REG_24_SELECT_DTMF (1u << BK4819_REG_24_SHIFT_SELECT) +#define BK4819_REG_24_SELECT_SELCALL (0u << BK4819_REG_24_SHIFT_SELECT) // REG 30 -#define BK4819_REG_30_SHIFT_ENABLE_VCO_CALIB 15 -#define BK4819_REG_30_SHIFT_ENABLE_UNKNOWN 14 -#define BK4819_REG_30_SHIFT_ENABLE_RX_LINK 10 -#define BK4819_REG_30_SHIFT_ENABLE_AF_DAC 9 -#define BK4819_REG_30_SHIFT_ENABLE_DISC_MODE 8 -#define BK4819_REG_30_SHIFT_ENABLE_PLL_VCO 4 -#define BK4819_REG_30_SHIFT_ENABLE_PA_GAIN 3 -#define BK4819_REG_30_SHIFT_ENABLE_MIC_ADC 2 -#define BK4819_REG_30_SHIFT_ENABLE_TX_DSP 1 -#define BK4819_REG_30_SHIFT_ENABLE_RX_DSP 0 - -#define BK4819_REG_30_MASK_ENABLE_VCO_CALIB (0x1U << BK4819_REG_30_SHIFT_ENABLE_VCO_CALIB) -#define BK4819_REG_30_MASK_ENABLE_UNKNOWN (0x1U << BK4819_REG_30_SHIFT_ENABLE_UNKNOWN) -#define BK4819_REG_30_MASK_ENABLE_RX_LINK (0xFU << BK4819_REG_30_SHIFT_ENABLE_RX_LINK) -#define BK4819_REG_30_MASK_ENABLE_AF_DAC (0x1U << BK4819_REG_30_SHIFT_ENABLE_AF_DAC) -#define BK4819_REG_30_MASK_ENABLE_DISC_MODE (0x1U << BK4819_REG_30_SHIFT_ENABLE_DISC_MODE) -#define BK4819_REG_30_MASK_ENABLE_PLL_VCO (0xFU << BK4819_REG_30_SHIFT_ENABLE_PLL_VCO) -#define BK4819_REG_30_MASK_ENABLE_PA_GAIN (0x1U << BK4819_REG_30_SHIFT_ENABLE_PA_GAIN) -#define BK4819_REG_30_MASK_ENABLE_MIC_ADC (0x1U << BK4819_REG_30_SHIFT_ENABLE_MIC_ADC) -#define BK4819_REG_30_MASK_ENABLE_TX_DSP (0x1U << BK4819_REG_30_SHIFT_ENABLE_TX_DSP) -#define BK4819_REG_30_MASK_ENABLE_RX_DSP (0x1U << BK4819_REG_30_SHIFT_ENABLE_RX_DSP) +#define BK4819_REG_30_SHIFT_ENABLE_VCO_CALIB 15 +#define BK4819_REG_30_SHIFT_ENABLE_UNKNOWN 14 +#define BK4819_REG_30_SHIFT_ENABLE_RX_LINK 10 +#define BK4819_REG_30_SHIFT_ENABLE_AF_DAC 9 +#define BK4819_REG_30_SHIFT_ENABLE_DISC_MODE 8 +#define BK4819_REG_30_SHIFT_ENABLE_PLL_VCO 4 +#define BK4819_REG_30_SHIFT_ENABLE_PA_GAIN 3 +#define BK4819_REG_30_SHIFT_ENABLE_MIC_ADC 2 +#define BK4819_REG_30_SHIFT_ENABLE_TX_DSP 1 +#define BK4819_REG_30_SHIFT_ENABLE_RX_DSP 0 + +#define BK4819_REG_30_MASK_ENABLE_VCO_CALIB \ + (0x1U << BK4819_REG_30_SHIFT_ENABLE_VCO_CALIB) +#define BK4819_REG_30_MASK_ENABLE_UNKNOWN \ + (0x1U << BK4819_REG_30_SHIFT_ENABLE_UNKNOWN) +#define BK4819_REG_30_MASK_ENABLE_RX_LINK \ + (0xFU << BK4819_REG_30_SHIFT_ENABLE_RX_LINK) +#define BK4819_REG_30_MASK_ENABLE_AF_DAC \ + (0x1U << BK4819_REG_30_SHIFT_ENABLE_AF_DAC) +#define BK4819_REG_30_MASK_ENABLE_DISC_MODE \ + (0x1U << BK4819_REG_30_SHIFT_ENABLE_DISC_MODE) +#define BK4819_REG_30_MASK_ENABLE_PLL_VCO \ + (0xFU << BK4819_REG_30_SHIFT_ENABLE_PLL_VCO) +#define BK4819_REG_30_MASK_ENABLE_PA_GAIN \ + (0x1U << BK4819_REG_30_SHIFT_ENABLE_PA_GAIN) +#define BK4819_REG_30_MASK_ENABLE_MIC_ADC \ + (0x1U << BK4819_REG_30_SHIFT_ENABLE_MIC_ADC) +#define BK4819_REG_30_MASK_ENABLE_TX_DSP \ + (0x1U << BK4819_REG_30_SHIFT_ENABLE_TX_DSP) +#define BK4819_REG_30_MASK_ENABLE_RX_DSP \ + (0x1U << BK4819_REG_30_SHIFT_ENABLE_RX_DSP) enum { - BK4819_REG_30_ENABLE_VCO_CALIB = (0x1U << BK4819_REG_30_SHIFT_ENABLE_VCO_CALIB), - BK4819_REG_30_DISABLE_VCO_CALIB = (0x0U << BK4819_REG_30_SHIFT_ENABLE_VCO_CALIB), - BK4819_REG_30_ENABLE_UNKNOWN = (0x1U << BK4819_REG_30_SHIFT_ENABLE_UNKNOWN), - BK4819_REG_30_DISABLE_UNKNOWN = (0x0U << BK4819_REG_30_SHIFT_ENABLE_UNKNOWN), - BK4819_REG_30_ENABLE_RX_LINK = (0xFU << BK4819_REG_30_SHIFT_ENABLE_RX_LINK), - BK4819_REG_30_DISABLE_RX_LINK = (0x0U << BK4819_REG_30_SHIFT_ENABLE_RX_LINK), - BK4819_REG_30_ENABLE_AF_DAC = (0x1U << BK4819_REG_30_SHIFT_ENABLE_AF_DAC), - BK4819_REG_30_DISABLE_AF_DAC = (0x0U << BK4819_REG_30_SHIFT_ENABLE_AF_DAC), - BK4819_REG_30_ENABLE_DISC_MODE = (0x1U << BK4819_REG_30_SHIFT_ENABLE_DISC_MODE), - BK4819_REG_30_DISABLE_DISC_MODE = (0x0U << BK4819_REG_30_SHIFT_ENABLE_DISC_MODE), - BK4819_REG_30_ENABLE_PLL_VCO = (0xFU << BK4819_REG_30_SHIFT_ENABLE_PLL_VCO), - BK4819_REG_30_DISABLE_PLL_VCO = (0x0U << BK4819_REG_30_SHIFT_ENABLE_PLL_VCO), - BK4819_REG_30_ENABLE_PA_GAIN = (0x1U << BK4819_REG_30_SHIFT_ENABLE_PA_GAIN), - BK4819_REG_30_DISABLE_PA_GAIN = (0x0U << BK4819_REG_30_SHIFT_ENABLE_PA_GAIN), - BK4819_REG_30_ENABLE_MIC_ADC = (0x1U << BK4819_REG_30_SHIFT_ENABLE_MIC_ADC), - BK4819_REG_30_DISABLE_MIC_ADC = (0x0U << BK4819_REG_30_SHIFT_ENABLE_MIC_ADC), - BK4819_REG_30_ENABLE_TX_DSP = (0x1U << BK4819_REG_30_SHIFT_ENABLE_TX_DSP), - BK4819_REG_30_DISABLE_TX_DSP = (0x0U << BK4819_REG_30_SHIFT_ENABLE_TX_DSP), - BK4819_REG_30_ENABLE_RX_DSP = (0x1U << BK4819_REG_30_SHIFT_ENABLE_RX_DSP), - BK4819_REG_30_DISABLE_RX_DSP = (0x0U << BK4819_REG_30_SHIFT_ENABLE_RX_DSP), + BK4819_REG_30_ENABLE_VCO_CALIB = (0x1U + << BK4819_REG_30_SHIFT_ENABLE_VCO_CALIB), + BK4819_REG_30_DISABLE_VCO_CALIB = (0x0U + << BK4819_REG_30_SHIFT_ENABLE_VCO_CALIB), + BK4819_REG_30_ENABLE_UNKNOWN = (0x1U << BK4819_REG_30_SHIFT_ENABLE_UNKNOWN), + BK4819_REG_30_DISABLE_UNKNOWN = (0x0U + << BK4819_REG_30_SHIFT_ENABLE_UNKNOWN), + BK4819_REG_30_ENABLE_RX_LINK = (0xFU << BK4819_REG_30_SHIFT_ENABLE_RX_LINK), + BK4819_REG_30_DISABLE_RX_LINK = (0x0U + << BK4819_REG_30_SHIFT_ENABLE_RX_LINK), + BK4819_REG_30_ENABLE_AF_DAC = (0x1U << BK4819_REG_30_SHIFT_ENABLE_AF_DAC), + BK4819_REG_30_DISABLE_AF_DAC = (0x0U << BK4819_REG_30_SHIFT_ENABLE_AF_DAC), + BK4819_REG_30_ENABLE_DISC_MODE = (0x1U + << BK4819_REG_30_SHIFT_ENABLE_DISC_MODE), + BK4819_REG_30_DISABLE_DISC_MODE = (0x0U + << BK4819_REG_30_SHIFT_ENABLE_DISC_MODE), + BK4819_REG_30_ENABLE_PLL_VCO = (0xFU << BK4819_REG_30_SHIFT_ENABLE_PLL_VCO), + BK4819_REG_30_DISABLE_PLL_VCO = (0x0U + << BK4819_REG_30_SHIFT_ENABLE_PLL_VCO), + BK4819_REG_30_ENABLE_PA_GAIN = (0x1U << BK4819_REG_30_SHIFT_ENABLE_PA_GAIN), + BK4819_REG_30_DISABLE_PA_GAIN = (0x0U + << BK4819_REG_30_SHIFT_ENABLE_PA_GAIN), + BK4819_REG_30_ENABLE_MIC_ADC = (0x1U << BK4819_REG_30_SHIFT_ENABLE_MIC_ADC), + BK4819_REG_30_DISABLE_MIC_ADC = (0x0U + << BK4819_REG_30_SHIFT_ENABLE_MIC_ADC), + BK4819_REG_30_ENABLE_TX_DSP = (0x1U << BK4819_REG_30_SHIFT_ENABLE_TX_DSP), + BK4819_REG_30_DISABLE_TX_DSP = (0x0U << BK4819_REG_30_SHIFT_ENABLE_TX_DSP), + BK4819_REG_30_ENABLE_RX_DSP = (0x1U << BK4819_REG_30_SHIFT_ENABLE_RX_DSP), + BK4819_REG_30_DISABLE_RX_DSP = (0x0U << BK4819_REG_30_SHIFT_ENABLE_RX_DSP), }; // REG 3F -#define BK4819_REG_3F_SHIFT_FSK_TX_FINISHED 15 -#define BK4819_REG_3F_SHIFT_FSK_FIFO_ALMOST_EMPTY 14 -#define BK4819_REG_3F_SHIFT_FSK_RX_FINISHED 13 -#define BK4819_REG_3F_SHIFT_FSK_FIFO_ALMOST_FULL 12 -#define BK4819_REG_3F_SHIFT_DTMF_5TONE_FOUND 11 -#define BK4819_REG_3F_SHIFT_CxCSS_TAIL 10 -#define BK4819_REG_3F_SHIFT_CDCSS_FOUND 9 -#define BK4819_REG_3F_SHIFT_CDCSS_LOST 8 -#define BK4819_REG_3F_SHIFT_CTCSS_FOUND 7 -#define BK4819_REG_3F_SHIFT_CTCSS_LOST 6 -#define BK4819_REG_3F_SHIFT_VOX_FOUND 5 -#define BK4819_REG_3F_SHIFT_VOX_LOST 4 -#define BK4819_REG_3F_SHIFT_SQUELCH_FOUND 3 -#define BK4819_REG_3F_SHIFT_SQUELCH_LOST 2 -#define BK4819_REG_3F_SHIFT_FSK_RX_SYNC 1 - -#define BK4819_REG_3F_MASK_FSK_TX_FINISHED (1U << BK4819_REG_3F_SHIFT_FSK_TX) -#define BK4819_REG_3F_MASK_FSK_FIFO_ALMOST_EMPTY (1U << BK4819_REG_3F_SHIFT_FSK_FIFO_ALMOST_EMPTY) -#define BK4819_REG_3F_MASK_FSK_RX_FINISHED (1U << BK4819_REG_3F_SHIFT_FSK_RX_FINISHED) -#define BK4819_REG_3F_MASK_FSK_FIFO_ALMOST_FULL (1U << BK4819_REG_3F_SHIFT_FSK_FIFO_ALMOST_FULL) -#define BK4819_REG_3F_MASK_DTMF_5TONE_FOUND (1U << BK4819_REG_3F_SHIFT_DTMF_5TONE_FOUND) -#define BK4819_REG_3F_MASK_CxCSS_TAIL (1U << BK4819_REG_3F_SHIFT_CxCSS_TAIL) -#define BK4819_REG_3F_MASK_CDCSS_FOUND (1U << BK4819_REG_3F_SHIFT_CDCSS_FOUND) -#define BK4819_REG_3F_MASK_CDCSS_LOST (1U << BK4819_REG_3F_SHIFT_CDCSS_LOST) -#define BK4819_REG_3F_MASK_CTCSS_FOUND (1U << BK4819_REG_3F_SHIFT_CTCSS_FOUND) -#define BK4819_REG_3F_MASK_CTCSS_LOST (1U << BK4819_REG_3F_SHIFT_CTCSS_LOST) -#define BK4819_REG_3F_MASK_VOX_FOUND (1U << BK4819_REG_3F_SHIFT_VOX_FOUND) -#define BK4819_REG_3F_MASK_VOX_LOST (1U << BK4819_REG_3F_SHIFT_VOX_LOST) -#define BK4819_REG_3F_MASK_SQUELCH_FOUND (1U << BK4819_REG_3F_SHIFT_SQUELCH_FOUND) -#define BK4819_REG_3F_MASK_SQUELCH_LOST (1U << BK4819_REG_3F_SHIFT_SQUELCH_LOST) -#define BK4819_REG_3F_MASK_FSK_RX_SYNC (1U << BK4819_REG_3F_SHIFT_FSK_RX_SYNC) - -#define BK4819_REG_3F_FSK_TX_FINISHED (1U << BK4819_REG_3F_SHIFT_FSK_TX_FINISHED) -#define BK4819_REG_3F_FSK_FIFO_ALMOST_EMPTY (1U << BK4819_REG_3F_SHIFT_FSK_FIFO_ALMOST_EMPTY) -#define BK4819_REG_3F_FSK_RX_FINISHED (1U << BK4819_REG_3F_SHIFT_FSK_RX_FINISHED) -#define BK4819_REG_3F_FSK_FIFO_ALMOST_FULL (1U << BK4819_REG_3F_SHIFT_FSK_FIFO_ALMOST_FULL) -#define BK4819_REG_3F_DTMF_5TONE_FOUND (1U << BK4819_REG_3F_SHIFT_DTMF_5TONE_FOUND) -#define BK4819_REG_3F_CxCSS_TAIL (1U << BK4819_REG_3F_SHIFT_CxCSS_TAIL) -#define BK4819_REG_3F_CDCSS_FOUND (1U << BK4819_REG_3F_SHIFT_CDCSS_FOUND) -#define BK4819_REG_3F_CDCSS_LOST (1U << BK4819_REG_3F_SHIFT_CDCSS_LOST) -#define BK4819_REG_3F_CTCSS_FOUND (1U << BK4819_REG_3F_SHIFT_CTCSS_FOUND) -#define BK4819_REG_3F_CTCSS_LOST (1U << BK4819_REG_3F_SHIFT_CTCSS_LOST) -#define BK4819_REG_3F_VOX_FOUND (1U << BK4819_REG_3F_SHIFT_VOX_FOUND) -#define BK4819_REG_3F_VOX_LOST (1U << BK4819_REG_3F_SHIFT_VOX_LOST) -#define BK4819_REG_3F_SQUELCH_FOUND (1U << BK4819_REG_3F_SHIFT_SQUELCH_FOUND) -#define BK4819_REG_3F_SQUELCH_LOST (1U << BK4819_REG_3F_SHIFT_SQUELCH_LOST) -#define BK4819_REG_3F_FSK_RX_SYNC (1U << BK4819_REG_3F_SHIFT_FSK_RX_SYNC) +#define BK4819_REG_3F_SHIFT_FSK_TX_FINISHED 15 +#define BK4819_REG_3F_SHIFT_FSK_FIFO_ALMOST_EMPTY 14 +#define BK4819_REG_3F_SHIFT_FSK_RX_FINISHED 13 +#define BK4819_REG_3F_SHIFT_FSK_FIFO_ALMOST_FULL 12 +#define BK4819_REG_3F_SHIFT_DTMF_5TONE_FOUND 11 +#define BK4819_REG_3F_SHIFT_CxCSS_TAIL 10 +#define BK4819_REG_3F_SHIFT_CDCSS_FOUND 9 +#define BK4819_REG_3F_SHIFT_CDCSS_LOST 8 +#define BK4819_REG_3F_SHIFT_CTCSS_FOUND 7 +#define BK4819_REG_3F_SHIFT_CTCSS_LOST 6 +#define BK4819_REG_3F_SHIFT_VOX_FOUND 5 +#define BK4819_REG_3F_SHIFT_VOX_LOST 4 +#define BK4819_REG_3F_SHIFT_SQUELCH_FOUND 3 +#define BK4819_REG_3F_SHIFT_SQUELCH_LOST 2 +#define BK4819_REG_3F_SHIFT_FSK_RX_SYNC 1 + +#define BK4819_REG_3F_MASK_FSK_TX_FINISHED (1U << BK4819_REG_3F_SHIFT_FSK_TX) +#define BK4819_REG_3F_MASK_FSK_FIFO_ALMOST_EMPTY \ + (1U << BK4819_REG_3F_SHIFT_FSK_FIFO_ALMOST_EMPTY) +#define BK4819_REG_3F_MASK_FSK_RX_FINISHED \ + (1U << BK4819_REG_3F_SHIFT_FSK_RX_FINISHED) +#define BK4819_REG_3F_MASK_FSK_FIFO_ALMOST_FULL \ + (1U << BK4819_REG_3F_SHIFT_FSK_FIFO_ALMOST_FULL) +#define BK4819_REG_3F_MASK_DTMF_5TONE_FOUND \ + (1U << BK4819_REG_3F_SHIFT_DTMF_5TONE_FOUND) +#define BK4819_REG_3F_MASK_CxCSS_TAIL (1U << BK4819_REG_3F_SHIFT_CxCSS_TAIL) +#define BK4819_REG_3F_MASK_CDCSS_FOUND (1U << BK4819_REG_3F_SHIFT_CDCSS_FOUND) +#define BK4819_REG_3F_MASK_CDCSS_LOST (1U << BK4819_REG_3F_SHIFT_CDCSS_LOST) +#define BK4819_REG_3F_MASK_CTCSS_FOUND (1U << BK4819_REG_3F_SHIFT_CTCSS_FOUND) +#define BK4819_REG_3F_MASK_CTCSS_LOST (1U << BK4819_REG_3F_SHIFT_CTCSS_LOST) +#define BK4819_REG_3F_MASK_VOX_FOUND (1U << BK4819_REG_3F_SHIFT_VOX_FOUND) +#define BK4819_REG_3F_MASK_VOX_LOST (1U << BK4819_REG_3F_SHIFT_VOX_LOST) +#define BK4819_REG_3F_MASK_SQUELCH_FOUND \ + (1U << BK4819_REG_3F_SHIFT_SQUELCH_FOUND) +#define BK4819_REG_3F_MASK_SQUELCH_LOST (1U << BK4819_REG_3F_SHIFT_SQUELCH_LOST) +#define BK4819_REG_3F_MASK_FSK_RX_SYNC (1U << BK4819_REG_3F_SHIFT_FSK_RX_SYNC) + +#define BK4819_REG_3F_FSK_TX_FINISHED \ + (1U << BK4819_REG_3F_SHIFT_FSK_TX_FINISHED) +#define BK4819_REG_3F_FSK_FIFO_ALMOST_EMPTY \ + (1U << BK4819_REG_3F_SHIFT_FSK_FIFO_ALMOST_EMPTY) +#define BK4819_REG_3F_FSK_RX_FINISHED \ + (1U << BK4819_REG_3F_SHIFT_FSK_RX_FINISHED) +#define BK4819_REG_3F_FSK_FIFO_ALMOST_FULL \ + (1U << BK4819_REG_3F_SHIFT_FSK_FIFO_ALMOST_FULL) +#define BK4819_REG_3F_DTMF_5TONE_FOUND \ + (1U << BK4819_REG_3F_SHIFT_DTMF_5TONE_FOUND) +#define BK4819_REG_3F_CxCSS_TAIL (1U << BK4819_REG_3F_SHIFT_CxCSS_TAIL) +#define BK4819_REG_3F_CDCSS_FOUND (1U << BK4819_REG_3F_SHIFT_CDCSS_FOUND) +#define BK4819_REG_3F_CDCSS_LOST (1U << BK4819_REG_3F_SHIFT_CDCSS_LOST) +#define BK4819_REG_3F_CTCSS_FOUND (1U << BK4819_REG_3F_SHIFT_CTCSS_FOUND) +#define BK4819_REG_3F_CTCSS_LOST (1U << BK4819_REG_3F_SHIFT_CTCSS_LOST) +#define BK4819_REG_3F_VOX_FOUND (1U << BK4819_REG_3F_SHIFT_VOX_FOUND) +#define BK4819_REG_3F_VOX_LOST (1U << BK4819_REG_3F_SHIFT_VOX_LOST) +#define BK4819_REG_3F_SQUELCH_FOUND (1U << BK4819_REG_3F_SHIFT_SQUELCH_FOUND) +#define BK4819_REG_3F_SQUELCH_LOST (1U << BK4819_REG_3F_SHIFT_SQUELCH_LOST) +#define BK4819_REG_3F_FSK_RX_SYNC (1U << BK4819_REG_3F_SHIFT_FSK_RX_SYNC) // REG 51 -#define BK4819_REG_51_SHIFT_ENABLE_CxCSS 15 -#define BK4819_REG_51_SHIFT_GPIO6_PIN2_INPUT 14 -#define BK4819_REG_51_SHIFT_TX_CDCSS_POLARITY 13 -#define BK4819_REG_51_SHIFT_CxCSS_MODE 12 -#define BK4819_REG_51_SHIFT_CDCSS_BIT_WIDTH 11 -#define BK4819_REG_51_SHIFT_1050HZ_DETECTION 10 -#define BK4819_REG_51_SHIFT_AUTO_CDCSS_BW 9 -#define BK4819_REG_51_SHIFT_AUTO_CTCSS_BW 8 -#define BK4819_REG_51_SHIFT_CxCSS_TX_GAIN1 0 - -#define BK4819_REG_51_MASK_ENABLE_CxCSS (0x01U << BK4819_REG_51_SHIFT_ENABLE_CxCSS) -#define BK4819_REG_51_MASK_GPIO6_PIN2_INPUT (0x01U << BK4819_REG_51_SHIFT_GPIO6_PIN2_INPUT) -#define BK4819_REG_51_MASK_TX_CDCSS_POLARITY (0x01U << BK4819_REG_51_SHIFT_TX_CDCSS_POLARITY) -#define BK4819_REG_51_MASK_CxCSS_MODE (0x01U << BK4819_REG_51_SHIFT_CxCSS_MODE) -#define BK4819_REG_51_MASK_CDCSS_BIT_WIDTH (0x01U << BK4819_REG_51_SHIFT_CDCSS_BIT_WIDTH) -#define BK4819_REG_51_MASK_1050HZ_DETECTION (0x01U << BK4819_REG_51_SHIFT_1050HZ_DETECTION) -#define BK4819_REG_51_MASK_AUTO_CDCSS_BW (0x01U << BK4819_REG_51_SHIFT_AUTO_CDCSS_BW) -#define BK4819_REG_51_MASK_AUTO_CTCSS_BW (0x01U << BK4819_REG_51_SHIFT_AUTO_CTCSS_BW) -#define BK4819_REG_51_MASK_CxCSS_TX_GAIN1 (0x7FU << BK4819_REG_51_SHIFT_CxCSS_TX_GAIN1) +#define BK4819_REG_51_SHIFT_ENABLE_CxCSS 15 +#define BK4819_REG_51_SHIFT_GPIO6_PIN2_INPUT 14 +#define BK4819_REG_51_SHIFT_TX_CDCSS_POLARITY 13 +#define BK4819_REG_51_SHIFT_CxCSS_MODE 12 +#define BK4819_REG_51_SHIFT_CDCSS_BIT_WIDTH 11 +#define BK4819_REG_51_SHIFT_1050HZ_DETECTION 10 +#define BK4819_REG_51_SHIFT_AUTO_CDCSS_BW 9 +#define BK4819_REG_51_SHIFT_AUTO_CTCSS_BW 8 +#define BK4819_REG_51_SHIFT_CxCSS_TX_GAIN1 0 + +#define BK4819_REG_51_MASK_ENABLE_CxCSS \ + (0x01U << BK4819_REG_51_SHIFT_ENABLE_CxCSS) +#define BK4819_REG_51_MASK_GPIO6_PIN2_INPUT \ + (0x01U << BK4819_REG_51_SHIFT_GPIO6_PIN2_INPUT) +#define BK4819_REG_51_MASK_TX_CDCSS_POLARITY \ + (0x01U << BK4819_REG_51_SHIFT_TX_CDCSS_POLARITY) +#define BK4819_REG_51_MASK_CxCSS_MODE (0x01U << BK4819_REG_51_SHIFT_CxCSS_MODE) +#define BK4819_REG_51_MASK_CDCSS_BIT_WIDTH \ + (0x01U << BK4819_REG_51_SHIFT_CDCSS_BIT_WIDTH) +#define BK4819_REG_51_MASK_1050HZ_DETECTION \ + (0x01U << BK4819_REG_51_SHIFT_1050HZ_DETECTION) +#define BK4819_REG_51_MASK_AUTO_CDCSS_BW \ + (0x01U << BK4819_REG_51_SHIFT_AUTO_CDCSS_BW) +#define BK4819_REG_51_MASK_AUTO_CTCSS_BW \ + (0x01U << BK4819_REG_51_SHIFT_AUTO_CTCSS_BW) +#define BK4819_REG_51_MASK_CxCSS_TX_GAIN1 \ + (0x7FU << BK4819_REG_51_SHIFT_CxCSS_TX_GAIN1) enum { - BK4819_REG_51_ENABLE_CxCSS = (1U << BK4819_REG_51_SHIFT_ENABLE_CxCSS), - BK4819_REG_51_DISABLE_CxCSS = (0U << BK4819_REG_51_SHIFT_ENABLE_CxCSS), - - BK4819_REG_51_GPIO6_PIN2_INPUT = (1U << BK4819_REG_51_SHIFT_GPIO6_PIN2_INPUT), - BK4819_REG_51_GPIO6_PIN2_NORMAL = (0U << BK4819_REG_51_SHIFT_GPIO6_PIN2_INPUT), - - BK4819_REG_51_TX_CDCSS_NEGATIVE = (1U << BK4819_REG_51_SHIFT_TX_CDCSS_POLARITY), - BK4819_REG_51_TX_CDCSS_POSITIVE = (0U << BK4819_REG_51_SHIFT_TX_CDCSS_POLARITY), - - BK4819_REG_51_MODE_CTCSS = (1U << BK4819_REG_51_SHIFT_CxCSS_MODE), - BK4819_REG_51_MODE_CDCSS = (0U << BK4819_REG_51_SHIFT_CxCSS_MODE), - - BK4819_REG_51_CDCSS_24_BIT = (1U << BK4819_REG_51_SHIFT_CDCSS_BIT_WIDTH), - BK4819_REG_51_CDCSS_23_BIT = (0U << BK4819_REG_51_SHIFT_CDCSS_BIT_WIDTH), - - BK4819_REG_51_1050HZ_DETECTION = (1U << BK4819_REG_51_SHIFT_1050HZ_DETECTION), - BK4819_REG_51_1050HZ_NO_DETECTION = (0U << BK4819_REG_51_SHIFT_1050HZ_DETECTION), - - BK4819_REG_51_AUTO_CDCSS_BW_DISABLE = (1U << BK4819_REG_51_SHIFT_AUTO_CDCSS_BW), - BK4819_REG_51_AUTO_CDCSS_BW_ENABLE = (0U << BK4819_REG_51_SHIFT_AUTO_CDCSS_BW), - - BK4819_REG_51_AUTO_CTCSS_BW_DISABLE = (1U << BK4819_REG_51_SHIFT_AUTO_CTCSS_BW), - BK4819_REG_51_AUTO_CTCSS_BW_ENABLE = (0U << BK4819_REG_51_SHIFT_AUTO_CTCSS_BW), + BK4819_REG_51_ENABLE_CxCSS = (1U << BK4819_REG_51_SHIFT_ENABLE_CxCSS), + BK4819_REG_51_DISABLE_CxCSS = (0U << BK4819_REG_51_SHIFT_ENABLE_CxCSS), + + BK4819_REG_51_GPIO6_PIN2_INPUT = (1U + << BK4819_REG_51_SHIFT_GPIO6_PIN2_INPUT), + BK4819_REG_51_GPIO6_PIN2_NORMAL = (0U + << BK4819_REG_51_SHIFT_GPIO6_PIN2_INPUT), + + BK4819_REG_51_TX_CDCSS_NEGATIVE = + (1U << BK4819_REG_51_SHIFT_TX_CDCSS_POLARITY), + BK4819_REG_51_TX_CDCSS_POSITIVE = + (0U << BK4819_REG_51_SHIFT_TX_CDCSS_POLARITY), + + BK4819_REG_51_MODE_CTCSS = (1U << BK4819_REG_51_SHIFT_CxCSS_MODE), + BK4819_REG_51_MODE_CDCSS = (0U << BK4819_REG_51_SHIFT_CxCSS_MODE), + + BK4819_REG_51_CDCSS_24_BIT = (1U << BK4819_REG_51_SHIFT_CDCSS_BIT_WIDTH), + BK4819_REG_51_CDCSS_23_BIT = (0U << BK4819_REG_51_SHIFT_CDCSS_BIT_WIDTH), + + BK4819_REG_51_1050HZ_DETECTION = (1U + << BK4819_REG_51_SHIFT_1050HZ_DETECTION), + BK4819_REG_51_1050HZ_NO_DETECTION = + (0U << BK4819_REG_51_SHIFT_1050HZ_DETECTION), + + BK4819_REG_51_AUTO_CDCSS_BW_DISABLE = + (1U << BK4819_REG_51_SHIFT_AUTO_CDCSS_BW), + BK4819_REG_51_AUTO_CDCSS_BW_ENABLE = (0U + << BK4819_REG_51_SHIFT_AUTO_CDCSS_BW), + + BK4819_REG_51_AUTO_CTCSS_BW_DISABLE = + (1U << BK4819_REG_51_SHIFT_AUTO_CTCSS_BW), + BK4819_REG_51_AUTO_CTCSS_BW_ENABLE = (0U + << BK4819_REG_51_SHIFT_AUTO_CTCSS_BW), }; // REG 70 -#define BK4819_REG_70_SHIFT_ENABLE_TONE1 15 -#define BK4819_REG_70_SHIFT_TONE1_TUNING_GAIN 8 -#define BK4819_REG_70_SHIFT_ENABLE_TONE2 7 -#define BK4819_REG_70_SHIFT_TONE2_TUNING_GAIN 0 +#define BK4819_REG_70_SHIFT_ENABLE_TONE1 15 +#define BK4819_REG_70_SHIFT_TONE1_TUNING_GAIN 8 +#define BK4819_REG_70_SHIFT_ENABLE_TONE2 7 +#define BK4819_REG_70_SHIFT_TONE2_TUNING_GAIN 0 -#define BK4819_REG_70_MASK_ENABLE_TONE1 (0x01U << BK4819_REG_70_SHIFT_ENABLE_TONE1) -#define BK4819_REG_70_MASK_TONE1_TUNING_GAIN (0x7FU << BK4819_REG_70_SHIFT_TONE1_TUNING_GAIN) -#define BK4819_REG_70_MASK_ENABLE_TONE2 (0x01U << BK4819_REG_70_SHIFT_ENABLE_TONE2) -#define BK4819_REG_70_MASK_TONE2_TUNING_GAIN (0x7FU << BK4819_REG_70_SHIFT_TONE2_TUNING_GAIN) +#define BK4819_REG_70_MASK_ENABLE_TONE1 \ + (0x01U << BK4819_REG_70_SHIFT_ENABLE_TONE1) +#define BK4819_REG_70_MASK_TONE1_TUNING_GAIN \ + (0x7FU << BK4819_REG_70_SHIFT_TONE1_TUNING_GAIN) +#define BK4819_REG_70_MASK_ENABLE_TONE2 \ + (0x01U << BK4819_REG_70_SHIFT_ENABLE_TONE2) +#define BK4819_REG_70_MASK_TONE2_TUNING_GAIN \ + (0x7FU << BK4819_REG_70_SHIFT_TONE2_TUNING_GAIN) enum { - BK4819_REG_70_ENABLE_TONE1 = (1U << BK4819_REG_70_SHIFT_ENABLE_TONE1), - BK4819_REG_70_ENABLE_TONE2 = (1U << BK4819_REG_70_SHIFT_ENABLE_TONE2), + BK4819_REG_70_ENABLE_TONE1 = (1U << BK4819_REG_70_SHIFT_ENABLE_TONE1), + BK4819_REG_70_ENABLE_TONE2 = (1U << BK4819_REG_70_SHIFT_ENABLE_TONE2), }; #endif diff --git a/platform/targets/c62/audio_c62.c b/platform/targets/c62/audio_c62.c old mode 100755 new mode 100644 index 87f680e919..7dbe43bb93 --- a/platform/targets/c62/audio_c62.c +++ b/platform/targets/c62/audio_c62.c @@ -19,17 +19,17 @@ #include #include -#define SAMPLE_RATE (16000) // Sample rate in Hz +#define SAMPLE_RATE (16000) // Sample rate in Hz // Live audio streaming configuration -#define AUDIO_CHUNK_MS (20) // 20ms chunks for low latency -#define AUDIO_CHUNK_SAMPLES (SAMPLE_RATE * AUDIO_CHUNK_MS / 1000) -#define AUDIO_CHUNK_SIZE (AUDIO_CHUNK_SAMPLES * sizeof(int16_t)) -#define AUDIO_BUFFER_CHUNKS (8) // Circular buffer with multiple chunks -#define AUDIO_THREAD_STACK_SIZE (8*1024) -#define AUDIO_THREAD_PRIORITY (5) +#define AUDIO_CHUNK_MS (20) // 20ms chunks for low latency +#define AUDIO_CHUNK_SAMPLES (SAMPLE_RATE * AUDIO_CHUNK_MS / 1000) +#define AUDIO_CHUNK_SIZE (AUDIO_CHUNK_SAMPLES * sizeof(int16_t)) +#define AUDIO_BUFFER_CHUNKS (8) // Circular buffer with multiple chunks +#define AUDIO_THREAD_STACK_SIZE (8 * 1024) +#define AUDIO_THREAD_PRIORITY (5) -#define PATH(x,y) ((x << 4) | y) +#define PATH(x, y) ((x << 4) | y) // Circular buffer for audio data exchange between threads typedef struct { @@ -46,14 +46,15 @@ typedef struct { struct k_sem space_available; } AudioRingBuffer; -#define C62_AUDIO_CHANNEL_MIC CHANNEL_IN_LEFT -#define C62_AUDIO_CHANNEL_RX CHANNEL_IN_RIGHT -#define C62_AUDIO_CHANNEL_SPK CHANNEL_OUT_FRONT_LEFT -#define C62_AUDIO_CHANNEL_TX CHANNEL_OUT_FRONT_RIGHT +#define C62_AUDIO_CHANNEL_MIC CHANNEL_IN_LEFT +#define C62_AUDIO_CHANNEL_RX CHANNEL_IN_RIGHT +#define C62_AUDIO_CHANNEL_SPK CHANNEL_OUT_FRONT_LEFT +#define C62_AUDIO_CHANNEL_TX CHANNEL_OUT_FRONT_RIGHT #define AUDIO_INPUT_CHANNEL_COUNT 2 -static const struct gpio_dt_spec speaker_enable = GPIO_DT_SPEC_GET(DT_PATH(gpio_controls, speaker_enable), gpios); +static const struct gpio_dt_spec speaker_enable = + GPIO_DT_SPEC_GET(DT_PATH(gpio_controls, speaker_enable), gpios); // Live audio streaming state typedef struct { @@ -62,7 +63,7 @@ typedef struct { bool active; } AudioPath; -static AudioPath s_active_paths[3]; // Support up to 3 simultaneous paths +static AudioPath s_active_paths[3]; // Support up to 3 simultaneous paths static int s_active_path_count = 0; static struct k_mutex s_audio_mutex; @@ -80,18 +81,16 @@ static bool s_rtx_input_active = false; static bool s_spk_active = false; static bool s_rtx_output_active = false; -const struct audioDevice outputDevices[] = -{ - {NULL, 0, 0, SINK_MCU}, - {NULL, 0, 0, SINK_RTX}, - {NULL, 0, 0, SINK_SPK}, +const struct audioDevice outputDevices[] = { + { NULL, 0, 0, SINK_MCU }, + { NULL, 0, 0, SINK_RTX }, + { NULL, 0, 0, SINK_SPK }, }; -const struct audioDevice inputDevices[] = -{ - {NULL, 0, 0, SINK_MCU}, - {NULL, 0, 0, SINK_RTX}, - {NULL, 0, 0, SINK_SPK}, +const struct audioDevice inputDevices[] = { + { NULL, 0, 0, SINK_MCU }, + { NULL, 0, 0, SINK_RTX }, + { NULL, 0, 0, SINK_SPK }, }; // Ring buffer for audio data exchange (in PSRAM) @@ -103,11 +102,11 @@ static struct k_thread s_audio_output_thread; K_THREAD_STACK_DEFINE(s_audio_input_stack, AUDIO_THREAD_STACK_SIZE); K_THREAD_STACK_DEFINE(s_audio_output_stack, AUDIO_THREAD_STACK_SIZE); - -#define FREQUENCY 440 // Frequency of the sine wave in Hz (A4) +#define FREQUENCY 440 // Frequency of the sine wave in Hz (A4) /* Fill buffer with sine wave data */ -static void fillSineWave(uint8_t *buffer, size_t size) { +static void fillSineWave(uint8_t *buffer, size_t size) +{ // Calculate the sine wave for (size_t i = 0; i < size / sizeof(int16_t); i++) { // Calculate sample value @@ -115,9 +114,9 @@ static void fillSineWave(uint8_t *buffer, size_t size) { // Scale to 16-bit PCM range (-32768 to 32767) int16_t pcmValue = (int16_t)(sample * 32767); - + // Store the PCM value in the buffer - buffer[2 * i] = (uint8_t)(pcmValue & 0xFF); // LSB + buffer[2 * i] = (uint8_t)(pcmValue & 0xFF); // LSB buffer[2 * i + 1] = (uint8_t)((pcmValue >> 8) & 0xFF); // MSB } } @@ -125,529 +124,541 @@ static void fillSineWave(uint8_t *buffer, size_t size) { // Ring buffer helper functions static void ring_buffer_init(AudioRingBuffer *rb) { - k_mutex_init(&rb->mutex); - k_sem_init(&rb->data_ready, 0, AUDIO_BUFFER_CHUNKS); - k_sem_init(&rb->space_available, AUDIO_BUFFER_CHUNKS, AUDIO_BUFFER_CHUNKS); - - rb->write_idx = 0; - rb->read_idx = 0; - - for (int i = 0; i < AUDIO_BUFFER_CHUNKS; i++) { - rb->chunks[i].filled = false; - } + k_mutex_init(&rb->mutex); + k_sem_init(&rb->data_ready, 0, AUDIO_BUFFER_CHUNKS); + k_sem_init(&rb->space_available, AUDIO_BUFFER_CHUNKS, AUDIO_BUFFER_CHUNKS); + + rb->write_idx = 0; + rb->read_idx = 0; + + for (int i = 0; i < AUDIO_BUFFER_CHUNKS; i++) { + rb->chunks[i].filled = false; + } } -static bool ring_buffer_write(AudioRingBuffer *rb, const uint8_t *data, size_t size) +static bool ring_buffer_write(AudioRingBuffer *rb, const uint8_t *data, + size_t size) { - if (size > AUDIO_CHUNK_SIZE) { - return false; - } - - // Wait for space to be available (with timeout to prevent deadlock) - if (k_sem_take(&rb->space_available, K_MSEC(100)) != 0) { - printk("Ring buffer full, dropping audio chunk\n"); - return false; - } - - k_mutex_lock(&rb->mutex, K_FOREVER); - - // Copy data to the write buffer - memcpy(rb->chunks[rb->write_idx].buffer, data, size); - rb->chunks[rb->write_idx].filled = true; - - // Advance write index - rb->write_idx = (rb->write_idx + 1) % AUDIO_BUFFER_CHUNKS; - - k_mutex_unlock(&rb->mutex); - - // Signal that data is ready - k_sem_give(&rb->data_ready); - - return true; + if (size > AUDIO_CHUNK_SIZE) { + return false; + } + + // Wait for space to be available (with timeout to prevent deadlock) + if (k_sem_take(&rb->space_available, K_MSEC(100)) != 0) { + printk("Ring buffer full, dropping audio chunk\n"); + return false; + } + + k_mutex_lock(&rb->mutex, K_FOREVER); + + // Copy data to the write buffer + memcpy(rb->chunks[rb->write_idx].buffer, data, size); + rb->chunks[rb->write_idx].filled = true; + + // Advance write index + rb->write_idx = (rb->write_idx + 1) % AUDIO_BUFFER_CHUNKS; + + k_mutex_unlock(&rb->mutex); + + // Signal that data is ready + k_sem_give(&rb->data_ready); + + return true; } static bool ring_buffer_read(AudioRingBuffer *rb, uint8_t *data, size_t *size) { - // Wait for data to be available - if (k_sem_take(&rb->data_ready, K_MSEC(100)) != 0) { - return false; - } - - k_mutex_lock(&rb->mutex, K_FOREVER); - - // Copy data from the read buffer - memcpy(data, rb->chunks[rb->read_idx].buffer, AUDIO_CHUNK_SIZE); - *size = AUDIO_CHUNK_SIZE; - rb->chunks[rb->read_idx].filled = false; - - // Advance read index - rb->read_idx = (rb->read_idx + 1) % AUDIO_BUFFER_CHUNKS; - - k_mutex_unlock(&rb->mutex); - - // Signal that space is available - k_sem_give(&rb->space_available); - - return true; + // Wait for data to be available + if (k_sem_take(&rb->data_ready, K_MSEC(100)) != 0) { + return false; + } + + k_mutex_lock(&rb->mutex, K_FOREVER); + + // Copy data from the read buffer + memcpy(data, rb->chunks[rb->read_idx].buffer, AUDIO_CHUNK_SIZE); + *size = AUDIO_CHUNK_SIZE; + rb->chunks[rb->read_idx].filled = false; + + // Advance read index + rb->read_idx = (rb->read_idx + 1) % AUDIO_BUFFER_CHUNKS; + + k_mutex_unlock(&rb->mutex); + + // Signal that space is available + k_sem_give(&rb->space_available); + + return true; } // Audio input thread - records audio and pushes to ring buffer static void audio_input_thread(void *arg1, void *arg2, void *arg3) { - (void)arg1; - (void)arg2; - (void)arg3; - - printk("Audio input thread started\n"); - - static uint8_t chunk_buffer[AUDIO_CHUNK_SIZE * AUDIO_INPUT_CHANNEL_COUNT /* channel input MIC + RTX */]; - - while (s_audio_streaming) { - k_mutex_lock(&s_audio_mutex, K_FOREVER); - - // Check if we have any active recording sources - bool has_mic_source = false; - bool has_rtx_source = false; - - for (int i = 0; i < s_active_path_count; i++) { - if (!s_active_paths[i].active) - continue; - - if (s_active_paths[i].source == SOURCE_MIC) { - has_mic_source = true; - } else if (s_active_paths[i].source == SOURCE_RTX) { - has_rtx_source = true; - } - } - - k_mutex_unlock(&s_audio_mutex); - - ssize_t read_size = AudioRecord_read(&s_record, chunk_buffer, AUDIO_CHUNK_SIZE * AUDIO_INPUT_CHANNEL_COUNT); - - - // Record audio from active source - if (has_mic_source) { - if (read_size > 0) { - // Deinterleave MIC and RTX data - for (size_t i = 0; i < AUDIO_CHUNK_SAMPLES; i++) { - chunk_buffer[i * 2] = chunk_buffer[i * 4]; // MIC data (assuming MIC is on the first channel) - chunk_buffer[i * 2 + 1] = chunk_buffer[i * 4 + 1]; - } - read_size = AUDIO_CHUNK_SAMPLES * sizeof(int16_t); // Update read size - // Push to ring buffer for output thread - if (!ring_buffer_write(&s_ring_buffer, chunk_buffer, read_size)) { - // Buffer overflow handled in ring_buffer_write - } - } - } else if (has_rtx_source) { - if (read_size > 0) { - // Deinterleave MIC and RTX data - for (size_t i = 0; i < AUDIO_CHUNK_SAMPLES; i++) { - chunk_buffer[i * 2] = chunk_buffer[i * 4 + 2]; // MIC data (assuming MIC is on the first channel) - chunk_buffer[i * 2 + 1] = chunk_buffer[i * 4 + 1 + 2]; - } - read_size = AUDIO_CHUNK_SAMPLES * sizeof(int16_t); // Update read size - // Push to ring buffer for output thread - if (!ring_buffer_write(&s_ring_buffer, chunk_buffer, read_size)) { - // Buffer overflow handled in ring_buffer_write - } - } - } else { - // Sleep if no active recording - k_sleep(K_MSEC(10)); - } - } - - printk("Audio input thread stopped\n"); + (void)arg1; + (void)arg2; + (void)arg3; + + printk("Audio input thread started\n"); + + static uint8_t + chunk_buffer[AUDIO_CHUNK_SIZE + * AUDIO_INPUT_CHANNEL_COUNT /* channel input MIC + RTX */]; + + while (s_audio_streaming) { + k_mutex_lock(&s_audio_mutex, K_FOREVER); + + // Check if we have any active recording sources + bool has_mic_source = false; + bool has_rtx_source = false; + + for (int i = 0; i < s_active_path_count; i++) { + if (!s_active_paths[i].active) + continue; + + if (s_active_paths[i].source == SOURCE_MIC) { + has_mic_source = true; + } else if (s_active_paths[i].source == SOURCE_RTX) { + has_rtx_source = true; + } + } + + k_mutex_unlock(&s_audio_mutex); + + ssize_t read_size = + AudioRecord_read(&s_record, chunk_buffer, + AUDIO_CHUNK_SIZE * AUDIO_INPUT_CHANNEL_COUNT); + + // Record audio from active source + if (has_mic_source) { + if (read_size > 0) { + // Deinterleave MIC and RTX data + for (size_t i = 0; i < AUDIO_CHUNK_SAMPLES; i++) { + chunk_buffer[i * 2] = chunk_buffer + [i * 4]; // MIC data (assuming MIC is on the first channel) + chunk_buffer[i * 2 + 1] = chunk_buffer[i * 4 + 1]; + } + read_size = AUDIO_CHUNK_SAMPLES + * sizeof(int16_t); // Update read size + // Push to ring buffer for output thread + if (!ring_buffer_write(&s_ring_buffer, chunk_buffer, + read_size)) { + // Buffer overflow handled in ring_buffer_write + } + } + } else if (has_rtx_source) { + if (read_size > 0) { + // Deinterleave MIC and RTX data + for (size_t i = 0; i < AUDIO_CHUNK_SAMPLES; i++) { + chunk_buffer[i * 2] = chunk_buffer + [i * 4 + + 2]; // MIC data (assuming MIC is on the first channel) + chunk_buffer[i * 2 + 1] = chunk_buffer[i * 4 + 1 + 2]; + } + read_size = AUDIO_CHUNK_SAMPLES + * sizeof(int16_t); // Update read size + // Push to ring buffer for output thread + if (!ring_buffer_write(&s_ring_buffer, chunk_buffer, + read_size)) { + // Buffer overflow handled in ring_buffer_write + } + } + } else { + // Sleep if no active recording + k_sleep(K_MSEC(10)); + } + } + + printk("Audio input thread stopped\n"); } /* Audio output thread - pulls from ring buffer and plays audio */ static void audio_output_thread(void *arg1, void *arg2, void *arg3) { - (void)arg1; - (void)arg2; - (void)arg3; - - printk("Audio output thread started\n"); - - static uint8_t chunk_buffer[AUDIO_CHUNK_SIZE]; - size_t chunk_size; - - while (s_audio_streaming) { - k_mutex_lock(&s_audio_mutex, K_FOREVER); - - // Check if we have any active playback sinks - bool has_spk_sink = false; - bool has_rtx_sink = false; - - for (int i = 0; i < s_active_path_count; i++) { - if (!s_active_paths[i].active) - continue; - - if (s_active_paths[i].sink == SINK_SPK) { - has_spk_sink = true; - } else if (s_active_paths[i].sink == SINK_RTX) { - has_rtx_sink = true; - } - } - - k_mutex_unlock(&s_audio_mutex); - - // Play audio to SPK if needed - if (has_spk_sink) { - // Pull from ring buffer - if (ring_buffer_read(&s_ring_buffer, chunk_buffer, &chunk_size)) { - // Write to speaker track - ssize_t written = AudioTrack_write(&s_track_spk, chunk_buffer, chunk_size); - - if (written < 0) { - printk("AudioTrack_write failed: %d\n", (int)written); - } - } - } else if (has_rtx_sink) { - // Pull from ring buffer - if (ring_buffer_read(&s_ring_buffer, chunk_buffer, &chunk_size)) { - // Write to RTX output track - ssize_t written = AudioTrack_write(&s_track_rtx_output, chunk_buffer, chunk_size); - - if (written < 0) { - printk("AudioTrack_write failed: %d\n", (int)written); - } - } - } else { - // Sleep if no active playback - k_sleep(K_MSEC(10)); - } - } - - printk("Audio output thread stopped\n"); -} - + (void)arg1; + (void)arg2; + (void)arg3; + + printk("Audio output thread started\n"); + + static uint8_t chunk_buffer[AUDIO_CHUNK_SIZE]; + size_t chunk_size; + + while (s_audio_streaming) { + k_mutex_lock(&s_audio_mutex, K_FOREVER); + + // Check if we have any active playback sinks + bool has_spk_sink = false; + bool has_rtx_sink = false; + + for (int i = 0; i < s_active_path_count; i++) { + if (!s_active_paths[i].active) + continue; + + if (s_active_paths[i].sink == SINK_SPK) { + has_spk_sink = true; + } else if (s_active_paths[i].sink == SINK_RTX) { + has_rtx_sink = true; + } + } + + k_mutex_unlock(&s_audio_mutex); + + // Play audio to SPK if needed + if (has_spk_sink) { + // Pull from ring buffer + if (ring_buffer_read(&s_ring_buffer, chunk_buffer, &chunk_size)) { + // Write to speaker track + ssize_t written = AudioTrack_write(&s_track_spk, chunk_buffer, + chunk_size); + + if (written < 0) { + printk("AudioTrack_write failed: %d\n", (int)written); + } + } + } else if (has_rtx_sink) { + // Pull from ring buffer + if (ring_buffer_read(&s_ring_buffer, chunk_buffer, &chunk_size)) { + // Write to RTX output track + ssize_t written = AudioTrack_write(&s_track_rtx_output, + chunk_buffer, chunk_size); + + if (written < 0) { + printk("AudioTrack_write failed: %d\n", (int)written); + } + } + } else { + // Sleep if no active playback + k_sleep(K_MSEC(10)); + } + } + printk("Audio output thread stopped\n"); +} void audio_init() { - int ret; - - if (s_audio_initialized) { - printk("Audio already initialized\n"); - return; - } - - printk("Initializing audio subsystem\n"); - - // Initialize mutex - k_mutex_init(&s_audio_mutex); - - // Initialize ring buffer - ring_buffer_init(&s_ring_buffer); - - // Initialize active paths array - for (int i = 0; i < 3; i++) { - s_active_paths[i].active = false; - } - s_active_path_count = 0; - - // Set audio system parameters - String8 param; - String8_ctor_char(¶m, "ADC_PDM_GAIN_A_LEFT=6;" - "ADC_PDM_GAIN_D_LEFT=20;" - "ADC_PDM_GAIN_A_RIGHT=6;" - "ADC_PDM_GAIN_D_RIGHT=20"); - ret = AudioSystem_setParameters(0, ¶m); - String8_dtor(¶m); - if (ret != 0) { - printk("Failed to set audio parameters: %d\n", ret); - return; - } - - // Initialize AudioRecord for MIC and RTX input interleaved - ret = AudioRecord_ctor(&s_record, 0, SAMPLE_RATE, PCM_16_BIT, - C62_AUDIO_CHANNEL_MIC | C62_AUDIO_CHANNEL_RX, 0, NULL); - if (ret != 0) { - printk("Failed to initialize AudioRecord RTX_INPUT: %d\n", ret); - return; - } - - // Initialize AudioTrack for speaker output - ret = AudioTrack_ctor(&s_track_spk, SAMPLE_RATE, PCM_16_BIT, - C62_AUDIO_CHANNEL_SPK, 0, NULL); - if (ret != 0) { - printk("Failed to initialize AudioTrack SPK: %d\n", ret); - AudioRecord_dtor(&s_record); - return; - } - - // Initialize AudioTrack for RTX output - ret = AudioTrack_ctor(&s_track_rtx_output, SAMPLE_RATE, PCM_16_BIT, - C62_AUDIO_CHANNEL_TX, 0, NULL); - if (ret != 0) { - printk("Failed to initialize AudioTrack RTX_OUTPUT: %d\n", ret); - AudioRecord_dtor(&s_record); - AudioTrack_dtor(&s_track_spk); - return; - } - - s_audio_initialized = true; - printk("Audio subsystem initialized successfully\n"); + int ret; + + if (s_audio_initialized) { + printk("Audio already initialized\n"); + return; + } + + printk("Initializing audio subsystem\n"); + + // Initialize mutex + k_mutex_init(&s_audio_mutex); + + // Initialize ring buffer + ring_buffer_init(&s_ring_buffer); + + // Initialize active paths array + for (int i = 0; i < 3; i++) { + s_active_paths[i].active = false; + } + s_active_path_count = 0; + + // Set audio system parameters + String8 param; + String8_ctor_char(¶m, "ADC_PDM_GAIN_A_LEFT=6;" + "ADC_PDM_GAIN_D_LEFT=20;" + "ADC_PDM_GAIN_A_RIGHT=6;" + "ADC_PDM_GAIN_D_RIGHT=20"); + ret = AudioSystem_setParameters(0, ¶m); + String8_dtor(¶m); + if (ret != 0) { + printk("Failed to set audio parameters: %d\n", ret); + return; + } + + // Initialize AudioRecord for MIC and RTX input interleaved + ret = AudioRecord_ctor(&s_record, 0, SAMPLE_RATE, PCM_16_BIT, + C62_AUDIO_CHANNEL_MIC | C62_AUDIO_CHANNEL_RX, 0, + NULL); + if (ret != 0) { + printk("Failed to initialize AudioRecord RTX_INPUT: %d\n", ret); + return; + } + + // Initialize AudioTrack for speaker output + ret = AudioTrack_ctor(&s_track_spk, SAMPLE_RATE, PCM_16_BIT, + C62_AUDIO_CHANNEL_SPK, 0, NULL); + if (ret != 0) { + printk("Failed to initialize AudioTrack SPK: %d\n", ret); + AudioRecord_dtor(&s_record); + return; + } + + // Initialize AudioTrack for RTX output + ret = AudioTrack_ctor(&s_track_rtx_output, SAMPLE_RATE, PCM_16_BIT, + C62_AUDIO_CHANNEL_TX, 0, NULL); + if (ret != 0) { + printk("Failed to initialize AudioTrack RTX_OUTPUT: %d\n", ret); + AudioRecord_dtor(&s_record); + AudioTrack_dtor(&s_track_spk); + return; + } + + s_audio_initialized = true; + printk("Audio subsystem initialized successfully\n"); } void audio_terminate() { - if (!s_audio_initialized) { - return; - } - - printk("Terminating audio subsystem\n"); - - // Stop streaming if active - if (s_audio_streaming) { - s_audio_streaming = false; - - // Wait for both threads to finish - k_thread_join(&s_audio_input_thread, K_SECONDS(1)); - k_thread_join(&s_audio_output_thread, K_SECONDS(1)); - - // Stop all active devices - if (s_mic_active || s_rtx_input_active) { - AudioRecord_stop(&s_record); - s_mic_active = false; - s_rtx_input_active = false; - } - if (s_spk_active) { - AudioTrack_stop(&s_track_spk); - s_spk_active = false; - } - if (s_rtx_output_active) { - AudioTrack_stop(&s_track_rtx_output); - s_rtx_output_active = false; - } - } - - // Clean up audio objects - AudioRecord_dtor(&s_record); - AudioTrack_dtor(&s_track_spk); - AudioTrack_dtor(&s_track_rtx_output); - - // Clear all paths - k_mutex_lock(&s_audio_mutex, K_FOREVER); - for (int i = 0; i < 3; i++) { - s_active_paths[i].active = false; - } - s_active_path_count = 0; - k_mutex_unlock(&s_audio_mutex); - - s_audio_initialized = false; - printk("Audio subsystem terminated\n"); + if (!s_audio_initialized) { + return; + } + + printk("Terminating audio subsystem\n"); + + // Stop streaming if active + if (s_audio_streaming) { + s_audio_streaming = false; + + // Wait for both threads to finish + k_thread_join(&s_audio_input_thread, K_SECONDS(1)); + k_thread_join(&s_audio_output_thread, K_SECONDS(1)); + + // Stop all active devices + if (s_mic_active || s_rtx_input_active) { + AudioRecord_stop(&s_record); + s_mic_active = false; + s_rtx_input_active = false; + } + if (s_spk_active) { + AudioTrack_stop(&s_track_spk); + s_spk_active = false; + } + if (s_rtx_output_active) { + AudioTrack_stop(&s_track_rtx_output); + s_rtx_output_active = false; + } + } + + // Clean up audio objects + AudioRecord_dtor(&s_record); + AudioTrack_dtor(&s_track_spk); + AudioTrack_dtor(&s_track_rtx_output); + + // Clear all paths + k_mutex_lock(&s_audio_mutex, K_FOREVER); + for (int i = 0; i < 3; i++) { + s_active_paths[i].active = false; + } + s_active_path_count = 0; + k_mutex_unlock(&s_audio_mutex); + + s_audio_initialized = false; + printk("Audio subsystem terminated\n"); } void audio_connect(const enum AudioSource source, const enum AudioSink sink) { - if (!s_audio_initialized) { - printk("Audio not initialized, initializing now\n"); - audio_init(); - } + if (!s_audio_initialized) { + printk("Audio not initialized, initializing now\n"); + audio_init(); + } - if(PATH(source, sink) == PATH(SOURCE_RTX, SINK_SPK)) - { + if (PATH(source, sink) == PATH(SOURCE_RTX, SINK_SPK)) { radio_enableAfOutput(); - gpio_pin_set_dt(&speaker_enable, 1); + gpio_pin_set_dt(&speaker_enable, 1); + } + + k_mutex_lock(&s_audio_mutex, K_FOREVER); + + // Check if path already exists + for (int i = 0; i < s_active_path_count; i++) { + if (s_active_paths[i].source == source && s_active_paths[i].sink == sink + && s_active_paths[i].active) { + printk("Audio path already connected: %d->%d\n", source, sink); + k_mutex_unlock(&s_audio_mutex); + return; + } + } + + // Add new path + if (s_active_path_count < 3) { + s_active_paths[s_active_path_count].source = source; + s_active_paths[s_active_path_count].sink = sink; + s_active_paths[s_active_path_count].active = true; + s_active_path_count++; + + printk("Audio path will connect: %d->%d (total: %d)\n", source, sink, + s_active_path_count); + + AudioRecord_start(&s_record); + // Start the appropriate source device based on the path + if (source == SOURCE_MIC && !s_mic_active) { + s_mic_active = true; + printk("Started input\n"); + } else if (source == SOURCE_RTX && !s_rtx_input_active) { + s_rtx_input_active = true; + printk("Started RTX input\n"); + } + + // Start the appropriate sink device based on the path + if (sink == SINK_SPK && !s_spk_active) { + AudioTrack_start(&s_track_spk); + s_spk_active = true; + printk("Started SPK output\n"); + } else if (sink == SINK_RTX && !s_rtx_output_active) { + AudioTrack_start(&s_track_rtx_output); + s_rtx_output_active = true; + printk("Started RTX output\n"); + } + + // Start streaming thread if not already running + if (!s_audio_streaming) { + s_audio_streaming = true; + + // Create input thread (recording) + k_thread_create(&s_audio_input_thread, s_audio_input_stack, + AUDIO_THREAD_STACK_SIZE, audio_input_thread, NULL, + NULL, NULL, AUDIO_THREAD_PRIORITY, 0, K_NO_WAIT); + k_thread_name_set(&s_audio_input_thread, "audio_input"); + + // Create output thread (playback) + k_thread_create(&s_audio_output_thread, s_audio_output_stack, + AUDIO_THREAD_STACK_SIZE, audio_output_thread, NULL, + NULL, NULL, AUDIO_THREAD_PRIORITY, 0, K_NO_WAIT); + k_thread_name_set(&s_audio_output_thread, "audio_output"); + + printk("Audio streaming threads started\n"); + } + } else { + printk("Maximum audio paths reached\n"); } - k_mutex_lock(&s_audio_mutex, K_FOREVER); - - // Check if path already exists - for (int i = 0; i < s_active_path_count; i++) { - if (s_active_paths[i].source == source && - s_active_paths[i].sink == sink && - s_active_paths[i].active) { - printk("Audio path already connected: %d->%d\n", source, sink); - k_mutex_unlock(&s_audio_mutex); - return; - } - } - - // Add new path - if (s_active_path_count < 3) { - s_active_paths[s_active_path_count].source = source; - s_active_paths[s_active_path_count].sink = sink; - s_active_paths[s_active_path_count].active = true; - s_active_path_count++; - - printk("Audio path will connect: %d->%d (total: %d)\n", - source, sink, s_active_path_count); - - AudioRecord_start(&s_record); - // Start the appropriate source device based on the path - if (source == SOURCE_MIC && !s_mic_active ) { - s_mic_active = true; - printk("Started input\n"); - } else if (source == SOURCE_RTX && !s_rtx_input_active) { - s_rtx_input_active = true; - printk("Started RTX input\n"); - } - - // Start the appropriate sink device based on the path - if (sink == SINK_SPK && !s_spk_active) { - AudioTrack_start(&s_track_spk); - s_spk_active = true; - printk("Started SPK output\n"); - } else if (sink == SINK_RTX && !s_rtx_output_active) { - AudioTrack_start(&s_track_rtx_output); - s_rtx_output_active = true; - printk("Started RTX output\n"); - } - - // Start streaming thread if not already running - if (!s_audio_streaming) { - s_audio_streaming = true; - - // Create input thread (recording) - k_thread_create(&s_audio_input_thread, s_audio_input_stack, AUDIO_THREAD_STACK_SIZE, - audio_input_thread, NULL, NULL, NULL, - AUDIO_THREAD_PRIORITY, 0, K_NO_WAIT); - k_thread_name_set(&s_audio_input_thread, "audio_input"); - - // Create output thread (playback) - k_thread_create(&s_audio_output_thread, s_audio_output_stack, AUDIO_THREAD_STACK_SIZE, - audio_output_thread, NULL, NULL, NULL, - AUDIO_THREAD_PRIORITY, 0, K_NO_WAIT); - k_thread_name_set(&s_audio_output_thread, "audio_output"); - - printk("Audio streaming threads started\n"); - } - } else { - printk("Maximum audio paths reached\n"); - } - - k_mutex_unlock(&s_audio_mutex); + k_mutex_unlock(&s_audio_mutex); } void audio_disconnect(const enum AudioSource source, const enum AudioSink sink) { - if (!s_audio_initialized) { - return; - } + if (!s_audio_initialized) { + return; + } - if(PATH(source, sink) == PATH(SOURCE_RTX, SINK_SPK)) - { - gpio_pin_set_dt(&speaker_enable, 0); + if (PATH(source, sink) == PATH(SOURCE_RTX, SINK_SPK)) { + gpio_pin_set_dt(&speaker_enable, 0); radio_disableAfOutput(); } - k_mutex_lock(&s_audio_mutex, K_FOREVER); - - // Find and remove the path - bool found = false; - for (int i = 0; i < s_active_path_count; i++) { - if (s_active_paths[i].source == source && - s_active_paths[i].sink == sink && - s_active_paths[i].active) { - s_active_paths[i].active = false; - found = true; - - // Compact array by moving last element to this position - if (i < s_active_path_count - 1) { - s_active_paths[i] = s_active_paths[s_active_path_count - 1]; - } - s_active_path_count--; - - printk("Audio path disconnected: %d->%d (remaining: %d)\n", - source, sink, s_active_path_count); - break; - } - } - - if (!found) { - printk("Audio path not found: %d->%d\n", source, sink); - } - - // Stop streaming if no active paths - if (s_active_path_count == 0 && s_audio_streaming) { - s_audio_streaming = false; - k_mutex_unlock(&s_audio_mutex); - - // Wait for both threads to finish - k_thread_join(&s_audio_input_thread, K_SECONDS(1)); - k_thread_join(&s_audio_output_thread, K_SECONDS(1)); - - // Stop all active devices - if (s_mic_active || s_rtx_input_active) { - AudioRecord_stop(&s_record); - s_mic_active = false; - s_rtx_input_active = false; - printk("Stopped input\n"); - } - if (s_spk_active) { - AudioTrack_stop(&s_track_spk); - s_spk_active = false; - printk("Stopped SPK output\n"); - } - if (s_rtx_output_active) { - AudioTrack_stop(&s_track_rtx_output); - s_rtx_output_active = false; - printk("Stopped RTX output\n"); - } - - printk("Audio streaming stopped\n"); - } else { - // Check if we need to stop any devices that are no longer used - bool mic_needed = false; - bool rtx_input_needed = false; - bool spk_needed = false; - bool rtx_output_needed = false; - - // Check if any remaining paths use each device - for (int i = 0; i < s_active_path_count; i++) { - if (s_active_paths[i].active) { - if (s_active_paths[i].source == SOURCE_MIC) mic_needed = true; - if (s_active_paths[i].source == SOURCE_RTX) rtx_input_needed = true; - if (s_active_paths[i].sink == SINK_SPK) spk_needed = true; - if (s_active_paths[i].sink == SINK_RTX) rtx_output_needed = true; - } - } - - // Stop devices that are no longer needed - if (!mic_needed && s_mic_active && !rtx_input_needed && s_rtx_input_active) { - AudioRecord_stop(&s_record); - s_mic_active = false; - s_rtx_input_active = false; - printk("Stopped input\n"); - } - if (!spk_needed && s_spk_active) { - AudioTrack_stop(&s_track_spk); - s_spk_active = false; - printk("Stopped SPK output\n"); - } - if (!rtx_output_needed && s_rtx_output_active) { - AudioTrack_stop(&s_track_rtx_output); - s_rtx_output_active = false; - printk("Stopped RTX output\n"); - } - - k_mutex_unlock(&s_audio_mutex); - } + k_mutex_lock(&s_audio_mutex, K_FOREVER); + + // Find and remove the path + bool found = false; + for (int i = 0; i < s_active_path_count; i++) { + if (s_active_paths[i].source == source && s_active_paths[i].sink == sink + && s_active_paths[i].active) { + s_active_paths[i].active = false; + found = true; + + // Compact array by moving last element to this position + if (i < s_active_path_count - 1) { + s_active_paths[i] = s_active_paths[s_active_path_count - 1]; + } + s_active_path_count--; + + printk("Audio path disconnected: %d->%d (remaining: %d)\n", source, + sink, s_active_path_count); + break; + } + } + + if (!found) { + printk("Audio path not found: %d->%d\n", source, sink); + } + + // Stop streaming if no active paths + if (s_active_path_count == 0 && s_audio_streaming) { + s_audio_streaming = false; + k_mutex_unlock(&s_audio_mutex); + + // Wait for both threads to finish + k_thread_join(&s_audio_input_thread, K_SECONDS(1)); + k_thread_join(&s_audio_output_thread, K_SECONDS(1)); + + // Stop all active devices + if (s_mic_active || s_rtx_input_active) { + AudioRecord_stop(&s_record); + s_mic_active = false; + s_rtx_input_active = false; + printk("Stopped input\n"); + } + if (s_spk_active) { + AudioTrack_stop(&s_track_spk); + s_spk_active = false; + printk("Stopped SPK output\n"); + } + if (s_rtx_output_active) { + AudioTrack_stop(&s_track_rtx_output); + s_rtx_output_active = false; + printk("Stopped RTX output\n"); + } + + printk("Audio streaming stopped\n"); + } else { + // Check if we need to stop any devices that are no longer used + bool mic_needed = false; + bool rtx_input_needed = false; + bool spk_needed = false; + bool rtx_output_needed = false; + + // Check if any remaining paths use each device + for (int i = 0; i < s_active_path_count; i++) { + if (s_active_paths[i].active) { + if (s_active_paths[i].source == SOURCE_MIC) + mic_needed = true; + if (s_active_paths[i].source == SOURCE_RTX) + rtx_input_needed = true; + if (s_active_paths[i].sink == SINK_SPK) + spk_needed = true; + if (s_active_paths[i].sink == SINK_RTX) + rtx_output_needed = true; + } + } + + // Stop devices that are no longer needed + if (!mic_needed && s_mic_active && !rtx_input_needed + && s_rtx_input_active) { + AudioRecord_stop(&s_record); + s_mic_active = false; + s_rtx_input_active = false; + printk("Stopped input\n"); + } + if (!spk_needed && s_spk_active) { + AudioTrack_stop(&s_track_spk); + s_spk_active = false; + printk("Stopped SPK output\n"); + } + if (!rtx_output_needed && s_rtx_output_active) { + AudioTrack_stop(&s_track_rtx_output); + s_rtx_output_active = false; + printk("Stopped RTX output\n"); + } + + k_mutex_unlock(&s_audio_mutex); + } } bool audio_checkPathCompatibility(const enum AudioSource p1Source, - const enum AudioSink p1Sink, + const enum AudioSink p1Sink, const enum AudioSource p2Source, - const enum AudioSink p2Sink) + const enum AudioSink p2Sink) { - // If both paths use the same source, they're incompatible - if (p1Source == p2Source && p1Source != SOURCE_MCU) { - return false; - } + // If both paths use the same source, they're incompatible + if (p1Source == p2Source && p1Source != SOURCE_MCU) { + return false; + } - // If both paths use the same sink, they're incompatible - if (p1Sink == p2Sink && p1Sink != SINK_MCU) { - return false; - } + // If both paths use the same sink, they're incompatible + if (p1Sink == p2Sink && p1Sink != SINK_MCU) { + return false; + } - // MCU source/sink can be used multiple times (software buffers) - // Hardware sources/sinks (MIC, SPK, RTX) can only be used once + // MCU source/sink can be used multiple times (software buffers) + // Hardware sources/sinks (MIC, SPK, RTX) can only be used once - return true; + return true; } - diff --git a/platform/targets/c62/dsp.c b/platform/targets/c62/dsp.c index 466e82eb21..f8763fbe09 100644 --- a/platform/targets/c62/dsp.c +++ b/platform/targets/c62/dsp.c @@ -16,9 +16,10 @@ LOG_MODULE_REGISTER(dsp, LOG_LEVEL_DBG); #include #include -#define AP_SYS_RAM_BANK_IDX 4 +#define AP_SYS_RAM_BANK_IDX 4 #define AP_SYS_RAM_BANK_SIZE 0x00010000 -#define AP_SYS_RAM_BANK_ADDR (SYS_RAM_BASE + AP_SYS_RAM_BANK_SIZE * AP_SYS_RAM_BANK_IDX) +#define AP_SYS_RAM_BANK_ADDR \ + (SYS_RAM_BASE + AP_SYS_RAM_BANK_SIZE * AP_SYS_RAM_BANK_IDX) #define AP_PSRAM_BASE (0x30000000) #define CP_PSRAM_BASE (0x60000000) @@ -31,66 +32,67 @@ LOG_MODULE_REGISTER(dsp, LOG_LEVEL_DBG); void lsf_dsp_load(const void *addr, uint32_t size) { - /* Enable clock for DSP */ - __HAL_CRM_CP_CLK_ENABLE(); + /* Enable clock for DSP */ + __HAL_CRM_CP_CLK_ENABLE(); - /* Set boot address */ - __HAL_SYS_CP_SET_BOOT_ADDR(CP_PSRAM_BASE); + /* Set boot address */ + __HAL_SYS_CP_SET_BOOT_ADDR(CP_PSRAM_BASE); - /* Stall DSP */ - __HAL_SYS_CP_STALL(); + /* Stall DSP */ + __HAL_SYS_CP_STALL(); - if (__HAL_SYS_IS_CP_RESET()) { - __HAL_SYS_CP_RELEASE(); - } + if (__HAL_SYS_IS_CP_RESET()) { + __HAL_SYS_CP_RELEASE(); + } - if (__HAL_SYS_NPU_IS_RESET()) { - __HAL_SYS_NPU_RELEASE(); - } + if (__HAL_SYS_NPU_IS_RESET()) { + __HAL_SYS_NPU_RELEASE(); + } - __DMB(); + __DMB(); - /* Load DSP firmware to boot address */ - memcpy((void *)AP_PSRAM_BASE, addr, size); - dcache_clean_range(AP_PSRAM_BASE, AP_PSRAM_BASE + size); + /* Load DSP firmware to boot address */ + memcpy((void *)AP_PSRAM_BASE, addr, size); + dcache_clean_range(AP_PSRAM_BASE, AP_PSRAM_BASE + size); - __DSB(); + __DSB(); - /* Reset DSP */ - __HAL_SYS_CP_RESET(); - __HAL_SYS_CP_RELEASE(); + /* Reset DSP */ + __HAL_SYS_CP_RESET(); + __HAL_SYS_CP_RELEASE(); - /* Run it */ - __HAL_SYS_CP_RUN(); + /* Run it */ + __HAL_SYS_CP_RUN(); } static int lsf_dsp_init(void) { - /* Disable clocks */ - __HAL_CRM_CP_CLK_DISABLE(); - __HAL_CRM_NPU_CLK_DISABLE(); + /* Disable clocks */ + __HAL_CRM_CP_CLK_DISABLE(); + __HAL_CRM_NPU_CLK_DISABLE(); - /* Stall DSP */ - __HAL_SYS_CP_STALL(); + /* Stall DSP */ + __HAL_SYS_CP_STALL(); - /* Configure share memory bank 4 to be accessed by AHB-S */ - IP_SYSCTRL->REG_AP_CTRL1.bit.AP_RAM_SEL = (1 << AP_SYS_RAM_BANK_IDX); + /* Configure share memory bank 4 to be accessed by AHB-S */ + IP_SYSCTRL->REG_AP_CTRL1.bit.AP_RAM_SEL = (1 << AP_SYS_RAM_BANK_IDX); - /* Zero memory bank 4 */ - memset((void *)AP_SYS_RAM_BANK_ADDR, 0x00, AP_SYS_RAM_BANK_SIZE); - dcache_invalidate_range(AP_SYS_RAM_BANK_ADDR, AP_SYS_RAM_BANK_ADDR + AP_SYS_RAM_BANK_SIZE); + /* Zero memory bank 4 */ + memset((void *)AP_SYS_RAM_BANK_ADDR, 0x00, AP_SYS_RAM_BANK_SIZE); + dcache_invalidate_range(AP_SYS_RAM_BANK_ADDR, + AP_SYS_RAM_BANK_ADDR + AP_SYS_RAM_BANK_SIZE); #if defined(CONFIG_LSF_DSP_LOAD_ON_BOOT) - LOG_DBG("Auto load DSP firmware from %s (offset: 0x%08x, size: %u)", - DT_LABEL(DSP_FIRMWARE_NODE), DT_REG_ADDR(DSP_FIRMWARE_NODE), - DT_REG_SIZE(DSP_FIRMWARE_NODE)); + LOG_DBG("Auto load DSP firmware from %s (offset: 0x%08x, size: %u)", + DT_LABEL(DSP_FIRMWARE_NODE), DT_REG_ADDR(DSP_FIRMWARE_NODE), + DT_REG_SIZE(DSP_FIRMWARE_NODE)); - /* Load DSP firmware */ - lsf_dsp_load((void *)(AP_FLASH_BASE + DT_REG_ADDR(DSP_FIRMWARE_NODE)), - DT_REG_SIZE(DSP_FIRMWARE_NODE)); + /* Load DSP firmware */ + lsf_dsp_load((void *)(AP_FLASH_BASE + DT_REG_ADDR(DSP_FIRMWARE_NODE)), + DT_REG_SIZE(DSP_FIRMWARE_NODE)); #endif /* CONFIG_LSF_DSP_LOAD_ON_BOOT */ - return 0; + return 0; } SYS_INIT(lsf_dsp_init, POST_KERNEL, CONFIG_LSF_DSP_INIT_PRIORITY); diff --git a/platform/targets/c62/hwconfig.h b/platform/targets/c62/hwconfig.h index 3ca41b7267..f5dfb57e32 100644 --- a/platform/targets/c62/hwconfig.h +++ b/platform/targets/c62/hwconfig.h @@ -14,8 +14,8 @@ /* * Display properties are encoded in the devicetree */ -#define DISPLAY DT_CHOSEN(zephyr_display) -#define CONFIG_SCREEN_WIDTH DT_PROP(DISPLAY, width) +#define DISPLAY DT_CHOSEN(zephyr_display) +#define CONFIG_SCREEN_WIDTH DT_PROP(DISPLAY, width) #define CONFIG_SCREEN_HEIGHT DT_PROP(DISPLAY, height) #define CONFIG_PIX_FMT_RGB565 diff --git a/platform/targets/c62/lsf.c b/platform/targets/c62/lsf.c index d3d1210f8f..5f85f68f99 100644 --- a/platform/targets/c62/lsf.c +++ b/platform/targets/c62/lsf.c @@ -21,55 +21,56 @@ static volatile bool inited = false; int lsf_controller_init(void) { - int ret; + int ret; - if (inited) { - return 0; - } + if (inited) { + return 0; + } - LOG_DBG("Initializing LSF service controller"); + LOG_DBG("Initializing LSF service controller"); - /* Initialize LSF */ - lsf_init(); - lsf_connect(); + /* Initialize LSF */ + lsf_init(); + lsf_connect(); - /* Wait for ready signal */ - ICFenceHandle fence = IC_Proxy_getRemoteFence(0); + /* Wait for ready signal */ + ICFenceHandle fence = IC_Proxy_getRemoteFence(0); - ICFence_syncWithRemote(fence); - LOG_DBG("DSP synced"); + ICFence_syncWithRemote(fence); + LOG_DBG("DSP synced"); - uint32_t val; - ICFence_wait(fence, &val); - LOG_DBG("DSP ready"); + uint32_t val; + ICFence_wait(fence, &val); + LOG_DBG("DSP ready"); - STRUCT_SECTION_FOREACH(lsf_service, service) { - LOG_DBG("Initializing service %s", service->name); + STRUCT_SECTION_FOREACH(lsf_service, service) + { + LOG_DBG("Initializing service %s", service->name); - ret = service->init(); - if (ret != 0) { - LOG_ERR("Failed to initialize service %s: %d", service->name, ret); - return ret; - } - } + ret = service->init(); + if (ret != 0) { + LOG_ERR("Failed to initialize service %s: %d", service->name, ret); + return ret; + } + } - LOG_DBG("All services initialized"); + LOG_DBG("All services initialized"); - inited = true; + inited = true; - return 0; + return 0; } static int lsf_controller_init_internal(const struct device *dev) { - ARG_UNUSED(dev); + ARG_UNUSED(dev); #if DT_HAS_CHOSEN(lsf_dsp_firmware) - return lsf_controller_init(); + return lsf_controller_init(); #else /* DT_HAS_CHOSEN(lsf_dsp_firmware) */ - return 0; + return 0; #endif /* DT_HAS_CHOSEN(lsf_dsp_firmware) */ } -DEVICE_DT_INST_DEFINE(0, lsf_controller_init_internal, NULL, NULL, NULL, APPLICATION, - CONFIG_APPLICATION_INIT_PRIORITY, NULL); +DEVICE_DT_INST_DEFINE(0, lsf_controller_init_internal, NULL, NULL, NULL, + APPLICATION, CONFIG_APPLICATION_INIT_PRIORITY, NULL); diff --git a/platform/targets/c62/platform.c b/platform/targets/c62/platform.c old mode 100755 new mode 100644 index f0f5305936..5a5a35d662 --- a/platform/targets/c62/platform.c +++ b/platform/targets/c62/platform.c @@ -17,29 +17,34 @@ #include #include - // Reference the GPIO nodes -static const struct gpio_dt_spec speaker_enable = GPIO_DT_SPEC_GET(DT_PATH(gpio_controls, speaker_enable), gpios); -static const struct gpio_dt_spec dtmf_enable = GPIO_DT_SPEC_GET(DT_PATH(gpio_controls, dtmf_enable), gpios); -static const struct gpio_dt_spec button_ptt = GPIO_DT_SPEC_GET_OR(DT_NODELABEL(button_ptt), gpios, {0}); - -static const struct gpio_dt_spec led_white = GPIO_DT_SPEC_GET(DT_ALIAS(ledwhite), gpios); -static const struct gpio_dt_spec led_green = GPIO_DT_SPEC_GET(DT_ALIAS(ledgreen), gpios); -static const struct gpio_dt_spec led_keyboard = GPIO_DT_SPEC_GET(DT_NODELABEL(ledkeyboard), gpios); - -static const struct pwm_dt_spec pwm_lcd_backlight = PWM_DT_SPEC_GET(DT_NODELABEL(pwm_lcd_backlight)); -static const struct pwm_dt_spec pwm_rf_apc = PWM_DT_SPEC_GET(DT_NODELABEL(pwm_rf_apc)); +static const struct gpio_dt_spec speaker_enable = + GPIO_DT_SPEC_GET(DT_PATH(gpio_controls, speaker_enable), gpios); +static const struct gpio_dt_spec dtmf_enable = + GPIO_DT_SPEC_GET(DT_PATH(gpio_controls, dtmf_enable), gpios); +static const struct gpio_dt_spec button_ptt = + GPIO_DT_SPEC_GET_OR(DT_NODELABEL(button_ptt), gpios, { 0 }); + +static const struct gpio_dt_spec led_white = + GPIO_DT_SPEC_GET(DT_ALIAS(ledwhite), gpios); +static const struct gpio_dt_spec led_green = + GPIO_DT_SPEC_GET(DT_ALIAS(ledgreen), gpios); +static const struct gpio_dt_spec led_keyboard = + GPIO_DT_SPEC_GET(DT_NODELABEL(ledkeyboard), gpios); + +static const struct pwm_dt_spec pwm_lcd_backlight = + PWM_DT_SPEC_GET(DT_NODELABEL(pwm_lcd_backlight)); +static const struct pwm_dt_spec pwm_rf_apc = + PWM_DT_SPEC_GET(DT_NODELABEL(pwm_rf_apc)); const struct device *radio = DEVICE_DT_GET(DT_NODELABEL(bk4819_radio)); const struct device *adc_dev = DEVICE_DT_GET(DT_NODELABEL(adc0)); - -static hwInfo_t hwInfo = -{ - .name = "c62", - .hw_version = 0, - .uhf_band = 1, - .vhf_band = 1, +static hwInfo_t hwInfo = { + .name = "c62", + .hw_version = 0, + .uhf_band = 1, + .vhf_band = 1, .uhf_maxFreq = 480, .uhf_minFreq = 400, .vhf_maxFreq = 174, @@ -51,18 +56,17 @@ static hwInfo_t hwInfo = static int32_t adc_vref = 0; static int16_t adc_raw_buffer[ADC_NUM_CHANNELS]; struct adc_sequence sequence = { - /* individual channels will be added below */ - .channels = BIT(2) , // BIT(2) Channel 2 (BAT_DET), BIT(1) Channel 1 (Charge detection) - .buffer = adc_raw_buffer, - /* buffer size in bytes, not number of samples */ - .buffer_size = sizeof(adc_raw_buffer), - .resolution = 11, // 11-bit resolution + /* individual channels will be added below */ + .channels = BIT( + 2), // BIT(2) Channel 2 (BAT_DET), BIT(1) Channel 1 (Charge detection) + .buffer = adc_raw_buffer, + /* buffer size in bytes, not number of samples */ + .buffer_size = sizeof(adc_raw_buffer), + .resolution = 11, // 11-bit resolution }; - static int battery_init(void); - /** * Set display brightness using PWM on pin A02 * PWM Period: 1000us (1kHz), adjustable duty cycle for brightness @@ -72,26 +76,28 @@ static int battery_init(void); void platform_set_display_brightness(uint8_t brightness_percent) { // Calculate duty cycle (1000us period = 1kHz) - uint32_t period_us = 1000; // 1kHz PWM frequency - uint32_t adjusted_brightness_percent = 0; + uint32_t period_us = 1000; // 1kHz PWM frequency + uint32_t adjusted_brightness_percent = 0; - if (brightness_percent > 0) { - // Apply non-linear mapping for better low-end brightness control - adjusted_brightness_percent = roundf(brightness_percent * brightness_percent / 105.0) + 5; - } + if (brightness_percent > 0) { + // Apply non-linear mapping for better low-end brightness control + adjusted_brightness_percent = + roundf(brightness_percent * brightness_percent / 105.0) + 5; + } uint32_t pulse_us = (period_us * adjusted_brightness_percent) / 100; - - int ret = pwm_set_dt(&pwm_lcd_backlight, PWM_USEC(period_us), PWM_USEC(pulse_us)); - + + int ret = pwm_set_dt(&pwm_lcd_backlight, PWM_USEC(period_us), + PWM_USEC(pulse_us)); + if (ret < 0) { printk("Failed to set display PWM: %d\n", ret); } else { - printk("Display brightness set to %d%% (PWM %d%%)\n", brightness_percent, adjusted_brightness_percent); + printk("Display brightness set to %d%% (PWM %d%%)\n", + brightness_percent, adjusted_brightness_percent); } } - /** * Set TX power using PWM on pin A03 * PWM Period: 1000us (1kHz), adjustable duty cycle for power level @@ -100,17 +106,17 @@ void platform_set_display_brightness(uint8_t brightness_percent) */ void platform_set_tx_power(uint8_t power_percent) { - printk("Requested TX power: %d%%\n", power_percent); + printk("Requested TX power: %d%%\n", power_percent); + + //TODO: Check if this works... May need to adjust mapping of power_percent to duty cycle based on actual power output + // vs duty cycle curve of the PA, and also consider frequency dependence of PA efficiency - //TODO: Check if this works... May need to adjust mapping of power_percent to duty cycle based on actual power output - // vs duty cycle curve of the PA, and also consider frequency dependence of PA efficiency - // Calculate duty cycle (1000us period = 1kHz) - uint32_t period_us = 1000; // 1kHz PWM frequency + uint32_t period_us = 1000; // 1kHz PWM frequency uint32_t pulse_us = (period_us * power_percent) / 100; - + int ret = pwm_set_dt(&pwm_rf_apc, PWM_USEC(period_us), PWM_USEC(pulse_us)); - + if (ret < 0) { printk("Failed to set TX power PWM: %d\n", ret); } else { @@ -118,17 +124,16 @@ void platform_set_tx_power(uint8_t power_percent) } } - void platform_init_csk6() { - printk("0x49 de OE3ANC from OPENRTX on the C62\n"); - + printk("0x49 de OE3ANC from OPENRTX on the C62\n"); + // Configure the PTT key as input with pull-up gpio_pin_configure_dt(&button_ptt, GPIO_INPUT); - // Configure light pins as outputs and set initial state + // Configure light pins as outputs and set initial state gpio_pin_configure_dt(&led_white, GPIO_OUTPUT_INACTIVE); - gpio_pin_configure_dt(&led_green, GPIO_OUTPUT_INACTIVE); + gpio_pin_configure_dt(&led_green, GPIO_OUTPUT_INACTIVE); gpio_pin_configure_dt(&led_keyboard, GPIO_OUTPUT_INACTIVE); // Configure speaker enable (don't set it as output if you want to use SWD debugging!) @@ -136,25 +141,24 @@ void platform_init_csk6() gpio_pin_configure_dt(&dtmf_enable, GPIO_OUTPUT); + // DT_EN (Audio routing control for BK4819): 0 = DSP left channel output to AMP, 1 = DTMF from BK4819 to AMP + gpio_pin_set_dt(&dtmf_enable, 0); // DSP left channel output to amplifier - // DT_EN (Audio routing control for BK4819): 0 = DSP left channel output to AMP, 1 = DTMF from BK4819 to AMP - gpio_pin_set_dt(&dtmf_enable, 0); // DSP left channel output to amplifier + // Enable keyboard backlight + gpio_pin_set_dt(&led_keyboard, 1); - // Enable keyboard backlight - gpio_pin_set_dt(&led_keyboard, 1); + /* Initialise audio */ + audio_init(); - /* Initialise audio */ - audio_init(); - - /* Init ADC for Battery reading */ - battery_init(); + /* Init ADC for Battery reading */ + battery_init(); //Activate to test Broadcast FM Radio (92.2MHz) //BK1080_Init(92200000, 0); - //gpio_pin_set_dt(&speaker_enable, 1); + //gpio_pin_set_dt(&speaker_enable, 1); - // Test beep - //BK4819_BeepStart(500, true); + // Test beep + //BK4819_BeepStart(500, true); } void platform_terminate() @@ -162,46 +166,44 @@ void platform_terminate() ; } - static int battery_init(void) { if (!device_is_ready(adc_dev)) { printk("ADC device not ready\n"); return -1; } - + // Configure ADC channel struct adc_channel_cfg channel_cfg = { .gain = ADC_GAIN_1, .reference = ADC_REF_INTERNAL, - .channel_id = 2, // ADC2 channel (pin B08) + .channel_id = 2, // ADC2 channel (pin B08) }; - + int ret = adc_channel_setup(adc_dev, &channel_cfg); if (ret < 0) { printk("Failed to setup ADC channel: %d\n", ret); return -2; } - channel_cfg.channel_id = 1; // ADC1 channel (Charge detection) + channel_cfg.channel_id = 1; // ADC1 channel (Charge detection) - ret = adc_channel_setup(adc_dev, &channel_cfg); + ret = adc_channel_setup(adc_dev, &channel_cfg); if (ret < 0) { printk("Failed to setup ADC channel: %d\n", ret); return -2; } - - // Read ADC reference voltage if supported - adc_vref = adc_ref_internal(adc_dev); - if (adc_vref > 0) { - printk("ADC reference voltage: %d mV\n", adc_vref); - } else { - printk("ADC reference voltage not available\n"); - } - - return 0; -} + // Read ADC reference voltage if supported + adc_vref = adc_ref_internal(adc_dev); + if (adc_vref > 0) { + printk("ADC reference voltage: %d mV\n", adc_vref); + } else { + printk("ADC reference voltage not available\n"); + } + + return 0; +} /** * Read battery voltage using ADC2 on pin B08 @@ -209,7 +211,7 @@ static int battery_init(void) */ uint16_t platform_getVbat() { - #if 0 +#if 0 sequence.channels = BIT(1); // Read ADC1 channel for charge detection // Read ADC value int ret = adc_read(adc_dev, &sequence); @@ -256,7 +258,7 @@ uint16_t platform_getVbat() return (uint16_t)voltage_mv; #else - return 7200; // Return fixed value until voltage reading is working reliably + return 7200; // Return fixed value until voltage reading is working reliably #endif } @@ -288,39 +290,38 @@ bool platform_pwrButtonStatus() void platform_ledOn(led_t led) { - switch(led) { - case WHITE: - gpio_pin_set_dt(&led_white, 1); - break; - case GREEN: - gpio_pin_set_dt(&led_green, 1); - break; - case RED: - // Controlled by PA activation - break; - default: - break; - } + switch (led) { + case WHITE: + gpio_pin_set_dt(&led_white, 1); + break; + case GREEN: + gpio_pin_set_dt(&led_green, 1); + break; + case RED: + // Controlled by PA activation + break; + default: + break; + } } void platform_ledOff(led_t led) { - switch(led) { - case WHITE: - gpio_pin_set_dt(&led_white, 0); - break; - case GREEN: - gpio_pin_set_dt(&led_green, 0); - break; - case RED: - // Controlled by PA dactivation - break; - default: - break; - } + switch (led) { + case WHITE: + gpio_pin_set_dt(&led_white, 0); + break; + case GREEN: + gpio_pin_set_dt(&led_green, 0); + break; + case RED: + // Controlled by PA dactivation + break; + default: + break; + } } - void platform_beepStart(uint16_t freq) { BK4819_BeepStart(freq, true); diff --git a/platform/targets/c62/service.h b/platform/targets/c62/service.h index 454ef4cf76..149f43095d 100644 --- a/platform/targets/c62/service.h +++ b/platform/targets/c62/service.h @@ -11,13 +11,14 @@ typedef int (*lsf_service_init_t)(void); struct lsf_service { - const char *name; - lsf_service_init_t init; + const char *name; + lsf_service_init_t init; }; -#define LSF_SERVICE_DEFINE(_name, _init_fn) \ - static STRUCT_SECTION_ITERABLE(lsf_service, _name) = { \ - .name = STRINGIFY(_name), .init = _init_fn, \ - }; +#define LSF_SERVICE_DEFINE(_name, _init_fn) \ + static STRUCT_SECTION_ITERABLE(lsf_service, _name) = { \ + .name = STRINGIFY(_name), \ + .init = _init_fn, \ + }; #endif /* __LSF_SERVICE_H__ */ diff --git a/platform/targets/c62/services/service.h b/platform/targets/c62/services/service.h index 454ef4cf76..149f43095d 100644 --- a/platform/targets/c62/services/service.h +++ b/platform/targets/c62/services/service.h @@ -11,13 +11,14 @@ typedef int (*lsf_service_init_t)(void); struct lsf_service { - const char *name; - lsf_service_init_t init; + const char *name; + lsf_service_init_t init; }; -#define LSF_SERVICE_DEFINE(_name, _init_fn) \ - static STRUCT_SECTION_ITERABLE(lsf_service, _name) = { \ - .name = STRINGIFY(_name), .init = _init_fn, \ - }; +#define LSF_SERVICE_DEFINE(_name, _init_fn) \ + static STRUCT_SECTION_ITERABLE(lsf_service, _name) = { \ + .name = STRINGIFY(_name), \ + .init = _init_fn, \ + }; #endif /* __LSF_SERVICE_H__ */ diff --git a/platform/targets/c62/services/service_audio.c b/platform/targets/c62/services/service_audio.c index dabe233d4a..20b3b6e63e 100644 --- a/platform/targets/c62/services/service_audio.c +++ b/platform/targets/c62/services/service_audio.c @@ -16,11 +16,11 @@ LOG_MODULE_REGISTER(lsf_audio, LOG_LEVEL_DBG); static int lsf_audio_init(void) { - LOG_DBG("Initialize AudioService"); + LOG_DBG("Initialize AudioService"); - AudioSystem_initialize(); + AudioSystem_initialize(); - return 0; + return 0; } LSF_SERVICE_DEFINE(lsf_audio, lsf_audio_init); diff --git a/platform/targets/c62/services/service_thinker.c b/platform/targets/c62/services/service_thinker.c index c5166b3a1c..0722655a57 100644 --- a/platform/targets/c62/services/service_thinker.c +++ b/platform/targets/c62/services/service_thinker.c @@ -20,149 +20,150 @@ extern IC_Allocator *g_pFreeer; #define THINKER_SERVICE_ID DT_INST_REG_ADDR(0) enum { - THINKERSERVICE_PROPERTY_INPUT, - THINKERSERVICE_PROPERTY_OUTPUT, - THINKERSERVICE_PROPERTY_MODEL, - THINKERSERVICE_PROPERTY_OUTPUT_COUNT, + THINKERSERVICE_PROPERTY_INPUT, + THINKERSERVICE_PROPERTY_OUTPUT, + THINKERSERVICE_PROPERTY_MODEL, + THINKERSERVICE_PROPERTY_OUTPUT_COUNT, }; static LsfPropertyConfig thinkerservice_property_defs[] = { - { - .property_id = THINKERSERVICE_PROPERTY_INPUT, - .flag = LSF_PROPERTY_FLAG_SYNC | LSF_PROPERTY_FLAG_SET_ONLY, - .type = LSF_PROPERTY_TYPE_PTR, - }, - { - .property_id = THINKERSERVICE_PROPERTY_OUTPUT, - .flag = LSF_PROPERTY_FLAG_SYNC | LSF_PROPERTY_FLAG_GET_ONLY, - .type = LSF_PROPERTY_TYPE_PTR, - }, - { - .property_id = THINKERSERVICE_PROPERTY_MODEL, - .flag = LSF_PROPERTY_FLAG_SYNC | LSF_PROPERTY_FLAG_SET_ONLY, - .type = LSF_PROPERTY_TYPE_PTR, - }, - { - .property_id = THINKERSERVICE_PROPERTY_OUTPUT_COUNT, - .flag = LSF_PROPERTY_FLAG_SYNC | LSF_PROPERTY_FLAG_GET_ONLY, - .type = LSF_PROPERTY_TYPE_UINT32, - }, + { + .property_id = THINKERSERVICE_PROPERTY_INPUT, + .flag = LSF_PROPERTY_FLAG_SYNC | LSF_PROPERTY_FLAG_SET_ONLY, + .type = LSF_PROPERTY_TYPE_PTR, + }, + { + .property_id = THINKERSERVICE_PROPERTY_OUTPUT, + .flag = LSF_PROPERTY_FLAG_SYNC | LSF_PROPERTY_FLAG_GET_ONLY, + .type = LSF_PROPERTY_TYPE_PTR, + }, + { + .property_id = THINKERSERVICE_PROPERTY_MODEL, + .flag = LSF_PROPERTY_FLAG_SYNC | LSF_PROPERTY_FLAG_SET_ONLY, + .type = LSF_PROPERTY_TYPE_PTR, + }, + { + .property_id = THINKERSERVICE_PROPERTY_OUTPUT_COUNT, + .flag = LSF_PROPERTY_FLAG_SYNC | LSF_PROPERTY_FLAG_GET_ONLY, + .type = LSF_PROPERTY_TYPE_UINT32, + }, }; int lsf_thinker_set_model(const void *ptr, uint32_t size) { - LsfVariant var; - int ret; + LsfVariant var; + int ret; - LOG_DBG("Set model: addr: %p, size: %u", ptr, size); - LOG_HEXDUMP_DBG(ptr, MIN(8, size), "Model data (first 8 bytes):"); + LOG_DBG("Set model: addr: %p, size: %u", ptr, size); + LOG_HEXDUMP_DBG(ptr, MIN(8, size), "Model data (first 8 bytes):"); - LsfVariant_init(&var); - var.variant_type = type_pointer; - var.u.pointer.pAddr = (void *)ptr; - var.u.pointer.size = size; + LsfVariant_init(&var); + var.variant_type = type_pointer; + var.u.pointer.pAddr = (void *)ptr; + var.u.pointer.size = size; - ret = lsf_set(THINKER_SERVICE_ID, THINKERSERVICE_PROPERTY_MODEL, &var); - if (ret != 0) { - LOG_ERR("Failed to set model: %d", ret); - ret = -EIO; - } + ret = lsf_set(THINKER_SERVICE_ID, THINKERSERVICE_PROPERTY_MODEL, &var); + if (ret != 0) { + LOG_ERR("Failed to set model: %d", ret); + ret = -EIO; + } - LsfVariant_clear(&var); - return ret; + LsfVariant_clear(&var); + return ret; } int lsf_thinker_set_input(const void *ptr, uint32_t size) { - LsfVariant var; - int ret; + LsfVariant var; + int ret; - LOG_DBG("Set input: addr: %p, size: %u", ptr, size); - LOG_HEXDUMP_DBG(ptr, MIN(8, size), "Input data (first 8 bytes):"); + LOG_DBG("Set input: addr: %p, size: %u", ptr, size); + LOG_HEXDUMP_DBG(ptr, MIN(8, size), "Input data (first 8 bytes):"); - LsfVariant_init(&var); - var.variant_type = type_pointer; - var.u.pointer.pAddr = (void *)ptr; - var.u.pointer.size = size; + LsfVariant_init(&var); + var.variant_type = type_pointer; + var.u.pointer.pAddr = (void *)ptr; + var.u.pointer.size = size; - ret = lsf_set(THINKER_SERVICE_ID, THINKERSERVICE_PROPERTY_INPUT, &var); - if (ret != 0) { - LOG_ERR("Failed to set input: %d", ret); - ret = -EIO; - } + ret = lsf_set(THINKER_SERVICE_ID, THINKERSERVICE_PROPERTY_INPUT, &var); + if (ret != 0) { + LOG_ERR("Failed to set input: %d", ret); + ret = -EIO; + } - LsfVariant_clear(&var); - return ret; + LsfVariant_clear(&var); + return ret; } int lsf_thinker_get_output(void **ptr, uint32_t *size) { - LsfVariant *var; - int ret; + LsfVariant *var; + int ret; - ret = lsf_get(THINKER_SERVICE_ID, THINKERSERVICE_PROPERTY_OUTPUT, &var); - if (ret != 0) { - LOG_ERR("Failed to get output: %d", ret); - return -EIO; - } + ret = lsf_get(THINKER_SERVICE_ID, THINKERSERVICE_PROPERTY_OUTPUT, &var); + if (ret != 0) { + LOG_ERR("Failed to get output: %d", ret); + return -EIO; + } - LsfVariant output; - LsfVariant_init(&output); - output.variant_type = type_pointer; + LsfVariant output; + LsfVariant_init(&output); + output.variant_type = type_pointer; - size_t output_size = LsfVariant_getMarshalSize(&output); + size_t output_size = LsfVariant_getMarshalSize(&output); - size_t buf_size = var->u.pointer.size; - size_t item_size; - for (int i = 0; buf_size > 0; i++) { - LsfVariantClass_unmarshal(&output, - (uint8_t *)var->u.pointer.pAddr + i * output_size, - output_size, &item_size); - buf_size -= item_size; + size_t buf_size = var->u.pointer.size; + size_t item_size; + for (int i = 0; buf_size > 0; i++) { + LsfVariantClass_unmarshal( + &output, (uint8_t *)var->u.pointer.pAddr + i * output_size, + output_size, &item_size); + buf_size -= item_size; - ptr[i] = output.u.pointer.pAddr; - size[i] = output.u.pointer.size; + ptr[i] = output.u.pointer.pAddr; + size[i] = output.u.pointer.size; - LOG_DBG("Got output[%d]: ptr: %p, size: %u", i, ptr[i], size[i]); - LOG_HEXDUMP_DBG(ptr[i], MIN(8, *size), "Output data (first 8 bytes):"); - } + LOG_DBG("Got output[%d]: ptr: %p, size: %u", i, ptr[i], size[i]); + LOG_HEXDUMP_DBG(ptr[i], MIN(8, *size), "Output data (first 8 bytes):"); + } - IC_Sharemem_detach(var->u.pointer.pAddr, var->u.pointer.size); - IC_Allocator_free(g_pFreeer, var->u.pointer.pAddr); + IC_Sharemem_detach(var->u.pointer.pAddr, var->u.pointer.size); + IC_Allocator_free(g_pFreeer, var->u.pointer.pAddr); - LsfVariant_unref(var); + LsfVariant_unref(var); - return 0; + return 0; } int lsf_thinker_get_output_count(void) { - LsfVariant *var; - uint32_t count; - int ret; + LsfVariant *var; + uint32_t count; + int ret; - ret = lsf_get(THINKER_SERVICE_ID, THINKERSERVICE_PROPERTY_OUTPUT_COUNT, &var); - if (ret < 0) { - LOG_ERR("Failed to get output count: %d", ret); - return -EIO; - } + ret = lsf_get(THINKER_SERVICE_ID, THINKERSERVICE_PROPERTY_OUTPUT_COUNT, + &var); + if (ret < 0) { + LOG_ERR("Failed to get output count: %d", ret); + return -EIO; + } - count = var->u.uiVal; - LsfVariant_unref(var); + count = var->u.uiVal; + LsfVariant_unref(var); - LOG_DBG("Got output count: %d", count); + LOG_DBG("Got output count: %d", count); - return count; + return count; } static int lsf_thinker_init(void) { - LOG_DBG("Initialize ThinkerService"); + LOG_DBG("Initialize ThinkerService"); - lsf_import_properties(THINKER_SERVICE_ID, thinkerservice_property_defs, - ARRAY_SIZE(thinkerservice_property_defs)); + lsf_import_properties(THINKER_SERVICE_ID, thinkerservice_property_defs, + ARRAY_SIZE(thinkerservice_property_defs)); - return 0; + return 0; } LSF_SERVICE_DEFINE(lsf_thinker, lsf_thinker_init); diff --git a/platform/targets/c62/services/service_vad.c b/platform/targets/c62/services/service_vad.c index 6999b3daa3..25c868fed4 100644 --- a/platform/targets/c62/services/service_vad.c +++ b/platform/targets/c62/services/service_vad.c @@ -17,85 +17,85 @@ LOG_MODULE_REGISTER(lsf_vad, CONFIG_LSF_LOG_LEVEL); #define VAD_SERVICE_ID DT_INST_REG_ADDR(0) enum { - VADSERVICE_PROPERTY_CONFIG, - VADSERVICE_PROPERTY_ENABLE, + VADSERVICE_PROPERTY_CONFIG, + VADSERVICE_PROPERTY_ENABLE, }; static LsfPropertyConfig vadservice_property_defs[] = { - { - .property_id = VADSERVICE_PROPERTY_CONFIG, - .flag = LSF_PROPERTY_FLAG_SYNC | LSF_PROPERTY_FLAG_SET_ONLY, - .type = LSF_PROPERTY_TYPE_BUF, - }, - { - .property_id = VADSERVICE_PROPERTY_ENABLE, - .flag = LSF_PROPERTY_FLAG_SYNC | LSF_PROPERTY_FLAG_SET_ONLY, - .type = LSF_PROPERTY_TYPE_UINT32, - }, + { + .property_id = VADSERVICE_PROPERTY_CONFIG, + .flag = LSF_PROPERTY_FLAG_SYNC | LSF_PROPERTY_FLAG_SET_ONLY, + .type = LSF_PROPERTY_TYPE_BUF, + }, + { + .property_id = VADSERVICE_PROPERTY_ENABLE, + .flag = LSF_PROPERTY_FLAG_SYNC | LSF_PROPERTY_FLAG_SET_ONLY, + .type = LSF_PROPERTY_TYPE_UINT32, + }, }; struct lsf_vad_config { - uint8_t channel; - uint16_t amp_l; - uint16_t amp_h; - uint8_t minlen_trans_neg; - uint8_t minlen; + uint8_t channel; + uint16_t amp_l; + uint16_t amp_h; + uint8_t minlen_trans_neg; + uint8_t minlen; }; int lsf_vad_enable(void) { - LsfVariant var; - int ret; + LsfVariant var; + int ret; - LOG_DBG("Enable VAD"); + LOG_DBG("Enable VAD"); - LsfVariant_init(&var); - var.variant_type = type_uint; - var.u.uiVal = 1; + LsfVariant_init(&var); + var.variant_type = type_uint; + var.u.uiVal = 1; - ret = lsf_set(VAD_SERVICE_ID, VADSERVICE_PROPERTY_ENABLE, &var); - if (ret != 0) { - LOG_ERR("Failed to enable VAD: %d", ret); - return -EIO; - } + ret = lsf_set(VAD_SERVICE_ID, VADSERVICE_PROPERTY_ENABLE, &var); + if (ret != 0) { + LOG_ERR("Failed to enable VAD: %d", ret); + return -EIO; + } - LsfVariant_clear(&var); + LsfVariant_clear(&var); - return 0; + return 0; } static int lsf_vad_init(void) { - LsfVariant var; - int ret; + LsfVariant var; + int ret; - LOG_DBG("Initialize VadService"); + LOG_DBG("Initialize VadService"); - lsf_import_properties(VAD_SERVICE_ID, vadservice_property_defs, - ARRAY_SIZE(vadservice_property_defs)); + lsf_import_properties(VAD_SERVICE_ID, vadservice_property_defs, + ARRAY_SIZE(vadservice_property_defs)); - struct lsf_vad_config cfg = { - .channel = DT_INST_PROP(0, channel), - .amp_l = DT_INST_PROP(0, amp_l), - .amp_h = DT_INST_PROP(0, amp_h), - .minlen_trans_neg = DT_INST_PROP(0, minlen_trans_neg), - .minlen = DT_INST_PROP(0, minlen), - }; + struct lsf_vad_config cfg = { + .channel = DT_INST_PROP(0, channel), + .amp_l = DT_INST_PROP(0, amp_l), + .amp_h = DT_INST_PROP(0, amp_h), + .minlen_trans_neg = DT_INST_PROP(0, minlen_trans_neg), + .minlen = DT_INST_PROP(0, minlen), + }; - LsfVariant_init(&var); - var.variant_type = type_membuf; - var.u.memBuf.pData = &cfg; - var.u.memBuf.size = sizeof(cfg); + LsfVariant_init(&var); + var.variant_type = type_membuf; + var.u.memBuf.pData = &cfg; + var.u.memBuf.size = sizeof(cfg); - ret = lsf_set(VAD_SERVICE_ID, VADSERVICE_PROPERTY_CONFIG, &var); - if (ret != 0) { - LOG_ERR("Failed to set config: %d", ret); - return -EIO; - } + ret = lsf_set(VAD_SERVICE_ID, VADSERVICE_PROPERTY_CONFIG, &var); + if (ret != 0) { + LOG_ERR("Failed to set config: %d", ret); + return -EIO; + } - LsfVariant_clear(&var); + LsfVariant_clear(&var); - return 0; + return 0; } LSF_SERVICE_DEFINE(lsf_vad, lsf_vad_init); diff --git a/platform/targets/c62/services/service_wasm.c b/platform/targets/c62/services/service_wasm.c index 9a8f88ffee..1e65863e37 100644 --- a/platform/targets/c62/services/service_wasm.c +++ b/platform/targets/c62/services/service_wasm.c @@ -24,74 +24,75 @@ LOG_MODULE_REGISTER(lsf_wasm, CONFIG_LSF_LOG_LEVEL); #endif /* CONFIG_LSF_WASM_SERVICE_LOAD_APP_ON_BOOT */ enum { - WASMSERVICE_PROPERTY_APP, + WASMSERVICE_PROPERTY_APP, }; static LsfPropertyConfig wasmservice_property_defs[] = { - { - .property_id = WASMSERVICE_PROPERTY_APP, - .flag = LSF_PROPERTY_FLAG_SYNC | LSF_PROPERTY_FLAG_SET_ONLY, - .type = LSF_PROPERTY_TYPE_PTR, - }, + { + .property_id = WASMSERVICE_PROPERTY_APP, + .flag = LSF_PROPERTY_FLAG_SYNC | LSF_PROPERTY_FLAG_SET_ONLY, + .type = LSF_PROPERTY_TYPE_PTR, + }, }; int lsf_wasm_load_app(const void *ptr, uint32_t size) { - LsfVariant var; - int ret; - - uint8_t *app = (uint8_t *)ptr; - LOG_DBG("Load app from %p", app); - - /* Check for app header */ - const char *hdr = "LSHD"; - if (*((uint32_t *)app) != *((uint32_t *)hdr)) { - LOG_ERR("Invalid app header"); - return -EINVAL; - } - - /* Check for app size */ - uint32_t app_size = *((uint32_t *)(app + 4)); - if (app_size > size) { - LOG_ERR("Invalid app size (expected: %u, actual: %u)", app_size, size); - return -EINVAL; - } - - uint8_t *app_addr = app + 8; - LOG_DBG("App addr: %p, size: %u", app_addr, app_size); - - LsfVariant_init(&var); - var.variant_type = type_pointer; - var.u.pointer.pAddr = app_addr; - var.u.pointer.size = app_size; - - ret = lsf_set(WASM_SERVICE_ID, WASMSERVICE_PROPERTY_APP, &var); - if (ret != 0) { - LOG_ERR("Failed to load app: %d", ret); - return -EIO; - } - - LsfVariant_clear(&var); - - return 0; + LsfVariant var; + int ret; + + uint8_t *app = (uint8_t *)ptr; + LOG_DBG("Load app from %p", app); + + /* Check for app header */ + const char *hdr = "LSHD"; + if (*((uint32_t *)app) != *((uint32_t *)hdr)) { + LOG_ERR("Invalid app header"); + return -EINVAL; + } + + /* Check for app size */ + uint32_t app_size = *((uint32_t *)(app + 4)); + if (app_size > size) { + LOG_ERR("Invalid app size (expected: %u, actual: %u)", app_size, size); + return -EINVAL; + } + + uint8_t *app_addr = app + 8; + LOG_DBG("App addr: %p, size: %u", app_addr, app_size); + + LsfVariant_init(&var); + var.variant_type = type_pointer; + var.u.pointer.pAddr = app_addr; + var.u.pointer.size = app_size; + + ret = lsf_set(WASM_SERVICE_ID, WASMSERVICE_PROPERTY_APP, &var); + if (ret != 0) { + LOG_ERR("Failed to load app: %d", ret); + return -EIO; + } + + LsfVariant_clear(&var); + + return 0; } static int lsf_wasm_init(void) { - LOG_DBG("Initialize WasmService"); + LOG_DBG("Initialize WasmService"); - lsf_import_properties(WASM_SERVICE_ID, wasmservice_property_defs, - ARRAY_SIZE(wasmservice_property_defs)); + lsf_import_properties(WASM_SERVICE_ID, wasmservice_property_defs, + ARRAY_SIZE(wasmservice_property_defs)); #if defined(CONFIG_LSF_WASM_SERVICE_LOAD_APP_ON_BOOT) - LOG_DBG("Auto loading WASM app from %s (offset: 0x%08x, size: %u)", DT_LABEL(WASM_APP_NODE), - DT_REG_ADDR(WASM_APP_NODE), DT_REG_SIZE(WASM_APP_NODE)); + LOG_DBG("Auto loading WASM app from %s (offset: 0x%08x, size: %u)", + DT_LABEL(WASM_APP_NODE), DT_REG_ADDR(WASM_APP_NODE), + DT_REG_SIZE(WASM_APP_NODE)); - lsf_wasm_load_app((void *)(Z_FLASH_BASE + DT_REG_ADDR(WASM_APP_NODE)), - DT_REG_SIZE(WASM_APP_NODE)); + lsf_wasm_load_app((void *)(Z_FLASH_BASE + DT_REG_ADDR(WASM_APP_NODE)), + DT_REG_SIZE(WASM_APP_NODE)); #endif /* CONFIG_LSF_WASM_SERVICE_LOAD_APP_ON_BOOT */ - return 0; + return 0; } LSF_SERVICE_DEFINE(lsf_wasm, lsf_wasm_init); diff --git a/scripts/clang_format.sh b/scripts/clang_format.sh index c71fa8659d..24de2df596 100755 --- a/scripts/clang_format.sh +++ b/scripts/clang_format.sh @@ -87,6 +87,26 @@ platform/targets/ttwrplus/pmu.h tests/platform/mic_test.c tests/platform/codec2_encode_test.c tests/unit/M17_callsign.cpp +platform/drivers-zephyr/baseband/bk1080/bk1080.h +platform/drivers-zephyr/baseband/bk1080/bk1080.c +platform/drivers-zephyr/baseband/bk4819/bk4819.h +platform/drivers-zephyr/baseband/bk4819/bk4819.c +platform/targets/c62/audio_c62.c +platform/targets/c62/controller.h +platform/targets/c62/dsp.c +platform/targets/c62/dt-bindings/services/vad.h +platform/targets/c62/hwconfig.h +platform/targets/c62/lsf.c +platform/targets/c62/platform.c +platform/targets/c62/service.h +platform/targets/c62/services/service.h +platform/targets/c62/services/service_audio.c +platform/targets/c62/services/service_thinker.c +platform/targets/c62/services/service_vad.c +platform/targets/c62/services/service_wasm.c +platform/targets/c62/services/thinker.h +platform/targets/c62/services/vad.h +platform/targets/c62/services/wasm.h EOF ) From 98643c3a4c4857a9cfe692bcaaf34143c4d2efa9 Mon Sep 17 00:00:00 2001 From: OE3ANC Date: Tue, 30 Jun 2026 13:27:16 +0200 Subject: [PATCH 2/3] Fixed path in dockerfile --- .devcontainer/Dockerfile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.devcontainer/Dockerfile b/.devcontainer/Dockerfile index 5205850c59..63b1e0728d 100644 --- a/.devcontainer/Dockerfile +++ b/.devcontainer/Dockerfile @@ -36,7 +36,7 @@ RUN apt-get update -y && apt-get install -y --no-install-recommends \ # compile miosix compiler RUN git clone --depth 1 https://github.com/fedetft/miosix-kernel.git \ - && cd miosix-kernel/miosix/_tools/compiler/gcc-9.2.0-mp3.2 \ + && cd miosix-kernel/miosix/tools/compiler/gcc-9.2.0-mp3.2 \ && sh download.sh \ && bash install-script.sh -j`nproc` From 05d19917164881fec2539a1a409f5e88c4ac97f9 Mon Sep 17 00:00:00 2001 From: OE3ANC Date: Tue, 30 Jun 2026 13:48:21 +0200 Subject: [PATCH 3/3] Fixed the path in dockerfile --- .devcontainer/Dockerfile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.devcontainer/Dockerfile b/.devcontainer/Dockerfile index 63b1e0728d..0c484e92aa 100644 --- a/.devcontainer/Dockerfile +++ b/.devcontainer/Dockerfile @@ -36,7 +36,7 @@ RUN apt-get update -y && apt-get install -y --no-install-recommends \ # compile miosix compiler RUN git clone --depth 1 https://github.com/fedetft/miosix-kernel.git \ - && cd miosix-kernel/miosix/tools/compiler/gcc-9.2.0-mp3.2 \ + && cd miosix-kernel/tools/compiler/gcc-9.2.0-mp3.2 \ && sh download.sh \ && bash install-script.sh -j`nproc`