From c1bb283fd9a4979021cae4226650e04328ec1eaf Mon Sep 17 00:00:00 2001 From: Andreas Regel Date: Thu, 2 Apr 2020 12:54:23 +0200 Subject: [PATCH 1/6] Fix compile issues with cadence xcelium. --- vunit/vhdl/logging/src/log_deprecated_pkg.vhd | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/vunit/vhdl/logging/src/log_deprecated_pkg.vhd b/vunit/vhdl/logging/src/log_deprecated_pkg.vhd index 689bc5b59..a7b3eb337 100644 --- a/vunit/vhdl/logging/src/log_deprecated_pkg.vhd +++ b/vunit/vhdl/logging/src/log_deprecated_pkg.vhd @@ -101,7 +101,7 @@ package body log_deprecated_pkg is end if; end function; - impure function get_logger_display_handler return log_handler_t is + impure function get_logger_display_handler(logger : logger_t) return log_handler_t is begin for idx in 0 to num_log_handlers(logger) - 1 loop if get_file_name(get_log_handler(logger, idx)) = stdout_file_name then @@ -112,7 +112,7 @@ package body log_deprecated_pkg is return null_log_handler; end function; - impure function get_logger_file_handler return log_handler_t is + impure function get_logger_file_handler(logger : logger_t) return log_handler_t is begin for idx in 0 to num_log_handlers(logger) - 1 loop if get_file_name(get_log_handler(logger, idx)) /= stdout_file_name then @@ -123,14 +123,14 @@ package body log_deprecated_pkg is return null_log_handler; end function; begin - logger_display_handler := get_logger_display_handler; + logger_display_handler := get_logger_display_handler(logger); if new_logger or (logger_display_handler = null_log_handler) then logger_display_handler := new_log_handler(stdout_file_name, real_format(display_format), true); else init_log_handler(logger_display_handler, real_format(display_format), stdout_file_name, true); end if; - logger_file_handler := get_logger_file_handler; + logger_file_handler := get_logger_file_handler(logger); if new_logger or (logger_file_handler = null_log_handler) then logger_file_handler := new_log_handler(file_name, real_format(file_format), false); else From 39171d89aef8ecf3c934c4dab57e00d7b615bac8 Mon Sep 17 00:00:00 2001 From: Andreas Regel Date: Wed, 22 Apr 2020 19:08:37 +0200 Subject: [PATCH 2/6] Add support for Cadence Xcelium --- vunit/sim_if/incisive.py | 43 ++++++++++++++++++++++++---------------- 1 file changed, 26 insertions(+), 17 deletions(-) diff --git a/vunit/sim_if/incisive.py b/vunit/sim_if/incisive.py index 5dc683b00..c7d3e60af 100644 --- a/vunit/sim_if/incisive.py +++ b/vunit/sim_if/incisive.py @@ -5,7 +5,7 @@ # Copyright (c) 2014-2020, Lars Asplund lars.anders.asplund@gmail.com """ -Interface for the Cadence Incisive simulator +Interface for the Cadence Incisive/Xcelium simulator """ from pathlib import Path @@ -26,10 +26,12 @@ class IncisiveInterface( # pylint: disable=too-many-instance-attributes SimulatorInterface ): """ - Interface for the Cadence Incisive simulator + Interface for the Cadence Incisive/Xcelium simulator """ name = "incisive" + executable_name = "xrun" + option_prefix = "xm" supports_gui_flag = True package_users_depend_on_bodies = False @@ -76,15 +78,23 @@ def from_args(cls, args, output_path, **kwargs): @classmethod def find_prefix_from_path(cls): """ - Find incisive simulator from PATH environment variable + Find incisive/xcelium simulator from PATH environment variable """ - return cls.find_toolchain(["irun"]) + prefix = cls.find_toolchain([cls.executable_name]) + if prefix is None: + cls.executable_name = "irun" + cls.option_prefix = "nc" + prefix = cls.find_toolchain([cls.executable_name]) + print(prefix) + return prefix @staticmethod def supports_vhdl_contexts(): """ Returns True when this simulator supports VHDL 2008 contexts """ + if IncisiveInterface.executable_name == "xrun": + return True return False def __init__( # pylint: disable=too-many-arguments @@ -107,7 +117,7 @@ def find_cds_root_irun(self): Finds irun cds root """ return subprocess.check_output( - [str(Path(self._prefix) / "cds_root"), "irun"] + [str(Path(self._prefix) / "cds_root"), self.executable_name] ).splitlines()[0] def find_cds_root_virtuoso(self): @@ -173,8 +183,7 @@ def compile_source_file_command(self, source_file): raise CompileError - @staticmethod - def _vhdl_std_opt(vhdl_standard): + def _vhdl_std_opt(self, vhdl_standard): """ Convert standard to format of irun command line flag """ @@ -182,7 +191,7 @@ def _vhdl_std_opt(vhdl_standard): return "-v200x -extv200x" if vhdl_standard == VHDL.STD_2008: - return "-v200x -extv200x" + return "-v200x -extv200x" + " -inc_v200x_pkg" if self.executable_name == "xrun" else "" if vhdl_standard == VHDL.STD_1993: return "-v93" @@ -193,7 +202,7 @@ def compile_vhdl_file_command(self, source_file): """ Returns command to compile a VHDL file """ - cmd = str(Path(self._prefix) / "irun") + cmd = str(Path(self._prefix) / self.executable_name) args = [] args += ["-compile"] args += ["-nocopyright"] @@ -217,7 +226,7 @@ def compile_vhdl_file_command(self, source_file): args += ["-messages"] args += ["-libverbose"] args += source_file.compile_options.get("incisive.irun_vhdl_flags", []) - args += ['-nclibdirname "%s"' % str(Path(source_file.library.directory).parent)] + args += ['-%slibdirname "%s"' % (self.option_prefix, str(Path(source_file.library.directory).parent))] args += ["-makelib %s" % source_file.library.directory] args += ['"%s"' % source_file.name] args += ["-endlib"] @@ -232,7 +241,7 @@ def compile_verilog_file_command(self, source_file): """ Returns commands to compile a Verilog file """ - cmd = str(Path(self._prefix) / "irun") + cmd = str(Path(self._prefix) / self.executable_name) args = [] args += ["-compile"] args += ["-nocopyright"] @@ -267,7 +276,7 @@ def compile_verilog_file_command(self, source_file): for key, value in source_file.defines.items(): args += ["-define %s=%s" % (key, value.replace('"', '\\"'))] - args += ['-nclibdirname "%s"' % str(Path(source_file.library.directory).parent)] + args += ['-%slibdirname "%s"' % (self.option_prefix, str(Path(source_file.library.directory).parent))] args += ["-makelib %s" % source_file.library.name] args += ['"%s"' % source_file.name] args += ["-endlib"] @@ -322,7 +331,7 @@ def simulate( # pylint: disable=too-many-locals steps = ["elaborate", "simulate"] for step in steps: - cmd = str(Path(self._prefix) / "irun") + cmd = str(Path(self._prefix) / self.executable_name) args = [] if step == "elaborate": args += ["-elaborate"] @@ -338,17 +347,17 @@ def simulate( # pylint: disable=too-many-locals args += ["-nowarn DLCPTH"] # "cds.lib Invalid path" args += ["-nowarn DLCVAR"] # "cds.lib Invalid environment variable ''." args += [ - "-ncerror EVBBOL" + "-%serror EVBBOL" % self.option_prefix ] # promote to error: "bad boolean literal in generic association" args += [ - "-ncerror EVBSTR" + "-%serror EVBSTR" % self.option_prefix ] # promote to error: "bad string literal in generic association" args += [ - "-ncerror EVBNAT" + "-%serror EVBNAT" % self.option_prefix ] # promote to error: "bad natural literal in generic association" args += ["-work work"] args += [ - '-nclibdirname "%s"' % (str(Path(self._output_path) / "libraries")) + '-%slibdirname "%s"' % (self.option_prefix, str(Path(self._output_path) / "libraries")) ] # @TODO: ugly args += config.sim_options.get("incisive.irun_sim_flags", []) args += ['-cdslib "%s"' % self._cdslib] From 85bff8877eddd7c41b61a57817b24ae80fe40fa2 Mon Sep 17 00:00:00 2001 From: Andreas Regel Date: Wed, 22 Apr 2020 19:27:41 +0200 Subject: [PATCH 3/6] Support option disable_ieee_warnings --- vunit/sim_if/incisive.py | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/vunit/sim_if/incisive.py b/vunit/sim_if/incisive.py index c7d3e60af..1b5595b1c 100644 --- a/vunit/sim_if/incisive.py +++ b/vunit/sim_if/incisive.py @@ -85,7 +85,6 @@ def find_prefix_from_path(cls): cls.executable_name = "irun" cls.option_prefix = "nc" prefix = cls.find_toolchain([cls.executable_name]) - print(prefix) return prefix @staticmethod @@ -371,6 +370,9 @@ def simulate( # pylint: disable=too-many-locals args += self._generic_args(config.entity_name, config.generics) for library in self._libraries: args += ['-reflib "%s"' % library.directory] + args += ['-input "@set intovf_severity_level ignore"'] + if config.sim_options.get("disable_ieee_warnings", False): + args += ['-input "@set pack_assert_off { std_logic_arith numeric_std }"'] if launch_gui: args += ["-access +rwc"] # args += ['-linedebug'] From d9ae9346c8ff0edfe07427df9ea64140de9d27fc Mon Sep 17 00:00:00 2001 From: Andreas Regel Date: Tue, 29 Sep 2020 09:21:58 +0200 Subject: [PATCH 4/6] Support option "vhdl_assert_stop_level" --- vunit/sim_if/incisive.py | 1 + 1 file changed, 1 insertion(+) diff --git a/vunit/sim_if/incisive.py b/vunit/sim_if/incisive.py index 1b5595b1c..44394fc9d 100644 --- a/vunit/sim_if/incisive.py +++ b/vunit/sim_if/incisive.py @@ -373,6 +373,7 @@ def simulate( # pylint: disable=too-many-locals args += ['-input "@set intovf_severity_level ignore"'] if config.sim_options.get("disable_ieee_warnings", False): args += ['-input "@set pack_assert_off { std_logic_arith numeric_std }"'] + args += ['-input "@set assert_stop_level %s"' % config.vhdl_assert_stop_level] if launch_gui: args += ["-access +rwc"] # args += ['-linedebug'] From 63cb25ad26674587d327a901f03a495b2e528ee7 Mon Sep 17 00:00:00 2001 From: Andreas Regel Date: Tue, 29 Sep 2020 09:22:56 +0200 Subject: [PATCH 5/6] Fix problems running the test suite --- tests/acceptance/test_artificial.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/acceptance/test_artificial.py b/tests/acceptance/test_artificial.py index b6917f1f8..58125d66f 100644 --- a/tests/acceptance/test_artificial.py +++ b/tests/acceptance/test_artificial.py @@ -27,7 +27,7 @@ class TestVunitArtificial(unittest.TestCase): """ def setUp(self): - if simulator_is("activehdl"): + if simulator_is("activehdl", "incisive"): self.output_path = str(ROOT / "artificial_out") else: # Spaces in path intentional to verify that it is supported From 1030269b13150c5ba459d54c96976edede50818f Mon Sep 17 00:00:00 2001 From: Andreas Regel Date: Tue, 29 Sep 2020 10:01:23 +0200 Subject: [PATCH 6/6] Reformatted code --- vunit/sim_if/incisive.py | 27 +++++++++++++++++++++------ 1 file changed, 21 insertions(+), 6 deletions(-) diff --git a/vunit/sim_if/incisive.py b/vunit/sim_if/incisive.py index 44394fc9d..c6762c69c 100644 --- a/vunit/sim_if/incisive.py +++ b/vunit/sim_if/incisive.py @@ -190,7 +190,11 @@ def _vhdl_std_opt(self, vhdl_standard): return "-v200x -extv200x" if vhdl_standard == VHDL.STD_2008: - return "-v200x -extv200x" + " -inc_v200x_pkg" if self.executable_name == "xrun" else "" + return ( + "-v200x -extv200x" + " -inc_v200x_pkg" + if self.executable_name == "xrun" + else "" + ) if vhdl_standard == VHDL.STD_1993: return "-v93" @@ -225,7 +229,10 @@ def compile_vhdl_file_command(self, source_file): args += ["-messages"] args += ["-libverbose"] args += source_file.compile_options.get("incisive.irun_vhdl_flags", []) - args += ['-%slibdirname "%s"' % (self.option_prefix, str(Path(source_file.library.directory).parent))] + args += [ + '-%slibdirname "%s"' + % (self.option_prefix, str(Path(source_file.library.directory).parent)) + ] args += ["-makelib %s" % source_file.library.directory] args += ['"%s"' % source_file.name] args += ["-endlib"] @@ -275,7 +282,10 @@ def compile_verilog_file_command(self, source_file): for key, value in source_file.defines.items(): args += ["-define %s=%s" % (key, value.replace('"', '\\"'))] - args += ['-%slibdirname "%s"' % (self.option_prefix, str(Path(source_file.library.directory).parent))] + args += [ + '-%slibdirname "%s"' + % (self.option_prefix, str(Path(source_file.library.directory).parent)) + ] args += ["-makelib %s" % source_file.library.name] args += ['"%s"' % source_file.name] args += ["-endlib"] @@ -356,7 +366,8 @@ def simulate( # pylint: disable=too-many-locals ] # promote to error: "bad natural literal in generic association" args += ["-work work"] args += [ - '-%slibdirname "%s"' % (self.option_prefix, str(Path(self._output_path) / "libraries")) + '-%slibdirname "%s"' + % (self.option_prefix, str(Path(self._output_path) / "libraries")) ] # @TODO: ugly args += config.sim_options.get("incisive.irun_sim_flags", []) args += ['-cdslib "%s"' % self._cdslib] @@ -372,8 +383,12 @@ def simulate( # pylint: disable=too-many-locals args += ['-reflib "%s"' % library.directory] args += ['-input "@set intovf_severity_level ignore"'] if config.sim_options.get("disable_ieee_warnings", False): - args += ['-input "@set pack_assert_off { std_logic_arith numeric_std }"'] - args += ['-input "@set assert_stop_level %s"' % config.vhdl_assert_stop_level] + args += [ + '-input "@set pack_assert_off { std_logic_arith numeric_std }"' + ] + args += [ + '-input "@set assert_stop_level %s"' % config.vhdl_assert_stop_level + ] if launch_gui: args += ["-access +rwc"] # args += ['-linedebug']