diff --git a/mlir/include/mlir/Dialect/DXSA/IR/DXSAOps.td b/mlir/include/mlir/Dialect/DXSA/IR/DXSAOps.td
index 33055b8991dc..a1685f271700 100644
--- a/mlir/include/mlir/Dialect/DXSA/IR/DXSAOps.td
+++ b/mlir/include/mlir/Dialect/DXSA/IR/DXSAOps.td
@@ -396,7 +396,7 @@ def DXSA_IndexRelImm : DXSA_Op<"index.rel.imm"> {
     TODO
   }];
 
-  let arguments = (ins DXSA_OperandType:$operand, StrAttr:$op, I64Attr:$imm);
+  let arguments = (ins DXSA_OperandType:$operand, StrAttr:$op, I32Attr:$imm);
   let results = (outs DXSA_IndexType:$index);
   let assemblyFormat = "$operand attr-dict";
 }
diff --git a/mlir/test/Target/DXSA/inputs/mov_index_rel_imm.bin b/mlir/test/Target/DXSA/inputs/mov_index_rel_imm.bin
new file mode 100644
index 000000000000..4ae0ee3cdbb2
Binary files /dev/null and b/mlir/test/Target/DXSA/inputs/mov_index_rel_imm.bin differ
diff --git a/mlir/test/Target/DXSA/mov_index_rel_imm.mlir b/mlir/test/Target/DXSA/mov_index_rel_imm.mlir
new file mode 100644
index 000000000000..108bd8decdbf
--- /dev/null
+++ b/mlir/test/Target/DXSA/mov_index_rel_imm.mlir
@@ -0,0 +1,13 @@
+// RUN: mlir-translate --import-dxsa-bin %S/inputs/mov_index_rel_imm.bin | FileCheck %s
+// mov o0.xyzw, v[r0.x + 66][0].xyzw
+
+// CHECK: module {
+// CHECK-NEXT:   %0 = dxsa.index.imm {imm = 0 : i32}
+// CHECK-NEXT:   %1 = dxsa.operand %0 {mask = 240 : i32, num_components = 4 : i32, type = 2 : i32}
+// CHECK-NEXT:   %2 = dxsa.index.imm {imm = 0 : i32}
+// CHECK-NEXT:   %3 = dxsa.operand %2 {num_components = 4 : i32, one = 0 : i32, type = 0 : i32}
+// CHECK-NEXT:   %4 = dxsa.index.rel.imm %3 {imm = 66 : i32, op = "add"}
+// CHECK-NEXT:   %5 = dxsa.index.imm {imm = 0 : i32}
+// CHECK-NEXT:   %6 = dxsa.operand %4, %5 {num_components = 4 : i32, swizzle = dense<[0, 1, 2, 3]> : vector<4xi32>, type = 1 : i32}
+// CHECK-NEXT:   dxsa.instruction "mov" %1, %6
+// CHECK-NEXT: }