From 4553312f63a3b2f9241c45c044ae5363fdfe0e83 Mon Sep 17 00:00:00 2001 From: Benjamin Landers Date: Sat, 25 Jul 2020 15:43:50 -0700 Subject: [PATCH 1/2] Convert system calls to use a7 instead of a0 One minor problem with this change is that user inputs can now get clobbered by return values. However, this is the standard ecall convention. This only changes the java code involved and does not modify any assembly tests (so they now fail). --- src/main/java/jupiter/riscv/Syscall.java | 58 ++++++++++++------------ 1 file changed, 29 insertions(+), 29 deletions(-) diff --git a/src/main/java/jupiter/riscv/Syscall.java b/src/main/java/jupiter/riscv/Syscall.java index 8f3c3583..1e10eb83 100644 --- a/src/main/java/jupiter/riscv/Syscall.java +++ b/src/main/java/jupiter/riscv/Syscall.java @@ -93,7 +93,7 @@ public final class Syscall { */ public static void handler(State state) throws SimulationException { // match ecall code - switch (state.xregfile().getRegister("a0")) { + switch (state.xregfile().getRegister("a7")) { case PRINT_INT: printInt(state); break; @@ -173,7 +173,7 @@ public static void handler(State state) throws SimulationException { randFloat(state); break; default: - throw new SimulationException("invalid ecall code: " + state.xregfile().getRegister("a0")); + throw new SimulationException("invalid ecall code: " + state.xregfile().getRegister("a7")); } } @@ -184,7 +184,7 @@ public static void handler(State state) throws SimulationException { */ private static void printInt(State state) { Globals.PRINT = true; - int num = state.xregfile().getRegister("a1"); + int num = state.xregfile().getRegister("a0"); IO.stdout().print(Integer.toString(num)); } @@ -206,7 +206,7 @@ private static void printFloat(State state) { */ private static void printString(State state) throws SimulationException { Globals.PRINT = true; - int buffer = state.xregfile().getRegister("a1"); + int buffer = state.xregfile().getRegister("a0"); // 65684 StringBuilder s = new StringBuilder(0); char c; @@ -249,8 +249,8 @@ private static void readFloat(State state) throws SimulationException { * @param state program state */ private static void readString(State state) throws SimulationException { - int buffer = state.xregfile().getRegister("a1"); - int length = Math.max(state.xregfile().getRegister("a2") - 1, 0); + int buffer = state.xregfile().getRegister("a0"); + int length = Math.max(state.xregfile().getRegister("a1") - 1, 0); String s = IO.readString(length); int minLength = Math.min(length, s.length()); for (int i = 0; i < minLength; i++) { @@ -266,7 +266,7 @@ private static void readString(State state) throws SimulationException { * @param state program state */ private static void sbrk(State state) throws SimulationException { - int numBytes = state.xregfile().getRegister("a1"); + int numBytes = state.xregfile().getRegister("a0"); if (numBytes >= 0) { int address = state.memory().allocateBytesFromHeap(numBytes); state.xregfile().setRegister("a0", address); @@ -287,7 +287,7 @@ private static void exit() throws SimulationException { */ private static void printChar(State state) { Globals.PRINT = true; - IO.stdout().print((char) state.xregfile().getRegister("a1") + ""); + IO.stdout().print((char) state.xregfile().getRegister("a0") + ""); } /** @@ -305,8 +305,8 @@ private static void readChar(State state) { * @param state program state */ private static void open(State state) throws SimulationException{ - int buffer = state.xregfile().getRegister("a1"); - int oflags = state.xregfile().getRegister("a2"); + int buffer = state.xregfile().getRegister("a0"); + int oflags = state.xregfile().getRegister("a1"); state.xregfile().setRegister("a0", VirtualFS.open(buffer, oflags, state)); } @@ -316,9 +316,9 @@ private static void open(State state) throws SimulationException{ * @param state program state */ private static void read(State state) throws SimulationException { - int fd = state.xregfile().getRegister("a1"); - int buffer = state.xregfile().getRegister("a2"); - int nbytes = state.xregfile().getRegister("a3"); + int fd = state.xregfile().getRegister("a0"); + int buffer = state.xregfile().getRegister("a1"); + int nbytes = state.xregfile().getRegister("a2"); if (nbytes > 0) { state.xregfile().setRegister("a0", VirtualFS.read(fd, buffer, nbytes, state)); } else { @@ -332,9 +332,9 @@ private static void read(State state) throws SimulationException { * @param state program state */ private static void write(State state) throws SimulationException { - int fd = state.xregfile().getRegister("a1"); - int buffer = state.xregfile().getRegister("a2"); - int nbytes = state.xregfile().getRegister("a3"); + int fd = state.xregfile().getRegister("a0"); + int buffer = state.xregfile().getRegister("a1"); + int nbytes = state.xregfile().getRegister("a2"); if (nbytes > 0) { state.xregfile().setRegister("a0", VirtualFS.write(fd, buffer, nbytes, state)); } else { @@ -348,9 +348,9 @@ private static void write(State state) throws SimulationException { * @param state program state */ private static void lseek(State state) throws SimulationException { - int fd = state.xregfile().getRegister("a1"); - int offset = state.xregfile().getRegister("a2"); - int whence = state.xregfile().getRegister("a3"); + int fd = state.xregfile().getRegister("a0"); + int offset = state.xregfile().getRegister("a1"); + int whence = state.xregfile().getRegister("a2"); state.xregfile().setRegister("a0", VirtualFS.lseek(fd, offset, whence)); } @@ -360,7 +360,7 @@ private static void lseek(State state) throws SimulationException { * @param state program state */ private static void close(State state) { - state.xregfile().setRegister("a0", VirtualFS.close(state.xregfile().getRegister("a1"))); + state.xregfile().setRegister("a0", VirtualFS.close(state.xregfile().getRegister("a0"))); } /** @@ -369,7 +369,7 @@ private static void close(State state) { * @param state program state */ private static void exit2(State state) throws SimulationException { - throw new HaltException(state.xregfile().getRegister("a1")); + throw new HaltException(state.xregfile().getRegister("a0")); } /** @@ -378,7 +378,7 @@ private static void exit2(State state) throws SimulationException { * @param state program state */ private static void sleep(State state) throws SimulationException { - int millis = state.xregfile().getRegister("a1"); + int millis = state.xregfile().getRegister("a0"); if (millis >= 0) { try { Thread.sleep(millis); @@ -395,7 +395,7 @@ private static void sleep(State state) throws SimulationException { */ private static void cwd(State state) throws SimulationException { String path = System.getProperty("user.dir"); - int buffer = state.xregfile().getRegister("a1"); + int buffer = state.xregfile().getRegister("a0"); for (int i = 0; i < path.length(); i++) { state.memory().storeByte(buffer++, (int) path.charAt(i)); } @@ -420,7 +420,7 @@ private static void time(State state) { */ private static void printHex(State state) { Globals.PRINT = true; - IO.stdout().print(String.format("0x%08x", state.xregfile().getRegister("a1"))); + IO.stdout().print(String.format("0x%08x", state.xregfile().getRegister("a0"))); } /** @@ -430,7 +430,7 @@ private static void printHex(State state) { */ private static void printBin(State state) { Globals.PRINT = true; - IO.stdout().print(String.format("0b%32s", Integer.toBinaryString(state.xregfile().getRegister("a1"))).replace(' ', '0')); + IO.stdout().print(String.format("0b%32s", Integer.toBinaryString(state.xregfile().getRegister("a0"))).replace(' ', '0')); } /** @@ -440,7 +440,7 @@ private static void printBin(State state) { */ private static void printUsgn(State state) { Globals.PRINT = true; - IO.stdout().print(Long.toString(Integer.toUnsignedLong(state.xregfile().getRegister("a1")))); + IO.stdout().print(Long.toString(Integer.toUnsignedLong(state.xregfile().getRegister("a0")))); } /** @@ -449,7 +449,7 @@ private static void printUsgn(State state) { * @param state program state */ private static void setSeed(State state) { - RNG.setSeed(state.xregfile().getRegister("a1")); + RNG.setSeed(state.xregfile().getRegister("a0")); } /** @@ -467,8 +467,8 @@ private static void randInt(State state) { * @param state program state */ private static void randIntRng(State state) { - int min = state.xregfile().getRegister("a1"); - int max = state.xregfile().getRegister("a2"); + int min = state.xregfile().getRegister("a0"); + int max = state.xregfile().getRegister("a1"); state.xregfile().setRegister("a0", RNG.nextInt((max - min) + 1) + min); } From 67e98f6c3dbc7719e46a75fc16f1cedb08c7d6c7 Mon Sep 17 00:00:00 2001 From: Benjamin Landers Date: Sat, 25 Jul 2020 16:07:12 -0700 Subject: [PATCH 2/2] Update tests and example to work with new syscall system --- examples/fibonacci.s | 28 ++++++++++++++-------------- src/test/others/print.s | 3 +-- src/test/others/test.s | 2 +- src/test/riscv-tests/add.s | 4 ++-- src/test/riscv-tests/addi.s | 4 ++-- src/test/riscv-tests/and.s | 4 ++-- src/test/riscv-tests/andi.s | 4 ++-- src/test/riscv-tests/auipc.s | 4 ++-- src/test/riscv-tests/beq.s | 4 ++-- src/test/riscv-tests/bge.s | 4 ++-- src/test/riscv-tests/bgeu.s | 4 ++-- src/test/riscv-tests/blt.s | 4 ++-- src/test/riscv-tests/bltu.s | 4 ++-- src/test/riscv-tests/bne.s | 4 ++-- src/test/riscv-tests/csr.s | 2 +- src/test/riscv-tests/div.s | 4 ++-- src/test/riscv-tests/divu.s | 4 ++-- src/test/riscv-tests/ecall.s | 6 +++--- src/test/riscv-tests/farith.s | 4 ++-- src/test/riscv-tests/farith2.s | 4 ++-- src/test/riscv-tests/fclass.s | 4 ++-- src/test/riscv-tests/fcmp.s | 4 ++-- src/test/riscv-tests/fcvt.s | 4 ++-- src/test/riscv-tests/fence.s | 2 +- src/test/riscv-tests/ffused.s | 4 ++-- src/test/riscv-tests/fls.s | 4 ++-- src/test/riscv-tests/fminmax.s | 4 ++-- src/test/riscv-tests/fmove.s | 4 ++-- src/test/riscv-tests/frecoding.s | 4 ++-- src/test/riscv-tests/jal.s | 4 ++-- src/test/riscv-tests/jalr.s | 4 ++-- src/test/riscv-tests/lb.s | 4 ++-- src/test/riscv-tests/lbu.s | 4 ++-- src/test/riscv-tests/lh.s | 4 ++-- src/test/riscv-tests/lhu.s | 4 ++-- src/test/riscv-tests/lui.s | 4 ++-- src/test/riscv-tests/lw.s | 4 ++-- src/test/riscv-tests/mul.s | 4 ++-- src/test/riscv-tests/mulh.s | 4 ++-- src/test/riscv-tests/mulhsu.s | 4 ++-- src/test/riscv-tests/mulhu.s | 4 ++-- src/test/riscv-tests/or.s | 4 ++-- src/test/riscv-tests/ori.s | 4 ++-- src/test/riscv-tests/refs.s | 4 ++-- src/test/riscv-tests/relocations.s | 4 ++-- src/test/riscv-tests/rem.s | 4 ++-- src/test/riscv-tests/remu.s | 4 ++-- src/test/riscv-tests/sb.s | 4 ++-- src/test/riscv-tests/sh.s | 4 ++-- src/test/riscv-tests/sll.s | 4 ++-- src/test/riscv-tests/slli.s | 4 ++-- src/test/riscv-tests/slt.s | 4 ++-- src/test/riscv-tests/slti.s | 4 ++-- src/test/riscv-tests/sltiu.s | 4 ++-- src/test/riscv-tests/sltu.s | 4 ++-- src/test/riscv-tests/sra.s | 4 ++-- src/test/riscv-tests/srai.s | 4 ++-- src/test/riscv-tests/srl.s | 4 ++-- src/test/riscv-tests/srli.s | 4 ++-- src/test/riscv-tests/sub.s | 4 ++-- src/test/riscv-tests/sw.s | 4 ++-- src/test/riscv-tests/xor.s | 4 ++-- src/test/riscv-tests/xori.s | 4 ++-- 63 files changed, 135 insertions(+), 136 deletions(-) diff --git a/examples/fibonacci.s b/examples/fibonacci.s index 20dab08f..192122f8 100644 --- a/examples/fibonacci.s +++ b/examples/fibonacci.s @@ -15,24 +15,24 @@ __start: li t0, 0 li t1, 1 # prints msg1 - li a0, 4 - la a1, msg1 + li a7, 4 + la a0, msg1 ecall # reads an int and moves it to register t3 - li a0, 5 + li a7, 5 ecall mv t3, a0 # prints a newline - li a0, 11 - li a1, '\n' + li a7, 11 + li a0, '\n' ecall # prints msg2 - li a0, 4 - la a1, msg2 + li a7, 4 + la a0, msg2 ecall # prints the int value in t3 - li a0, 1 - mv a1, t3 + li a7, 1 + mv a0, t3 ecall # fibonnaci program fib: @@ -44,13 +44,13 @@ fib: j fib finish: # prints msg3 - li a0, 4 - la a1, msg3 + li a7, 4 + la a0, msg3 ecall # prints the result in t0 - li a0, 1 - mv a1, t0 + li a7, 1 + mv a0, t0 ecall # ends the program with status code 0 - li a0, 10 + li a7, 10 ecall diff --git a/src/test/others/print.s b/src/test/others/print.s index 45340d6e..e298c1fb 100644 --- a/src/test/others/print.s +++ b/src/test/others/print.s @@ -1,7 +1,6 @@ .globl print print: - mv a1, a0 - li a0, 1 + li a7, 1 ecall ret diff --git a/src/test/others/test.s b/src/test/others/test.s index 6eedf340..f86a6d24 100644 --- a/src/test/others/test.s +++ b/src/test/others/test.s @@ -3,5 +3,5 @@ __start: li a0, 0xbb call print - li a0, 10 + li a7, 10 ecall diff --git a/src/test/riscv-tests/add.s b/src/test/riscv-tests/add.s index 0d455767..8e9a6cf5 100644 --- a/src/test/riscv-tests/add.s +++ b/src/test/riscv-tests/add.s @@ -409,9 +409,9 @@ test37: bne x0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/addi.s b/src/test/riscv-tests/addi.s index 04ce1951..a3f48577 100644 --- a/src/test/riscv-tests/addi.s +++ b/src/test/riscv-tests/addi.s @@ -215,9 +215,9 @@ test24: bne x0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/and.s b/src/test/riscv-tests/and.s index 323c84f2..81424f37 100644 --- a/src/test/riscv-tests/and.s +++ b/src/test/riscv-tests/and.s @@ -321,9 +321,9 @@ test26: bne x0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/andi.s b/src/test/riscv-tests/andi.s index f2a585f7..5e616357 100644 --- a/src/test/riscv-tests/andi.s +++ b/src/test/riscv-tests/andi.s @@ -138,9 +138,9 @@ test13: bne x0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/auipc.s b/src/test/riscv-tests/auipc.s index ea430d82..d5edc7ae 100644 --- a/src/test/riscv-tests/auipc.s +++ b/src/test/riscv-tests/auipc.s @@ -31,9 +31,9 @@ label3_test01: ret success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/beq.s b/src/test/riscv-tests/beq.s index 6312eca2..96a4afdf 100644 --- a/src/test/riscv-tests/beq.s +++ b/src/test/riscv-tests/beq.s @@ -244,9 +244,9 @@ label1_test19: bne x4, x5, label1_test19 success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/bge.s b/src/test/riscv-tests/bge.s index 949cb14a..e642be5d 100644 --- a/src/test/riscv-tests/bge.s +++ b/src/test/riscv-tests/bge.s @@ -283,9 +283,9 @@ label1_test22: bne x4, x5, label1_test22 success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/bgeu.s b/src/test/riscv-tests/bgeu.s index 697be973..87eb5de0 100644 --- a/src/test/riscv-tests/bgeu.s +++ b/src/test/riscv-tests/bgeu.s @@ -283,9 +283,9 @@ label1_test22: bne x4, x5, label1_test22 success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/blt.s b/src/test/riscv-tests/blt.s index 34f3b989..48c6782c 100644 --- a/src/test/riscv-tests/blt.s +++ b/src/test/riscv-tests/blt.s @@ -244,9 +244,9 @@ label1_test19: bne x4, x5, label1_test19 success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/bltu.s b/src/test/riscv-tests/bltu.s index 573b5126..84f6598a 100644 --- a/src/test/riscv-tests/bltu.s +++ b/src/test/riscv-tests/bltu.s @@ -244,9 +244,9 @@ label1_test19: bne x4, x5, label1_test19 success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/bne.s b/src/test/riscv-tests/bne.s index 16a0941c..8f581820 100644 --- a/src/test/riscv-tests/bne.s +++ b/src/test/riscv-tests/bne.s @@ -245,9 +245,9 @@ label1_test19: bne x4, x5, label1_test19 success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/csr.s b/src/test/riscv-tests/csr.s index e07fac94..aeb5de11 100644 --- a/src/test/riscv-tests/csr.s +++ b/src/test/riscv-tests/csr.s @@ -17,5 +17,5 @@ test: csrrci x1, 0, 0 success: - li a0, 10 + li a7, 10 ecall diff --git a/src/test/riscv-tests/div.s b/src/test/riscv-tests/div.s index 190f9b59..4105bc37 100644 --- a/src/test/riscv-tests/div.s +++ b/src/test/riscv-tests/div.s @@ -81,9 +81,9 @@ test09: bne x30, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/divu.s b/src/test/riscv-tests/divu.s index 8f8f6618..2143faf8 100644 --- a/src/test/riscv-tests/divu.s +++ b/src/test/riscv-tests/divu.s @@ -81,9 +81,9 @@ test09: bne x30, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/ecall.s b/src/test/riscv-tests/ecall.s index 24d1fa6b..0f7f05fa 100644 --- a/src/test/riscv-tests/ecall.s +++ b/src/test/riscv-tests/ecall.s @@ -9,10 +9,10 @@ __start: test: - li a0, 1 - li a2, 0xa + li a7, 1 + li a0, 0xa ecall success: - li a0, 10 + li a7, 10 ecall diff --git a/src/test/riscv-tests/farith.s b/src/test/riscv-tests/farith.s index 3a6956fd..3852fc2c 100644 --- a/src/test/riscv-tests/farith.s +++ b/src/test/riscv-tests/farith.s @@ -189,9 +189,9 @@ test10_data: .text success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/farith2.s b/src/test/riscv-tests/farith2.s index 11778e06..503f255c 100644 --- a/src/test/riscv-tests/farith2.s +++ b/src/test/riscv-tests/farith2.s @@ -117,9 +117,9 @@ test07_data: .text success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/fclass.s b/src/test/riscv-tests/fclass.s index 2ab9cf3a..faafa7f0 100644 --- a/src/test/riscv-tests/fclass.s +++ b/src/test/riscv-tests/fclass.s @@ -89,9 +89,9 @@ test10: bne a0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/fcmp.s b/src/test/riscv-tests/fcmp.s index e6e74185..80724e36 100644 --- a/src/test/riscv-tests/fcmp.s +++ b/src/test/riscv-tests/fcmp.s @@ -264,9 +264,9 @@ test15_data: .text success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/fcvt.s b/src/test/riscv-tests/fcvt.s index 1e29f2e3..6b9b54d1 100644 --- a/src/test/riscv-tests/fcvt.s +++ b/src/test/riscv-tests/fcvt.s @@ -144,9 +144,9 @@ test10_data: .text success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/fence.s b/src/test/riscv-tests/fence.s index f2403a74..de9877bd 100644 --- a/src/test/riscv-tests/fence.s +++ b/src/test/riscv-tests/fence.s @@ -12,5 +12,5 @@ test: fence success: - li a0, 10 + li a7, 10 ecall diff --git a/src/test/riscv-tests/ffused.s b/src/test/riscv-tests/ffused.s index f0041483..df7dcfd7 100644 --- a/src/test/riscv-tests/ffused.s +++ b/src/test/riscv-tests/ffused.s @@ -225,9 +225,9 @@ test12_data: .text success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/fls.s b/src/test/riscv-tests/fls.s index c35f77c0..4e90f563 100644 --- a/src/test/riscv-tests/fls.s +++ b/src/test/riscv-tests/fls.s @@ -39,9 +39,9 @@ test02: bne a0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/fminmax.s b/src/test/riscv-tests/fminmax.s index cdb04526..b6404524 100644 --- a/src/test/riscv-tests/fminmax.s +++ b/src/test/riscv-tests/fminmax.s @@ -333,9 +333,9 @@ test32_data: .text success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/fmove.s b/src/test/riscv-tests/fmove.s index 7e08239f..a3c1ce4c 100644 --- a/src/test/riscv-tests/fmove.s +++ b/src/test/riscv-tests/fmove.s @@ -141,9 +141,9 @@ test32: bne a0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/frecoding.s b/src/test/riscv-tests/frecoding.s index 218830ad..1c00db35 100644 --- a/src/test/riscv-tests/frecoding.s +++ b/src/test/riscv-tests/frecoding.s @@ -58,9 +58,9 @@ test06: bne a0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/jal.s b/src/test/riscv-tests/jal.s index 7614767d..75deb731 100644 --- a/src/test/riscv-tests/jal.s +++ b/src/test/riscv-tests/jal.s @@ -21,9 +21,9 @@ target_2: bne x2, x4, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/jalr.s b/src/test/riscv-tests/jalr.s index 2d6df60b..98b1a8da 100644 --- a/src/test/riscv-tests/jalr.s +++ b/src/test/riscv-tests/jalr.s @@ -59,9 +59,9 @@ label2_test04: bne x4, x5, label1_test04 success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/lb.s b/src/test/riscv-tests/lb.s index efb4bec2..e19b39a4 100644 --- a/src/test/riscv-tests/lb.s +++ b/src/test/riscv-tests/lb.s @@ -187,9 +187,9 @@ test18: bne x2, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/lbu.s b/src/test/riscv-tests/lbu.s index 49414e88..a4c632ab 100644 --- a/src/test/riscv-tests/lbu.s +++ b/src/test/riscv-tests/lbu.s @@ -187,9 +187,9 @@ test18: bne x2, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/lh.s b/src/test/riscv-tests/lh.s index a8ba2c98..cf1d851e 100644 --- a/src/test/riscv-tests/lh.s +++ b/src/test/riscv-tests/lh.s @@ -187,9 +187,9 @@ test18: bne x2, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/lhu.s b/src/test/riscv-tests/lhu.s index 96a06e58..d70091bc 100644 --- a/src/test/riscv-tests/lhu.s +++ b/src/test/riscv-tests/lhu.s @@ -187,9 +187,9 @@ test18: bne x2, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/lui.s b/src/test/riscv-tests/lui.s index 1940d591..6b5da857 100644 --- a/src/test/riscv-tests/lui.s +++ b/src/test/riscv-tests/lui.s @@ -42,9 +42,9 @@ test05: bne x0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/lw.s b/src/test/riscv-tests/lw.s index 39bafa85..b7403636 100644 --- a/src/test/riscv-tests/lw.s +++ b/src/test/riscv-tests/lw.s @@ -187,9 +187,9 @@ test18: bne x2, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/mul.s b/src/test/riscv-tests/mul.s index 96c41a5e..9d031230 100644 --- a/src/test/riscv-tests/mul.s +++ b/src/test/riscv-tests/mul.s @@ -401,9 +401,9 @@ test28: bne x0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/mulh.s b/src/test/riscv-tests/mulh.s index 8ab57a27..d5fc93b7 100644 --- a/src/test/riscv-tests/mulh.s +++ b/src/test/riscv-tests/mulh.s @@ -385,9 +385,9 @@ test28: bne x0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/mulhsu.s b/src/test/riscv-tests/mulhsu.s index 37964ab8..4490128c 100644 --- a/src/test/riscv-tests/mulhsu.s +++ b/src/test/riscv-tests/mulhsu.s @@ -385,9 +385,9 @@ test28: bne x0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/mulhu.s b/src/test/riscv-tests/mulhu.s index fb299507..4e5beb45 100644 --- a/src/test/riscv-tests/mulhu.s +++ b/src/test/riscv-tests/mulhu.s @@ -385,9 +385,9 @@ test28: bne x0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/or.s b/src/test/riscv-tests/or.s index 2de6a16a..07e2aadb 100644 --- a/src/test/riscv-tests/or.s +++ b/src/test/riscv-tests/or.s @@ -321,9 +321,9 @@ test26: bne x0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/ori.s b/src/test/riscv-tests/ori.s index 9111f84d..8d45c029 100644 --- a/src/test/riscv-tests/ori.s +++ b/src/test/riscv-tests/ori.s @@ -138,9 +138,9 @@ test13: bne x0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/refs.s b/src/test/riscv-tests/refs.s index 57369e8b..1f42ad9c 100644 --- a/src/test/riscv-tests/refs.s +++ b/src/test/riscv-tests/refs.s @@ -24,9 +24,9 @@ test01: bne x2, x4, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/relocations.s b/src/test/riscv-tests/relocations.s index 6de9ee14..6109257a 100644 --- a/src/test/riscv-tests/relocations.s +++ b/src/test/riscv-tests/relocations.s @@ -19,9 +19,9 @@ test01: bne x1, x2, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/rem.s b/src/test/riscv-tests/rem.s index 4afa2010..dc904da9 100644 --- a/src/test/riscv-tests/rem.s +++ b/src/test/riscv-tests/rem.s @@ -81,9 +81,9 @@ test09: bne x30, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/remu.s b/src/test/riscv-tests/remu.s index 5094c686..25025e1b 100644 --- a/src/test/riscv-tests/remu.s +++ b/src/test/riscv-tests/remu.s @@ -81,9 +81,9 @@ test09: bne x30, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/sb.s b/src/test/riscv-tests/sb.s index aed21f27..e03eecb6 100644 --- a/src/test/riscv-tests/sb.s +++ b/src/test/riscv-tests/sb.s @@ -300,9 +300,9 @@ label1_test22: bne x4, x5, label1_test22 success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/sh.s b/src/test/riscv-tests/sh.s index e7f23ebb..a206a597 100644 --- a/src/test/riscv-tests/sh.s +++ b/src/test/riscv-tests/sh.s @@ -300,9 +300,9 @@ label1_test22: bne x4, x5, label1_test22 success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/sll.s b/src/test/riscv-tests/sll.s index a82d4e85..5d7fc8a8 100644 --- a/src/test/riscv-tests/sll.s +++ b/src/test/riscv-tests/sll.s @@ -441,9 +441,9 @@ test42: bne x0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/slli.s b/src/test/riscv-tests/slli.s index 23309f2f..ae425dc1 100644 --- a/src/test/riscv-tests/slli.s +++ b/src/test/riscv-tests/slli.s @@ -215,9 +215,9 @@ test24: bne x0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/slt.s b/src/test/riscv-tests/slt.s index dbd2b85a..4e91d940 100644 --- a/src/test/riscv-tests/slt.s +++ b/src/test/riscv-tests/slt.s @@ -409,9 +409,9 @@ test37: bne x0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/slti.s b/src/test/riscv-tests/slti.s index 4c3267a9..0ec1ae5c 100644 --- a/src/test/riscv-tests/slti.s +++ b/src/test/riscv-tests/slti.s @@ -215,9 +215,9 @@ test24: bne x0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/sltiu.s b/src/test/riscv-tests/sltiu.s index 5564f56c..a8a27f25 100644 --- a/src/test/riscv-tests/sltiu.s +++ b/src/test/riscv-tests/sltiu.s @@ -215,9 +215,9 @@ test24: bne x0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/sltu.s b/src/test/riscv-tests/sltu.s index 69afd293..a7654988 100644 --- a/src/test/riscv-tests/sltu.s +++ b/src/test/riscv-tests/sltu.s @@ -409,9 +409,9 @@ test37: bne x0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/sra.s b/src/test/riscv-tests/sra.s index 6c0830cc..b5a71dd9 100644 --- a/src/test/riscv-tests/sra.s +++ b/src/test/riscv-tests/sra.s @@ -449,9 +449,9 @@ test42: bne x0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/srai.s b/src/test/riscv-tests/srai.s index b08206f9..f96fc22a 100644 --- a/src/test/riscv-tests/srai.s +++ b/src/test/riscv-tests/srai.s @@ -215,9 +215,9 @@ test24: bne x0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/srl.s b/src/test/riscv-tests/srl.s index c201ea08..7566960a 100644 --- a/src/test/riscv-tests/srl.s +++ b/src/test/riscv-tests/srl.s @@ -449,9 +449,9 @@ test42: bne x0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/srli.s b/src/test/riscv-tests/srli.s index 3d00e0cc..b02de7d3 100644 --- a/src/test/riscv-tests/srli.s +++ b/src/test/riscv-tests/srli.s @@ -215,9 +215,9 @@ test24: bne x0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/sub.s b/src/test/riscv-tests/sub.s index 9b603c9b..bec61b4a 100644 --- a/src/test/riscv-tests/sub.s +++ b/src/test/riscv-tests/sub.s @@ -401,9 +401,9 @@ test36: bne x0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/sw.s b/src/test/riscv-tests/sw.s index 1678dc94..abda870d 100644 --- a/src/test/riscv-tests/sw.s +++ b/src/test/riscv-tests/sw.s @@ -300,9 +300,9 @@ label1_test22: bne x4, x5, label1_test22 success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/xor.s b/src/test/riscv-tests/xor.s index 4014ac7a..9c539200 100644 --- a/src/test/riscv-tests/xor.s +++ b/src/test/riscv-tests/xor.s @@ -321,9 +321,9 @@ test26: bne x0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall diff --git a/src/test/riscv-tests/xori.s b/src/test/riscv-tests/xori.s index 83678167..dfa950f9 100644 --- a/src/test/riscv-tests/xori.s +++ b/src/test/riscv-tests/xori.s @@ -138,9 +138,9 @@ test13: bne x0, x29, fail success: - li a0, 10 + li a7, 10 ecall fail: - li a0, 17 + li a7, 17 ecall