timer.c

#include <stdint.h>
#include "kernel.h" 

// --- Hardware Definitions (CLINT Timer) ---
#define CLINT_BASE 0x02000000UL
// Use direct pointers instead of MMIO helpers for maximum reliability
#define MTIMECMP_PTR (volatile uint64_t *)(CLINT_BASE + 0x4000)
#define MTIME_PTR    (volatile uint64_t *)(CLINT_BASE + 0xBFF8)

// Assuming 10 MHz clock frequency for QEMU's CLINT 
#define CLOCKS_PER_SEC 10000000UL 
// Interrupt 10 times per second (100ms interval)
#define TIMER_INTERVAL (CLOCKS_PER_SEC / 10) 

// --- Timer Logic ---

void set_next_timer_interrupt() {
    // Read current time
    uint64_t now = *MTIME_PTR;
    
    // Set mtimecmp to the current time + the interval
    uint64_t next_tick = now + TIMER_INTERVAL;
    
    // Write the next comparison value
    *MTIMECMP_PTR = next_tick;
}

void timer_init() {
    // 1. CRITICAL: Clear any pending M-mode software interrupts (MSIP)
    // This is often needed when transitioning to S-mode
    asm volatile("csrc mip, %0" : : "r" (1UL << 3)); // Clear MSIP (bit 3)

    // 2. Set the first interrupt
    set_next_timer_interrupt();

    // 3. Enable Machine-mode Timer Interrupt (MTIE) in the MIE CSR
    // OpenSBI will delegate this signal to S-mode
    asm volatile("csrs mie, %0" : : "r" (1UL << 7));
    
    // uart_puts removed to prevent hang if timer.c is running before UART is initialized
}