1010//
1111// You should have received a copy of the GNU General Public License along with this program. If not, see http://www.gnu.org/licenses/.
1212
13+ //! Xilinx DFX Manager platform implementation.
14+ //!
15+ //! This module provides the Xilinx DFX Manager (dfx-mgr) platform, which is a vendor-specific
16+ //! "softener" implementation for managing Xilinx FPGA devices. It wraps the Xilinx dfx-mgr-client
17+ //! command-line tool to provide enhanced functionality for Xilinx devices including:
18+ //! - Dynamic function exchange (DFX) / partial reconfiguration
19+ //! - Accelerator package management
20+ //! - Multi-slot FPGA management
21+ //! - UIO (User I/O) interface management
22+ //! - Inter-region buffer management
23+ //!
24+ //! # Platform Support
25+ //!
26+ //! This platform registers itself for Xilinx device compatibility strings:
27+ //! - `xlnx,zynqmp-pcap-fpga` - Zynq UltraScale+ MPSoC
28+ //! - `versal-fpga` - Versal ACAP devices
29+ //! - `zynq-devcfg-1.0` - Zynq-7000 devices
30+ //!
31+ //! # DFX Manager Integration
32+ //!
33+ //! The platform communicates with the dfx-mgrd daemon (started via snap daemon wrapper)
34+ //! through the dfx-mgr-client CLI tool. The dfx-mgr-client binary must be available at
35+ //! `$SNAP/usr/bin/dfx-mgr-client`.
36+ //!
37+ //! # Architecture
38+ //!
39+ //! The platform uses lazy initialization via `OnceLock` to create component instances:
40+ //! - [`XilinxDfxMgrFPGA`] - Manages FPGA device operations via dfx-mgr
41+ //! - [`XilinxDfxMgrOverlayHandler`] - Manages overlay operations with bitstream coordination
42+ //!
43+ //! # Feature Flag
44+ //!
45+ //! This module is only compiled when the `xilinx-dfx-mgr` feature is enabled.
46+ //!
47+ //! # Examples
48+ //!
49+ //! ```rust,no_run
50+ //! # use daemon::platforms::platform::platform_for_known_platform;
51+ //! # fn example() -> Result<(), daemon::error::FpgadError> {
52+ //! let platform = platform_for_known_platform("xlnx,zynqmp-pcap-fpga")?;
53+ //! let fpga = platform.fpga("fpga0")?;
54+ //! # Ok(())
55+ //! # }
56+ //! ```
57+
1358use std:: env;
1459use std:: path:: Path ;
1560use std:: sync:: OnceLock ;
@@ -22,6 +67,25 @@ use crate::softeners::xilinx_dfx_mgr_overlay_handler::XilinxDfxMgrOverlayHandler
2267use fpgad_macros:: platform;
2368use log:: trace;
2469
70+ /// Xilinx DFX Manager platform implementation for managing Xilinx FPGA devices.
71+ ///
72+ /// This struct provides the platform implementation for Xilinx devices using the
73+ /// dfx-mgr backend. It uses lazy initialization to create FPGA and overlay handler
74+ /// instances on first access.
75+ ///
76+ /// The `#[platform]` macro automatically registers this platform with the Xilinx-specific
77+ /// compatibility strings, making it available for matching against Xilinx device tree
78+ /// compatible properties.
79+ ///
80+ /// # Fields
81+ ///
82+ /// * `fpga` - Lazily initialized Xilinx FPGA device instance
83+ /// * `overlay_handler` - Lazily initialized Xilinx overlay handler instance
84+ ///
85+ /// # Thread Safety
86+ ///
87+ /// This struct is thread-safe thanks to `OnceLock`, which ensures that initialization
88+ /// happens exactly once even with concurrent access.
2589#[ platform( compat_string = "xlnx,zynqmp-pcap-fpga,versal-fpga,zynq-devcfg-1.0" ) ]
2690pub struct XilinxDfxMgrPlatform {
2791 fpga : OnceLock < XilinxDfxMgrFPGA > ,
@@ -35,6 +99,22 @@ impl Default for XilinxDfxMgrPlatform {
3599}
36100
37101impl XilinxDfxMgrPlatform {
102+ /// Create a new Xilinx DFX Manager platform instance.
103+ ///
104+ /// Creates an empty platform with uninitialized FPGA and overlay handler instances.
105+ /// The actual components will be lazily initialized on first access through the
106+ /// [`Platform`] trait methods.
107+ ///
108+ /// # Returns: `Self`
109+ /// * New XilinxDfxMgrPlatform instance ready for use
110+ ///
111+ /// # Examples
112+ ///
113+ /// ```rust,no_run
114+ /// use daemon::softeners::xilinx_dfx_mgr::XilinxDfxMgrPlatform;
115+ ///
116+ /// let platform = XilinxDfxMgrPlatform::new();
117+ /// ```
38118 pub fn new ( ) -> Self {
39119 trace ! ( "creating new XilinxDfxMgrPlatform" ) ;
40120 XilinxDfxMgrPlatform {
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