diff --git a/docs/source/hardware.rst b/docs/source/hardware.rst
index beeb8e7..4984610 100644
--- a/docs/source/hardware.rst
+++ b/docs/source/hardware.rst
@@ -157,7 +157,7 @@ still depend on the pinmuxing of these 16 pins!
 +===============+==================+===================================+===========================================+
 | SPI           | 1                |                                   |                                           |
 +---------------+------------------+-----------------------------------+-------------------------------------------+
-| I²C           | 3                |                                   |                                           |
+| I²C           | 3                | - imx93-charge-som-i2c5.dtso      |                                           |
 +---------------+------------------+-----------------------------------+-------------------------------------------+
 | UART [#]_     | 1                | - imx93-charge-som-uart7.dtso     | without RTS/CTS                           |
 +---------------+------------------+-----------------------------------+-------------------------------------------+
@@ -322,3 +322,31 @@ The i.MX93 on the Charge SOM provides several I²C interfaces:
 +----------+------------+-------------------------------------+-----------------+
 
 .. [#] This interface is only enabled in case of a Charge SOM Single Channel DC Carrier Board.
+
+In to use the other I²C interfaces configure the matching DT overlays in the bootloader.
+
+***
+RTC
+***
+
+The Single Channel DC Carrier Board is equipped with a super cap buffered RTC.
+This RTC is available via Linux device ``/dev/rtc0``. As per default the EVerest
+firmware tries to synchronize the RTC via NTP and make sure that Backup Switch
+Over Mode is properly configured.
+
+In case the Single Channel DC Carrier Board doesn't have NTP access, the RTC
+must be configured manually:
+
+.. code-block:: console
+
+   timedatectl set-ntp false
+   timedatectl set-time "YYYY-MM-DD hh:mm:ss"
+   hwclock --param-set bsm=0x2
+
+
+***
+TPM
+***
+
+The Charge SOM includes a TPM 2.0 compliant chip.
+This TPM is available via Linux device ``/dev/tpm0``.
diff --git a/docs/source/troubleshooting.rst b/docs/source/troubleshooting.rst
index 158fce2..20951d0 100644
--- a/docs/source/troubleshooting.rst
+++ b/docs/source/troubleshooting.rst
@@ -148,7 +148,7 @@ The `Distec DD-0700-MC01 <https://www.fortec-integrated.de/en/products/tft-compo
 I like to create my own DT overlay. Is there an example?
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
-Yes, please have a look at this `commit <https://github.com/chargebyte/linux/commit/125a587a0cf7e8d9db1fdddf9383a67c2b46d107>`_ .
+Yes, please have a look at this `commit <https://github.com/chargebyte/linux/commit/f078308d85a0820e19aed387e8f1e01b8eafe041>`_ .
 
 
 Where can I find the device tree sources of the Charge SOM?
@@ -166,19 +166,23 @@ The device tree sources of the Charge SOM are divided into multiple layers:
    * - i.MX93
      - 0
      - SoC
-     - `imx93.dtsi <https://github.com/chargebyte/linux/blob/v6.6.23-2.0.0-phy-cb/arch/arm64/boot/dts/freescale/imx93.dtsi>`_
+     - `imx93.dtsi <https://github.com/chargebyte/linux/blob/v6.12.34-2.1.0-phy-cb/arch/arm64/boot/dts/freescale/imx93.dtsi>`_
    * - phyCORE-i.MX93
      - 1
      - SoM
-     - `imx93-phycore-som.dtsi <https://github.com/chargebyte/linux/blob/v6.6.23-2.0.0-phy-cb/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi>`_
+     - `imx93-phycore-som.dtsi <https://github.com/chargebyte/linux/blob/v6.12.34-2.1.0-phy-cb/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi>`_
    * - Charge SOM
      - 2
      - SoM
-     - `imx93-charge-som.dtsi <https://github.com/chargebyte/linux/blob/v6.6.23-2.0.0-phy-cb/arch/arm64/boot/dts/freescale/imx93-charge-som.dtsi>`_
+     - `imx93-charge-som.dtsi <https://github.com/chargebyte/linux/blob/v6.12.34-2.1.0-phy-cb/arch/arm64/boot/dts/freescale/imx93-charge-som.dtsi>`_
    * - Charge SOM Single Channel DC Carrier Board
      - 3
      - Board
-     - `imx93-charge-som-dc-evb.dts <https://github.com/chargebyte/linux/blob/v6.6.23-2.0.0-phy-cb/arch/arm64/boot/dts/freescale/imx93-charge-som-dc-evb.dts>`_
+     - `imx93-charge-som-dc-evb.dts <https://github.com/chargebyte/linux/blob/v6.12.34-2.1.0-phy-cb/arch/arm64/boot/dts/freescale/imx93-charge-som-dc-evb.dts>`_
+   * - UART7 overlay
+     - 4
+     - Overlay
+     - `imx93-charge-som-uart7.dtso <https://github.com/chargebyte/linux/blob/v6.12.34-2.1.0-phy-cb/arch/arm64/boot/dts/freescale/imx93-charge-som-uart7.dtso>`_
 
 
 How can I access the EVerest admin panel on Charge SOM?