Features.txt

### INFO

VHDL 1993
Using the Cyclone II DE 2: EP2C35F672C6N 
	It has 105 M4K blocks.
	Each M4K block has 4,608 bits.
	It can be configured as 4,096 x 1-bit, 2,048 x 2-bit, 1,024 x 4-bit, 512 x 9-bit, and so on.
	It supports true dual-port, simple dual-port, and single-port RAM configurations.




### FEATURES
[ppu]
	custom shift functions
	basic ALU structure

[memory_controller]

	basic memory implementation to utilize dual-port RAM, which allows simultaneous read/write 
	operations on two different addresses. which is extremely valuable and will considerably 
	speed up things
	
	
[ppu_controller]

	{writing to both RAMs at the same time (we can then read two different values at a time)}
	
	with it having one ALU it used to take 
	112690 ns
	to both load the ram then start reading the arrays and add them. now, by adding two elements at a time in parallel it takes
	76830 ns
	thats a 31.81 % improvement
	
### IMPROVEMENTS: TODO

[ppu]
	-- 4. Comparison Operations these will return true(00001) or false(00000):
		-- EQ, NEQ, GT, LT, GTE, LTE can be implemented but might be better suited for flag-based operations.

   -- 5. Other operations specific to GPU can be added later.
		--Clamp: Clamps a value between a minimum and maximum value.
		--Interpolation: Linearly interpolate between two values.
		--Dot Product: Useful in vector math for graphics.
		--Cross Product: Useful for 3D graphics to get a perpendicular vector