Hi,
In VMX_EPTP, VMX_EPML4E, VMX_PDPTE, MTRR_VARIABLE_BASE & MTRR_VARIABLE_MASK structures, there is a member defined as:
UINT64 PageFrameNumber : 36
Intel manual says size of this field should be MAXPHYADDR, which is obtained by CPUID.80000008H:EAX[7:0] (39 on my machine).
Intel also says:
the width is generally 36 if CPUID.01H:EDX.PAE [bit 6] = 1 and 32 otherwise.)
... MAXPHYADDR is at most 52
My question is: couldn't this cause problems (assuming the available RAM is really, really big) & wouldn't it be better to simply define this field as:
UINT64 PageFrameNumber : 52
?
I assume "unused" bits are set to 0 anyway.
Hi,
In
VMX_EPTP,VMX_EPML4E,VMX_PDPTE,MTRR_VARIABLE_BASE&MTRR_VARIABLE_MASKstructures, there is a member defined as:UINT64 PageFrameNumber : 36Intel manual says size of this field should be MAXPHYADDR, which is obtained by CPUID.80000008H:EAX[7:0] (39 on my machine).
Intel also says:
My question is: couldn't this cause problems (assuming the available RAM is really, really big) & wouldn't it be better to simply define this field as:
UINT64 PageFrameNumber : 52?
I assume "unused" bits are set to 0 anyway.