Incorrect I2C timing

[jmadden173]

When tested the I2C timing was off by a factor of 4. When set to 100k, SCL was 25k. When set to 400k, SCL was 100k. Timing values were generated with CubeMX so I believe this is an issue with the clocks reporting incorrect speed. MSI speed looks to be defined by a variable

tock/chips/stm32wle5xx/src/clocks/msi.rs

Line 53 in ec8cd9e

pub const MSI_FREQUENCY_MHZ: usize = 16;

[tyler-potyondy]

Interesting. We need to do a deeper dive on clocks in general (as I am fairly sure a good bit of the math is wrong). We know uart baud rate is running at 115200 (which takes a clock source as an input + a uart prescaler) which should give us a starting point to determine what the clocks themselves are currently configured to.

[tyler-potyondy]

@jmadden173 looking further into this, it seems MSI is actually 4MHz.

Bits 7:4 MSIRANGE[3:0]: MSI clock ranges
These bits are configured by software to choose the frequency range of MSI when
MSIRGSEL = 1. The following frequency ranges available:
0000: Range 0 around 100 kHz
0001: Range 1 around 200 kHz
0010: Range 2 around 400 kHz
0011: Range 3 around 800 kHz
0100: Range 4 around 1 MHz
0101: Range 5 around 2 MHz
0110: Range 6 around 4 MHz (reset value) <--- HERE
0111: Range 7 around 8 MHz
1000: Range 8 around 16 MHz
1001: Range 9 around 24 MHz
1010: Range 10 around 32 MHz
1011: Range 11 around 48 MHz
Others: not allowed (hardware write protection)

This explains the 4x discrepancy you observed in i2c.

[stevegtaylor]

@Manan1406 will be working on this as a first-issue under my supervision.