diff --git a/docs/lemans.html b/docs/lemans.html index 1f9923c..b82f879 100644 --- a/docs/lemans.html +++ b/docs/lemans.html @@ -420,6 +420,10 @@

Make Targets

U-Boot SPL

SWIV · qtestsign (local, no CASS)

+
+

OEM Secure-Boot Signing

+

edl-secure-bootloader · fused-EVK testing

+

OP-TEE TEE

BL32 — Secure World Kernel

@@ -756,6 +760,32 @@

Make Targets

Prerequisite of buildroot (hence efi). Standalone — independent of fetch-blobs. + + + OEM Secure-Boot Signing (fused-EVK testing — see the dedicated section above) + + + + spl-oem-sign + tz-secure.mbn — SWIV-annotated SPL, OEM-signed via sectools --image-id TZ + Local sectools TEST key, no CASS. Kept separate from tz.mbn (qtestsign's output) — running make spl can't clobber it and vice versa. + + + + edl-secure-bootloader + + Same as edl-bootloader (LUN1-4), with XBL/XBL-CONFIG/TZ all OEM-signed + Fast re-flash for OEM secure-boot testing — e.g. after cherry-picking new PAS auth commits into optee_os + + + + edl-secure-package + + Same as edl-package (LUN0-5, full image), with XBL/XBL-CONFIG/TZ all OEM-signed + Full-image OEM secure-boot package. Both edl-secure-* targets leave uefi.elf unsigned — not required for this bootflow. + + @@ -850,6 +880,112 @@

+

OEM Secure-Boot Signing edl-secure-bootloader / edl-secure-package

+
+ qtestsign does not produce a real signature. Its own docstring + says so directly: no signature is generated, and it only works on devices + with firmware secure boot disabled. On a Lemans EVK with + OEM_SECURE_BOOT + PK_HASH_0 fused, PBL/XBL-SEC + authenticates every SBL1-loaded boot-chain image against the OEM root of + trust — an image signed by qtestsign (or unsigned) is silently truncated + to a bogus 148-byte stub instead of loaded. edl-secure-bootloader + / edl-secure-package exist to produce a package that actually + boots on a fused board. +
+
+
+

What gets OEM-signed

+
    +
  • XBL — lemans/blobs/xbl.elf (stock Qualcomm blob, already OEM-signed as shipped)
    • +
  • XBL-CONFIG — lemans/blobs/xbl_config.elf (same, already OEM-signed as shipped)
    • +
  • TZ — the SPL, via spl-oem-sign → tz-secure.mbn
    • +
+
+
+

What does NOT need OEM-signing here

+
    +
  • UEFI — uefi.elf (the SPL_ATF FIT: BL31 + OP-TEE + U-Boot proper)
    • +
+

+ This is platform-specific, not a general rule — see below. It also + differs from sandbox.lemans's TF-A-BL2 bootflow, where + the FIP does require OEM + signing. +

+
+
+

Why UEFI/FIP signing is required for TF-A BL2 but not for U-Boot SPL

+

+ This was confirmed on hardware, not assumed. In a successful U-Boot SPL + boot with uefi.elf deliberately left unsigned, + the SBL1 boot profiler showed XBL-SEC truncating APPSBL + (its name for the uefi partition) to a 148-byte stub with no + Segments hash check line — the same rejection signature + seen for an unsigned TZ — and the board still booted to Linux. The two + bootflows differ in who reads the FIT + and from where, not in XBL-SEC policy or firmware version + (both were investigated and ruled out): +

+
+
+

TF-A BL2 (sandbox.lemans)

+

+ BL2 trusts a fixed physical address (PLAT_QTI_FIP_IOBASE = + 0xaf000000) that XBL-SEC is expected to have already loaded + the FIP into during SBL1. If XBL-SEC rejected an unsigned FIP, BL2 + reads a 148-byte stub there and fails: + BL2: Failed to load image id 3 (-2). +

+

+ That -2 is ENOENT from a FIP + Table-of-Contents lookup miss (io_fip.c) — not a BL2 + auth rejection. TRUSTED_BOARD_BOOT is 0 in this build, + so FIP signature checking is compiled out of BL2 entirely. The real + fault is one stage earlier, in XBL-SEC. uefi.elf + must be OEM-signed for this bootflow to work. +

+
+
+

U-Boot SPL (this build root)

+

+ SPL (SPL_LOAD_FIT + SPL_ATF) does not rely + on an XBL-SEC-loaded DRAM copy at all — it reads the + uefi partition itself, directly off UFS, via U-Boot's + own FIT parser. +

+

+ A truncated/garbage copy sitting in DRAM from XBL-SEC's rejection + is irrelevant: SPL goes back to storage and gets the real FIT + regardless of whether XBL-SEC ever approved it. uefi.elf + does not need OEM signing for this bootflow — signing it + anyway would be harmless, just not required. +

+
+
+

Signing Command (make spl-oem-sign)

+
+ 
sectools secure-image u-boot/.output/spl/u-boot-spl-swiv.elf \
+  --outfile lemans/output/tz-secure.mbn \
+  --image-id TZ \
+  --security-profile lemans/security/lemans_tz_security_profile.xml \
+  --sign --signing-mode TEST
+
+# Local sectools TEST key — no CASS / QTI-REMOTE server needed
+# Same command shape for XBL / XBL-CONFIG, just --image-id XBL / XBL-CONFIG
+
+

+ edl-secure-bootloader (LUN1-4, fast re-flash) and + edl-secure-package (LUN0-5, full image) both run this as + part of their build; verify with + sectools secure-image --inspect lemans/output/edl-secure-bootloader/tz.mbn + — look for OEM Signature Size: 104 (bytes). +

+ + diff --git a/lemans.mk b/lemans.mk index ceeddcb..2efbdef 100644 --- a/lemans.mk +++ b/lemans.mk @@ -35,6 +35,8 @@ # buildroot Build the root filesystem (via common.mk) # # qtestsign-fetch Clone qtestsign (auto-invoked by spl) +# spl-oem-sign OEM-sign the SPL via sectools -> lemans/output/tz-secure.mbn +# (secure-boot testing only; see edl-secure-package) # fetch-blobs Download QCS9100 firmware blobs directly (no Yocto build) # yocto Clone meta-qcom and build the OE no-distro BSP image via kas # flash-yocto Flash the complete unmodified Yocto release image (all 6 LUNs) @@ -42,7 +44,9 @@ # flash-kernel Flash the updated efi.bin via QDL (efi.bin from build; LUN0 tables from blobs) # flash-ufs-provision Re-provision the UFS LUN layout (recover partitions broken by a bad flash) # edl-package Assemble flat image dir for Windows EDL flashing (PCATApp/QFIL) +# edl-secure-package edl-package + OEM-signed XBL/XBL-CONFIG/SPL (secure-boot testing) # edl-bootloader Assemble bootloader-only EDL package (LUN1–4, fast re-flash) +# edl-secure-bootloader edl-bootloader + OEM-signed XBL/XBL-CONFIG/SPL (secure-boot testing) # *-clean Per-component clean targets # # Configurable variables (override on the command line or in the environment) @@ -174,6 +178,11 @@ U-BOOT_PATH ?= $(ROOT)/u-boot SWIV_SCRIPT ?= $(CURDIR)/lemans/security/swiv_build_utility.py +# sectools OEM signing (secure-boot testing only — see spl-oem-sign / edl-secure-package). +# Not used by the default qtestsign-based 'spl' target. +SECTOOLS_PATH ?= /pkg/sectools/v2/1.44/Linux +SECURITY_PROFILE = $(CURDIR)/lemans/security/lemans_tz_security_profile.xml + ################################################################################ # Source overlays # @@ -287,6 +296,8 @@ help: @echo " u-boot Build U-Boot SPL (qcom_lemans_spl_defconfig → tz.mbn)" @echo " u-boot-proper Build U-Boot proper (qcom_lemans_defconfig, BL33 @ 0xaf000000)" @echo " spl SWIV-annotate + qtestsign the SPL → tz.mbn" + @echo " spl-oem-sign OEM-sign the SWIV-annotated SPL via sectools →" + @echo " tz-secure.mbn (secure-boot testing; see edl-secure-package)" @echo " uefi Assemble the SPL_ATF boot FIT → uefi.elf" @echo " linux Build kernel Image + DTBs" @echo " buildroot Build the root filesystem" @@ -315,9 +326,19 @@ help: @echo " Output: lemans/output/edl-package/" @echo " Contains prog_firehose_ddr.elf, all rawprogram/patch XMLs," @echo " GPT bins, all firmware MBNs/ELFs, efi.bin, and qupv3fw.elf" + @echo " edl-secure-package Same as edl-package, then OEM-signs xbl.elf," + @echo " xbl_config.elf, and the SPL tz.mbn via sectools" + @echo " (--image-id XBL / XBL-CONFIG / TZ, --signing-mode TEST)." + @echo " Output: lemans/output/edl-secure-package/" + @echo " For OEM secure-boot testing on a fused EVK; the default" + @echo " edl-package's tz.mbn is qtestsign-signed (no real signature)." @echo " edl-bootloader Bootloader-only EDL package (LUN1–4: XBL, CDT, SPL, U-Boot)" @echo " Output: lemans/output/edl-bootloader/" @echo " Fast re-flash path when only OP-TEE/U-Boot changed" + @echo " edl-secure-bootloader Same as edl-bootloader, then OEM-signs xbl.elf," + @echo " xbl_config.elf, and the SPL tz.mbn via sectools" + @echo " Output: lemans/output/edl-secure-bootloader/" + @echo " Fast LUN1-4-only re-flash for OEM secure-boot testing" @echo "" @echo "════════════════════════════════════════════════════════════════════════" @echo " FIRMWARE BLOB TARGETS (alternative to 'make yocto')" @@ -516,6 +537,37 @@ spl-clean: $(U_BOOT_OUTPUT)/spl/u-boot-spl-swiv.elf \ $(U_BOOT_OUTPUT)/spl/u-boot-spl.mbn +################################################################################ +# spl-oem-sign — OEM-sign the SWIV-annotated SPL via sectools (secure-boot +# testing only; NOT part of the default 'spl'/'bootimage' flow, which stays on +# qtestsign per the platform's own bootflow — see qtestsign.py's own docstring: +# it never signs anything for real, no fields). +# +# Reuses the same SWIV-annotated ELF 'spl' produces +# ($(U_BOOT_OUTPUT)/spl/u-boot-spl-swiv.elf); run 'make spl' (or 'make +# u-boot') first so that file exists. Same sectools command shape as +# sandbox.lemans's edl-secure-package: --image-id TZ, TEST-mode, no CASS. +# Output is lemans/output/tz-secure.mbn — kept separate from lemans/output/tz.mbn +# (the qtestsign output) so 'make spl' can never silently clobber this or +# vice versa. +################################################################################ +.PHONY: spl-oem-sign + +spl-oem-sign: + @if [ ! -f "$(U_BOOT_OUTPUT)/spl/u-boot-spl-swiv.elf" ]; then \ + echo "ERROR: $(U_BOOT_OUTPUT)/spl/u-boot-spl-swiv.elf not found"; \ + echo " run 'make spl' (or 'make u-boot') first"; \ + exit 1; \ + fi + mkdir -p $(CURDIR)/lemans/output + $(SECTOOLS_PATH)/sectools secure-image \ + $(U_BOOT_OUTPUT)/spl/u-boot-spl-swiv.elf \ + --outfile $(CURDIR)/lemans/output/tz-secure.mbn \ + --image-id TZ \ + --security-profile $(SECURITY_PROFILE) \ + --sign --signing-mode TEST + @echo "OEM-signed SPL written to lemans/output/tz-secure.mbn (tz partition image)" + ################################################################################ # uefi partition image — SPL_ATF boot FIT # @@ -1406,7 +1458,7 @@ EDL_PKG_FILES = \ .PHONY: edl-package edl-package-clean -edl-package: +edl-package: bootimage @mkdir -p $(EDL_PKG_DIR) @# ── Resolve every required file into the package directory ───────────────── $(call stage-flash-files,$(EDL_PKG_FILES),$(EDL_PKG_DIR)) @@ -1452,6 +1504,114 @@ edl-package: edl-package-clean: rm -rf $(EDL_PKG_DIR) +################################################################################ +# edl-package-debug — Full EDL package built with a DEBUG OP-TEE +# +# Same output as 'edl-package' but with verbose secure-world logging +# (LOG_LEVEL=4, DEBUG=1, CFG_DEBUG_INFO=y). edl-package already depends on +# 'bootimage', so passing the flags straight to 'edl-package' builds the +# whole chain (optee-os -> tfa -> u-boot -> u-boot-proper -> spl -> uefi) +# debug in one pass -- no separate 'bootimage' pre-step needed. A final +# quiet 'bootimage' restores lemans/output/ to the production state +# without touching the already-assembled debug package. +################################################################################ +.PHONY: edl-package-debug + +edl-package-debug: + @echo "Building OP-TEE with debug flags for edl-package..." + $(MAKE) edl-package CFG_TEE_CORE_LOG_LEVEL=4 CFG_TEE_TA_LOG_LEVEL=4 DEBUG=1 CFG_DEBUG_INFO=y + @echo "Restoring production OP-TEE build (LOG_LEVEL=1)..." + $(MAKE) bootimage + @echo "" + @echo "DEBUG EDL package assembled at: $(EDL_PKG_DIR)/" + @echo " (tz.mbn / uefi.elf carry LOG_LEVEL=4 OP-TEE)" + +################################################################################ +# edl-secure-package — edl-package, plus OEM-signed XBL, XBL-CONFIG, and the +# U-Boot SPL (tz partition), for OEM secure-boot testing on a fused EVK. +# +# Unlike edl-package's SPL (qtestsign — no real signature, see qtestsign.py's +# own docstring: it explicitly does not support secure-boot-enabled devices), +# this signs via sectools --image-id TZ, same tool/profile/TEST-mode as +# sandbox.lemans's edl-secure-package. Requires 'make spl-oem-sign' to have +# been run first (or run it here) so lemans/output/tz-secure.mbn exists. +# +# XBL / XBL-CONFIG / TZ-here are OEM-signed only, per the actual scope asked +# for -- FIP/FIT contents (TF-A BL31, U-Boot proper, OP-TEE, all bundled in +# uefi.elf) are NOT OEM-signed; that FIT only carries per-image SHA-256 +# integrity hashes (see the 'uefi' target), never routed through sectools. +# +# OPEN QUESTION, not yet verified on hardware: sandbox.lemans's TZ (TF-A BL2) +# needed BOTH an OEM and a QTI signature -- XBL-SEC rejected an OEM-only BL2 +# there (see that repo's edl-secure-package comment block). It is not yet +# known whether XBL-SEC's per-image authenticator policy for THIS platform's +# tz-partition payload (U-Boot SPL, not BL2) also requires QTI, or whether +# OEM-only is sufficient here. This target is OEM-only per the current ask; +# if XBL-SEC rejects it the same way, the fix is the same double-sign pattern +# sandbox.lemans uses (sign from a QTI-signed tz.mbn instead of the bare SWIV +# ELF) -- but that would first need a QTI/CASS signing step added here, which +# does not currently exist in this build root at all. +################################################################################ +EDL_SEC_PKG_DIR = $(CURDIR)/lemans/output/edl-secure-package + +.PHONY: edl-secure-package edl-secure-package-clean + +edl-secure-package: edl-package spl-oem-sign + @echo "" + @echo "── edl-secure-package: OEM-signing XBL, XBL-CONFIG, SPL (tz) ──" + rm -rf $(EDL_SEC_PKG_DIR) + mkdir -p $(EDL_SEC_PKG_DIR) + @# Start from the assembled (unsigned/qtestsign) package, then replace the + @# three PBL/XBL-SEC-authenticated payloads with OEM-signed versions below. + cp -a $(EDL_PKG_DIR)/. $(EDL_SEC_PKG_DIR)/ + $(SECTOOLS_PATH)/sectools secure-image $(EDL_PKG_DIR)/xbl.elf \ + --outfile $(EDL_SEC_PKG_DIR)/xbl.elf \ + --image-id XBL \ + --security-profile $(SECURITY_PROFILE) \ + --sign --signing-mode TEST + $(SECTOOLS_PATH)/sectools secure-image $(EDL_PKG_DIR)/xbl_config.elf \ + --outfile $(EDL_SEC_PKG_DIR)/xbl_config.elf \ + --image-id XBL-CONFIG \ + --security-profile $(SECURITY_PROFILE) \ + --sign --signing-mode TEST + @# tz-secure.mbn (OEM-signed SPL) replaces edl-package's qtestsign tz.mbn. + cp $(CURDIR)/lemans/output/tz-secure.mbn $(EDL_SEC_PKG_DIR)/tz.mbn + @echo "" + @echo "OEM-signed EDL package assembled at: $(EDL_SEC_PKG_DIR)/" + @echo " OEM-signed: xbl.elf xbl_config.elf tz.mbn (U-Boot SPL)" + @echo " Unsigned: uefi.elf (FIT: TF-A BL31 + OP-TEE + U-Boot proper), efi.bin, ..." + @echo " Flash THIS directory, not edl-package/ (which holds the qtestsign copy)." + @echo " Verify before flashing:" + @echo " $(SECTOOLS_PATH)/sectools secure-image --inspect $(EDL_SEC_PKG_DIR)/tz.mbn" + @echo " Flashing needs the VIP signed-digest flow if the board is fused --" + @echo " see sandbox.lemans's lemans-vip-flashing-procedure notes." + +edl-secure-package-clean: + rm -rf $(EDL_SEC_PKG_DIR) + +################################################################################ +# edl-secure-package-debug — OEM-signed EDL package with DEBUG OP-TEE +# +# Same as 'edl-secure-package' but with verbose OP-TEE logging (LOG_LEVEL=4). +# Useful for debugging PAS/remoteproc issues on fused boards. +# +# edl-secure-package depends (via edl-package) on 'bootimage', so passing +# the flags straight to 'edl-secure-package' builds the whole chain debug +# in one pass -- see edl-package-debug's comment block. A final quiet +# 'bootimage' restores lemans/output/ without touching the already-signed +# debug package. +################################################################################ +.PHONY: edl-secure-package-debug + +edl-secure-package-debug: + @echo "Building OP-TEE with debug flags for edl-secure-package..." + $(MAKE) edl-secure-package CFG_TEE_CORE_LOG_LEVEL=4 CFG_TEE_TA_LOG_LEVEL=4 DEBUG=1 CFG_DEBUG_INFO=y + @echo "Restoring production OP-TEE build (LOG_LEVEL=1)..." + $(MAKE) bootimage + @echo "" + @echo "DEBUG OEM-signed EDL package assembled at: $(EDL_SEC_PKG_DIR)/" + @echo " (tz.mbn / uefi.elf carry LOG_LEVEL=4 OP-TEE with OEM signatures)" + ################################################################################ # edl-bootloader — Minimal EDL package: bootloaders only (no efi.bin/rootfs) # @@ -1460,13 +1620,12 @@ edl-package-clean: # LUN3: CDT # LUN4: tz.mbn, uefi.elf, aop, shrm, hyp, devcfg, cpucp, imagefv, … # -# This is the fast re-flash path when only OP-TEE/U-Boot changed. +# This is the fast re-flash path when only TF-A/OP-TEE/U-Boot changed. # efi.bin (LUN0) and persist (LUN5) are untouched. # -# OP-TEE is rebuilt with full debug logging (LOG_LEVEL=4, DEBUG=1) so that -# secure-world traces are visible over the UART during bring-up. The -# production build (LOG_LEVEL=1) is restored afterward so that lemans/output/ -# is left in the standard quiet state. +# Depends on 'bootimage' for a fresh, quiet-by-default rebuild (optee-os -> +# tfa -> u-boot -> u-boot-proper -> spl -> uefi); use edl-bootloader-debug +# for a verbose (LOG_LEVEL=4) OP-TEE build instead. ################################################################################ EDL_BL_DIR = $(CURDIR)/lemans/output/edl-bootloader @@ -1480,22 +1639,12 @@ EDL_BL_FILES = \ .PHONY: edl-bootloader edl-bootloader-clean -edl-bootloader: - @echo "Building OP-TEE with debug flags for edl-bootloader..." - $(MAKE) optee-os CFG_TEE_CORE_LOG_LEVEL=4 DEBUG=1 CFG_DEBUG_INFO=y - $(MAKE) u-boot - $(MAKE) spl +edl-bootloader: bootimage @mkdir -p $(EDL_BL_DIR) $(call stage-flash-files,$(EDL_BL_FILES),$(EDL_BL_DIR)) - @# Copy the debug-built tz.mbn (signed SPL) and uefi.elf into the package + @# Copy the freshly built tz.mbn (signed SPL) and uefi.elf into the package cp $(CURDIR)/lemans/output/tz.mbn $(EDL_BL_DIR)/tz.mbn cp $(CURDIR)/lemans/output/uefi.elf $(EDL_BL_DIR)/uefi.elf - @# Restore production OP-TEE build (LOG_LEVEL=1) and re-sign SPL - @echo "Restoring production OP-TEE build (LOG_LEVEL=1)..." - $(MAKE) optee-os - $(MAKE) tfa - $(MAKE) u-boot - $(MAKE) spl @# qupv3fw.elf + patch rawprogram4 to populate qupfw_a/b @if [ -f "$(CURDIR)/lemans/input/qupv3fw.elf" ]; then \ cp "$(CURDIR)/lemans/input/qupv3fw.elf" "$(EDL_BL_DIR)/qupv3fw.elf"; \ @@ -1520,3 +1669,98 @@ edl-bootloader: edl-bootloader-clean: rm -rf $(EDL_BL_DIR) + +################################################################################ +# edl-bootloader-debug — Bootloader-only package with DEBUG OP-TEE +# +# Same as edl-package-debug's approach, for the LUN1-4-only edl-bootloader +# path: edl-bootloader already depends on 'bootimage', so passing the debug +# flags straight to 'edl-bootloader' builds+assembles in one pass, then a +# final quiet 'bootimage' restores lemans/output/. +################################################################################ +.PHONY: edl-bootloader-debug + +edl-bootloader-debug: + @echo "Building OP-TEE with debug flags for edl-bootloader..." + $(MAKE) edl-bootloader CFG_TEE_CORE_LOG_LEVEL=4 CFG_TEE_TA_LOG_LEVEL=4 DEBUG=1 CFG_DEBUG_INFO=y + @echo "Restoring production OP-TEE build (LOG_LEVEL=1)..." + $(MAKE) bootimage + @echo "" + @echo "DEBUG bootloader-only EDL package assembled at: $(EDL_BL_DIR)/" + @echo " (tz.mbn / uefi.elf carry LOG_LEVEL=4 OP-TEE; LUN0/LUN5 untouched)" + +################################################################################ +# edl-secure-bootloader — edl-bootloader, plus OEM-signed XBL, XBL-CONFIG, and +# the U-Boot SPL (tz partition), for OEM secure-boot testing on a fused EVK. +# +# Same relationship to edl-bootloader as edl-secure-package has to edl-package +# -- see that target's comment block above for the full RCA on why XBL/ +# XBL-CONFIG/TZ need OEM signing here but uefi.elf does not (U-Boot SPL reads +# the uefi partition itself from storage; it does not depend on an +# XBL-SEC-loaded DRAM copy of the FIT the way TF-A BL2 does). +# +# Requires 'make spl-oem-sign' to have been run first (or run it here) so +# lemans/output/tz-secure.mbn exists. +# +# Fast re-flash path (LUN1-4 only) for OEM secure-boot testing when only +# TF-A/OP-TEE/U-Boot changed -- e.g. after cherry-picking new PAS auth +# commits into optee_os. +################################################################################ +EDL_SEC_BL_DIR = $(CURDIR)/lemans/output/edl-secure-bootloader + +.PHONY: edl-secure-bootloader edl-secure-bootloader-clean + +edl-secure-bootloader: edl-bootloader spl-oem-sign + @echo "" + @echo "── edl-secure-bootloader: OEM-signing XBL, XBL-CONFIG, SPL (tz) ──" + rm -rf $(EDL_SEC_BL_DIR) + mkdir -p $(EDL_SEC_BL_DIR) + @# Start from the assembled (unsigned/qtestsign) package, then replace the + @# three PBL/XBL-SEC-authenticated payloads with OEM-signed versions below. + cp -a $(EDL_BL_DIR)/. $(EDL_SEC_BL_DIR)/ + $(SECTOOLS_PATH)/sectools secure-image $(EDL_BL_DIR)/xbl.elf \ + --outfile $(EDL_SEC_BL_DIR)/xbl.elf \ + --image-id XBL \ + --security-profile $(SECURITY_PROFILE) \ + --sign --signing-mode TEST + $(SECTOOLS_PATH)/sectools secure-image $(EDL_BL_DIR)/xbl_config.elf \ + --outfile $(EDL_SEC_BL_DIR)/xbl_config.elf \ + --image-id XBL-CONFIG \ + --security-profile $(SECURITY_PROFILE) \ + --sign --signing-mode TEST + @# tz-secure.mbn (OEM-signed SPL) replaces edl-bootloader's qtestsign tz.mbn. + cp $(CURDIR)/lemans/output/tz-secure.mbn $(EDL_SEC_BL_DIR)/tz.mbn + @echo "" + @echo "OEM-signed EDL bootloader package assembled at: $(EDL_SEC_BL_DIR)/" + @echo " OEM-signed: xbl.elf xbl_config.elf tz.mbn (U-Boot SPL)" + @echo " Unsigned: uefi.elf (FIT: TF-A BL31 + OP-TEE + U-Boot proper) --" + @echo " not required for this bootflow, see edl-secure-package." + @echo " Flash THIS directory (LUN1-4 only) for a fast secure-boot re-flash." + @echo " Flashing needs the VIP signed-digest flow if the board is fused --" + @echo " see sandbox.lemans's lemans-vip-flashing-procedure notes." + +edl-secure-bootloader-clean: + rm -rf $(EDL_SEC_BL_DIR) + +################################################################################ +# edl-secure-bootloader-debug — OEM-signed bootloader package with DEBUG OP-TEE +# +# Same as 'edl-secure-bootloader' but with verbose OP-TEE logging (LOG_LEVEL=4). +# Fast re-flash path for debugging PAS/remoteproc on fused boards. +# +# edl-secure-bootloader depends (via edl-bootloader) on 'bootimage', so +# passing the flags straight to 'edl-secure-bootloader' builds the whole +# chain debug in one pass -- see edl-package-debug's comment block. A final +# quiet 'bootimage' restores lemans/output/ without touching the +# already-signed debug package. +################################################################################ +.PHONY: edl-secure-bootloader-debug + +edl-secure-bootloader-debug: + @echo "Building OP-TEE with debug flags for edl-secure-bootloader..." + $(MAKE) edl-secure-bootloader CFG_TEE_CORE_LOG_LEVEL=4 CFG_TEE_TA_LOG_LEVEL=4 DEBUG=1 CFG_DEBUG_INFO=y + @echo "Restoring production OP-TEE build (LOG_LEVEL=1)..." + $(MAKE) bootimage + @echo "" + @echo "DEBUG OEM-signed bootloader-only EDL package assembled at: $(EDL_SEC_BL_DIR)/" + @echo " (tz.mbn / uefi.elf carry LOG_LEVEL=4 OP-TEE with OEM signatures; LUN0/LUN5 untouched)" diff --git a/lemans/security/lemans_tz_security_profile.xml b/lemans/security/lemans_tz_security_profile.xml new file mode 100644 index 0000000..cb3614b --- /dev/null +++ b/lemans/security/lemans_tz_security_profile.xml @@ -0,0 +1,2392 @@ + + + + 0x6019 + + + + + + 0x0 + + + 0x3 + ELF-V6-DEV-PROG + + + 0x3 + MBN-V6 + + + 0x4 + + + 0x5 + + + 0x6 + + + 0x7 + + + 0x9 + + + 0xA + + + 0xB + ELF-V6-XBL-SEC + + + 0xC + ELF-V6-PLATFORM-INDEPENDENT + + + 0xC + ELF-V6 + + + 0xC + + + 0xE + + + 0x11 + + + 0x14 + + + 0x15 + + + 0x17 + + + 0x18 + + + 0x1C + + + 0x1D + + + 0x1E + + + 0x1F + + + 0x20 + + + 0x21 + + + 0x22 + ELF-V6-OEM-MISC + + + 0x23 + ELF-V6-QTI-MISC + + + 0x24 + + + 0x25 + + + 0x27 + + + 0x28 + + + 0x2A + + + 0x2B + + + 0x2D + + + 0x31 + + + 0x34 + + + 0x3A + + + 0x3B + + + 0x3C + + + 0x42 + + + 0x44 + + + 0x52 + + + 0x53 + + + 0x57 + + + 0x58 + + + 0x59 + + + 0x5A + + + 0x5B + + + 0x81 + + + 0x82 + + + 0x83 + + + 0x84 + + + 0x85 + + + 0x8D + + + 0x8F + + + 0x92 + ELF-V6-SECBOOT-EMU + + + 0x200 + + + 0x200 + + + + + + + ELF + + + 64 + + 32 + 64 + + + false + + + + END + + END + + + 0x1000 + false + + SHA384 + + SHA384 + SHA256 + + + 6 + + 0.0 + + 0.0 + + + + + + ELF + + + 32 + + 32 + 64 + + + false + + + + START + + START + + + 0x1 + false + + SHA384 + + SHA384 + SHA256 + + + 6 + + 0.0 + + 0.0 + + + + + + ELF-V6 + + false + ECDSA384 + + + ECDSA + + SHA384 + + SHA384 + + + + SECP384R1-RS-48-49 + + SECP384R1-RS-48-49 + + + + + RSA + + SHA256 + + SHA256 + + + + PSS + + PSS + + + + 2048 + + 2048 + 4096 + + + + 65537 + + 65537 + + + + + + true + true + true + + + true + true + true + + + true + true + true + + + true + true + true + + true + + false + false + false + + true + true + + 2.0 + + 2.0 + + + + 3 + + 2 + 3 + + + + + SOC-HW-VER + + + SOC-HW-VER + JTAG-ID + + + false + false + + + false + ECDSA384 + + + ECDSA + + SHA384 + + SHA384 + + + + SECP384R1-RS-48-49 + + SECP384R1-RS-48-49 + + + + + + true + true + true + + + true + true + false + + + false + false + false + + + false + false + false + + false + + false + false + false + + true + false + + 3 + + 3 + + + + + SOC-HW-VER + + + SOC-HW-VER + JTAG-ID + + + false + false + + + UIE + + + UIE + + UIE-1.0-L2-1.1 + + UIE-1.0-L2-1.0 + UIE-1.0-L2-1.1 + + + + OTP-OEM + + RTL-QTI + OTP-OEM + OTP-QTI + + + + + + + + + + ELF + + + 32 + + 32 + 64 + + + false + + + + END + + END + + + 0x1000 + false + + SHA384 + + SHA384 + SHA256 + + + 6 + + 0.0 + + 0.0 + + + + + + ELF + + + 32 + + 32 + + + false + + + + START + + START + + + 0x1000 + false + + SHA384 + + SHA384 + SHA256 + + + 6 + + 0.0 + + 0.0 + + + + + + ELF + + + 32 + + 32 + 64 + + + false + + + + START + + START + + + 0x1000 + false + + SHA384 + + SHA384 + SHA256 + + + 6 + + 0.0 + + 0.0 + + + + + + ELF + + + 32 + + 32 + 64 + + + false + + + + END + + END + + + 0x1000 + false + + SHA384 + + SHA384 + SHA256 + + + 6 + + 0.0 + + 0.0 + + + + + 0 + 30 + + SHA384 + + SHA384 + + + 0x14819000 + + START + + START + + + 0x1000 + + + + ELF + + + 32 + + 32 + 64 + + + false + + + + END + + END + + + 0x1000 + false + + SHA384 + + SHA384 + SHA256 + + + 6 + + 0.0 + + 0.0 + + + + + 0 + 12 + + SHA384 + + SHA384 + + + 0x14819000 + + START + + START + + + 0x1000 + + + + MBN + + 6 + + 0.0 + + 0.0 + 1.0 + + + + + + ELF-V6 + + true + ECDSA384 + + + ECDSA + + SHA384 + + SHA384 + + + + SECP384R1-RS-48-49 + + SECP384R1-RS-48-49 + + + + + RSA + + SHA256 + + SHA256 + + + + PSS + + PSS + + + + 2048 + + 2048 + 4096 + + + + 65537 + + 65537 + + + + + + true + true + true + + + true + true + true + + + true + true + true + + + true + true + true + + false + + false + false + false + + true + true + + 2.0 + + 2.0 + + + + 3 + + 2 + 3 + + + + + SOC-HW-VER + + + SOC-HW-VER + JTAG-ID + + + false + false + + + true + ECDSA384 + + + ECDSA + + SHA384 + + SHA384 + + + + SECP384R1-RS-48-49 + + SECP384R1-RS-48-49 + + + + + + true + true + true + + + false + false + false + + + false + false + false + + + false + false + false + + false + + false + false + false + + true + false + + 3 + + 3 + + + + + SOC-HW-VER + + + SOC-HW-VER + JTAG-ID + + + false + false + + + UIE + + + UIE + + UIE-1.0-L2-1.1 + + UIE-1.0-L2-1.0 + UIE-1.0-L2-1.1 + + + + OTP-OEM + + RTL-QTI + OTP-OEM + OTP-QTI + + + + + + + + + + ELF + + + 32 + + 32 + 64 + + + false + + + + START + + START + + + 0x1000 + false + + SHA384 + + SHA384 + SHA256 + + + 6 + + 0.0 + + 0.0 + + + + + + ELF-V6 + + true + ECDSA384 + + + ECDSA + + SHA384 + + SHA384 + + + + SECP384R1-RS-48-49 + + SECP384R1-RS-48-49 + + + + + RSA + + SHA256 + + SHA256 + + + + PSS + + PSS + + + + 2048 + + 2048 + 4096 + + + + 65537 + + 65537 + + + + + + true + true + true + + + true + true + true + + + true + true + true + + + true + true + true + + false + + false + false + false + + true + true + + 2.0 + + 2.0 + + + + 3 + + 2 + 3 + + + + + SOC-HW-VER + + + SOC-HW-VER + JTAG-ID + + + false + false + + + false + ECDSA384 + + + ECDSA + + SHA384 + + SHA384 + + + + SECP384R1-RS-48-49 + + SECP384R1-RS-48-49 + + + + + + true + true + true + + + true + true + false + + + false + false + false + + + false + false + false + + false + + false + false + false + + true + false + + 3 + + 3 + + + + + SOC-HW-VER + + + SOC-HW-VER + JTAG-ID + + + false + false + + + UIE + + + UIE + + UIE-1.0-L2-1.1 + + UIE-1.0-L2-1.0 + UIE-1.0-L2-1.1 + + + + OTP-OEM + + RTL-QTI + OTP-OEM + OTP-QTI + + + + + + + + + + ELF + + + 32 + + 32 + 64 + + + false + + + + START + + START + + + 0x1000 + false + + SHA384 + + SHA384 + SHA256 + + + 6 + + 0.0 + + 0.0 + + + + + + ELF + + + 32 + + 32 + 64 + + + false + + + + START + + START + + + 0x1000 + false + + SHA384 + + SHA384 + SHA256 + + + 6 + + 1.0 + + 0.0 + 1.0 + + + + + + ELF-V6 + + false + ECDSA384 + + + ECDSA + + SHA384 + + SHA384 + + + + SECP384R1-RS-48-49 + + SECP384R1-RS-48-49 + + + + + RSA + + SHA256 + + SHA256 + + + + PSS + + PSS + + + + 2048 + + 2048 + 4096 + + + + 65537 + + 65537 + + + + + + true + true + true + + + true + true + true + + + true + true + true + + + true + true + true + + false + + false + false + false + + true + true + + 2.0 + + 2.0 + + + + 3 + + 2 + 3 + + + + + SOC-HW-VER + + + SOC-HW-VER + JTAG-ID + INDEPENDENT + + + false + false + + + false + ECDSA384 + + + ECDSA + + SHA384 + + SHA384 + + + + SECP384R1-RS-48-49 + + SECP384R1-RS-48-49 + + + + + + true + true + true + + + false + false + false + + + false + false + false + + + false + false + false + + false + + false + false + false + + true + false + + 3 + + 3 + + + + + SOC-HW-VER + + + SOC-HW-VER + JTAG-ID + + + false + false + + RMA + OPERATIONAL-EXT + OPERATIONAL-INT + + + + UIE + + + UIE + + UIE-1.0-L2-1.1 + + UIE-1.0-L2-1.0 + UIE-1.0-L2-1.1 + + + + OTP-OEM + + RTL-QTI + OTP-OEM + OTP-QTI + + + + + + + + + + ELF + + + 32 + + 32 + 64 + + + false + + + + START + + ANY + + + 0x1000 + false + + SHA384 + + SHA384 + SHA256 + + + 6 + + 0.0 + + 0.0 + + + + + + ELF-V6 + + false + ECDSA384 + + + ECDSA + + SHA384 + + SHA384 + + + + SECP384R1-RS-48-49 + + SECP384R1-RS-48-49 + + + + + + true + true + true + + + false + false + false + + + false + false + false + + + false + false + false + + false + + false + false + false + + true + true + + 2.0 + + 2.0 + + + + 3 + + 2 + 3 + + + + + SOC-HW-VER + + + SOC-HW-VER + JTAG-ID + + + false + true + + + UIE + + + UIE + + UIE-2.0-L2-1.2 + + UIE-2.0-L2-1.2 + + + + OTP-OEM + + OTP-OEM + OTP-QTI + RTL-QTI + + + true + + + QBEC + 1 + ECDH-P384-HKDF-SIV-64-GCM + MODEM-IMAGE-KPV4 + ELF-SEGMENT-AES-GCM + 4 + + + + + + + + + DEBUG-POLICY + DEBUG-POLICY-QTI + + 8 + + 8 + + + 0x1C000000 + + END + + END + + + 0x1000 + + 64 + + 32 + 64 + + + + + 0 + Enable Online Crash Dumps. + + + 1 + Enable Offline Crash Dumps. + + + 2 + Enable JTAG debugging and traces for all subsystems. + + + 3 + Enable Logs. + + + 4 + Enable JTAG debugging and traces for Modem subsystem. + + + 5 + Enable traces for Modem Subsystem. + + + 6,7 + Enable JTAG debugging and traces for ADSP and HLOS. + + + 6,8 + Enable JTAG debugging and traces for HLOS. + + + 7 + Enable traces for ADSP and HLOS. + + + 7,8 + Enable traces for QTEE, ADSP, and HLOS. + + + 8 + Enable traces for HLOS. + + + 24 + Enable Non-secure Crash Dumps. + + + 25 + Enable APPS Encrypted Mini Dumps. + + + 26 + Enable MPPS Encrypted Mini Dumps. + + + 27 + Enable LPASS Encrypted Mini Dumps. + + + 28 + Enable CSS Encrypted Mini Dumps. + + + 29 + Enable ADSP Encrypted Mini Dumps. + + + 30 + Enable CDSP Encrypted Mini Dumps. + + + 31 + Enable WLAN Encrypted Mini Dumps. + + + 38 + Enable CDSP1 Encrypted Mini Dumps. + + + 39 + Enable GPDSP0 Encrypted Mini Dumps. + + + 40 + Enable GPDSP1 Encrypted Mini Dumps. + + + + + + SEC-ELF + + + + + SECONDARY_KEY_DERIVATION_KEY_READ_DISABLE + This bit determines the read permission setting for this region. + 31 + + + + + + + READ_PERMISSIONS_WRITE_DISABLE + Disables further QFPROM changes to the this region. Blow this bit after the region has been completely provisioned. + 5 + + + WRITE_PERMISSIONS_WRITE_DISABLE + Disables further QFPROM changes to the this region. Blow this bit after the region has been completely provisioned. + 6 + + + FEC_ENABLES_WRITE_DISABLE + Disables further QFPROM changes to the this region. Blow this bit after the region has been completely provisioned. + 7 + + + OEM_CONFIGURATION_WRITE_DISABLE + Disables further QFPROM changes to the this region. Blow this bit after the region has been completely provisioned. + 8 + + + PUBLIC_KEY_HASH_0_WRITE_DISABLE + Disables further QFPROM changes to the this region. Blow this bit after the region has been completely provisioned. + 24 + + + OEM_IMAGE_ENCRYPTION_KEY_WRITE_DISABLE + Disables further QFPROM changes to the this region. Blow this bit after the region has been completely provisioned. + 29 + + + OEM_SECURE_BOOT_WRITE_DISABLE + Disables further QFPROM changes to the this region. Blow this bit after the region has been completely provisioned. Once blown no further changes possible to QFPROM sheet via sec.elf. + 30 + + + SECONDARY_KEY_DERIVATION_KEY_WRITE_DISABLE + Disables further QFPROM changes to the this region. Blow this bit after the region has been completely provisioned. + 31 + + + IMAGE_ENCRYPTION_KEY_1_WRITE_DISABLE + Disables further QFPROM changes to the this region. Blow this bit after the region has been completely provisioned. + 33 + + + OEM_SPARE_28_WRITE_DISABLE + Disables further QFPROM changes to the this region. Blow this bit after the region has been completely provisioned. + 35 + + + OEM_SPARE_29_WRITE_DISABLE + Disables further QFPROM changes to the this region. Blow this bit after the region has been completely provisioned. + 36 + + + OEM_SPARE_30_WRITE_DISABLE + Disables further QFPROM changes to the this region. Blow this bit after the region has been completely provisioned. + 37 + + + OEM_SPARE_31_WRITE_DISABLE + Disables further QFPROM changes to the this region. Blow this bit after the region has been completely provisioned. + 38 + + + + + + + OEM_IMAGE_ENCRYPTION_KEY_FEC_ENABLE + This fuse is used to enable the Forward Error Correction for this region (if applicable). + 29 + + + OEM_SECURE_BOOT_FEC_ENABLE + This fuse is used to enable the Forward Error Correction for this region (if applicable). + 30 + + + SECONDARY_KEY_DERIVATION_KEY_FEC_ENABLE + This fuse is used to enable the Forward Error Correction for this region (if applicable). + 31 + + + IMAGE_ENCRYPTION_KEY_1_FEC_ENABLE + This fuse is used to enable the Forward Error Correction for this region (if applicable). + 33 + + + + + + + E_DLOAD_DISABLE + SW only use for Boot. Disable the removable SD and then USB downloader in Apps PBL error handler, as well as the method to force download during code boot via magic cookies in IMEM. + 0 + + + ENUM_TIMEOUT + SW only use for Boot. BOOT ROM must support USB enumeration timeout. Timeout applies to both enumeration for FLCB (fast low current boot) and USB download mode. If USB is not enumerated within time (90 seconds), quit USB enumeration If USB suspend or disconnected after enumeration, start timer again. + 1 + + + FORCE_DLOAD_DISABLE + SW only use for Boot. To disable method to force boot from USB via GPIO or magic number in RAM. + 2 + + + FAST_BOOT + These fuses are used by boot code to specify which device has priority to be booted from. For QAM8650P, the mapping is as follows: + +Following change is needed for fast boot option: +0000b -> UFS-USB +Rest are reserved. If selected, treated as invalid boot option. + 9:5 + + + SW_FUSE_PROG_DISABLE + This fuse disables the ability to write fuses through the software interface. + 12 + + + PBL_FDL_TIMEOUT_RESET_FEATURE_ENABLE + Fuse bit to reset device if PBL enters into EDL mode unintentionally. + 13 + + + WDOG_EN + Combined with GPIO Wdog disable (connects to MPM). Prevents the Watch Dog from being disabled by the GPIO. + 14 + + + PBL_LOG_DISABLE + SW only use for Boot. Control logging mechanism in Boot ROM (If blown, Logging is disabled & mandated for external parts). + 15 + + + ROOT_CERT_TOTAL_NUM + Defines the total root cert number supported from the certificate (Upto 4 roots). + 18:17 + + + IMAGE_ENCRYPTION_ENABLE + This bit when blown, is used to indicate that the QC and OEM Encryption key regions will be used to store the image encryption root keys. When this bit is unblown, these regions will not be used.Note that this bit only 'enables' the image encryption feature, and is NOT an encryption enforcement bit. With image encryption enabled, the chip can boot with either encrypted or plaintext images (the image has meta-data to indicate if the image is encrypted or not). + 19 + + + SW_ROT_USE_SERIAL_NUM + If set, PBL checks that signature covers a serial number that matches that read from fuses. This is for secure boot authentication. + 21 + + + USB_SS_DISABLE + Used to disable USB SS enumeration during boot. + 22 + + + DEBUG_POLICY_DISABLE + Debug policy is bypassed when this bit is 1. Debug Policy provides a means to re-enable debug capabilities under OEM-specified selectable conditions. + 28 + + + ALL_DEBUG_DISABLE + This fuse permanently disables all debug of the chip. This should only be blown once the OEM is done with their development and testing. No RMAs are possible after this fuse is blown. + 29 + + + SHARED_QSEE_SPIDEN_DISABLE + Shared QSEE Secure Invasive Debug Disable bucket. This OEM controlled fuse can be overriden by the corresponding QC fuse. + 30 + + + SHARED_QSEE_SPNIDEN_DISABLE + Shared QSEE Secure Non-invasive Debug Disable bucket. This OEM controlled fuse can be overriden by the corresponding QC fuse. + 31 + + + SHARED_MSS_DBGEN_DISABLE + Shared MSS Invasive Debug Disable bucket. This OEM controlled fuse can be overriden by the corresponding QC fuse. + 32 + + + SHARED_MSS_NIDEN_DISABLE + Shared MSS Non-invasive Debug Disable bucket. This OEM controlled fuse can be overriden by the corresponding QC fuse. + 33 + + + SHARED_CP_DBGEN_DISABLE + Shared CP Invasive Debug Disable bucket. This OEM controlled fuse can be overriden by the corresponding QC fuse. + 34 + + + SHARED_CP_NIDEN_DISABLE + Shared CP Non-invasive Debug Disable bucket. This OEM controlled fuse can be overriden by the corresponding QC fuse. + 35 + + + SHARED_NS_DBGEN_DISABLE + Shared NS Invasive Debug Disable bucket. This OEM controlled fuse can be overriden by the corresponding QC fuse. + 36 + + + SHARED_NS_NIDEN_DISABLE + Shared NS Non-invasive Debug Disable bucket. This OEM controlled fuse can be overriden by the corresponding QC fuse. + 37 + + + APPS_DBGEN_DISABLE + When blown will disable the non-secure invasive debug facilities of APPS (including APPS processor) subsystem. This OEM controlled fuse can be overriden by the corresponding QC fuse. + 38 + + + APPS_NIDEN_DISABLE + When blown will disable the non-secure non-invasive debug facilities of APPS (including APPS processor) subsystem. This OEM controlled fuse can be overriden by the corresponding QC fuse. + 39 + + + SHARED_MISC_DEBUG_DISABLE + Shared Misc Debug Disable bucket. This OEM controlled fuse can be overriden by the corresponding QC fuse. + 40 + + + USB_PIPO_DISABLE + This fuse is used to control the USB PIPO mode. + 50 + + + + + TZ_SW_CRYPTO_FIPS_ENABLE + Enable FIPS mode for TZ software crypto. Disable by default and blow to enable. + 4 + + + TZ_SW_CRYPTO_FIPS_OVERRIDE + Override TZ_SW_CRYPTO_FIPS_ENABLE fuse. Non-override by default and blow to override the TZ_SW_CRYPTO_FIPS_ENABLE fuse to disable the FIPS feature in TZ. + 7 + + + SPARE_REG28_SECURE + This fuse determines if the corresponding OEM spare region is treated as secure. If blown, it indicates secure, and the region has the properties of a customer private key, and is not readable through SW while debug is enabled. Qualcomm doesn’t recommend using OEM SPARE regions for storing security keys, since these regions are only accessible by the SW. + 12 + + + SPARE_REG29_SECURE + This fuse determines if the corresponding OEM spare region is treated as secure. If blown, it indicates secure, and the region has the properties of a customer private key, and is not readable through SW while debug is enabled. Qualcomm doesn’t recommend using OEM SPARE regions for storing security keys, since these regions are only accessible by the SW. + 13 + + + SPARE_REG30_SECURE + This fuse determines if the corresponding OEM spare region is treated as secure. If blown, it indicates secure, and the region has the properties of a customer private key, and is not readable through SW while debug is enabled. Qualcomm doesn’t recommend using OEM SPARE regions for storing security keys, since these regions are only accessible by the SW. + 14 + + + SPARE_REG31_SECURE + This fuse determines if the corresponding OEM spare region is treated as secure. If blown, it indicates secure, and the region has the properties of a customer private key, and is not readable through SW while debug is enabled. Qualcomm doesn’t recommend using OEM SPARE regions for storing security keys, since these regions are only accessible by the SW. + 15 + + + SEGMENT_HASH_FUNCTION_SELECT0 + SEGMENT_HASH_FUNCTION_SELECT_0 is used to determine segment hash computation algorithm with MRC 0 Indexed Root Certificate enabled. 0 means SHA384, 1 means SHA256. + 16 + + + SEGMENT_HASH_FUNCTION_SELECT1 + SEGMENT_HASH_FUNCTION_SELECT_1 is used to determine segment hash computation algorithm with MRC 1 Indexed Root Certificate enabled. 0 means SHA384, 1 means SHA256. + 17 + + + SEGMENT_HASH_FUNCTION_SELECT2 + SEGMENT_HASH_FUNCTION_SELECT_2 is used to determine segment hash computation algorithm with MRC 2 Indexed Root Certificate enabled. 0 means SHA384, 1 means SHA256. + 18 + + + SEGMENT_HASH_FUNCTION_SELECT3 + SEGMENT_HASH_FUNCTION_SELECT_3 is used to determine segment hash computation algorithm with MRC 3 Indexed Root Certificate enabled. 0 means SHA384, 1 means SHA256. + 19 + + + EKU_ENFORCEMENT_EN + When this fuse is blown will enable enforcement of the EKU field in the certificate. + 30 + + + DISABLE_RSA + When this bit is 0 and signed image type is SHA384 + RSA/ECC is 0 => RSA OPERATION_x000D_ +When this bit is 0 and signed image type is SHA384 + RSA/ECC IS 1=> ECC OPERATION USING PKA IP_x000D_ +When this bit is 1 and signed image type is SHA384 + RSA/ECC is 0 => Error_x000D_ +When this bit is 1 and signed image type is SHA384 + RSA/ECC IS 1=> ECC OPERATION USING PKA IP. + 31 + + + OEM_HW_ID + The OEM hardware ID. Bits 15:0. + 47:32 + + + OEM_PRODUCT_ID + The OEM product ID. Bits 15:0. + 63:48 + + + + + PERIPH_PID + Bits 15:0 of the PID. + 15:0 + + + PERIPH_VID + Bits 15:0 of the VID. + 31:16 + + + ANTI_ROLLBACK_FEATURE_EN + Bit 0 - BOOT_ANTI_ROLLBACK_EN +Bit 1 - TZAPPS_ANTI_ROLLBACK_EN +Bit 2 - PILSUBSYS_ANTI_ROLLBACK_EN +Bit 3 - MSA_ANTI_ROLLBACK_EN. + 35:32 + + + + + OEM_CONFIG_3_SPARE + Use these fuses for OEM purpose only. Not for Qualcomm Internal use. + 63:0 + + + + + OEM_CONFIG_4_SPARE + Use these fuses for OEM purpose only. Not for Qualcomm Internal use. + 63:0 + + + + + + + PK_HASH_0 + Hash of OEM Root certificate. + 63:0 + + + + + PK_HASH_0 + 63:0 + + + + + PK_HASH_0 + 63:0 + + + + + PK_HASH_0 + 63:0 + + + + + PK_HASH_0 + 63:0 + + + + + PK_HASH_0 + 63:0 + + + + + PK_HASH_0 + 63:0 + + + + + PK_HASH_0 + 63:0 + + + + + + + OEM_IMAGE_ENCRYPTION_KEY + This is the 128-bit encryption key used by UIE to decrypt images. when UIE Key Select is set to 0. + 55:0 + + + FEC_186 + FEC autocalculated based on 56 bits in the row. + 62:56 + + + + + OEM_IMAGE_ENCRYPTION_KEY + 55:0 + + + FEC_187 + FEC autocalculated based on 56 bits in the row. + 62:56 + + + + + OEM_IMAGE_ENCRYPTION_KEY + 15:0 + + + FEC_188 + FEC autocalculated based on 56 bits in the row. + 62:56 + + + + + + + OEM_SECURE_BOOT1_ROM_PK_HASH_IDX0 + Boot Segment for Apps & other peripheral images. + 0 + + + OEM_SECURE_BOOT1_ROM_PK_HASH_IDX1 + Boot Segment for Apps & other peripheral images. + 1 + + + OEM_SECURE_BOOT1_ROM_PK_HASH_IDX2 + Boot Segment for Apps & other peripheral images. + 2 + + + OEM_SECURE_BOOT1_ROM_PK_HASH_IDX3 + Boot Segment for Apps & other peripheral images. + 3 + + + OEM_SECURE_BOOT1_PK_HASH_IN_FUSE + Boot Segment for Apps & other peripheral images. + 4 + + + OEM_SECURE_BOOT1_AUTH_EN + Boot Segment for Apps & other peripheral images. + 5 + + + OEM_SECURE_BOOT1_USE_SERIAL_NUM + Boot Segment for Apps & other peripheral images. + 6 + + + OEM_SECURE_BOOT2_ROM_PK_HASH_IDX0 + Boot segment for MBA image. + 8 + + + OEM_SECURE_BOOT2_ROM_PK_HASH_IDX1 + Boot segment for MBA image. + 9 + + + OEM_SECURE_BOOT2_ROM_PK_HASH_IDX2 + Boot segment for MBA image. + 10 + + + OEM_SECURE_BOOT2_ROM_PK_HASH_IDX3 + Boot segment for MBA image. + 11 + + + OEM_SECURE_BOOT2_PK_HASH_IN_FUSE + Boot segment for MBA image. + 12 + + + OEM_SECURE_BOOT2_AUTH_EN + Boot segment for MBA image. + 13 + + + OEM_SECURE_BOOT2_USE_SERIAL_NUM + Boot segment for MBA image. + 14 + + + OEM_SECURE_BOOT3_ROM_PK_HASH_IDX0 + Boot segment for Modem image. + 16 + + + OEM_SECURE_BOOT3_ROM_PK_HASH_IDX1 + Boot segment for Modem image. + 17 + + + OEM_SECURE_BOOT3_ROM_PK_HASH_IDX2 + Boot segment for Modem image. + 18 + + + OEM_SECURE_BOOT3_ROM_PK_HASH_IDX3 + Boot segment for Modem image. + 19 + + + OEM_SECURE_BOOT3_PK_HASH_IN_FUSE + Boot segment for Modem image. + 20 + + + OEM_SECURE_BOOT3_AUTH_EN + Boot segment for Modem image. + 21 + + + OEM_SECURE_BOOT3_USE_SERIAL_NUM + Boot segment for Modem image. + 22 + + + FEC_189 + FEC autocalculated based on 56 bits in the row. + 62:56 + + + + + + + SEC_KEY_DERIVATION_KEY + This 256‑bit value is used as the secondary key derivation input; used to generate the secondary key used by the crypto engine. When running insecure (no secure boot; or Debug enabled) then SKDK is fed into the key derivation function to generate a unique "non-secure" secondary key for use by the crypto engine. When running secure (secure boot; and debug disabled), then SKDK is fed directly to the crypto engine as the secondary key. After the SKDK value has been correctly programmed, the SKDK Read Disable should be blown to permanently protect the SKDK value. Prior to this, the SKDK value can be read from the QFPROM by software. The TZ fuse blow API is capable of automatically generating a random number for use as the SKDK so that the SKDK value is never available outside of the device. + 55:0 + + + FEC_191 + FEC autocalculated based on 56 bits in the row. + 62:56 + + + + + SEC_KEY_DERIVATION_KEY + 55:0 + + + FEC_192 + FEC autocalculated based on 56 bits in the row. + 62:56 + + + + + SEC_KEY_DERIVATION_KEY + 55:0 + + + FEC_193 + FEC autocalculated based on 56 bits in the row. + 62:56 + + + + + SEC_KEY_DERIVATION_KEY + 55:0 + + + FEC_194 + FEC autocalculated based on 56 bits in the row. + 62:56 + + + + + SEC_KEY_DERIVATION_KEY + 31:0 + + + FEC_195 + FEC autocalculated based on 56 bits in the row. + 62:56 + + + + + + + IMAGE_ENCRYPTION_KEY_1 + This is the 128-bit encryption key used by UIE to decrypt images. when UIE Key Select is set to 1. + 55:0 + + + FEC_252 + FEC autocalculated based on 56 bits in the row. + 62:56 + + + + + IMAGE_ENCRYPTION_KEY_1 + 55:0 + + + FEC_253 + FEC autocalculated based on 56 bits in the row. + 62:56 + + + + + IMAGE_ENCRYPTION_KEY_1 + 15:0 + + + FEC_254 + FEC autocalculated based on 56 bits in the row. + 62:56 + + + + + + + OEM_SPARE_28 + 63:0 + + + + + OEM_SPARE_28 + 63:0 + + + + + + + OEM_SPARE_29 + 63:0 + + + + + OEM_SPARE_29 + 63:0 + + + + + + + OEM_SPARE_30 + 63:0 + + + + + OEM_SPARE_30 + 63:0 + + + + + + + OEM_SPARE_31 + 63:0 + + + + + OEM_SPARE_31 + 63:0 + + + + + + + 64 + + 32 + 64 + + + 0x00000000908FF000 + + 2 + + 2 + + + + START + + START + END + + + 0x0000000000001000 + + +