As part of my tests for #1613 and #1601 I experienced lots of issues with SD boot on the FPGA.
I tried with 4 different SD cards and only one of them would boot properly. I tested it systematically and reflashed each of them (and also verified the binary content in one of the failing ones). Only a specific micro SD card would boot properly beyond bootrom.
The issue was basically that all data read in partition 2 (OpenSBI) and partition 3 (Linux) would be read as zero bytes (as far as I could confirm in in bootrom code). All bytes in all those blocks would be read zero. This would not happen with data read from Device Tree partition, even if OpenSBI is read/loaded into RAM before DT.
I tried some hacks in zsbl to make it work without success, so I went back to just using the same micro SD card that works (Sandisk Industrial 16GB). Other SD cards that did not work: Samsung EVO 64 GB, Verbatim 16GB and another Sandisk 32GB.
I will try to retest the build on a Genesys 2 when I have time.
Are there any known issues there in the spi_controller or in spi_controller 'driver' in zsbl? It looks like both the controller and the driver in zsbl are 'custom'.
It could be something in the FSM handling the end of multi-block transfers but I also tried quickly single-block (CMD17) and it didn't help (didn't push it much due to very slow SoC rebuild cycles).
I also saw that for Arty A7 and Genesys 2 the design is not using by default on-board micro SD connector pins but some PMOD connector on the board so I guess that's known (and not mentioned explicitly anywhere why it's the case).
As part of my tests for #1613 and #1601 I experienced lots of issues with SD boot on the FPGA.
I tried with 4 different SD cards and only one of them would boot properly. I tested it systematically and reflashed each of them (and also verified the binary content in one of the failing ones). Only a specific micro SD card would boot properly beyond bootrom.
The issue was basically that all data read in partition 2 (OpenSBI) and partition 3 (Linux) would be read as zero bytes (as far as I could confirm in in bootrom code). All bytes in all those blocks would be read zero. This would not happen with data read from Device Tree partition, even if OpenSBI is read/loaded into RAM before DT.
I tried some hacks in zsbl to make it work without success, so I went back to just using the same micro SD card that works (Sandisk Industrial 16GB). Other SD cards that did not work: Samsung EVO 64 GB, Verbatim 16GB and another Sandisk 32GB.
I will try to retest the build on a Genesys 2 when I have time.
Are there any known issues there in the spi_controller or in spi_controller 'driver' in zsbl? It looks like both the controller and the driver in zsbl are 'custom'.
It could be something in the FSM handling the end of multi-block transfers but I also tried quickly single-block (CMD17) and it didn't help (didn't push it much due to very slow SoC rebuild cycles).
I also saw that for Arty A7 and Genesys 2 the design is not using by default on-board micro SD connector pins but some PMOD connector on the board so I guess that's known (and not mentioned explicitly anywhere why it's the case).