From 666c213469b319ef0c0b278486678ab851ee83ef Mon Sep 17 00:00:00 2001 From: HeYue Date: Wed, 26 Feb 2025 09:30:58 +0800 Subject: [PATCH 1/7] revert 108bdb06b3c3 to cf58efc7138e --- Android.bp | 1 - cros_gralloc/cros_gralloc_driver.cc | 399 +++++++++------------------ cros_gralloc/cros_gralloc_driver.h | 18 -- cros_gralloc/cros_gralloc_helpers.cc | 4 +- drv.c | 35 +-- drv.h | 9 +- drv_helpers.c | 42 +++ drv_helpers.h | 6 + drv_priv.h | 30 +- external/virtgpu_drm.h | 15 - gbm.c | 8 +- i915.c | 296 +++++++++++++++----- intel_device.c | 316 --------------------- intel_device.h | 52 ---- minigbm_helpers.c | 3 +- virtgpu.c | 14 + virtgpu.h | 30 +- virtgpu_virgl.c | 45 +-- xe.c | 69 +++-- 19 files changed, 491 insertions(+), 901 deletions(-) delete mode 100644 intel_device.c delete mode 100644 intel_device.h diff --git a/Android.bp b/Android.bp index 537d277c..429a9edd 100644 --- a/Android.bp +++ b/Android.bp @@ -50,7 +50,6 @@ filegroup { "virtgpu_cross_domain.c", "virtgpu_virgl.c", "xe.c", - "intel_device.c", ], } diff --git a/cros_gralloc/cros_gralloc_driver.cc b/cros_gralloc/cros_gralloc_driver.cc index 39784c45..8d093b8a 100644 --- a/cros_gralloc/cros_gralloc_driver.cc +++ b/cros_gralloc/cros_gralloc_driver.cc @@ -15,13 +15,11 @@ #include #include "../drv_priv.h" -#include "../intel_device.h" #include "../util.h" -#include "drv.h" // Constants taken from pipe_loader_drm.c in Mesa -#define DRM_NUM_NODES 8 +#define DRM_NUM_NODES 63 // DRM Render nodes start at 128 #define DRM_RENDER_NODE_START 128 @@ -29,11 +27,6 @@ // DRM Card nodes start at 0 #define DRM_CARD_NODE_START 0 -#define IVSH_WIDTH 1600 -#define IVSH_HEIGHT 900 - -#define IVSH_DEVICE_NUM 2 - class cros_gralloc_driver_preloader { public: @@ -97,6 +90,17 @@ cros_gralloc_driver *cros_gralloc_driver::get_instance() return &s_instance; } +#define DRV_INIT(drv, type, idx) \ + if (drv) { \ + if (drv_init(drv, type)) { \ + drv_loge("Failed to init driver %d\n", idx); \ + int fd = drv_get_fd(drv); \ + drv_destroy(drv); \ + close(fd); \ + drv = nullptr; \ + } \ + } + #define DRV_DESTROY(drv) \ if (drv) { \ int fd = drv_get_fd(drv); \ @@ -105,55 +109,7 @@ cros_gralloc_driver *cros_gralloc_driver::get_instance() close(fd); \ } -int32_t cros_gralloc_driver::reload() -{ - int fd; - drmVersionPtr version; - char const *str = "%s/renderD%d"; - char *node; - - if (gpu_grp_type_ & GPU_GRP_TYPE_HAS_VIRTIO_GPU_IVSHMEM_BIT) { - return 0; - } - // Max probe two ivshm node, the first one is used for screen cast. - for (int i = 0; i < DRM_NUM_NODES; ++i) { - if (asprintf(&node, str, DRM_DIR_NAME, DRM_RENDER_NODE_START + i) < 0) - continue; - - fd = open(node, O_RDWR, 0); - free(node); - if (fd < 0) - continue; - - version = drmGetVersion(fd); - if (!version) { - close(fd); - continue; - } - - drmFreeVersion(version); - if (get_gpu_type(fd) == GPU_GRP_TYPE_VIRTIO_GPU_IVSHMEM_IDX) { - drv_logi("New added node is virtio-ivishmem node"); - gpu_grp_type_ |= GPU_GRP_TYPE_HAS_VIRTIO_GPU_IVSHMEM_BIT; - struct driver *drv = drv_create(fd, gpu_grp_type_); - if (!drv) { - drv_loge("Failed to create driver\n"); - close(fd); - continue; - } - drivers_[GPU_GRP_TYPE_VIRTIO_GPU_IVSHMEM_IDX] = drv; - drv_ivshmem_ = drv; - return 0; - } else { - drv_logi("New added node is NOT virtio-ivishmem node"); - close(fd); - continue; - } - } - return -ENODEV; -} - -cros_gralloc_driver::cros_gralloc_driver(): drivers_(GPU_GRP_TYPE_NR, nullptr) +cros_gralloc_driver::cros_gralloc_driver() { /* * Create a driver from render nodes first, then try card @@ -171,15 +127,28 @@ cros_gralloc_driver::cros_gralloc_driver(): drivers_(GPU_GRP_TYPE_NR, nullptr) uint32_t j; char *node; int fd; - int fallback_fd = -1; drmVersionPtr version; const int render_num = 10; - std::vector driver_fds{GPU_GRP_TYPE_NR, -1}; + const int name_length = 50; + int node_fd[render_num]; + char *node_name[render_num] = {}; + int availabe_node = 0; + int virtio_node_idx = -1; + int renderer_idx = -1; + int video_idx = -1; + uint32_t gpu_grp_type = 0; char buf[PROP_VALUE_MAX]; property_get("ro.product.device", buf, "unknown"); mt8183_camera_quirk_ = !strncmp(buf, "kukui", strlen("kukui")); + // destroy drivers if exist before re-initializing them + if (drv_video_ != drv_render_) + DRV_DESTROY(drv_video_) + if (drv_kms_ != drv_render_) + DRV_DESTROY(drv_kms_) + DRV_DESTROY(drv_render_) + for (uint32_t i = min_render_node; i < max_render_node; i++) { if (asprintf(&node, render_nodes_fmt, DRM_DIR_NAME, i) < 0) continue; @@ -204,102 +173,108 @@ cros_gralloc_driver::cros_gralloc_driver(): drivers_(GPU_GRP_TYPE_NR, nullptr) } // hit any of undesired render node - if (j < ARRAY_SIZE(undesired)) { - drmFreeVersion(version); - close(fd); + if (j < ARRAY_SIZE(undesired)) continue; + + if (!strcmp(version->name, "virtio_gpu")) { + virtio_node_idx = availabe_node; } - if (fallback_fd == -1) - fallback_fd = fd; - - // We have several kinds of virtio-GPU devices: - // - // * virtio-GPU supporting blob feature: normal case implemented by ACRN device - // model in SOS. This kind of device is able to import GEM objects from other - // deivces such as Intel GPUs. Hence, for the sake of performance, we would like - // to allocate scan-out buffers from Intel GPUs because in this way 1) the buffers - // are allowed to reside in local memory if the rendering GPU is a descrete one, - // 2) it's easier to support tiled buffers. Depending on whether allow-p2p feature - // is enabled or not, the devices of this kind can be divided into two subclasses: - // - // * If allow-p2p is not supported, the (physical) display is backed by iGPU; - // * Otherwise, the display is backed by dGPU. - // - // The backing display matters because 1) dGPU scans out buffers if and only if - // the buffers reside in local memory, whereas iGPU scans out system memory - // buffers only, 2) iGPU and dGPU support different set of tiling formats, which - // is a headache if we render with dGPU and display with iGPU and vice versa. - // - // * virtio-GPU not supporting blob feature: QNX hypervisor case and Redhat's use - // case. Being incapable of importing external buffers, scan-out buffers are - // required to be allocated by the virtio-GPU itself. - // - // * virtio-GPU backed by inter-VM shared-memory (ivshmem): inter-VM screen cast use - // case. This kind doesn't support importing external buffers neither, and it's - // needed only when the buffers shall be shared for casting. - int gpu_grp_type_idx = get_gpu_type(fd); - - if (gpu_grp_type_idx != -1 && - !(gpu_grp_type_ & (1ull << gpu_grp_type_idx))) { - gpu_grp_type_ |= (1ull << gpu_grp_type_idx); - driver_fds[gpu_grp_type_idx] = fd; - } else if (fd != fallback_fd) { - close(fd); + if (!strcmp(version->name, "i915")) { + // Prefer i915 for performance consideration. + // + // TODO: We might have multiple i915 devices in the system and in + // this case we are effectively using the one with largest card id + // which is normally the dGPU VF or dGPU passed through device. + renderer_idx = availabe_node; + // Use first available i915 node for video bo alloc + if (video_idx == -1) + video_idx = availabe_node; } + + node_fd[availabe_node] = fd; + int len = snprintf(NULL, 0, "%s", version->name); + node_name[availabe_node] = (char *)malloc(len + 1); + strncpy(node_name[availabe_node], version->name, len + 1); + availabe_node++; + drmFreeVersion(version); } -restart: - for (int i = 0; i < GPU_GRP_TYPE_NR; ++i) { - if (!(gpu_grp_type_ & (1ull << i))) - continue; - if (drivers_[i] != nullptr) { - DRV_DESTROY(drivers_[i]); + if (availabe_node > 0) { + switch (availabe_node) { + // only have one render node, is GVT-d/BM/VirtIO + case 1: + gpu_grp_type = (virtio_node_idx != -1)? ONE_GPU_VIRTIO: ONE_GPU_INTEL; + break; + // is SR-IOV or iGPU + dGPU + case 2: + gpu_grp_type = (virtio_node_idx != -1)? TWO_GPU_IGPU_VIRTIO: TWO_GPU_IGPU_DGPU; + break; + // is SR-IOV + dGPU + case 3: + gpu_grp_type = THREE_GPU_IGPU_VIRTIO_DGPU; + // TO-DO: the 3rd node is i915 or others. + break; } - struct driver *drv = drv_create(driver_fds[i], gpu_grp_type_); - if (!drv) { - drv_loge("failed to init minigbm driver on device of type %d\n", i); - close(driver_fds[i]); - driver_fds[i] = -1; - gpu_grp_type_ &= ~(1ull << i); - goto restart; + + // if no i915 node found + if (renderer_idx == -1) { + if (virtio_node_idx != -1) { + // Fallback to virtio-GPU + video_idx = renderer_idx = virtio_node_idx; + } else { + drv_loge("Weird scenario! Neither of i915 nor virtio-GPU device is" + " found. Use the first deivice.\n"); + video_idx = renderer_idx = 0; + } } - drivers_[i] = drv; - /* We don't use fallback driver at all when we have known device. */ - if (driver_fds[i] == fallback_fd) - fallback_fd = -1; - } + // Create drv + if (!(drv_render_ = drv_create(node_fd[renderer_idx]))) { + drv_loge("Failed to create driver for the render device with card id %d\n", + renderer_idx); + close(node_fd[renderer_idx]); + } + if (video_idx != renderer_idx) { + drv_video_ = drv_create(node_fd[video_idx]); + if (!drv_video_) { + drv_loge("Failed to create driver for the video device with card id %d\n", + video_idx); + close(node_fd[video_idx]); + } + } else { + drv_video_ = drv_render_; + if (!drv_video_) + drv_loge("Failed to create driver for the video device with card id %d\n", + video_idx); + } - if (gpu_grp_type_ == 0) { - drv_loge("No known device found!\n"); - if (fallback_fd >= 0) { - drv_fallback_ = drv_create(fallback_fd, gpu_grp_type_); - drv_render_ = drv_kms_ = drv_video_ = drv_fallback_; + if ((virtio_node_idx != -1) && (virtio_node_idx != renderer_idx)) { + drv_kms_ = drv_create(node_fd[virtio_node_idx]); + if (!drv_kms_) { + drv_loge("Failed to create driver for the virtio-gpu device with card id %d\n", + virtio_node_idx); + close(node_fd[virtio_node_idx]); + drv_kms_ = drv_render_; + } + } else { + drv_kms_ = drv_render_; } - return; - } - if (fallback_fd >= 0) { - close(fallback_fd); - fallback_fd = -1; + // Init drv + DRV_INIT(drv_render_, gpu_grp_type, renderer_idx) + if (video_idx != renderer_idx) + DRV_INIT(drv_video_, gpu_grp_type, video_idx) + if ((virtio_node_idx != -1) && (virtio_node_idx != renderer_idx)) + DRV_INIT(drv_kms_, gpu_grp_type, virtio_node_idx) } - int idx = select_render_driver(gpu_grp_type_); - if (idx != -1) { - drv_render_ = drivers_[idx]; - } - idx = select_kms_driver(gpu_grp_type_); - if (idx != -1) { - drv_kms_ = drivers_[idx]; - } - idx = select_video_driver(gpu_grp_type_); - if (idx != -1) { - drv_video_ = drivers_[idx]; - } - if (gpu_grp_type_ & GPU_GRP_TYPE_HAS_VIRTIO_GPU_IVSHMEM_BIT) { - drv_ivshmem_ = drivers_[GPU_GRP_TYPE_VIRTIO_GPU_IVSHMEM_IDX]; + for (int i = 0; i < availabe_node; i++) { + free(node_name[i]); + if ((i != renderer_idx) && (i != video_idx) && (i != virtio_node_idx)) { + close(node_fd[i]); + } } } @@ -307,16 +282,12 @@ cros_gralloc_driver::~cros_gralloc_driver() { buffers_.clear(); handles_.clear(); - if (gpu_grp_type_ == 0) { - DRV_DESTROY(drv_fallback_); - return; - } - for (int i = 0; i < GPU_GRP_TYPE_NR; ++i) { - if (gpu_grp_type_ & (1ull << i)) { - DRV_DESTROY(drivers_[i]); - } - } + if (drv_video_ != drv_render_) + DRV_DESTROY(drv_video_) + if (drv_kms_ != drv_render_) + DRV_DESTROY(drv_kms_) + DRV_DESTROY(drv_render_) } bool cros_gralloc_driver::is_initialized() @@ -337,39 +308,6 @@ bool cros_gralloc_driver::is_video_format(const struct cros_gralloc_buffer_descr return true; } -bool cros_gralloc_driver::use_ivshm_drv(const struct cros_gralloc_buffer_descriptor *descriptor, bool retain) -{ - // To keep original code logic, when calling retain API, we don't have SCANOUT flag - if (retain) { - return (descriptor->width == IVSH_WIDTH) && - (descriptor->height == IVSH_HEIGHT); - } - - return (descriptor->width == IVSH_WIDTH) && - (descriptor->height == IVSH_HEIGHT) && - (descriptor->use_flags & BO_USE_SCANOUT); -} - -struct driver *cros_gralloc_driver::select_driver(const struct cros_gralloc_buffer_descriptor *descriptor, bool retain) -{ - if (use_ivshm_drv(descriptor, retain)) { - // Give it a chance to re-scan devices. - if (drv_ivshmem_ == nullptr) { - reload(); - } - if (drv_ivshmem_) { - return drv_ivshmem_; - } - } - if (is_video_format(descriptor)) { - return drv_video_; - } - if (descriptor->use_flags & BO_USE_SCANOUT) { - return drv_kms_; - } - return drv_render_; -} - bool cros_gralloc_driver::get_resolved_format_and_use_flags( const struct cros_gralloc_buffer_descriptor *descriptor, uint32_t *out_format, uint64_t *out_use_flags) @@ -378,7 +316,9 @@ bool cros_gralloc_driver::get_resolved_format_and_use_flags( uint64_t resolved_use_flags; struct combination *combo; - struct driver *drv = select_driver(descriptor); + struct driver *drv = is_video_format(descriptor) ? drv_video_ : drv_render_; + if ((descriptor->use_flags & BO_USE_SCANOUT) && !(is_video_format(descriptor))) + drv = drv_kms_; if (mt8183_camera_quirk_ && (descriptor->use_flags & BO_USE_CAMERA_READ) && !(descriptor->use_flags & BO_USE_SCANOUT) && @@ -422,7 +362,9 @@ bool cros_gralloc_driver::is_supported(const struct cros_gralloc_buffer_descript { uint32_t resolved_format; uint64_t resolved_use_flags; - struct driver *drv = select_driver(descriptor); + struct driver *drv = is_video_format(descriptor) ? drv_video_ : drv_render_; + if ((descriptor->use_flags & BO_USE_SCANOUT) && !(is_video_format(descriptor))) + drv = drv_kms_; uint32_t max_texture_size = drv_get_max_texture_2d_size(drv); if (!get_resolved_format_and_use_flags(descriptor, &resolved_format, &resolved_use_flags)) return false; @@ -469,7 +411,12 @@ int32_t cros_gralloc_driver::allocate(const struct cros_gralloc_buffer_descripto struct cros_gralloc_handle *hnd; std::unique_ptr buffer; - struct driver *drv = select_driver(descriptor); + struct driver *drv; + + drv = is_video_format(descriptor) ? drv_video_ : drv_render_; + if ((descriptor->use_flags & BO_USE_SCANOUT) && (!is_video_format(descriptor))) { + drv = drv_kms_; + } if (!get_resolved_format_and_use_flags(descriptor, &resolved_format, &resolved_use_flags)) { ALOGE("Failed to resolve format and use_flags."); @@ -623,7 +570,9 @@ int32_t cros_gralloc_driver::retain(buffer_handle_t handle) .drm_format = hnd->format, .use_flags = hnd->use_flags, }; - drv = select_driver(&descriptor, true); + drv = is_video_format(&descriptor) ? drv_video_ : drv_render_; + if ((hnd->use_flags & BO_USE_SCANOUT) && (!is_video_format(&descriptor))) + drv = drv_kms_; auto hnd_it = handles_.find(hnd); if (hnd_it != handles_.end()) { @@ -932,81 +881,3 @@ void cros_gralloc_driver::with_each_buffer( for (const auto &pair : buffers_) function(pair.second.get()); } - -int cros_gralloc_driver::select_render_driver(uint64_t gpu_grp_type) -{ - if (gpu_grp_type & GPU_GRP_TYPE_HAS_INTEL_DGPU_BIT) { - return GPU_GRP_TYPE_INTEL_DGPU_IDX; - } - if (gpu_grp_type & GPU_GRP_TYPE_HAS_INTEL_IGPU_BIT) { - return GPU_GRP_TYPE_INTEL_IGPU_IDX; - } - if (gpu_grp_type & GPU_GRP_TYPE_HAS_VIRTIO_GPU_BLOB_BIT) { - return GPU_GRP_TYPE_VIRTIO_GPU_BLOB_IDX; - } - if (gpu_grp_type & GPU_GRP_TYPE_HAS_VIRTIO_GPU_BLOB_P2P_BIT) { - return GPU_GRP_TYPE_VIRTIO_GPU_BLOB_P2P_IDX; - } - if (gpu_grp_type & GPU_GRP_TYPE_HAS_VIRTIO_GPU_NO_BLOB_BIT) { - return GPU_GRP_TYPE_VIRTIO_GPU_NO_BLOB_IDX; - } - if (gpu_grp_type & GPU_GRP_TYPE_HAS_VIRTIO_GPU_IVSHMEM_BIT) { - return GPU_GRP_TYPE_VIRTIO_GPU_IVSHMEM_IDX; - } - return -1; -} - -int cros_gralloc_driver::select_kms_driver(uint64_t gpu_grp_type) -{ - // virtio-GPU without blob cannot import external buffers. - if (gpu_grp_type & GPU_GRP_TYPE_HAS_VIRTIO_GPU_NO_BLOB_BIT) { - return GPU_GRP_TYPE_VIRTIO_GPU_NO_BLOB_IDX; - } - // QNX case: virtio-GPU is ivshmem backed device and cannot import external buffers. - // Screen cast also uses ivshmem virtio-GPU but we have virtio-GPU supporting blob. - if ((gpu_grp_type & GPU_GRP_TYPE_HAS_VIRTIO_GPU_IVSHMEM_BIT) && - !(gpu_grp_type & GPU_GRP_TYPE_HAS_VIRTIO_GPU_BLOB_BIT) && - !(gpu_grp_type & GPU_GRP_TYPE_HAS_VIRTIO_GPU_BLOB_P2P_BIT)) { - return GPU_GRP_TYPE_VIRTIO_GPU_IVSHMEM_IDX; - } - if (gpu_grp_type & GPU_GRP_TYPE_HAS_INTEL_DGPU_BIT) { - return GPU_GRP_TYPE_INTEL_DGPU_IDX; - } - if (gpu_grp_type & GPU_GRP_TYPE_HAS_INTEL_IGPU_BIT) { - return GPU_GRP_TYPE_INTEL_IGPU_IDX; - } - if (gpu_grp_type & GPU_GRP_TYPE_HAS_VIRTIO_GPU_BLOB_BIT) { - return GPU_GRP_TYPE_VIRTIO_GPU_BLOB_IDX; - } - if (gpu_grp_type & GPU_GRP_TYPE_HAS_VIRTIO_GPU_BLOB_P2P_BIT) { - return GPU_GRP_TYPE_VIRTIO_GPU_BLOB_P2P_IDX; - } - if (gpu_grp_type & GPU_GRP_TYPE_HAS_VIRTIO_GPU_IVSHMEM_BIT) { - return GPU_GRP_TYPE_VIRTIO_GPU_IVSHMEM_IDX; - } - return -1; -} - -int cros_gralloc_driver::select_video_driver(uint64_t gpu_grp_type) -{ - if (gpu_grp_type & GPU_GRP_TYPE_HAS_INTEL_IGPU_BIT) { - return GPU_GRP_TYPE_INTEL_IGPU_IDX; - } - if (gpu_grp_type & GPU_GRP_TYPE_HAS_INTEL_DGPU_BIT) { - return GPU_GRP_TYPE_INTEL_DGPU_IDX; - } - if (gpu_grp_type & GPU_GRP_TYPE_HAS_VIRTIO_GPU_BLOB_BIT) { - return GPU_GRP_TYPE_VIRTIO_GPU_BLOB_IDX; - } - if (gpu_grp_type & GPU_GRP_TYPE_HAS_VIRTIO_GPU_BLOB_P2P_BIT) { - return GPU_GRP_TYPE_VIRTIO_GPU_BLOB_P2P_IDX; - } - if (gpu_grp_type & GPU_GRP_TYPE_HAS_VIRTIO_GPU_NO_BLOB_BIT) { - return GPU_GRP_TYPE_VIRTIO_GPU_NO_BLOB_IDX; - } - if (gpu_grp_type & GPU_GRP_TYPE_HAS_VIRTIO_GPU_IVSHMEM_BIT) { - return GPU_GRP_TYPE_VIRTIO_GPU_IVSHMEM_IDX; - } - return -1; -} - diff --git a/cros_gralloc/cros_gralloc_driver.h b/cros_gralloc/cros_gralloc_driver.h index cf1ed5b0..befbe8be 100644 --- a/cros_gralloc/cros_gralloc_driver.h +++ b/cros_gralloc/cros_gralloc_driver.h @@ -8,7 +8,6 @@ #define CROS_GRALLOC_DRIVER_H #include "cros_gralloc_buffer.h" -#include "../drv_priv.h" #include #include @@ -16,8 +15,6 @@ #include #include -#include - #if ANDROID_API_LEVEL >= 31 && defined(HAS_DMABUF_SYSTEM_HEAP) #include #endif @@ -64,13 +61,6 @@ class cros_gralloc_driver ~cros_gralloc_driver(); bool is_initialized(); bool is_video_format(const struct cros_gralloc_buffer_descriptor *descriptor); - bool use_ivshm_drv(const struct cros_gralloc_buffer_descriptor *descriptor, bool retain); - static int select_render_driver(uint64_t gpu_grp_type); - static int select_kms_driver(uint64_t gpu_grp_type); - static int select_video_driver(uint64_t gpu_grp_type); - void set_gpu_grp_type(); - struct driver *select_driver(const struct cros_gralloc_buffer_descriptor *descriptor, bool retain = false); - int32_t reload(); cros_gralloc_buffer *get_buffer(cros_gralloc_handle_t hnd); bool get_resolved_format_and_use_flags(const struct cros_gralloc_buffer_descriptor *descriptor, @@ -99,15 +89,7 @@ class cros_gralloc_driver struct driver *drv_render_ = nullptr; struct driver *drv_video_ = nullptr; // the drv_kms_ is used to allocate scanout non-video buffer. - // in dGPU/iGPU SRIOV, BM or dual GPU scenario, the drv_kms_ = drv_render_ struct driver *drv_kms_ = nullptr; - // the drv_ivshmem_ is used to allocate scanout buffer with - // certain resolution(screen cast). - struct driver *drv_ivshmem_ = nullptr; - struct driver *drv_fallback_ = nullptr; - // This owns the drivers. - std::vector drivers_; - uint64_t gpu_grp_type_ = 0; std::mutex mutex_; std::unordered_map> buffers_; std::unordered_map handles_; diff --git a/cros_gralloc/cros_gralloc_helpers.cc b/cros_gralloc/cros_gralloc_helpers.cc index 6ded3880..cb2d1cc9 100644 --- a/cros_gralloc/cros_gralloc_helpers.cc +++ b/cros_gralloc/cros_gralloc_helpers.cc @@ -138,8 +138,8 @@ uint64_t cros_gralloc_convert_usage(uint64_t usage) handle_usage(&usage, GRALLOC_USAGE_HW_RENDER, &use_flags, BO_USE_RENDERING); handle_usage(&usage, GRALLOC_USAGE_HW_2D, &use_flags, BO_USE_RENDERING); /* HWC wants to use display hardware, but can defer to OpenGL. */ - handle_usage(&usage, GRALLOC_USAGE_HW_COMPOSER, &use_flags, BO_USE_TEXTURE); - handle_usage(&usage, GRALLOC_USAGE_PRIVATE_1, &use_flags, BO_USE_SCANOUT); + handle_usage(&usage, GRALLOC_USAGE_HW_COMPOSER, &use_flags, + BO_USE_SCANOUT | BO_USE_TEXTURE); handle_usage(&usage, GRALLOC_USAGE_HW_FB, &use_flags, BO_USE_NONE); /* * This flag potentially covers external display for the normal drivers (i915/rockchip) and diff --git a/drv.c b/drv.c index e8acdf82..9cc2481e 100644 --- a/drv.c +++ b/drv.c @@ -108,7 +108,7 @@ static const struct backend *drv_get_backend(int fd) return NULL; } -struct driver *drv_create(int fd, uint64_t gpu_grp_type) +struct driver *drv_create(int fd) { struct driver *drv; int ret; @@ -124,7 +124,6 @@ struct driver *drv_create(int fd, uint64_t gpu_grp_type) drv->fd = fd; drv->backend = drv_get_backend(fd); - drv->gpu_grp_type = gpu_grp_type; if (!drv->backend) goto free_driver; @@ -147,14 +146,6 @@ struct driver *drv_create(int fd, uint64_t gpu_grp_type) if (!drv->combos) goto free_mappings; - if (drv->backend->init) { - ret = drv->backend->init(drv); - if (ret) { - drv_array_destroy(drv->combos); - goto free_mappings; - } - } - return drv; free_mappings: @@ -170,13 +161,20 @@ struct driver *drv_create(int fd, uint64_t gpu_grp_type) return NULL; } -int drv_set_gpu_grp_type(struct driver *drv, uint64_t type) +int drv_init(struct driver * drv, uint32_t grp_type) { int ret = 0; assert(drv); assert(drv->backend); - drv->gpu_grp_type = type; + drv->gpu_grp_type = grp_type; + if (drv->backend->init) { + ret = drv->backend->init(drv); + if (ret) { + drv_array_destroy(drv->combos); + drv_array_destroy(drv->mappings); + } + } return ret; } @@ -841,16 +839,3 @@ uint32_t drv_get_max_texture_2d_size(struct driver *drv) return UINT32_MAX; } - -bool drv_is_feature_supported(struct driver * drv, uint64_t feature) -{ - bool ret = false; - assert(drv); - assert(drv->backend); - - if (drv->backend->is_feature_supported) { - ret = drv->backend->is_feature_supported(drv, feature); - } - return ret; -} - diff --git a/drv.h b/drv.h index d4d0ff28..3411d032 100644 --- a/drv.h +++ b/drv.h @@ -146,6 +146,7 @@ struct vma { uint32_t map_flags; int32_t refcount; uint32_t map_strides[DRV_MAX_PLANES]; + bool cpu; void *priv; }; @@ -164,9 +165,9 @@ struct mapping { void drv_preload(bool load); -struct driver *drv_create(int fd, uint64_t gpu_grp_type); +struct driver *drv_create(int fd); -int drv_init(struct driver * drv); +int drv_init(struct driver * drv, uint32_t grp_type); void drv_destroy(struct driver *drv); @@ -250,10 +251,6 @@ int drv_resource_info(struct bo *bo, uint32_t strides[DRV_MAX_PLANES], uint32_t drv_get_max_texture_2d_size(struct driver *drv); -int drv_set_gpu_grp_type(struct driver *drv, uint64_t type); - -bool drv_is_feature_supported(struct driver * drv, uint64_t feature); - enum drv_log_level { DRV_LOGV, DRV_LOGD, diff --git a/drv_helpers.c b/drv_helpers.c index 791fd3b4..b36447e1 100644 --- a/drv_helpers.c +++ b/drv_helpers.c @@ -522,6 +522,10 @@ void *drv_dumb_bo_map(struct bo *bo, struct vma *vma, uint32_t map_flags) int drv_bo_munmap(struct bo *bo, struct vma *vma) { + if (vma->cpu) { + free(vma->addr); + vma->addr = NULL; + } return munmap(vma->addr, vma->length); } @@ -614,6 +618,44 @@ bool drv_has_modifier(const uint64_t *list, uint32_t count, uint64_t modifier) return false; } +const u_int16_t ytile_width = 16; +const u_int16_t ytile_heigth = 32; +void one_ytile_to_linear(char *src, char *dst, u_int16_t x, u_int16_t y, u_int16_t width, u_int16_t height, uint32_t offset) +{ + // x and y follow linear + u_int32_t count = x + y * width/ytile_width; + + for (int j = 0; j < ytile_width * ytile_heigth; j += ytile_width) { + memcpy(dst + offset + width * ytile_heigth * y + width * j / ytile_width + x * ytile_width, + src + offset + j + ytile_width * ytile_heigth * count, ytile_width); + } +} + +void * ytiled_to_linear(struct bo_metadata meta, void * src) +{ + void* dst = malloc(meta.total_size); + if (NULL == dst) return NULL; + + memset(dst, 0, meta.total_size); + + u_int16_t height = meta.sizes[0] / meta.strides[0]; + // Y + u_int16_t y_hcount = height / ytile_heigth + (height % ytile_heigth != 0); + for (u_int16_t x = 0; x < meta.strides[0]/ytile_width; x++) { + for (u_int16_t y = 0; y < y_hcount; y++) { + one_ytile_to_linear(src, dst, x, y, meta.strides[0], height, 0); + } + } + // UV + u_int16_t uv_hcount = (height/ytile_heigth/2) + (height % (ytile_heigth*2) != 0); + for (u_int16_t x = 0; x < meta.strides[0]/ytile_width; x++) { + for (u_int16_t y = 0; y < uv_hcount; y++) { + one_ytile_to_linear(src, dst, x, y, meta.strides[0], height/2, meta.sizes[0]); + } + } + + return dst; +} void drv_resolve_format_and_use_flags_helper(struct driver *drv, uint32_t format, uint64_t use_flags, uint32_t *out_format, diff --git a/drv_helpers.h b/drv_helpers.h index f823767f..9794d372 100644 --- a/drv_helpers.h +++ b/drv_helpers.h @@ -10,7 +10,9 @@ #include #include "drv.h" +#include "drv_priv.h" #include "drv_array_helpers.h" +#include #ifndef PAGE_SIZE #define PAGE_SIZE 0x1000 @@ -49,4 +51,8 @@ bool drv_has_modifier(const uint64_t *list, uint32_t count, uint64_t modifier); void drv_resolve_format_and_use_flags_helper(struct driver *drv, uint32_t format, uint64_t use_flags, uint32_t *out_format, uint64_t *out_use_flags); + +void one_ytile_to_linear(char *src, char *dst, u_int16_t x, u_int16_t y, + u_int16_t width, u_int16_t height, uint32_t offset); +void *ytiled_to_linear(struct bo_metadata meta, void * src); #endif diff --git a/drv_priv.h b/drv_priv.h index 95279a0d..c6eadf4b 100644 --- a/drv_priv.h +++ b/drv_priv.h @@ -60,36 +60,21 @@ struct combination { uint64_t use_flags; }; -enum { - GPU_GRP_TYPE_INTEL_IGPU_IDX = 0, - GPU_GRP_TYPE_INTEL_DGPU_IDX = 1, - GPU_GRP_TYPE_VIRTIO_GPU_BLOB_IDX = 2, - // virtio-GPU with allow-p2p feature, implying its display is backed by dGPU - GPU_GRP_TYPE_VIRTIO_GPU_BLOB_P2P_IDX = 3, - GPU_GRP_TYPE_VIRTIO_GPU_NO_BLOB_IDX = 4, - GPU_GRP_TYPE_VIRTIO_GPU_IVSHMEM_IDX = 5, - GPU_GRP_TYPE_NR, +enum CIV_GPU_TYPE { + ONE_GPU_INTEL = 1, + ONE_GPU_VIRTIO, + TWO_GPU_IGPU_VIRTIO, + TWO_GPU_IGPU_DGPU, + THREE_GPU_IGPU_VIRTIO_DGPU }; -#define GPU_GRP_TYPE_HAS_INTEL_IGPU_BIT (1ull << GPU_GRP_TYPE_INTEL_IGPU_IDX) -#define GPU_GRP_TYPE_HAS_INTEL_DGPU_BIT (1ull << GPU_GRP_TYPE_INTEL_DGPU_IDX) -#define GPU_GRP_TYPE_HAS_VIRTIO_GPU_BLOB_BIT (1ull << GPU_GRP_TYPE_VIRTIO_GPU_BLOB_IDX) -#define GPU_GRP_TYPE_HAS_VIRTIO_GPU_BLOB_P2P_BIT (1ull << GPU_GRP_TYPE_VIRTIO_GPU_BLOB_P2P_IDX) -#define GPU_GRP_TYPE_HAS_VIRTIO_GPU_NO_BLOB_BIT (1ull << GPU_GRP_TYPE_VIRTIO_GPU_NO_BLOB_IDX) -#define GPU_GRP_TYPE_HAS_VIRTIO_GPU_IVSHMEM_BIT (1ull << GPU_GRP_TYPE_VIRTIO_GPU_IVSHMEM_IDX) - -#define DRIVER_DEVICE_FEATURE_I915_DGPU (1ull << 1) -#define DRIVER_DEVICE_FEATURE_VIRGL_RESOURCE_BLOB (1ull << 2) -#define DRIVER_DEVICE_FEATURE_VIRGL_QUERY_DEV (1ull << 3) -#define DRIVER_DEVICE_FEATURE_VIRGL_ALLOW_P2P (1ull << 4) - struct driver { int fd; const struct backend *backend; void *priv; pthread_mutex_t buffer_table_lock; void *buffer_table; - uint64_t gpu_grp_type; + uint32_t gpu_grp_type; // enum CIV_GPU_TYPE pthread_mutex_t mappings_lock; struct drv_array *mappings; struct drv_array *combos; @@ -126,7 +111,6 @@ struct backend { int (*resource_info)(struct bo *bo, uint32_t strides[DRV_MAX_PLANES], uint32_t offsets[DRV_MAX_PLANES], uint64_t *format_modifier); uint32_t (*get_max_texture_2d_size)(struct driver *drv); - bool (*is_feature_supported)(struct driver *drv, uint64_t feature); }; // clang-format off diff --git a/external/virtgpu_drm.h b/external/virtgpu_drm.h index c11aa88c..77209009 100644 --- a/external/virtgpu_drm.h +++ b/external/virtgpu_drm.h @@ -85,21 +85,6 @@ struct drm_virtgpu_execbuffer { #define VIRTGPU_PARAM_CREATE_GUEST_HANDLE 8 /* Host OS handle can be created from guest memory. */ #define VIRTGPU_PARAM_RESOURCE_SYNC 9 /* Synchronization resources */ #define VIRTGPU_PARAM_GUEST_VRAM 10 /* All guest allocations happen via virtgpu dedicated heap. */ -#define VIRTGPU_PARAM_QUERY_DEV 11 /* Query the virtio device name. */ -#define VIRTGPU_PARAM_ALLOW_P2P 12 /* Supports P2P, implying its display is backed by dGPU. */ - -#define VIRTGPU_PARAM_3D_FEATURES_BIT (1ull << VIRTGPU_PARAM_3D_FEATURES) -#define VIRTGPU_PARAM_CAPSET_QUERY_FIX_BIT (1ull << VIRTGPU_PARAM_CAPSET_QUERY_FIX) -#define VIRTGPU_PARAM_RESOURCE_BLOB_BIT (1ull << VIRTGPU_PARAM_RESOURCE_BLOB) -#define VIRTGPU_PARAM_HOST_VISIBLE_BIT (1ull << VIRTGPU_PARAM_HOST_VISIBLE) -#define VIRTGPU_PARAM_CROSS_DEVICE_BIT (1ull << VIRTGPU_PARAM_CROSS_DEVICE) -#define VIRTGPU_PARAM_CONTEXT_INIT_BIT (1ull << VIRTGPU_PARAM_CONTEXT_INIT) -#define VIRTGPU_PARAM_SUPPORTED_CAPSET_IDs_BIT (1ull << VIRTGPU_PARAM_SUPPORTED_CAPSET_IDs) -#define VIRTGPU_PARAM_CREATE_GUEST_HANDLE_BIT (1ull << VIRTGPU_PARAM_CREATE_GUEST_HANDLE) -#define VIRTGPU_PARAM_RESOURCE_SYNC_BIT (1ull << VIRTGPU_PARAM_RESOURCE_SYNC) -#define VIRTGPU_PARAM_GUEST_VRAM_BIT (1ull << VIRTGPU_PARAM_GUEST_VRAM) -#define VIRTGPU_PARAM_QUERY_DEV_BIT (1ull << VIRTGPU_PARAM_QUERY_DEV) -#define VIRTGPU_PARAM_ALLOW_P2P_BIT (1ull << VIRTGPU_PARAM_ALLOW_P2P) struct drm_virtgpu_getparam { __u64 param; diff --git a/gbm.c b/gbm.c index e745870f..69ddb7b7 100644 --- a/gbm.c +++ b/gbm.c @@ -56,12 +56,18 @@ PUBLIC struct gbm_device *gbm_create_device(int fd) if (!gbm) return NULL; - gbm->drv = drv_create(fd, 0); + gbm->drv = drv_create(fd); if (!gbm->drv) { free(gbm); return NULL; } + if (drv_init(gbm->drv, 0) != 0) { + drv_destroy(gbm->drv); + free(gbm); + return NULL; + } + return gbm; } diff --git a/i915.c b/i915.c index 02bc6b71..768ff126 100644 --- a/i915.c +++ b/i915.c @@ -4,7 +4,6 @@ * found in the LICENSE file. */ -#include "drv.h" #ifdef DRV_I915 #include @@ -23,13 +22,10 @@ // #include "external/i915_drm.h" #include "util.h" #include "i915_prelim.h" -#include "intel_device.h" #define I915_CACHELINE_SIZE 64 #define I915_CACHELINE_MASK (I915_CACHELINE_SIZE - 1) -#define GEN_VERSION_X10(dev) ((dev)->graphics_version * 10 + (dev)->sub_version) - static bool is_prelim_kernel = false; static const uint32_t scanout_render_formats[] = { DRM_FORMAT_ABGR2101010, DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB2101010, DRM_FORMAT_ARGB8888, @@ -103,19 +99,21 @@ struct modifier_support_t { struct i915_device { uint32_t graphics_version; - uint32_t sub_version; + int32_t has_llc; + int32_t has_hw_protection; struct modifier_support_t modifier; int device_id; + bool is_xelpd; + int32_t has_mmap_offset; + bool has_local_mem; + bool has_fence_reg; struct iris_memregion vram, sys; + bool force_mem_local; + /*TODO : cleanup is_mtl to avoid adding variables for every new platforms */ + bool is_mtl; + int32_t num_fences_avail; uint64_t cursor_width; uint64_t cursor_height; - - uint32_t has_llc : 1; - uint32_t has_hw_protection : 1; - uint32_t is_xelpd : 1; - uint32_t has_mmap_offset : 1; - uint32_t has_local_mem : 1; - uint32_t force_mem_local : 1; }; /* @@ -146,9 +144,149 @@ flags_to_heap(struct i915_device *i915, unsigned flags) } } +static void i915_info_from_device_id(struct i915_device *i915) +{ + const uint16_t gen4_ids[] = { 0x29A2, 0x2992, 0x2982, 0x2972, 0x2A02, 0x2A12, 0x2A42, + 0x2E02, 0x2E12, 0x2E22, 0x2E32, 0x2E42, 0x2E92 }; + const uint16_t gen5_ids[] = { 0x0042, 0x0046 }; + const uint16_t gen6_ids[] = { 0x0102, 0x0112, 0x0122, 0x0106, 0x0116, 0x0126, 0x010A }; + const uint16_t gen7_ids[] = { + 0x0152, 0x0162, 0x0156, 0x0166, 0x015a, 0x016a, 0x0402, 0x0412, 0x0422, + 0x0406, 0x0416, 0x0426, 0x040A, 0x041A, 0x042A, 0x040B, 0x041B, 0x042B, + 0x040E, 0x041E, 0x042E, 0x0C02, 0x0C12, 0x0C22, 0x0C06, 0x0C16, 0x0C26, + 0x0C0A, 0x0C1A, 0x0C2A, 0x0C0B, 0x0C1B, 0x0C2B, 0x0C0E, 0x0C1E, 0x0C2E, + 0x0A02, 0x0A12, 0x0A22, 0x0A06, 0x0A16, 0x0A26, 0x0A0A, 0x0A1A, 0x0A2A, + 0x0A0B, 0x0A1B, 0x0A2B, 0x0A0E, 0x0A1E, 0x0A2E, 0x0D02, 0x0D12, 0x0D22, + 0x0D06, 0x0D16, 0x0D26, 0x0D0A, 0x0D1A, 0x0D2A, 0x0D0B, 0x0D1B, 0x0D2B, + 0x0D0E, 0x0D1E, 0x0D2E, 0x0F31, 0x0F32, 0x0F33, 0x0157, 0x0155 + }; + const uint16_t gen8_ids[] = { 0x22B0, 0x22B1, 0x22B2, 0x22B3, 0x1602, 0x1606, + 0x160A, 0x160B, 0x160D, 0x160E, 0x1612, 0x1616, + 0x161A, 0x161B, 0x161D, 0x161E, 0x1622, 0x1626, + 0x162A, 0x162B, 0x162D, 0x162E }; + const uint16_t gen9_ids[] = { + 0x1902, 0x1906, 0x190A, 0x190B, 0x190E, 0x1912, 0x1913, 0x1915, 0x1916, 0x1917, + 0x191A, 0x191B, 0x191D, 0x191E, 0x1921, 0x1923, 0x1926, 0x1927, 0x192A, 0x192B, + 0x192D, 0x1932, 0x193A, 0x193B, 0x193D, 0x0A84, 0x1A84, 0x1A85, 0x5A84, 0x5A85, + 0x3184, 0x3185, 0x5902, 0x5906, 0x590A, 0x5908, 0x590B, 0x590E, 0x5913, 0x5915, + 0x5917, 0x5912, 0x5916, 0x591A, 0x591B, 0x591D, 0x591E, 0x5921, 0x5923, 0x5926, + 0x5927, 0x593B, 0x591C, 0x87C0, 0x87CA, 0x3E90, 0x3E93, 0x3E99, 0x3E9C, 0x3E91, + 0x3E92, 0x3E96, 0x3E98, 0x3E9A, 0x3E9B, 0x3E94, 0x3EA9, 0x3EA5, 0x3EA6, 0x3EA7, + 0x3EA8, 0x3EA1, 0x3EA4, 0x3EA0, 0x3EA3, 0x3EA2, 0x9B21, 0x9BA0, 0x9BA2, 0x9BA4, + 0x9BA5, 0x9BA8, 0x9BAA, 0x9BAB, 0x9BAC, 0x9B41, 0x9BC0, 0x9BC2, 0x9BC4, 0x9BC5, + 0x9BC6, 0x9BC8, 0x9BCA, 0x9BCB, 0x9BCC, 0x9BE6, 0x9BF6 + }; + const uint16_t gen11_ids[] = { 0x8A50, 0x8A51, 0x8A52, 0x8A53, 0x8A54, 0x8A56, 0x8A57, + 0x8A58, 0x8A59, 0x8A5A, 0x8A5B, 0x8A5C, 0x8A5D, 0x8A71, + 0x4500, 0x4541, 0x4551, 0x4555, 0x4557, 0x4571, 0x4E51, + 0x4E55, 0x4E57, 0x4E61, 0x4E71 }; + const uint16_t gen12_ids[] = { + 0x4c8a, 0x4c8b, 0x4c8c, 0x4c90, 0x4c9a, 0x4680, 0x4681, 0x4682, 0x4683, 0x4688, + 0x4689, 0x4690, 0x4691, 0x4692, 0x4693, 0x4698, 0x4699, 0x4626, 0x4628, 0x462a, + 0x46a0, 0x46a1, 0x46a2, 0x46a3, 0x46a6, 0x46a8, 0x46aa, 0x46b0, 0x46b1, 0x46b2, + 0x46b3, 0x46c0, 0x46c1, 0x46c2, 0x46c3, 0x9A40, 0x9A49, 0x9A59, 0x9A60, 0x9A68, + 0x9A70, 0x9A78, 0x9AC0, 0x9AC9, 0x9AD9, 0x9AF8, 0x4905, 0x4906, 0x4907, 0x4908 + }; + const uint16_t adlp_ids[] = { 0x46A0, 0x46A1, 0x46A2, 0x46A3, 0x46A6, 0x46A8, 0x46AA, + 0x462A, 0x4626, 0x4628, 0x46B0, 0x46B1, 0x46B2, 0x46B3, + 0x46C0, 0x46C1, 0x46C2, 0x46C3, 0x46D0, 0x46D1, 0x46D2 }; + + const uint16_t dg2_ids[] = { // DG2 Val-Only Super-SKU: 4F80 - 4F87 + 0x4F80, 0x4F81, 0x4F82, 0x4F83, 0x4F84, 0x4F85, 0x4F86, 0x4F87, + + // DG2 Desktop Reserved: 56A0 to 56AF + 0x56A0, 0x56A1, 0x56A2, 0x56A3, 0x56A4, 0x56A5, 0x56A6, 0x56A7, + 0x56A8, 0x56A9, 0x56AA, 0x56AB, 0x56AC, 0x56AD, 0x56AE, 0x56AF, + + // DG2 Notebook Reserved: 5690 to 569F + 0x5690, 0x5691, 0x5692, 0x5693, 0x5694, 0x5695, 0x5696, 0x5697, + 0x5698, 0x5699, 0x569A, 0x569B, 0x569C, 0x569D, 0x569E, 0x569F, + + // Workstation Reserved: 56B0 to 56BF + 0x56B0, 0x56B1, 0x56B2, 0x56B3, 0x56B4, 0x56B5, 0x56B6, 0x56B7, + 0x56B8, 0x56B9, 0x56BA, 0x56BB, 0x56BC, 0x56BD, 0x56BE, 0x56BF, + + // Server Reserved: 56C0 to 56CF + 0x56C0, 0x56C1, 0x56C2, 0x56C3, 0x56C4, 0x56C5, 0x56C6, 0x56C7, + 0x56C8, 0x56C9, 0x56CA, 0x56CB, 0x56CC, 0x56CD, 0x56CE, 0x56CF + }; + + const uint16_t rplp_ids[] = { 0xA720, 0xA721, 0xA7A0, 0xA7A1, 0xA7A8, 0xA7A9 }; + + const uint16_t mtl_ids[] = { 0x7D40, 0x7D60, 0x7D45, 0x7D55, 0x7DD5 }; + + unsigned i; + i915->graphics_version = 120; + i915->is_xelpd = false; + i915->is_mtl = false; + /* Gen 4 */ + for (i = 0; i < ARRAY_SIZE(gen4_ids); i++) + if (gen4_ids[i] == i915->device_id) + i915->graphics_version = 40; + + /* Gen 5 */ + for (i = 0; i < ARRAY_SIZE(gen5_ids); i++) + if (gen5_ids[i] == i915->device_id) + i915->graphics_version = 50; + + /* Gen 6 */ + for (i = 0; i < ARRAY_SIZE(gen6_ids); i++) + if (gen6_ids[i] == i915->device_id) + i915->graphics_version = 60; + + /* Gen 7 */ + for (i = 0; i < ARRAY_SIZE(gen7_ids); i++) + if (gen7_ids[i] == i915->device_id) + i915->graphics_version = 70; + + /* Gen 8 */ + for (i = 0; i < ARRAY_SIZE(gen8_ids); i++) + if (gen8_ids[i] == i915->device_id) + i915->graphics_version = 80; + + /* Gen 9 */ + for (i = 0; i < ARRAY_SIZE(gen9_ids); i++) + if (gen9_ids[i] == i915->device_id) + i915->graphics_version = 90; + + /* Gen 11 */ + for (i = 0; i < ARRAY_SIZE(gen11_ids); i++) + if (gen11_ids[i] == i915->device_id) + i915->graphics_version = 110; + + /* Gen 12 */ + for (i = 0; i < ARRAY_SIZE(gen12_ids); i++) + if (gen12_ids[i] == i915->device_id) + i915->graphics_version = 120; + + for (i = 0; i < ARRAY_SIZE(dg2_ids); i++) + if (dg2_ids[i] == i915->device_id) { + i915->graphics_version = 125; + return; + } + + for (i = 0; i < ARRAY_SIZE(adlp_ids); i++) + if (adlp_ids[i] == i915->device_id) { + i915->is_xelpd = true; + i915->graphics_version = 120; + } + + for (i = 0; i < ARRAY_SIZE(rplp_ids); i++) + if (rplp_ids[i] == i915->device_id) { + i915->is_xelpd = true; + i915->graphics_version = 120; + } + + for (i = 0; i < ARRAY_SIZE(mtl_ids); i++) + if (mtl_ids[i] == i915->device_id) { + i915->graphics_version = 120; + i915->is_mtl = true; + } +} + bool i915_has_tile4(struct i915_device *i915) { - return GEN_VERSION_X10(i915) >= 125; + return i915->graphics_version >= 125 || i915->is_mtl; } static void i915_get_modifier_order(struct i915_device *i915) @@ -302,13 +440,13 @@ static int i915_add_combinations(struct driver *drv) drv_add_combinations(drv, linear_source_formats, ARRAY_SIZE(linear_source_formats), &metadata_x_tiled, texture_flags_video | BO_USE_CAMERA_MASK); + if (i915_has_tile4(i915)) { // in dual gpu case, only alloc x-tiling for dgpu for render - if (((drv->gpu_grp_type & GPU_GRP_TYPE_HAS_INTEL_IGPU_BIT) || - (drv->gpu_grp_type & GPU_GRP_TYPE_HAS_VIRTIO_GPU_BLOB_BIT)) - && (GEN_VERSION_X10(i915) == 125)) { + if (((drv->gpu_grp_type == TWO_GPU_IGPU_DGPU) || + (drv->gpu_grp_type == THREE_GPU_IGPU_VIRTIO_DGPU)) + && (i915->graphics_version >= 125)) return 0; - } struct format_metadata metadata_4_tiled = { .tiling = I915_TILING_4, .priority = 3, @@ -338,9 +476,9 @@ static int i915_add_combinations(struct driver *drv) struct format_metadata metadata_y_tiled = { .tiling = I915_TILING_Y, .priority = 3, .modifier = I915_FORMAT_MOD_Y_TILED }; - if ((drv->gpu_grp_type & GPU_GRP_TYPE_HAS_INTEL_DGPU_BIT) || - (drv->gpu_grp_type & GPU_GRP_TYPE_HAS_VIRTIO_GPU_BLOB_P2P_BIT)) { - return 0; + if ((drv->gpu_grp_type == TWO_GPU_IGPU_DGPU) || + (drv->gpu_grp_type == THREE_GPU_IGPU_VIRTIO_DGPU)) { + scanout_and_render_not_linear = unset_flags(scanout_and_render, BO_USE_SCANOUT); } /* Support y-tiled NV12 and P010 for libva */ #ifdef I915_SCANOUT_Y_TILED @@ -377,7 +515,7 @@ static int i915_align_dimensions(struct bo *bo, uint32_t format, uint32_t tiling uint32_t horizontal_alignment = 64; uint32_t vertical_alignment = 4; struct i915_device *i915 = bo->drv->priv; - if (GEN_VERSION_X10(i915) >= 125) { + if (i915->graphics_version >= 125) { horizontal_alignment = 4; vertical_alignment = 4; } @@ -457,12 +595,22 @@ static void i915_clflush(void *start, size_t size) } } +static inline int gen_ioctl(int fd, unsigned long request, void *arg) +{ + int ret; + + do { + ret = ioctl(fd, request, arg); + } while (ret == -1 && (errno == EINTR || errno == EAGAIN)); + return ret; +} + static int gem_param(int fd, int name) { int v = -1; /* No param uses (yet) the sign bit, reserve it for errors */ struct drm_i915_getparam gp = {.param = name, .value = &v }; - if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp)) + if (gen_ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp)) return -1; return v; @@ -585,56 +733,43 @@ static int i915_init(struct driver *drv) { int ret, val; struct i915_device *i915; - struct intel_gpu_info info; + drm_i915_getparam_t get_param = { 0 }; i915 = calloc(1, sizeof(*i915)); if (!i915) return -ENOMEM; - ret = gem_param(drv->fd, I915_PARAM_CHIPSET_ID); - if (ret == -1) { + get_param.param = I915_PARAM_CHIPSET_ID; + get_param.value = &(i915->device_id); + ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param); + if (ret) { drv_loge("Failed to get I915_PARAM_CHIPSET_ID\n"); free(i915); return -EINVAL; } - i915->device_id = ret; - /* must call before i915->graphics_version is used anywhere else */ - memset(&info, 0, sizeof(info)); - ret = intel_gpu_info_from_device_id(i915->device_id, &info); - if (ret != 0) { - drv_loge("%s: Failed to get device info\n", __func__); - free(i915); - return -EINVAL; - } - i915->graphics_version = info.graphics_version; - i915->sub_version = info.sub_version; - i915->is_xelpd = info.is_xelpd; + i915_info_from_device_id(i915); i915_get_modifier_order(i915); - ret = gem_param(drv->fd, I915_PARAM_HAS_LLC); - if (ret == -1) { + memset(&get_param, 0, sizeof(get_param)); + get_param.param = I915_PARAM_HAS_LLC; + get_param.value = &i915->has_llc; + ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param); + if (ret) { drv_loge("Failed to get I915_PARAM_HAS_LLC\n"); free(i915); return -EINVAL; } - i915->has_llc = ret > 0; - ret = gem_param(drv->fd, I915_PARAM_MMAP_GTT_VERSION); - if (ret == -1) { - drv_loge("Failed to get I915_PARAM_MMAP_GTT_VERSION\n"); - free(i915); - return -EINVAL; - } - i915->has_mmap_offset = ret >= 4; + i915->has_mmap_offset = gem_param(drv->fd, I915_PARAM_MMAP_GTT_VERSION) >= 4; + i915->has_fence_reg = gem_param(drv->fd, I915_PARAM_NUM_FENCES_AVAIL) > 0; if (!i915_bo_query_prelim_meminfo(drv, i915)) { i915_bo_query_meminfo(drv, i915); } else { drv_logi("drv: kernel supports prelim\n"); } - #define FORCE_MEM_PROP "sys.icr.gralloc.force_mem" char prop[PROPERTY_VALUE_MAX]; i915->force_mem_local = (i915->vram.size > 0) && @@ -644,8 +779,30 @@ static int i915_init(struct driver *drv) drv_logi("Force to use local memory"); } + memset(&get_param, 0, sizeof(get_param)); + get_param.param = I915_PARAM_NUM_FENCES_AVAIL; + get_param.value = &i915->num_fences_avail; + ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param); + if (ret) { + drv_loge("Failed to get I915_PARAM_NUM_FENCES_AVAIL\n"); + free(i915); + return -EINVAL; + } + + memset(&get_param, 0, sizeof(get_param)); + get_param.param = I915_PARAM_MMAP_GTT_VERSION; + get_param.value = &val; + + ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param); + if (ret) { + drv_loge("Failed to get I915_PARAM_MMAP_GTT_VERSION\n"); + free(i915); + return -EINVAL; + } + i915->has_mmap_offset = (val >= 4); + if (i915->graphics_version >= 12) - i915->has_hw_protection = true; + i915->has_hw_protection = 1; uint64_t width = 0, height = 0; if (drmGetCap(drv->fd, DRM_CAP_CURSOR_WIDTH, &width)) { @@ -1058,7 +1215,7 @@ static int i915_bo_create_from_metadata(struct bo *bo) /* Set/Get tiling ioctl not supported based on fence availability Refer : "https://patchwork.freedesktop.org/patch/325343/" */ - if ((GEN_VERSION_X10(i915) != 125) && (i915->graphics_version != 14)) { + if ((i915->graphics_version != 125) && (i915->is_mtl != true)) { gem_set_tiling.handle = bo->handles[0].u32; gem_set_tiling.tiling_mode = bo->meta.tiling; gem_set_tiling.stride = bo->meta.strides[0]; @@ -1098,7 +1255,7 @@ static int i915_bo_import(struct bo *bo, struct drv_import_fd_data *data) /* Set/Get tiling ioctl not supported based on fence availability Refer : "https://patchwork.freedesktop.org/patch/325343/" */ - if ((GEN_VERSION_X10(i915) != 125) && (i915->graphics_version != 14)) { + if ((i915->graphics_version != 125) && (i915->is_mtl != true)) { /* TODO(gsingh): export modifiers and get rid of backdoor tiling. */ gem_get_tiling.handle = bo->handles[0].u32; @@ -1120,6 +1277,7 @@ static void *i915_bo_map(struct bo *bo, struct vma *vma, uint32_t map_flags) int ret; void *addr = MAP_FAILED; struct i915_device *i915 = bo->drv->priv; + vma->cpu = false; if ((bo->meta.format_modifier == I915_FORMAT_MOD_Y_TILED_CCS) || (bo->meta.format_modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS)) @@ -1143,7 +1301,7 @@ static void *i915_bo_map(struct bo *bo, struct vma *vma, uint32_t map_flags) } /* Get the fake offset back */ - int ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP_OFFSET, &mmap_arg); + int ret = gen_ioctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP_OFFSET, &mmap_arg); if (ret != 0 && mmap_arg.flags == I915_MMAP_OFFSET_FIXED) { if ((bo->meta.use_flags & BO_USE_SCANOUT) && !(bo->meta.use_flags & @@ -1153,7 +1311,7 @@ static void *i915_bo_map(struct bo *bo, struct vma *vma, uint32_t map_flags) mmap_arg.flags = I915_MMAP_OFFSET_WB; } - ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP_OFFSET, &mmap_arg); + ret = gen_ioctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP_OFFSET, &mmap_arg); } if (ret != 0) { @@ -1162,9 +1320,26 @@ static void *i915_bo_map(struct bo *bo, struct vma *vma, uint32_t map_flags) return MAP_FAILED; } + drv_logi("%s : %d : handle = %x, size = %zd, mmpa_arg.offset = %llx", __func__, + __LINE__, mmap_arg.handle, bo->meta.total_size, mmap_arg.offset); + /* And map it */ addr = mmap(0, bo->meta.total_size, PROT_READ | PROT_WRITE, MAP_SHARED, bo->drv->fd, mmap_arg.offset); + + // TODO: GEM_MMAP_OFFSET cannot convert ytiled to linear, we have to convert it manually. + // Other formats(e.g. I915_TILING_X) should also be converted. + if ((bo->meta.use_flags & (BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN)) && + (bo->meta.tiling == I915_TILING_Y)) { + void* tmp_addr = ytiled_to_linear(bo->meta, addr); + + if (NULL != tmp_addr) { + // release original one and replace it with a linear address. + munmap(addr, bo->meta.total_size); + addr = tmp_addr; + vma->cpu = true; + } + } } else if (bo->meta.tiling == I915_TILING_NONE) { struct drm_i915_gem_mmap gem_map = { 0 }; /* TODO(b/118799155): We don't seem to have a good way to @@ -1241,7 +1416,7 @@ static int i915_bo_invalidate(struct bo *bo, struct mapping *mapping) struct drm_i915_gem_set_domain set_domain = { 0 }; struct i915_device *i915_dev = (struct i915_device *)bo->drv->priv; - if (GEN_VERSION_X10(i915_dev) != 125) { + if (i915_dev->graphics_version != 125) { set_domain.handle = bo->handles[0].u32; if (bo->meta.tiling == I915_TILING_NONE) { set_domain.read_domains = I915_GEM_DOMAIN_CPU; @@ -1272,18 +1447,6 @@ static int i915_bo_flush(struct bo *bo, struct mapping *mapping) return 0; } -static bool i915_is_feature_supported(struct driver *drv, uint64_t feature) -{ - struct i915_device *i915 = drv->priv; - switch (feature) { - case DRIVER_DEVICE_FEATURE_I915_DGPU: - return i915->has_local_mem; - default: - return false; - } - return false; -} - const struct backend backend_i915 = { .name = "i915", .init = i915_init, @@ -1298,7 +1461,6 @@ const struct backend backend_i915 = { .bo_flush = i915_bo_flush, .resolve_format_and_use_flags = drv_resolve_format_and_use_flags_helper, .num_planes_from_modifier = i915_num_planes_from_modifier, - .is_feature_supported = i915_is_feature_supported, }; #endif diff --git a/intel_device.c b/intel_device.c deleted file mode 100644 index 34fed26a..00000000 --- a/intel_device.c +++ /dev/null @@ -1,316 +0,0 @@ -// Copyright (c) 2024 Intel Corporation -// -// Permission is hereby granted, free of charge, to any person obtaining a copy -// of this software and associated documentation files (the "Software"), to deal -// in the Software without restriction, including without limitation the rights -// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -// copies of the Software, and to permit persons to whom the Software is -// furnished to do so, subject to the following conditions: -// -// The above copyright notice and this permission notice shall be included in all -// copies or substantial portions of the Software. -// -// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE -// SOFTWARE. - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "external/virtgpu_drm.h" - -#include "intel_device.h" - -#define ARRAY_SIZE(A) (sizeof(A) / sizeof(*(A))) - -#define GEN_VERSION_X10(dev) ((dev)->graphics_version * 10 + (dev)->sub_version) - -#define VIRTGPU_PARAM_QUERY_DEV 11 /* Query the virtio device name. */ -#define VIRTGPU_PARAM_ALLOW_P2P 12 - -static int gem_param(int fd, int name) -{ - int v = -1; /* No param uses (yet) the sign bit, reserve it for errors */ - - struct drm_i915_getparam gp = { .param = name, .value = &v }; - if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp)) - return -1; - - return v; -} - -int intel_gpu_info_from_device_id(uint16_t device_id, struct intel_gpu_info *i915) -{ - const uint16_t gen4_ids[] = { 0x29A2, 0x2992, 0x2982, 0x2972, 0x2A02, 0x2A12, 0x2A42, - 0x2E02, 0x2E12, 0x2E22, 0x2E32, 0x2E42, 0x2E92 }; - const uint16_t gen5_ids[] = { 0x0042, 0x0046 }; - const uint16_t gen6_ids[] = { 0x0102, 0x0112, 0x0122, 0x0106, 0x0116, 0x0126, 0x010A }; - const uint16_t gen7_ids[] = { - 0x0152, 0x0162, 0x0156, 0x0166, 0x015a, 0x016a, 0x0402, 0x0412, 0x0422, - 0x0406, 0x0416, 0x0426, 0x040A, 0x041A, 0x042A, 0x040B, 0x041B, 0x042B, - 0x040E, 0x041E, 0x042E, 0x0C02, 0x0C12, 0x0C22, 0x0C06, 0x0C16, 0x0C26, - 0x0C0A, 0x0C1A, 0x0C2A, 0x0C0B, 0x0C1B, 0x0C2B, 0x0C0E, 0x0C1E, 0x0C2E, - 0x0A02, 0x0A12, 0x0A22, 0x0A06, 0x0A16, 0x0A26, 0x0A0A, 0x0A1A, 0x0A2A, - 0x0A0B, 0x0A1B, 0x0A2B, 0x0A0E, 0x0A1E, 0x0A2E, 0x0D02, 0x0D12, 0x0D22, - 0x0D06, 0x0D16, 0x0D26, 0x0D0A, 0x0D1A, 0x0D2A, 0x0D0B, 0x0D1B, 0x0D2B, - 0x0D0E, 0x0D1E, 0x0D2E, 0x0F31, 0x0F32, 0x0F33, 0x0157, 0x0155 - }; - const uint16_t gen8_ids[] = { 0x22B0, 0x22B1, 0x22B2, 0x22B3, 0x1602, 0x1606, - 0x160A, 0x160B, 0x160D, 0x160E, 0x1612, 0x1616, - 0x161A, 0x161B, 0x161D, 0x161E, 0x1622, 0x1626, - 0x162A, 0x162B, 0x162D, 0x162E }; - const uint16_t gen9_ids[] = { - 0x1902, 0x1906, 0x190A, 0x190B, 0x190E, 0x1912, 0x1913, 0x1915, 0x1916, 0x1917, - 0x191A, 0x191B, 0x191D, 0x191E, 0x1921, 0x1923, 0x1926, 0x1927, 0x192A, 0x192B, - 0x192D, 0x1932, 0x193A, 0x193B, 0x193D, 0x0A84, 0x1A84, 0x1A85, 0x5A84, 0x5A85, - 0x3184, 0x3185, 0x5902, 0x5906, 0x590A, 0x5908, 0x590B, 0x590E, 0x5913, 0x5915, - 0x5917, 0x5912, 0x5916, 0x591A, 0x591B, 0x591D, 0x591E, 0x5921, 0x5923, 0x5926, - 0x5927, 0x593B, 0x591C, 0x87C0, 0x87CA, 0x3E90, 0x3E93, 0x3E99, 0x3E9C, 0x3E91, - 0x3E92, 0x3E96, 0x3E98, 0x3E9A, 0x3E9B, 0x3E94, 0x3EA9, 0x3EA5, 0x3EA6, 0x3EA7, - 0x3EA8, 0x3EA1, 0x3EA4, 0x3EA0, 0x3EA3, 0x3EA2, 0x9B21, 0x9BA0, 0x9BA2, 0x9BA4, - 0x9BA5, 0x9BA8, 0x9BAA, 0x9BAB, 0x9BAC, 0x9B41, 0x9BC0, 0x9BC2, 0x9BC4, 0x9BC5, - 0x9BC6, 0x9BC8, 0x9BCA, 0x9BCB, 0x9BCC, 0x9BE6, 0x9BF6 - }; - const uint16_t gen11_ids[] = { 0x8A50, 0x8A51, 0x8A52, 0x8A53, 0x8A54, 0x8A56, 0x8A57, - 0x8A58, 0x8A59, 0x8A5A, 0x8A5B, 0x8A5C, 0x8A5D, 0x8A71, - 0x4500, 0x4541, 0x4551, 0x4555, 0x4557, 0x4571, 0x4E51, - 0x4E55, 0x4E57, 0x4E61, 0x4E71 }; - const uint16_t gen12_ids[] = { - 0x4c8a, 0x4c8b, 0x4c8c, 0x4c90, 0x4c9a, 0x4680, 0x4681, 0x4682, 0x4683, 0x4688, - 0x4689, 0x4690, 0x4691, 0x4692, 0x4693, 0x4698, 0x4699, 0x4626, 0x4628, 0x462a, - 0x46a0, 0x46a1, 0x46a2, 0x46a3, 0x46a6, 0x46a8, 0x46aa, 0x46b0, 0x46b1, 0x46b2, - 0x46b3, 0x46c0, 0x46c1, 0x46c2, 0x46c3, 0x9A40, 0x9A49, 0x9A59, 0x9A60, 0x9A68, - 0x9A70, 0x9A78, 0x9AC0, 0x9AC9, 0x9AD9, 0x9AF8, 0x4905, 0x4906, 0x4907, 0x4908 - }; - const uint16_t adlp_ids[] = { 0x46A0, 0x46A1, 0x46A2, 0x46A3, 0x46A6, 0x46A8, 0x46AA, - 0x462A, 0x4626, 0x4628, 0x46B0, 0x46B1, 0x46B2, 0x46B3, - 0x46C0, 0x46C1, 0x46C2, 0x46C3, 0x46D0, 0x46D1, 0x46D2, - 0x46D3, 0x46D4 }; - - const uint16_t dg2_ids[] = { // DG2 Val-Only Super-SKU: 4F80 - 4F87 - 0x4F80, 0x4F81, 0x4F82, 0x4F83, 0x4F84, 0x4F85, 0x4F86, 0x4F87, - - // DG2 Desktop Reserved: 56A0 to 56AF - 0x56A0, 0x56A1, 0x56A2, 0x56A3, 0x56A4, 0x56A5, 0x56A6, 0x56A7, - 0x56A8, 0x56A9, 0x56AA, 0x56AB, 0x56AC, 0x56AD, 0x56AE, 0x56AF, - - // DG2 Notebook Reserved: 5690 to 569F - 0x5690, 0x5691, 0x5692, 0x5693, 0x5694, 0x5695, 0x5696, 0x5697, - 0x5698, 0x5699, 0x569A, 0x569B, 0x569C, 0x569D, 0x569E, 0x569F, - - // Workstation Reserved: 56B0 to 56BF - 0x56B0, 0x56B1, 0x56B2, 0x56B3, 0x56B4, 0x56B5, 0x56B6, 0x56B7, - 0x56B8, 0x56B9, 0x56BA, 0x56BB, 0x56BC, 0x56BD, 0x56BE, 0x56BF, - - // Server Reserved: 56C0 to 56CF - 0x56C0, 0x56C1, 0x56C2, 0x56C3, 0x56C4, 0x56C5, 0x56C6, 0x56C7, - 0x56C8, 0x56C9, 0x56CA, 0x56CB, 0x56CC, 0x56CD, 0x56CE, 0x56CF - }; - - const uint16_t rplp_ids[] = { 0xA720, 0xA721, 0xA7A0, 0xA7A1, 0xA7A8, 0xA7A9 }; - - const uint16_t mtl_ids[] = { 0x7D40, 0x7D60, 0x7D45, 0x7D55, 0x7DD5 }; - - unsigned i; - /* Gen 4 */ - for (i = 0; i < ARRAY_SIZE(gen4_ids); i++) - if (gen4_ids[i] == device_id) { - i915->graphics_version = 4; - i915->sub_version = 0; - i915->is_xelpd = false; - return 0; - } - - /* Gen 5 */ - for (i = 0; i < ARRAY_SIZE(gen5_ids); i++) - if (gen5_ids[i] == device_id) { - i915->graphics_version = 5; - i915->sub_version = 0; - i915->is_xelpd = false; - return 0; - } - - /* Gen 6 */ - for (i = 0; i < ARRAY_SIZE(gen6_ids); i++) - if (gen6_ids[i] == device_id) { - i915->graphics_version = 6; - i915->sub_version = 0; - i915->is_xelpd = false; - return 0; - } - - /* Gen 7 */ - for (i = 0; i < ARRAY_SIZE(gen7_ids); i++) - if (gen7_ids[i] == device_id) { - i915->graphics_version = 7; - return 0; - } - - /* Gen 8 */ - for (i = 0; i < ARRAY_SIZE(gen8_ids); i++) - if (gen8_ids[i] == device_id) { - i915->graphics_version = 8; - i915->sub_version = 0; - i915->is_xelpd = false; - return 0; - } - - /* Gen 9 */ - for (i = 0; i < ARRAY_SIZE(gen9_ids); i++) - if (gen9_ids[i] == device_id) { - i915->graphics_version = 9; - i915->sub_version = 0; - i915->is_xelpd = false; - return 0; - } - - /* Gen 11 */ - for (i = 0; i < ARRAY_SIZE(gen11_ids); i++) - if (gen11_ids[i] == device_id) { - i915->graphics_version = 11; - i915->sub_version = 0; - i915->is_xelpd = false; - return 0; - } - - /* Gen 12 */ - for (i = 0; i < ARRAY_SIZE(gen12_ids); i++) - if (gen12_ids[i] == device_id) { - i915->graphics_version = 12; - i915->sub_version = 0; - i915->is_xelpd = false; - return 0; - } - - for (i = 0; i < ARRAY_SIZE(dg2_ids); i++) - if (dg2_ids[i] == device_id) { - i915->graphics_version = 12; - i915->sub_version = 5; - i915->is_xelpd = false; - return 0; - } - - for (i = 0; i < ARRAY_SIZE(adlp_ids); i++) - if (adlp_ids[i] == device_id) { - i915->graphics_version = 12; - i915->sub_version = 0; - i915->is_xelpd = true; - return 0; - } - - for (i = 0; i < ARRAY_SIZE(rplp_ids); i++) - if (rplp_ids[i] == device_id) { - i915->graphics_version = 12; - i915->sub_version = 0; - i915->is_xelpd = true; - return 0; - } - - for (i = 0; i < ARRAY_SIZE(mtl_ids); i++) - if (mtl_ids[i] == device_id) { - i915->graphics_version = 14; - i915->sub_version = 0; - i915->is_xelpd = false; - return 0; - } - - return -1; -} - -bool isIntelDg2(int fd) -{ - int ret; - uint16_t device_id; - struct intel_gpu_info info; - - ret = gem_param(fd, I915_PARAM_CHIPSET_ID); - if (ret == -1) { - return false; - } - device_id = (uint16_t)ret; - ret = intel_gpu_info_from_device_id(device_id, &info); - return GEN_VERSION_X10(&info) == 125; -} - -bool isVirtioGpuAllowP2p(int virtgpu_fd) -{ - struct drm_virtgpu_getparam get_param = { 0, 0 }; - uint64_t value = 0; - get_param.param = VIRTGPU_PARAM_ALLOW_P2P; - get_param.value = (__u64)&value; - int ret = drmIoctl(virtgpu_fd, DRM_IOCTL_VIRTGPU_GETPARAM, &get_param); - if (ret || value != 1) { - return false; - } - return true; -} - -bool isVirtioGpuPciDevice(int virtgpu_fd) -{ - struct drm_virtgpu_getparam get_param = { 0, 0 }; - uint64_t value = 0; - get_param.param = VIRTGPU_PARAM_QUERY_DEV; - get_param.value = (__u64)&value; - int ret = drmIoctl(virtgpu_fd, DRM_IOCTL_VIRTGPU_GETPARAM, &get_param); - if (ret || value != 1) { - return false; - } - return true; -} - -bool isVirtioGpuWithBlob(int virtgpu_fd) -{ - struct drm_virtgpu_getparam get_param = { 0, 0 }; - uint64_t value = 0; - get_param.param = VIRTGPU_PARAM_RESOURCE_BLOB; - get_param.value = (__u64)&value; - int ret = drmIoctl(virtgpu_fd, DRM_IOCTL_VIRTGPU_GETPARAM, &get_param); - if (ret || value != 1) { - return false; - } - return true; -} - -int get_gpu_type(int fd) -{ - int type = -1; - drmVersionPtr version = drmGetVersion(fd); - if (version == NULL) { - return type; - } - if (strcmp(version->name, "i915") == 0 || strcmp(version->name, "xe") == 0) { - if (isIntelDg2(fd)) { - type = GPU_GRP_TYPE_INTEL_DGPU_IDX; - } else { - type = GPU_GRP_TYPE_INTEL_IGPU_IDX; - } - } else if (strcmp(version->name, "virtio_gpu") == 0) { - if (!isVirtioGpuPciDevice(fd)) { - type = GPU_GRP_TYPE_VIRTIO_GPU_IVSHMEM_IDX; - } else { - if (!isVirtioGpuWithBlob(fd)) { - type = GPU_GRP_TYPE_VIRTIO_GPU_NO_BLOB_IDX; - } else { - if (isVirtioGpuAllowP2p(fd)) { - type = GPU_GRP_TYPE_VIRTIO_GPU_BLOB_P2P_IDX; - } else { - type = GPU_GRP_TYPE_VIRTIO_GPU_BLOB_IDX; - } - } - } - } - drmFreeVersion(version); - return type; -} - diff --git a/intel_device.h b/intel_device.h deleted file mode 100644 index 6d4ce218..00000000 --- a/intel_device.h +++ /dev/null @@ -1,52 +0,0 @@ -// Copyright (c) 2024 Intel Corporation -// -// Permission is hereby granted, free of charge, to any person obtaining a copy -// of this software and associated documentation files (the "Software"), to deal -// in the Software without restriction, including without limitation the rights -// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -// copies of the Software, and to permit persons to whom the Software is -// furnished to do so, subject to the following conditions: -// -// The above copyright notice and this permission notice shall be included in all -// copies or substantial portions of the Software. -// -// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE -// SOFTWARE. - -#pragma once - -#ifndef INTEL_DEVICE_ -#define INTEL_DEVICE_ - -#ifdef __cplusplus -extern "C" { -#endif - -#include -#include - -struct intel_gpu_info { - int graphics_version; - int sub_version; - bool is_xelpd; -}; - -int intel_gpu_info_from_device_id(uint16_t device_id, struct intel_gpu_info *info); - -bool isIntelDg2(int fd); -bool isVirtioGpuAllowP2p(int virtgpu_fd); -bool isVirtioGpuPciDevice(int virtgpu_fd); -bool isVirtioGpuWithBlob(int virtgpu_fd); - -int get_gpu_type(int fd); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/minigbm_helpers.c b/minigbm_helpers.c index 1e5a5256..d1da7c44 100644 --- a/minigbm_helpers.c +++ b/minigbm_helpers.c @@ -119,8 +119,7 @@ static int detect_device_info(unsigned int detect_flags, int fd, struct gbm_devi drmModeFreeResources(resources); } - if ((strncmp("i915", version->name, version->name_len) == 0) || - (strncmp("xe", version->name, version->name_len) == 0)) { + if (strncmp("i915", version->name, version->name_len) == 0) { /* * Detect Intel dGPU here when special getparam ioctl is added. */ diff --git a/virtgpu.c b/virtgpu.c index bec7814e..2f4b8dbc 100644 --- a/virtgpu.c +++ b/virtgpu.c @@ -16,6 +16,20 @@ #include "util.h" #include "virtgpu.h" +#define PARAM(x) \ + (struct virtgpu_param) \ + { \ + x, #x, 0 \ + } + +struct virtgpu_param params[] = { + PARAM(VIRTGPU_PARAM_3D_FEATURES), PARAM(VIRTGPU_PARAM_CAPSET_QUERY_FIX), + PARAM(VIRTGPU_PARAM_RESOURCE_BLOB), PARAM(VIRTGPU_PARAM_HOST_VISIBLE), + PARAM(VIRTGPU_PARAM_CROSS_DEVICE), PARAM(VIRTGPU_PARAM_CONTEXT_INIT), + PARAM(VIRTGPU_PARAM_SUPPORTED_CAPSET_IDs), PARAM(VIRTGPU_PARAM_CREATE_GUEST_HANDLE), + PARAM(VIRTGPU_PARAM_RESOURCE_SYNC), PARAM(VIRTGPU_PARAM_GUEST_VRAM), +}; + extern const struct backend virtgpu_virgl; extern const struct backend virtgpu_cross_domain; diff --git a/virtgpu.h b/virtgpu.h index f6b98236..3f68731f 100644 --- a/virtgpu.h +++ b/virtgpu.h @@ -4,32 +4,10 @@ * found in the LICENSE file. */ -#ifndef __VIRTGPU_H__ -#define __VIRTGPU_H__ - -#include "drv_priv.h" -#include "external/virtgpu_drm.h" -#include "util.h" - -#define PARAM(x) \ - (struct virtgpu_param) \ - { \ - x, #x, 0 \ - } - struct virtgpu_param { - uint64_t param; - const char *name; - uint32_t value; -}; - -static struct virtgpu_param params[] = { - PARAM(VIRTGPU_PARAM_3D_FEATURES), PARAM(VIRTGPU_PARAM_CAPSET_QUERY_FIX), - PARAM(VIRTGPU_PARAM_RESOURCE_BLOB), PARAM(VIRTGPU_PARAM_HOST_VISIBLE), - PARAM(VIRTGPU_PARAM_CROSS_DEVICE), PARAM(VIRTGPU_PARAM_CONTEXT_INIT), - PARAM(VIRTGPU_PARAM_SUPPORTED_CAPSET_IDs), PARAM(VIRTGPU_PARAM_CREATE_GUEST_HANDLE), - PARAM(VIRTGPU_PARAM_RESOURCE_SYNC), PARAM(VIRTGPU_PARAM_GUEST_VRAM), - PARAM(VIRTGPU_PARAM_QUERY_DEV), PARAM(VIRTGPU_PARAM_ALLOW_P2P), + uint64_t param; + const char *name; + uint32_t value; }; enum virtgpu_param_id { @@ -45,5 +23,3 @@ enum virtgpu_param_id { param_guest_vram, param_max, }; - -#endif diff --git a/virtgpu_virgl.c b/virtgpu_virgl.c index ed6890e5..9474c405 100644 --- a/virtgpu_virgl.c +++ b/virtgpu_virgl.c @@ -58,7 +58,6 @@ struct virgl_priv { union virgl_caps caps; int host_gbm_enabled; atomic_int next_blob_id; - uint64_t dev_feature; }; static uint32_t translate_format(uint32_t drm_fourcc) @@ -597,29 +596,6 @@ static int virgl_init(struct driver *drv) virgl_init_params_and_caps(drv); - struct virgl_priv *prv = (struct virgl_priv *)drv->priv; - - prv->dev_feature = 0; - - for (uint32_t i = 0; i < ARRAY_SIZE(params); i++) { - struct drm_virtgpu_getparam get_param = { 0 }; - - get_param.param = params[i].param; - get_param.value = (uint64_t)(uintptr_t)¶ms[i].value; - int ret = drmIoctl(drv->fd, DRM_IOCTL_VIRTGPU_GETPARAM, &get_param); - if (ret == 0) { - if ((strcmp(params[i].name, "VIRTGPU_PARAM_QUERY_DEV") == 0) && (params[i].value == 1)) { - prv->dev_feature |= VIRTGPU_PARAM_QUERY_DEV_BIT; - } - if ((strcmp(params[i].name, "VIRTGPU_PARAM_RESOURCE_BLOB") == 0) && (params[i].value == 1)) { - prv->dev_feature |= VIRTGPU_PARAM_RESOURCE_BLOB_BIT; - } - if ((strcmp(params[i].name, "VIRTGPU_PARAM_ALLOW_P2P") == 0) && (params[i].value == 1)) { - prv->dev_feature |= VIRTGPU_PARAM_RESOURCE_BLOB_BIT; - } - } - } - if (params[param_3d].value) { /* This doesn't mean host can scanout everything, it just means host * hypervisor can show it. */ @@ -1181,24 +1157,6 @@ static uint32_t virgl_get_max_texture_2d_size(struct driver *drv) return VIRGL_2D_MAX_TEXTURE_2D_SIZE; } -static bool virgl_is_feature_supported(struct driver *drv, uint64_t feature) { - struct virgl_priv *prv = (struct virgl_priv *)drv->priv; - switch (feature) { - case DRIVER_DEVICE_FEATURE_VIRGL_RESOURCE_BLOB: - feature = VIRTGPU_PARAM_RESOURCE_BLOB_BIT; - break; - case DRIVER_DEVICE_FEATURE_VIRGL_QUERY_DEV: - feature = VIRTGPU_PARAM_QUERY_DEV_BIT; - break; - case DRIVER_DEVICE_FEATURE_VIRGL_ALLOW_P2P: - feature = VIRTGPU_PARAM_ALLOW_P2P_BIT; - break; - default: - return false; - } - return !!(prv->dev_feature & feature); -} - const struct backend virtgpu_virgl = { .name = "virtgpu_virgl", .init = virgl_init, .close = virgl_close, @@ -1213,5 +1171,4 @@ const struct backend virtgpu_virgl = { .name = "virtgpu_virgl", .resolve_format_and_use_flags = virgl_resolve_format_and_use_flags, .resource_info = virgl_resource_info, - .get_max_texture_2d_size = virgl_get_max_texture_2d_size, - .is_feature_supported = virgl_is_feature_supported, }; + .get_max_texture_2d_size = virgl_get_max_texture_2d_size }; diff --git a/xe.c b/xe.c index b9c09c69..7314d5ea 100644 --- a/xe.c +++ b/xe.c @@ -101,7 +101,7 @@ static void xe_info_from_device_id(struct xe_device *xe) const uint16_t lnl_ids[] = { 0x6420, 0x64A0, 0x64B0}; - const uint16_t ptl_ids[] = { 0xB080, 0xB090, 0xB0A0, 0xB0B0, 0xB0FF}; + const uint16_t ptl_ids[] = { 0xB080, 0xB090, 0xB0A0, 0xB0FF}; unsigned i; xe->graphics_version = 0; @@ -198,8 +198,8 @@ static int xe_add_combinations(struct driver *drv) /* IPU3 camera ISP supports only NV12 output. */ drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata_linear, BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_SCANOUT | - BO_USE_HW_VIDEO_DECODER | BO_USE_HW_VIDEO_ENCODER | - hw_protected); + BO_USE_HW_VIDEO_DECODER | BO_USE_HW_VIDEO_ENCODER | + hw_protected); /* Android CTS tests require this. */ drv_add_combination(drv, DRM_FORMAT_BGR888, &metadata_linear, BO_USE_SW_MASK); @@ -213,23 +213,24 @@ static int xe_add_combinations(struct driver *drv) BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_HW_VIDEO_DECODER | BO_USE_HW_VIDEO_ENCODER | BO_USE_GPU_DATA_BUFFER | BO_USE_SENSOR_DIRECT_DATA); - drv_modify_combination(drv, DRM_FORMAT_ABGR8888, &metadata_linear, BO_USE_CURSOR | BO_USE_SCANOUT); - drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata_linear, - BO_USE_RENDERING | BO_USE_TEXTURE | BO_USE_CAMERA_MASK); - drv_modify_combination(drv, DRM_FORMAT_YUYV, &metadata_linear, - BO_USE_TEXTURE | BO_USE_CAMERA_MASK | BO_USE_RENDERING); - drv_modify_combination(drv, DRM_FORMAT_VYUY, &metadata_linear, - BO_USE_TEXTURE | BO_USE_CAMERA_MASK | BO_USE_RENDERING); - drv_modify_combination(drv, DRM_FORMAT_UYVY, &metadata_linear, - BO_USE_TEXTURE | BO_USE_CAMERA_MASK | BO_USE_RENDERING); - drv_modify_combination(drv, DRM_FORMAT_YVYU, &metadata_linear, - BO_USE_TEXTURE | BO_USE_CAMERA_MASK | BO_USE_RENDERING); - drv_modify_combination(drv, DRM_FORMAT_YVU420_ANDROID, &metadata_linear, - BO_USE_TEXTURE | BO_USE_CAMERA_MASK); - - /* Media/Camera expect these formats support. */ - drv_add_combinations(drv, linear_source_formats, ARRAY_SIZE(linear_source_formats), - &metadata_linear, texture_flags | BO_USE_CAMERA_MASK); + drv_modify_combination(drv, DRM_FORMAT_ABGR8888, &metadata_linear, BO_USE_CURSOR | BO_USE_SCANOUT); + drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata_linear, + BO_USE_RENDERING | BO_USE_TEXTURE | BO_USE_CAMERA_MASK); + drv_modify_combination(drv, DRM_FORMAT_YUYV, &metadata_linear, + BO_USE_TEXTURE | BO_USE_CAMERA_MASK | BO_USE_RENDERING); + drv_modify_combination(drv, DRM_FORMAT_VYUY, &metadata_linear, + BO_USE_TEXTURE | BO_USE_CAMERA_MASK | BO_USE_RENDERING); + drv_modify_combination(drv, DRM_FORMAT_UYVY, &metadata_linear, + BO_USE_TEXTURE | BO_USE_CAMERA_MASK | BO_USE_RENDERING); + drv_modify_combination(drv, DRM_FORMAT_YVYU, &metadata_linear, + BO_USE_TEXTURE | BO_USE_CAMERA_MASK | BO_USE_RENDERING); + drv_modify_combination(drv, DRM_FORMAT_YVU420_ANDROID, &metadata_linear, + BO_USE_TEXTURE | BO_USE_CAMERA_MASK); + + /* Media/Camera expect these formats support. */ + drv_add_combinations(drv, linear_source_formats, ARRAY_SIZE(linear_source_formats), + &metadata_linear, texture_flags | BO_USE_CAMERA_MASK); + const uint64_t render_not_linear = unset_flags(render, linear_mask); const uint64_t scanout_and_render_not_linear = render_not_linear | BO_USE_SCANOUT; @@ -308,8 +309,9 @@ static int xe_add_combinations(struct driver *drv) static int xe_align_dimensions(struct bo *bo, uint32_t format, uint32_t tiling, uint32_t *stride, uint32_t *aligned_height) { - uint32_t horizontal_alignment = 0; - uint32_t vertical_alignment = 0; + struct xe_device *xe = bo->drv->priv; + uint32_t horizontal_alignment; + uint32_t vertical_alignment; switch (tiling) { default: @@ -439,9 +441,9 @@ static int xe_init(struct driver *drv) uint64_t width = 0, height = 0; if (drmGetCap(drv->fd, DRM_CAP_CURSOR_WIDTH, &width)) { - drv_logi("cannot get cursor width. \n"); + drv_loge("cannot get cursor width. \n"); } else if (drmGetCap(drv->fd, DRM_CAP_CURSOR_HEIGHT, &height)) { - drv_logi("cannot get cursor height. \n"); + drv_loge("cannot get cursor height. \n"); } if (!width) @@ -567,8 +569,8 @@ static int xe_bo_compute_metadata(struct bo *bo, uint32_t width, uint32_t height break; case I915_FORMAT_MOD_Y_TILED: case I915_FORMAT_MOD_Y_TILED_CCS: - case I915_FORMAT_MOD_Yf_TILED: - case I915_FORMAT_MOD_Yf_TILED_CCS: + case I915_FORMAT_MOD_Yf_TILED: + case I915_FORMAT_MOD_Yf_TILED_CCS: /* For now support only XE_TILING_Y as this works with all * IPs(render/media/display) @@ -682,16 +684,7 @@ static int xe_bo_create_from_metadata(struct bo *bo) size_t plane; uint32_t gem_handle; uint32_t vm = 0; - - struct drm_xe_vm_create create = { - .flags = DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE, - }; - - ret = drmIoctl(bo->drv->fd, DRM_IOCTL_XE_VM_CREATE, &create); - if (ret) { - drv_loge("DRM_IOCTL_XE_VM_CREATE failed\n"); - return -errno; - } + struct xe_device *xe = bo->drv->priv; /* From xe_drm.h: If a VM is specified, this BO must: * 1. Only ever be bound to that VM. @@ -714,7 +707,7 @@ static int xe_bo_create_from_metadata(struct bo *bo) ret = drmIoctl(bo->drv->fd, DRM_IOCTL_XE_GEM_CREATE, &gem_create); if (ret) { - drv_loge("DRM_IOCTL_XE_GEM_CREATE failed (size=%llu)\n", gem_create.size); + drv_loge("DRM_IOCTL_I915_GEM_CREATE failed (size=%llu)\n", gem_create.size); return -errno; } @@ -758,7 +751,7 @@ static void *xe_bo_map(struct bo *bo, struct vma *vma, uint32_t map_flags) (bo->meta.format_modifier == I915_FORMAT_MOD_4_TILED)) return MAP_FAILED; - if ((bo->meta.tiling == XE_TILING_NONE) || (addr == MAP_FAILED)) { + if (bo->meta.tiling == XE_TILING_NONE) { struct drm_xe_gem_mmap_offset gem_map = { 0 }; gem_map.handle = bo->handles[0].u32; From 9e2a498da2232a88be06cbe697477e801cbcd4f2 Mon Sep 17 00:00:00 2001 From: Nana Zhang Date: Thu, 13 Jun 2024 14:52:15 +0800 Subject: [PATCH 2/7] Revert workaround after surface cpu_read optimization 1. This is a revert for https://github.com/projectceladon/minigbm/pull/122 2. Releated to https://github.com/projectceladon/MediaSDK_C2/pull/179 Tracked-On: OAM-124403 Signed-off-by: Nana Zhang (cherry picked from commit 761fe4a444bb9043478bc3011861848713891a18) Tracked-On: OAM-128364 Signed-off-by: Lina Sun --- drv.h | 1 - drv_helpers.c | 42 ------------------------------------------ drv_helpers.h | 6 ------ i915.c | 15 --------------- 4 files changed, 64 deletions(-) diff --git a/drv.h b/drv.h index 3411d032..6d2504ef 100644 --- a/drv.h +++ b/drv.h @@ -146,7 +146,6 @@ struct vma { uint32_t map_flags; int32_t refcount; uint32_t map_strides[DRV_MAX_PLANES]; - bool cpu; void *priv; }; diff --git a/drv_helpers.c b/drv_helpers.c index b36447e1..791fd3b4 100644 --- a/drv_helpers.c +++ b/drv_helpers.c @@ -522,10 +522,6 @@ void *drv_dumb_bo_map(struct bo *bo, struct vma *vma, uint32_t map_flags) int drv_bo_munmap(struct bo *bo, struct vma *vma) { - if (vma->cpu) { - free(vma->addr); - vma->addr = NULL; - } return munmap(vma->addr, vma->length); } @@ -618,44 +614,6 @@ bool drv_has_modifier(const uint64_t *list, uint32_t count, uint64_t modifier) return false; } -const u_int16_t ytile_width = 16; -const u_int16_t ytile_heigth = 32; -void one_ytile_to_linear(char *src, char *dst, u_int16_t x, u_int16_t y, u_int16_t width, u_int16_t height, uint32_t offset) -{ - // x and y follow linear - u_int32_t count = x + y * width/ytile_width; - - for (int j = 0; j < ytile_width * ytile_heigth; j += ytile_width) { - memcpy(dst + offset + width * ytile_heigth * y + width * j / ytile_width + x * ytile_width, - src + offset + j + ytile_width * ytile_heigth * count, ytile_width); - } -} - -void * ytiled_to_linear(struct bo_metadata meta, void * src) -{ - void* dst = malloc(meta.total_size); - if (NULL == dst) return NULL; - - memset(dst, 0, meta.total_size); - - u_int16_t height = meta.sizes[0] / meta.strides[0]; - // Y - u_int16_t y_hcount = height / ytile_heigth + (height % ytile_heigth != 0); - for (u_int16_t x = 0; x < meta.strides[0]/ytile_width; x++) { - for (u_int16_t y = 0; y < y_hcount; y++) { - one_ytile_to_linear(src, dst, x, y, meta.strides[0], height, 0); - } - } - // UV - u_int16_t uv_hcount = (height/ytile_heigth/2) + (height % (ytile_heigth*2) != 0); - for (u_int16_t x = 0; x < meta.strides[0]/ytile_width; x++) { - for (u_int16_t y = 0; y < uv_hcount; y++) { - one_ytile_to_linear(src, dst, x, y, meta.strides[0], height/2, meta.sizes[0]); - } - } - - return dst; -} void drv_resolve_format_and_use_flags_helper(struct driver *drv, uint32_t format, uint64_t use_flags, uint32_t *out_format, diff --git a/drv_helpers.h b/drv_helpers.h index 9794d372..f823767f 100644 --- a/drv_helpers.h +++ b/drv_helpers.h @@ -10,9 +10,7 @@ #include #include "drv.h" -#include "drv_priv.h" #include "drv_array_helpers.h" -#include #ifndef PAGE_SIZE #define PAGE_SIZE 0x1000 @@ -51,8 +49,4 @@ bool drv_has_modifier(const uint64_t *list, uint32_t count, uint64_t modifier); void drv_resolve_format_and_use_flags_helper(struct driver *drv, uint32_t format, uint64_t use_flags, uint32_t *out_format, uint64_t *out_use_flags); - -void one_ytile_to_linear(char *src, char *dst, u_int16_t x, u_int16_t y, - u_int16_t width, u_int16_t height, uint32_t offset); -void *ytiled_to_linear(struct bo_metadata meta, void * src); #endif diff --git a/i915.c b/i915.c index 768ff126..c2b1361e 100644 --- a/i915.c +++ b/i915.c @@ -1277,7 +1277,6 @@ static void *i915_bo_map(struct bo *bo, struct vma *vma, uint32_t map_flags) int ret; void *addr = MAP_FAILED; struct i915_device *i915 = bo->drv->priv; - vma->cpu = false; if ((bo->meta.format_modifier == I915_FORMAT_MOD_Y_TILED_CCS) || (bo->meta.format_modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS)) @@ -1326,20 +1325,6 @@ static void *i915_bo_map(struct bo *bo, struct vma *vma, uint32_t map_flags) /* And map it */ addr = mmap(0, bo->meta.total_size, PROT_READ | PROT_WRITE, MAP_SHARED, bo->drv->fd, mmap_arg.offset); - - // TODO: GEM_MMAP_OFFSET cannot convert ytiled to linear, we have to convert it manually. - // Other formats(e.g. I915_TILING_X) should also be converted. - if ((bo->meta.use_flags & (BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN)) && - (bo->meta.tiling == I915_TILING_Y)) { - void* tmp_addr = ytiled_to_linear(bo->meta, addr); - - if (NULL != tmp_addr) { - // release original one and replace it with a linear address. - munmap(addr, bo->meta.total_size); - addr = tmp_addr; - vma->cpu = true; - } - } } else if (bo->meta.tiling == I915_TILING_NONE) { struct drm_i915_gem_mmap gem_map = { 0 }; /* TODO(b/118799155): We don't seem to have a good way to From e5006962c109e369aa7ee93b2f1a39697ded635f Mon Sep 17 00:00:00 2001 From: HeYue Date: Tue, 18 Feb 2025 08:47:35 +0800 Subject: [PATCH 3/7] Add 0x46D3-0x46D4 ADL-N PCI IDs Signed-off-by: HeYue --- i915.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/i915.c b/i915.c index c2b1361e..4513bf53 100644 --- a/i915.c +++ b/i915.c @@ -189,7 +189,9 @@ static void i915_info_from_device_id(struct i915_device *i915) }; const uint16_t adlp_ids[] = { 0x46A0, 0x46A1, 0x46A2, 0x46A3, 0x46A6, 0x46A8, 0x46AA, 0x462A, 0x4626, 0x4628, 0x46B0, 0x46B1, 0x46B2, 0x46B3, - 0x46C0, 0x46C1, 0x46C2, 0x46C3, 0x46D0, 0x46D1, 0x46D2 }; + 0x46C0, 0x46C1, 0x46C2, 0x46C3, 0x46D0, 0x46D1, 0x46D2, + 0x46D3, 0x46D4 }; + const uint16_t dg2_ids[] = { // DG2 Val-Only Super-SKU: 4F80 - 4F87 0x4F80, 0x4F81, 0x4F82, 0x4F83, 0x4F84, 0x4F85, 0x4F86, 0x4F87, From 807c021a39a0a437aae01ac06c7203115b66c76b Mon Sep 17 00:00:00 2001 From: Jeevaka Prabu Badrappan Date: Tue, 28 Jan 2025 09:55:19 +0000 Subject: [PATCH 4/7] xe: Add 0xB0B0 PCI ID Test: Android boot to UI Tracked-On: OAM-129808 Signed-off-by: Jeevaka Prabu Badrappan --- xe.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xe.c b/xe.c index 7314d5ea..7652a0c7 100644 --- a/xe.c +++ b/xe.c @@ -101,7 +101,7 @@ static void xe_info_from_device_id(struct xe_device *xe) const uint16_t lnl_ids[] = { 0x6420, 0x64A0, 0x64B0}; - const uint16_t ptl_ids[] = { 0xB080, 0xB090, 0xB0A0, 0xB0FF}; + const uint16_t ptl_ids[] = { 0xB080, 0xB090, 0xB0A0, 0xB0B0, 0xB0FF}; unsigned i; xe->graphics_version = 0; From 7c772bbe8c1bfd6e83918758cde10b9a1909f8bd Mon Sep 17 00:00:00 2001 From: HeYue Date: Tue, 18 Feb 2025 09:01:24 +0800 Subject: [PATCH 5/7] xe: fixes to support video playback Signed-off-by: HeYue --- minigbm_helpers.c | 4 +++- xe.c | 24 ++++++++++++++++-------- 2 files changed, 19 insertions(+), 9 deletions(-) diff --git a/minigbm_helpers.c b/minigbm_helpers.c index d1da7c44..d674525d 100644 --- a/minigbm_helpers.c +++ b/minigbm_helpers.c @@ -119,7 +119,9 @@ static int detect_device_info(unsigned int detect_flags, int fd, struct gbm_devi drmModeFreeResources(resources); } - if (strncmp("i915", version->name, version->name_len) == 0) { + if ((strncmp("i915", version->name, version->name_len) == 0) || + (strncmp("xe", version->name, version->name_len) == 0)) { + /* * Detect Intel dGPU here when special getparam ioctl is added. */ diff --git a/xe.c b/xe.c index 7652a0c7..05c5868d 100644 --- a/xe.c +++ b/xe.c @@ -309,9 +309,8 @@ static int xe_add_combinations(struct driver *drv) static int xe_align_dimensions(struct bo *bo, uint32_t format, uint32_t tiling, uint32_t *stride, uint32_t *aligned_height) { - struct xe_device *xe = bo->drv->priv; - uint32_t horizontal_alignment; - uint32_t vertical_alignment; + uint32_t horizontal_alignment = 0; + uint32_t vertical_alignment = 0; switch (tiling) { default: @@ -441,9 +440,9 @@ static int xe_init(struct driver *drv) uint64_t width = 0, height = 0; if (drmGetCap(drv->fd, DRM_CAP_CURSOR_WIDTH, &width)) { - drv_loge("cannot get cursor width. \n"); + drv_logi("cannot get cursor width. \n"); } else if (drmGetCap(drv->fd, DRM_CAP_CURSOR_HEIGHT, &height)) { - drv_loge("cannot get cursor height. \n"); + drv_logi("cannot get cursor height. \n"); } if (!width) @@ -684,7 +683,16 @@ static int xe_bo_create_from_metadata(struct bo *bo) size_t plane; uint32_t gem_handle; uint32_t vm = 0; - struct xe_device *xe = bo->drv->priv; + + struct drm_xe_vm_create create = { + .flags = DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE, + }; + + ret = drmIoctl(bo->drv->fd, DRM_IOCTL_XE_VM_CREATE, &create); + if (ret) { + drv_loge("DRM_IOCTL_XE_VM_CREATE failed\n"); + return -errno; + } /* From xe_drm.h: If a VM is specified, this BO must: * 1. Only ever be bound to that VM. @@ -707,7 +715,7 @@ static int xe_bo_create_from_metadata(struct bo *bo) ret = drmIoctl(bo->drv->fd, DRM_IOCTL_XE_GEM_CREATE, &gem_create); if (ret) { - drv_loge("DRM_IOCTL_I915_GEM_CREATE failed (size=%llu)\n", gem_create.size); + drv_loge("DRM_IOCTL_XE_GEM_CREATE failed (size=%llu)\n", gem_create.size); return -errno; } @@ -751,7 +759,7 @@ static void *xe_bo_map(struct bo *bo, struct vma *vma, uint32_t map_flags) (bo->meta.format_modifier == I915_FORMAT_MOD_4_TILED)) return MAP_FAILED; - if (bo->meta.tiling == XE_TILING_NONE) { + if ((bo->meta.tiling == XE_TILING_NONE) || (addr == MAP_FAILED)) { struct drm_xe_gem_mmap_offset gem_map = { 0 }; gem_map.handle = bo->handles[0].u32; From 4137eae07d7b54f8f59f38874a6ed9b6c9e33f2b Mon Sep 17 00:00:00 2001 From: HeYue Date: Tue, 18 Feb 2025 17:44:31 +0800 Subject: [PATCH 6/7] Added xe version check to set driver Signed-off-by: HeYue --- cros_gralloc/cros_gralloc_driver.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cros_gralloc/cros_gralloc_driver.cc b/cros_gralloc/cros_gralloc_driver.cc index 8d093b8a..3703d8b0 100644 --- a/cros_gralloc/cros_gralloc_driver.cc +++ b/cros_gralloc/cros_gralloc_driver.cc @@ -180,7 +180,7 @@ cros_gralloc_driver::cros_gralloc_driver() virtio_node_idx = availabe_node; } - if (!strcmp(version->name, "i915")) { + if (!strcmp(version->name, "i915") || strcmp(version->name, "xe") == 0) { // Prefer i915 for performance consideration. // // TODO: We might have multiple i915 devices in the system and in From 9ed2c8e0fe642f1b13ddfd42b8d0b2d10d297f96 Mon Sep 17 00:00:00 2001 From: HeYue Date: Tue, 25 Feb 2025 21:58:29 +0800 Subject: [PATCH 7/7] Add special flag check Signed-off-by: HeYue --- cros_gralloc/cros_gralloc_helpers.cc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/cros_gralloc/cros_gralloc_helpers.cc b/cros_gralloc/cros_gralloc_helpers.cc index cb2d1cc9..6ded3880 100644 --- a/cros_gralloc/cros_gralloc_helpers.cc +++ b/cros_gralloc/cros_gralloc_helpers.cc @@ -138,8 +138,8 @@ uint64_t cros_gralloc_convert_usage(uint64_t usage) handle_usage(&usage, GRALLOC_USAGE_HW_RENDER, &use_flags, BO_USE_RENDERING); handle_usage(&usage, GRALLOC_USAGE_HW_2D, &use_flags, BO_USE_RENDERING); /* HWC wants to use display hardware, but can defer to OpenGL. */ - handle_usage(&usage, GRALLOC_USAGE_HW_COMPOSER, &use_flags, - BO_USE_SCANOUT | BO_USE_TEXTURE); + handle_usage(&usage, GRALLOC_USAGE_HW_COMPOSER, &use_flags, BO_USE_TEXTURE); + handle_usage(&usage, GRALLOC_USAGE_PRIVATE_1, &use_flags, BO_USE_SCANOUT); handle_usage(&usage, GRALLOC_USAGE_HW_FB, &use_flags, BO_USE_NONE); /* * This flag potentially covers external display for the normal drivers (i915/rockchip) and