From 70e30396245fe8b9463709a5dc4de4951851a92f Mon Sep 17 00:00:00 2001 From: Xin Liu Date: Tue, 8 Sep 2026 15:01:02 +0800 Subject: [PATCH 1/3] FROMLIST: arm64: dts: qcom: purwa-iot-evk: use on-board crystal for PS8830 retimers On the Purwa IoT EVK, each PS8830 retimer has its own 25 MHz crystal wired to the retimer's XI/XO pins. The reference clock does not come from the PMIC, so the RPMH_RF_CLK4/5 references in the retimer nodes are wrong: they keep those RF clocks enabled for nothing and describe a connection that does not exist on the board. Remove the stale "Left unused" annotation from the vreg_rtmr0 regulators as the retimer is actively used. Fixes: 9ed20e877239 ("arm64: dts: qcom: Add base PURWA-IOT-EVK board") Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/all/20260914101233.981643-2-xin.liu@oss.qualcomm.com/ Signed-off-by: Xin Liu --- arch/arm64/boot/dts/qcom/purwa-iot-evk.dts | 27 ++++++++++++++++++---- 1 file changed, 23 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/purwa-iot-evk.dts b/arch/arm64/boot/dts/qcom/purwa-iot-evk.dts index 96987f1a07edb..1b99d9b22394b 100644 --- a/arch/arm64/boot/dts/qcom/purwa-iot-evk.dts +++ b/arch/arm64/boot/dts/qcom/purwa-iot-evk.dts @@ -60,6 +60,26 @@ stdout-path = "serial0:115200n8"; }; + clocks { + clk_rtmr0_xo: clock-rtmr0-xo { + compatible = "fixed-clock"; + clock-frequency = <25000000>; + #clock-cells = <0>; + }; + + clk_rtmr1_xo: clock-rtmr1-xo { + compatible = "fixed-clock"; + clock-frequency = <25000000>; + #clock-cells = <0>; + }; + + clk_rtmr2_xo: clock-rtmr2-xo { + compatible = "fixed-clock"; + clock-frequency = <25000000>; + #clock-cells = <0>; + }; + }; + connector3 { compatible = "usb-a-connector"; label = "USB-3-Type-A"; @@ -295,7 +315,6 @@ pinctrl-names = "default"; }; - /* Left unused as the retimer is not used on this board. */ vreg_rtmr0_1p15: regulator-rtmr0-1p15 { compatible = "regulator-fixed"; @@ -671,7 +690,7 @@ compatible = "parade,ps8830"; reg = <0x08>; - clocks = <&rpmhcc RPMH_RF_CLK5>; + clocks = <&clk_rtmr2_xo>; vdd-supply = <&vreg_rtmr2_1p15>; vdd33-supply = <&vreg_rtmr2_3p3>; @@ -732,7 +751,7 @@ compatible = "parade,ps8830"; reg = <0x8>; - clocks = <&rpmhcc RPMH_RF_CLK4>; + clocks = <&clk_rtmr0_xo>; vdd-supply = <&vreg_rtmr0_1p15>; vdd33-supply = <&vreg_rtmr0_3p3>; @@ -847,7 +866,7 @@ compatible = "parade,ps8830"; reg = <0x8>; - clocks = <&rpmhcc RPMH_RF_CLK4>; + clocks = <&clk_rtmr1_xo>; vdd-supply = <&vreg_rtmr1_1p15>; vdd33-supply = <&vreg_rtmr1_3p3>; From 05d6f7104fbd51aba008a39e5e16dd94b8df873f Mon Sep 17 00:00:00 2001 From: Xin Liu Date: Wed, 16 Sep 2026 17:17:16 +0800 Subject: [PATCH 2/3] FROMLIST: arm64: dts: qcom: hamoa-iot-evk: use on-board crystal for PS8830 retimers On the Hamoa IoT EVK, each of the two existing PS8830 retimers has its own 25 MHz crystal wired to the retimer's XI/XO pins. The reference clock does not come from the PMIC, so the RPMH_RF_CLK4/5 references in the retimer nodes are wrong: they keep those RF clocks enabled for nothing and describe a connection that does not exist on the board. Fixes: c11645afb0e2 ("arm64: dts: qcom: Add base HAMOA-IOT-EVK board") Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/all/20260914101233.981643-3-xin.liu@oss.qualcomm.com/ Signed-off-by: Xin Liu --- arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts b/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts index c7fff719bdb13..303dde2c78ecd 100644 --- a/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts +++ b/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts @@ -60,6 +60,20 @@ stdout-path = "serial0:115200n8"; }; + clocks { + clk_rtmr1_xo: clock-rtmr1-xo { + compatible = "fixed-clock"; + clock-frequency = <25000000>; + #clock-cells = <0>; + }; + + clk_rtmr2_xo: clock-rtmr2-xo { + compatible = "fixed-clock"; + clock-frequency = <25000000>; + #clock-cells = <0>; + }; + }; + connector3 { compatible = "usb-a-connector"; label = "USB-3-Type-A"; @@ -659,7 +673,7 @@ compatible = "parade,ps8830"; reg = <0x08>; - clocks = <&rpmhcc RPMH_RF_CLK5>; + clocks = <&clk_rtmr2_xo>; vdd-supply = <&vreg_rtmr2_1p15>; vdd33-supply = <&vreg_rtmr2_3p3>; @@ -774,7 +788,7 @@ compatible = "parade,ps8830"; reg = <0x8>; - clocks = <&rpmhcc RPMH_RF_CLK4>; + clocks = <&clk_rtmr1_xo>; vdd-supply = <&vreg_rtmr1_1p15>; vdd33-supply = <&vreg_rtmr1_3p3>; From 18ef05f7c0db130c3427e72d8ad204e4730c3f11 Mon Sep 17 00:00:00 2001 From: Xin Liu Date: Wed, 16 Sep 2026 17:24:58 +0800 Subject: [PATCH 3/3] FROMLIST: arm64: dts: qcom: hamoa-iot-evk: switch typec0 to PS8830 retimer The Hamoa IoT EVK hardware design uses a Parade PS8830 retimer on I2C3 for USB Type-C port 0. Describe the retimer and route typec0 through it to enable USB 3.0 SuperSpeed and DisplayPort Alt Mode. Supply the PS8830 from the existing vreg_rtmr0_* rails and remove their stale "Left unused" annotation. The FSUSB42 SBU mux chip is present on the PCB but with all signal lines unconnected (NC), so remove the fsusb42 node and its pinctrl group. The chip is retained as a hardware fallback: should the PS8830's SBU path encounter issues, the FSUSB42 can be activated with a simple rework, avoiding a full board respin. Co-developed-by: Guodong Xu Signed-off-by: Guodong Xu Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Link: https://lore.kernel.org/all/20260914101233.981643-4-xin.liu@oss.qualcomm.com/ Signed-off-by: Xin Liu --- arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts | 114 ++++++++++++--------- 1 file changed, 66 insertions(+), 48 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts b/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts index 303dde2c78ecd..d17a958b4544e 100644 --- a/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts +++ b/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts @@ -61,6 +61,12 @@ }; clocks { + clk_rtmr0_xo: clock-rtmr0-xo { + compatible = "fixed-clock"; + clock-frequency = <25000000>; + #clock-cells = <0>; + }; + clk_rtmr1_xo: clock-rtmr1-xo { compatible = "fixed-clock"; clock-frequency = <25000000>; @@ -132,15 +138,15 @@ reg = <1>; pmic_glink_ss0_ss_in: endpoint { - remote-endpoint = <&usb_1_ss0_qmpphy_out>; + remote-endpoint = <&retimer_ss0_ss_out>; }; }; port@2 { reg = <2>; - pmic_glink_ss0_sbu: endpoint { - remote-endpoint = <&usb_1_ss0_sbu_mux>; + pmic_glink_ss0_con_sbu_in: endpoint { + remote-endpoint = <&retimer_ss0_con_sbu_out>; }; }; }; @@ -309,7 +315,6 @@ pinctrl-names = "default"; }; - /* Left unused as the retimer is not used on this board. */ vreg_rtmr0_1p15: regulator-rtmr0-1p15 { compatible = "regulator-fixed"; @@ -606,25 +611,6 @@ }; }; - usb-1-ss0-sbu-mux { - compatible = "onnn,fsusb42", "gpio-sbu-mux"; - - enable-gpios = <&tlmm 168 GPIO_ACTIVE_LOW>; - select-gpios = <&tlmm 167 GPIO_ACTIVE_HIGH>; - - pinctrl-0 = <&usb_1_ss0_sbu_default>; - pinctrl-names = "default"; - - mode-switch; - orientation-switch; - - port { - usb_1_ss0_sbu_mux: endpoint { - remote-endpoint = <&pmic_glink_ss0_sbu>; - }; - }; - }; - wifi-bt-connector { compatible = "pcie-m2-e-connector"; vpcie3v3-supply = <&vreg_wcn_3p3>; @@ -721,6 +707,62 @@ }; }; +&i2c3 { + clock-frequency = <400000>; + status = "okay"; + + typec-mux@8 { + compatible = "parade,ps8830"; + reg = <0x08>; + + clocks = <&clk_rtmr0_xo>; + + vdd-supply = <&vreg_rtmr0_1p15>; + vdd33-supply = <&vreg_rtmr0_3p3>; + vdd33-cap-supply = <&vreg_rtmr0_3p3>; + vddar-supply = <&vreg_rtmr0_1p15>; + vddat-supply = <&vreg_rtmr0_1p15>; + vddio-supply = <&vreg_rtmr0_1p8>; + + reset-gpios = <&pm8550_gpios 10 GPIO_ACTIVE_LOW>; + + pinctrl-0 = <&rtmr0_default>; + pinctrl-names = "default"; + + orientation-switch; + retimer-switch; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + retimer_ss0_ss_out: endpoint { + remote-endpoint = <&pmic_glink_ss0_ss_in>; + }; + }; + + port@1 { + reg = <1>; + + retimer_ss0_ss_in: endpoint { + remote-endpoint = <&usb_1_ss0_qmpphy_out>; + }; + }; + + port@2 { + reg = <2>; + + retimer_ss0_con_sbu_out: endpoint { + remote-endpoint = <&pmic_glink_ss0_con_sbu_in>; + }; + }; + }; + }; +}; + &i2c5 { clock-frequency = <400000>; @@ -1380,30 +1422,6 @@ bias-disable; }; - usb_1_ss0_sbu_default: usb-1-ss0-sbu-state { - mode-pins { - pins = "gpio166"; - function = "gpio"; - bias-disable; - drive-strength = <2>; - output-high; - }; - - oe-n-pins { - pins = "gpio168"; - function = "gpio"; - bias-disable; - drive-strength = <2>; - }; - - sel-pins { - pins = "gpio167"; - function = "gpio"; - bias-disable; - drive-strength = <2>; - }; - }; - wcd_default: wcd-reset-n-active-state { pins = "gpio191"; function = "gpio"; @@ -1491,7 +1509,7 @@ }; &usb_1_ss0_qmpphy_out { - remote-endpoint = <&pmic_glink_ss0_ss_in>; + remote-endpoint = <&retimer_ss0_ss_in>; }; &usb_1_ss1_dwc3_hs {