diff --git a/Documentation/devicetree/bindings/media/qcom,qcm2290-camss.yaml b/Documentation/devicetree/bindings/media/qcom,qcm2290-camss.yaml index 7b1469d6a1601..490a7f3a8c5ff 100644 --- a/Documentation/devicetree/bindings/media/qcom,qcm2290-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,qcm2290-camss.yaml @@ -8,16 +8,17 @@ title: Qualcomm QCM2290 Camera Subsystem (CAMSS) maintainers: - Loic Poulain - - Nihal Kumar Gupta description: The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms. properties: compatible: - enum: - - qcom,qcm2290-camss - - qcom,shikra-camss + oneOf: + - items: + - const: qcom,shikra-camss + - const: qcom,qcm2290-camss + - const: qcom,qcm2290-camss reg: maxItems: 9 @@ -79,8 +80,14 @@ properties: - const: sf_mnoc iommus: - minItems: 1 - maxItems: 4 + oneOf: + - items: + - description: S1 HLOS VFE non-protected (VFE only) + - items: + - description: S1 HLOS VFE non-protected + - description: S1 HLOS CDM non-protected + - description: S1 HLOS OPE read non-protected + - description: S1 HLOS OPE write non-protected power-domains: items: diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 7c3daa5703471..26e2d7e39c5d8 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -372,8 +372,8 @@ dtb-$(CONFIG_ARCH_QCOM) += shikra-cqm-evk.dtb dtb-$(CONFIG_ARCH_QCOM) += shikra-cqs-evk.dtb dtb-$(CONFIG_ARCH_QCOM) += shikra-iqs-evk.dtb -shikra-cqm-evk-imx577-camera-dtbs := shikra-cqm-evk.dtb shikra-cqm-evk-imx577-camera.dtbo -shikra-cqs-evk-imx577-camera-dtbs := shikra-cqs-evk.dtb shikra-cqm-evk-imx577-camera.dtbo +shikra-cqm-evk-imx577-camera-dtbs := shikra-cqm-evk.dtb shikra-cqm-cqs-evk-imx577-camera.dtbo +shikra-cqs-evk-imx577-camera-dtbs := shikra-cqs-evk.dtb shikra-cqm-cqs-evk-imx577-camera.dtbo shikra-iqs-evk-imx577-camera-dtbs := shikra-iqs-evk.dtb shikra-iqs-evk-imx577-camera.dtbo dtb-$(CONFIG_ARCH_QCOM) += shikra-cqm-evk-imx577-camera.dtb diff --git a/arch/arm64/boot/dts/qcom/shikra-cqm-evk-imx577-camera.dtso b/arch/arm64/boot/dts/qcom/shikra-cqm-cqs-evk-imx577-camera.dtso similarity index 66% rename from arch/arm64/boot/dts/qcom/shikra-cqm-evk-imx577-camera.dtso rename to arch/arm64/boot/dts/qcom/shikra-cqm-cqs-evk-imx577-camera.dtso index aedcd164810cf..3a481d972cd27 100644 --- a/arch/arm64/boot/dts/qcom/shikra-cqm-evk-imx577-camera.dtso +++ b/arch/arm64/boot/dts/qcom/shikra-cqm-cqs-evk-imx577-camera.dtso @@ -43,21 +43,37 @@ reg = <0x1a>; reset-gpios = <&tlmm 33 GPIO_ACTIVE_LOW>; - pinctrl-0 = <&mclk1_default>; + pinctrl-0 = <&cam_mclk1_default &cam1_reset_default>; pinctrl-names = "default"; clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; assigned-clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; assigned-clock-rates = <24000000>; + /* + * avdd and dvdd are supplied by on-board regulators on the + * IMX577 module from the connector's 3.3 V rail; they are + * not SoC-controlled. dovdd (1.8 V) powers the carrier board + * level-shifter that translates CCI I2C and reset lines + * between the SoC and the connector. + */ dovdd-supply = <&pm4125_l15>; port { imx577_ep1: endpoint { link-frequencies = /bits/ 64 <600000000>; - data-lanes = <0 1 2 3>; + data-lanes = <1 2 3 4>; remote-endpoint = <&csiphy1_ep>; }; }; }; }; + +&tlmm { + cam1_reset_default: cam1-reset-default-state { + pins = "gpio33"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/shikra-iqs-evk-imx577-camera.dtso b/arch/arm64/boot/dts/qcom/shikra-iqs-evk-imx577-camera.dtso index f0423f1ab4e93..d8c968a918c67 100644 --- a/arch/arm64/boot/dts/qcom/shikra-iqs-evk-imx577-camera.dtso +++ b/arch/arm64/boot/dts/qcom/shikra-iqs-evk-imx577-camera.dtso @@ -43,21 +43,37 @@ reg = <0x1a>; reset-gpios = <&tlmm 33 GPIO_ACTIVE_LOW>; - pinctrl-0 = <&mclk1_default>; + pinctrl-0 = <&cam_mclk1_default &cam1_reset_default>; pinctrl-names = "default"; clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; assigned-clocks = <&gcc GCC_CAMSS_MCLK1_CLK>; assigned-clock-rates = <24000000>; + /* + * avdd and dvdd are supplied by on-board regulators on the + * IMX577 module from the connector's 3.3 V rail; they are + * not SoC-controlled. dovdd (1.8 V) powers the carrier board + * level-shifter that translates CCI I2C and reset lines + * between the SoC and the connector. + */ dovdd-supply = <&pm8150_l15>; port { imx577_ep1: endpoint { link-frequencies = /bits/ 64 <600000000>; - data-lanes = <0 1 2 3>; + data-lanes = <1 2 3 4>; remote-endpoint = <&csiphy1_ep>; }; }; }; }; + +&tlmm { + cam1_reset_default: cam1-reset-default-state { + pins = "gpio33"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/shikra.dtsi b/arch/arm64/boot/dts/qcom/shikra.dtsi index 0421ed906af1d..2af2ca1897b95 100644 --- a/arch/arm64/boot/dts/qcom/shikra.dtsi +++ b/arch/arm64/boot/dts/qcom/shikra.dtsi @@ -664,66 +664,6 @@ gpio-ranges = <&tlmm 0 0 165>; wakeup-parent = <&mpm>; - cci_i2c0_default: cci-i2c0-default-state { - /* SDA, SCL */ - pins = "gpio36", "gpio37"; - function = "cci_i2c0"; - drive-strength = <2>; - bias-pull-up; - }; - - cci_i2c0_sleep: cci-i2c0-sleep-state { - /* SDA, SCL */ - pins = "gpio36", "gpio37"; - function = "cci_i2c0"; - drive-strength = <2>; - bias-pull-down; - }; - - cci_i2c1_default: cci-i2c1-default-state { - /* SDA, SCL */ - pins = "gpio41", "gpio42"; - function = "cci_i2c1"; - drive-strength = <2>; - bias-pull-up; - }; - - cci_i2c1_sleep: cci-i2c1-sleep-state { - /* SDA, SCL */ - pins = "gpio41", "gpio42"; - function = "cci_i2c1"; - drive-strength = <2>; - bias-pull-down; - }; - - mclk0_default: mclk0-default-state { - pins = "gpio34"; - function = "cam_mclk"; - drive-strength = <2>; - bias-disable; - }; - - mclk1_default: mclk1-default-state { - pins = "gpio35"; - function = "cam_mclk"; - drive-strength = <2>; - bias-disable; - }; - - mclk2_default: mclk2-default-state { - pins = "gpio96"; - function = "cam_mclk"; - drive-strength = <2>; - bias-disable; - }; - - mclk3_default: mclk3-default-state { - pins = "gpio98"; - function = "cam_mclk"; - drive-strength = <2>; - bias-disable; - }; - qup_i2c0_data_clk: qup-i2c0-data-clk-state { /* SDA, SCL */ pins = "gpio2", "gpio3"; @@ -985,6 +925,66 @@ bias-disable; }; + cci_i2c0_default: cci-i2c0-default-state { + /* SDA, SCL */ + pins = "gpio36", "gpio37"; + function = "cci_i2c0"; + drive-strength = <2>; + bias-pull-up; + }; + + cci_i2c0_sleep: cci-i2c0-sleep-state { + /* SDA, SCL */ + pins = "gpio36", "gpio37"; + function = "cci_i2c0"; + drive-strength = <2>; + bias-pull-down; + }; + + cci_i2c1_default: cci-i2c1-default-state { + /* SDA, SCL */ + pins = "gpio41", "gpio42"; + function = "cci_i2c1"; + drive-strength = <2>; + bias-pull-up; + }; + + cci_i2c1_sleep: cci-i2c1-sleep-state { + /* SDA, SCL */ + pins = "gpio41", "gpio42"; + function = "cci_i2c1"; + drive-strength = <2>; + bias-pull-down; + }; + + cam_mclk0_default: cam-mclk0-default-state { + pins = "gpio34"; + function = "cam_mclk"; + drive-strength = <2>; + bias-disable; + }; + + cam_mclk1_default: cam-mclk1-default-state { + pins = "gpio35"; + function = "cam_mclk"; + drive-strength = <2>; + bias-disable; + }; + + cam_mclk2_default: cam-mclk2-default-state { + pins = "gpio96"; + function = "cam_mclk"; + drive-strength = <2>; + bias-disable; + }; + + cam_mclk3_default: cam-mclk3-default-state { + pins = "gpio98"; + function = "cam_mclk"; + drive-strength = <2>; + bias-disable; + }; + sdc1_state_on: sdc1-on-state { clk-pins { pins = "sdc1_clk"; @@ -1708,142 +1708,6 @@ }; }; - camss: camss@5c11000 { - compatible = "qcom,shikra-camss"; - - reg = <0x0 0x05c11000 0x0 0x1000>, - <0x0 0x05c6e000 0x0 0x1000>, - <0x0 0x05c75000 0x0 0x1000>, - <0x0 0x05c52000 0x0 0x1000>, - <0x0 0x05c53000 0x0 0x1000>, - <0x0 0x05c66000 0x0 0x400>, - <0x0 0x05c68000 0x0 0x400>, - <0x0 0x05c6f000 0x0 0x4000>, - <0x0 0x05c76000 0x0 0x4000>; - reg-names = "top", - "csid0", - "csid1", - "csiphy0", - "csiphy1", - "csitpg0", - "csitpg1", - "vfe0", - "vfe1"; - - clocks = <&gcc GCC_CAMERA_AHB_CLK>, - <&gcc GCC_CAMSS_AXI_CLK>, - <&gcc GCC_CAMSS_NRT_AXI_CLK>, - <&gcc GCC_CAMSS_RT_AXI_CLK>, - <&gcc GCC_CAMSS_TFE_0_CSID_CLK>, - <&gcc GCC_CAMSS_TFE_1_CSID_CLK>, - <&gcc GCC_CAMSS_CPHY_0_CLK>, - <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>, - <&gcc GCC_CAMSS_CPHY_1_CLK>, - <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>, - <&gcc GCC_CAMSS_TOP_AHB_CLK>, - <&gcc GCC_CAMSS_TFE_0_CLK>, - <&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>, - <&gcc GCC_CAMSS_TFE_1_CLK>, - <&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>; - clock-names = "ahb", - "axi", - "camnoc_nrt_axi", - "camnoc_rt_axi", - "csi0", - "csi1", - "csiphy0", - "csiphy0_timer", - "csiphy1", - "csiphy1_timer", - "top_ahb", - "vfe0", - "vfe0_cphy_rx", - "vfe1", - "vfe1_cphy_rx"; - - interrupts = , - , - , - , - , - , - , - ; - interrupt-names = "csid0", - "csid1", - "csiphy0", - "csiphy1", - "csitpg0", - "csitpg1", - "vfe0", - "vfe1"; - - interconnects = <&mem_noc MASTER_AMPSS_M0 RPM_ACTIVE_TAG - &config_noc SLAVE_CAMERA_CFG RPM_ACTIVE_TAG>, - <&mmrt_virt MASTER_CAMNOC_HF RPM_ALWAYS_TAG - &mc_virt SLAVE_EBI_CH0 RPM_ALWAYS_TAG>, - <&mmnrt_virt MASTER_CAMNOC_SF RPM_ALWAYS_TAG - &mc_virt SLAVE_EBI_CH0 RPM_ALWAYS_TAG>; - interconnect-names = "ahb", - "hf_mnoc", - "sf_mnoc"; - - iommus = <&apps_smmu 0x400 0x0>; - power-domains = <&gcc GCC_CAMSS_TOP_GDSC>; - - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - reg = <1>; - }; - }; - }; - - cci: cci@5c1b000 { - compatible = "qcom,shikra-cci", "qcom,msm8996-cci"; - reg = <0x0 0x05c1b000 0x0 0x1000>; - - interrupts = ; - - clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>, - <&gcc GCC_CAMSS_CCI_0_CLK>; - clock-names = "ahb", - "cci"; - - power-domains = <&gcc GCC_CAMSS_TOP_GDSC>; - - pinctrl-0 = <&cci_i2c0_default &cci_i2c1_default>; - pinctrl-1 = <&cci_i2c0_sleep &cci_i2c1_sleep>; - pinctrl-names = "default", "sleep"; - - #address-cells = <1>; - #size-cells = <0>; - - status = "disabled"; - - cci_i2c0: i2c-bus@0 { - reg = <0>; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; - }; - - cci_i2c1: i2c-bus@1 { - reg = <1>; - clock-frequency = <400000>; - #address-cells = <1>; - #size-cells = <0>; - }; - }; - sdhc_ice: crypto@4748000 { compatible = "qcom,shikra-inline-crypto-engine", "qcom,inline-crypto-engine"; @@ -2662,6 +2526,143 @@ }; }; + camss: camss@5c11000 { + compatible = "qcom,shikra-camss", "qcom,qcm2290-camss"; + + reg = <0x0 0x05c11000 0x0 0x1000>, + <0x0 0x05c6e000 0x0 0x1000>, + <0x0 0x05c75000 0x0 0x1000>, + <0x0 0x05c52000 0x0 0x1000>, + <0x0 0x05c53000 0x0 0x1000>, + <0x0 0x05c66000 0x0 0x400>, + <0x0 0x05c68000 0x0 0x400>, + <0x0 0x05c6f000 0x0 0x4000>, + <0x0 0x05c76000 0x0 0x4000>; + reg-names = "top", + "csid0", + "csid1", + "csiphy0", + "csiphy1", + "csitpg0", + "csitpg1", + "vfe0", + "vfe1"; + + clocks = <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMSS_AXI_CLK>, + <&gcc GCC_CAMSS_NRT_AXI_CLK>, + <&gcc GCC_CAMSS_RT_AXI_CLK>, + <&gcc GCC_CAMSS_TFE_0_CSID_CLK>, + <&gcc GCC_CAMSS_TFE_1_CSID_CLK>, + <&gcc GCC_CAMSS_CPHY_0_CLK>, + <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>, + <&gcc GCC_CAMSS_CPHY_1_CLK>, + <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>, + <&gcc GCC_CAMSS_TOP_AHB_CLK>, + <&gcc GCC_CAMSS_TFE_0_CLK>, + <&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>, + <&gcc GCC_CAMSS_TFE_1_CLK>, + <&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>; + clock-names = "ahb", + "axi", + "camnoc_nrt_axi", + "camnoc_rt_axi", + "csi0", + "csi1", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "top_ahb", + "vfe0", + "vfe0_cphy_rx", + "vfe1", + "vfe1_cphy_rx"; + + interrupts = , + , + , + , + , + , + , + ; + interrupt-names = "csid0", + "csid1", + "csiphy0", + "csiphy1", + "csitpg0", + "csitpg1", + "vfe0", + "vfe1"; + + interconnects = <&mem_noc MASTER_AMPSS_M0 RPM_ACTIVE_TAG + &config_noc SLAVE_CAMERA_CFG RPM_ACTIVE_TAG>, + <&mmrt_virt MASTER_CAMNOC_HF RPM_ALWAYS_TAG + &mc_virt SLAVE_EBI_CH0 RPM_ALWAYS_TAG>, + <&mmnrt_virt MASTER_CAMNOC_SF RPM_ALWAYS_TAG + &mc_virt SLAVE_EBI_CH0 RPM_ALWAYS_TAG>; + interconnect-names = "ahb", + "hf_mnoc", + "sf_mnoc"; + + iommus = <&apps_smmu 0x400 0x0>; + + power-domains = <&gcc GCC_CAMSS_TOP_GDSC>; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + }; + + port@1 { + reg = <1>; + }; + }; + }; + + cci: cci@5c1b000 { + compatible = "qcom,shikra-cci", "qcom,msm8996-cci"; + reg = <0x0 0x05c1b000 0x0 0x1000>; + + interrupts = ; + + clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>, + <&gcc GCC_CAMSS_CCI_0_CLK>; + clock-names = "ahb", + "cci"; + + power-domains = <&gcc GCC_CAMSS_TOP_GDSC>; + + pinctrl-0 = <&cci_i2c0_default &cci_i2c1_default>; + pinctrl-1 = <&cci_i2c0_sleep &cci_i2c1_sleep>; + pinctrl-names = "default", "sleep"; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + + cci_i2c0: i2c-bus@0 { + reg = <0>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + cci_i2c1: i2c-bus@1 { + reg = <1>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + remoteproc_mpss: remoteproc@6080000 { compatible = "qcom,shikra-mpss-pas"; reg = <0x0 0x06080000 0x0 0x100>; diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c index fe88f0db8e104..43fc00b04743a 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c @@ -1428,7 +1428,6 @@ static bool csiphy_is_gen2(u32 version) switch (version) { case CAMSS_2290: - case CAMSS_2390: case CAMSS_6150: case CAMSS_7280: case CAMSS_8250: @@ -1470,7 +1469,6 @@ static void csiphy_lanes_enable(struct csiphy_device *csiphy, } break; case CAMSS_2290: - case CAMSS_2390: case CAMSS_6150: if (c->phy_cfg == V4L2_MBUS_CSI2_DPHY) { regs->lane_regs = &lane_regs_qcm2290[0]; diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c index 308fb63c79e14..95858afa7116f 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.c +++ b/drivers/media/platform/qcom/camss/camss-vfe.c @@ -342,7 +342,6 @@ static u32 vfe_src_pad_code(struct vfe_line *line, u32 sink_code, break; case CAMSS_660: case CAMSS_2290: - case CAMSS_2390: case CAMSS_6150: case CAMSS_7280: case CAMSS_8x96: diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index ee592a1633552..aaf4d956a353c 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -5465,19 +5465,6 @@ static const struct camss_resources qcm2290_resources = { .vfe_num = ARRAY_SIZE(vfe_res_2290), }; -static const struct camss_resources qcm2390_resources = { - .version = CAMSS_2390, - .legacy_phy = true, - .csiphy_res = csiphy_res_2290, - .csid_res = csid_res_2290, - .vfe_res = vfe_res_2290, - .icc_res = icc_res_2290, - .icc_path_num = ARRAY_SIZE(icc_res_2290), - .csiphy_num = ARRAY_SIZE(csiphy_res_2290), - .csid_num = ARRAY_SIZE(csid_res_2290), - .vfe_num = ARRAY_SIZE(vfe_res_2290), -}; - static const struct camss_resources qcs8300_resources = { .version = CAMSS_8300, .pd_name = "top", @@ -5679,7 +5666,6 @@ static const struct of_device_id camss_dt_match[] = { { .compatible = "qcom,sdm660-camss", .data = &sdm660_resources }, { .compatible = "qcom,sdm670-camss", .data = &sdm670_resources }, { .compatible = "qcom,sdm845-camss", .data = &sdm845_resources }, - { .compatible = "qcom,shikra-camss", .data = &qcm2390_resources }, { .compatible = "qcom,sm6150-camss", .data = &sm6150_resources }, { .compatible = "qcom,sm8250-camss", .data = &sm8250_resources }, { .compatible = "qcom,sm8550-camss", .data = &sm8550_resources }, diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h index fc79e24f98f9e..4d71735e3c98b 100644 --- a/drivers/media/platform/qcom/camss/camss.h +++ b/drivers/media/platform/qcom/camss/camss.h @@ -82,7 +82,6 @@ enum pm_domain { enum camss_version { CAMSS_660, CAMSS_2290, - CAMSS_2390, CAMSS_6150, CAMSS_7280, CAMSS_8x16,