From db6f4372fd05631294d2e2591acda582511b5795 Mon Sep 17 00:00:00 2001 From: Balaji Selvanathan Date: Wed, 2 Sep 2026 22:55:46 +0530 Subject: [PATCH 1/3] Revert "[qcom-next] SPL Lemans Fixes" (PR #85) Revert the SPL Lemans fixes merged via qualcomm-linux/u-boot PR #85 (https://github.com/qualcomm-linux/u-boot/pull/85). This reverts the following qcom-next commits: 5f0cc1dcc75 configs: lemans_spl: Remove TEXT_BASE and REMAKE_ELF configs 530ecc767c8 arm: dts: lemans-evk: Remove hardcoded memory node bede6f826e7 misc: qcom-spmi-sdam: Add PHASE_ prefix support Signed-off-by: Balaji Selvanathan --- arch/arm/dts/lemans-evk-u-boot.dtsi | 15 +++++++++++++++ configs/qcom_lemans_spl_defconfig | 3 +++ drivers/misc/Makefile | 2 +- 3 files changed, 19 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/lemans-evk-u-boot.dtsi b/arch/arm/dts/lemans-evk-u-boot.dtsi index fd4eaa2fec81..49b95d8ba4ff 100644 --- a/arch/arm/dts/lemans-evk-u-boot.dtsi +++ b/arch/arm/dts/lemans-evk-u-boot.dtsi @@ -4,6 +4,21 @@ */ / { + /* Will be removed when bootloader updates later */ + memory@80000000 { + device_type = "memory"; + bootph-all; /* Include memory node in SPL DTB */ + reg = <0x0 0x80000000 0x0 0x3ee00000>, + <0x0 0xc0000000 0x0 0x04d00000>, + <0xd 0x00000000 0x2 0x54100000>, + <0xa 0x80000000 0x1 0x52d00000>, + <0x9 0x00000000 0x1 0x80000000>, + <0x1 0x00000000 0x2 0xf7500000>, + <0x0 0xd0000000 0x0 0x00100000>, + <0x0 0xd3500000 0x0 0x07c00000>, + <0x0 0xdb300000 0x0 0x24d00000>; + }; + clocks { /* Fixed clocks needed by GCC */ xo_board_clk { diff --git a/configs/qcom_lemans_spl_defconfig b/configs/qcom_lemans_spl_defconfig index d04397aadfd5..8b63e44d4400 100644 --- a/configs/qcom_lemans_spl_defconfig +++ b/configs/qcom_lemans_spl_defconfig @@ -5,6 +5,9 @@ #include "qcom_defconfig" +# Address where U-Boot proper will be loaded +CONFIG_TEXT_BASE=0xaf000000 +CONFIG_REMAKE_ELF=y CONFIG_FASTBOOT_BUF_ADDR=0xdb300000 CONFIG_DEFAULT_DEVICE_TREE="qcom/lemans-evk" CONFIG_ENV_IS_IN_SCSI=y diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 791ba1e1d05e..70617bc22aa6 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -65,7 +65,7 @@ obj-$(CONFIG_QFW_MMIO) += qfw_mmio.o obj-$(CONFIG_QFW_SMBIOS) += qfw_smbios.o obj-$(CONFIG_SANDBOX) += qfw_sandbox.o endif -obj-$(CONFIG_$(PHASE_)QCOM_SPMI_SDAM) += qcom-spmi-sdam.o +obj-$(CONFIG_QCOM_SPMI_SDAM) += qcom-spmi-sdam.o obj-$(CONFIG_$(PHASE_)QCOM_GENI) += qcom_geni.o obj-$(CONFIG_QCOM_GENI_MINICORE) += qcom_geni-minicore.o obj-$(CONFIG_$(PHASE_)QCOM_HWINFO) += qcom_hwinfo.o From a6f54a396803b9c7a51cec38a47d44c83c524f90 Mon Sep 17 00:00:00 2001 From: Balaji Selvanathan Date: Wed, 2 Sep 2026 22:57:24 +0530 Subject: [PATCH 2/3] Revert "[qcom-next] Add U-Boot SPL support for Lemans EVK" (PR #79) Revert the Lemans EVK SPL support merged via qualcomm-linux/u-boot PR #79 (https://github.com/qualcomm-linux/u-boot/pull/79). This reverts the following qcom-next commits: 4c09f120ac0 qcom_lemans_spl: disable SPL_QCOM_BOOT_FROM_PBL for XBL boot 1d6874671a3 mach-snapdragon: spl: add SPL_QCOM_BOOT_FROM_PBL Kconfig option c910816dac9 configs: qcom: Add qcom_lemans_spl_defconfig for Lemans EVK ad30037010f arm: dts: qcom: Add Lemans EVK U-Boot DTS overlay for SPL Signed-off-by: Balaji Selvanathan --- arch/arm/dts/lemans-evk-u-boot.dtsi | 59 +++------------- arch/arm/mach-snapdragon/Kconfig | 14 ---- arch/arm/mach-snapdragon/spl.c | 105 +++++++++++---------------- configs/qcom_lemans_spl_defconfig | 106 ---------------------------- 4 files changed, 50 insertions(+), 234 deletions(-) delete mode 100644 configs/qcom_lemans_spl_defconfig diff --git a/arch/arm/dts/lemans-evk-u-boot.dtsi b/arch/arm/dts/lemans-evk-u-boot.dtsi index 49b95d8ba4ff..e07f43110cba 100644 --- a/arch/arm/dts/lemans-evk-u-boot.dtsi +++ b/arch/arm/dts/lemans-evk-u-boot.dtsi @@ -1,33 +1,20 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + * Copyright (c) 2026, Qualcomm Innovation Center, Inc. All rights reserved. */ / { /* Will be removed when bootloader updates later */ memory@80000000 { device_type = "memory"; - bootph-all; /* Include memory node in SPL DTB */ reg = <0x0 0x80000000 0x0 0x3ee00000>, - <0x0 0xc0000000 0x0 0x04d00000>, - <0xd 0x00000000 0x2 0x54100000>, - <0xa 0x80000000 0x1 0x52d00000>, + <0x0 0xc0000000 0x0 0x0fd00000>, + <0xD 0x00000000 0x2 0x54100000>, + <0xA 0x80000000 0x1 0x80000000>, <0x9 0x00000000 0x1 0x80000000>, - <0x1 0x00000000 0x2 0xf7500000>, - <0x0 0xd0000000 0x0 0x00100000>, - <0x0 0xd3500000 0x0 0x07c00000>, - <0x0 0xdb300000 0x0 0x24d00000>; - }; - - clocks { - /* Fixed clocks needed by GCC */ - xo_board_clk { - bootph-all; - }; - - sleep_clk { - bootph-all; - }; + <0x1 0x00000000 0x3 0x00000000>, + <0x0 0xd0000000 0x0 0x01900000>, + <0x0 0xd3500000 0x0 0x2cb00000>; }; /* IMEM boot cookie + TCSR HW version offsets */ @@ -42,40 +29,10 @@ }; }; -&ufs_mem_hc { - bootph-all; /* Enable UFS for SPL */ -}; - -&ufs_mem_phy { - bootph-all; -}; - -&gcc { - bootph-all; /* Enable GCC for SPL */ -}; - -/* RPMH clock controller - required by GCC */ -&rpmhcc { - bootph-all; -}; - -/* Apps RSC - parent of rpmhcc and rpmhpd */ -&apps_rsc { - bootph-all; -}; - -/* UART10 - console serial port */ -&uart10 { - bootph-all; -}; - -&tlmm { - bootph-all; /* Make TLMM GPIO controller available in SPL */ -}; - /* Enter Qualcomm EDL/download mode via "reset -edl". */ &{/psci} { reboot-mode { mode-edl = <0x80000000 0x00000001>; }; }; + diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig index 29567b66ff9a..483b750d5dcf 100644 --- a/arch/arm/mach-snapdragon/Kconfig +++ b/arch/arm/mach-snapdragon/Kconfig @@ -42,20 +42,6 @@ config SYS_CONFIG_NAME Based on this option include/configs/.h header will be used for board configuration. -config SPL_QCOM_BOOT_FROM_PBL - bool "U-Boot SPL is loaded directly by PBL" - depends on SPL - default y - help - Enable this option when U-Boot SPL is loaded directly by PBL (Primary - Boot Loader). In this case, PBL passes boot parameters via r0 register - containing a pointer to pbl_shared_data structure. - - Disable this option when U-Boot SPL is loaded by XBL or another - intermediate bootloader (e.g., PBL->XBL->U-Boot SPL). In such cases, - the r0 register won't contain valid PBL shared data, and boot device - detection will use fallback mechanisms. - config QCOM_FIT_MULTIDTB bool "Enable FIT multi-DTB selection for Qualcomm platforms" depends on FIT diff --git a/arch/arm/mach-snapdragon/spl.c b/arch/arm/mach-snapdragon/spl.c index bfe4dc8dd011..c1a7d4cb00f4 100644 --- a/arch/arm/mach-snapdragon/spl.c +++ b/arch/arm/mach-snapdragon/spl.c @@ -11,7 +11,7 @@ #include #include #include -#include +#include #include #include #include @@ -38,8 +38,6 @@ DECLARE_GLOBAL_DATA_PTR; #define QCCONFIG "qc_config" #define QCSDI "qcsdi" -struct mm_region *mem_map = NULL; - /** * struct interface_table_entry - Meta data for blobs in QCLIB interface * @entry_name: Name of the data blob (e.g., "dcb_settings"). @@ -607,22 +605,19 @@ static struct pbl_shared_data g_psd __section(".data"); void save_boot_params(ulong r0, ulong r1, ulong r2, ulong r3) { unsigned long sctlr; + struct pbl_shared_data *psd; sctlr = get_sctlr(); set_sctlr(sctlr & ~(CR_M)); /* Disable MMU */ - /* - * When U-Boot SPL is loaded directly by PBL, r0 contains a pointer - * to pbl_shared_data structure. When loaded via XBL or another - * intermediate bootloader, r0 won't contain valid PBL data. - */ - if (CONFIG_IS_ENABLED(QCOM_BOOT_FROM_PBL)) { - struct pbl_shared_data *psd = (struct pbl_shared_data *)r0; + psd = (struct pbl_shared_data *)r0; - if (psd && psd->num_of_entries >= PBL_SHARED_DATA_PARAM_MAX) - memcpy(&g_psd, psd, sizeof(g_psd)); - } + if (!psd || psd->num_of_entries < PBL_SHARED_DATA_PARAM_MAX) + goto out; + + memcpy(&g_psd, psd, sizeof(g_psd)); +out: save_boot_params_ret(); } @@ -636,49 +631,35 @@ u32 spl_boot_device(void) { struct pbl_shared_data *psd = &g_psd; - /* - * When booted directly from PBL, use PBL shared data to determine - * boot device. When booted via XBL, fall back to compile-time config. - */ - if (CONFIG_IS_ENABLED(QCOM_BOOT_FROM_PBL)) { #ifdef DEBUG - for (int i = 0; psd && i < psd->num_of_entries; i++) { - printf("entry[0x%x] = %d 0x%08x %d\n", i, - psd->entry[i].param_id, psd->entry[i].value, - psd->entry[i].valid); - } + for (int i = 0; psd && i < psd->num_of_entries; i++) { + printf("entry[0x%x] = %d 0x%08x %d\n", i, + psd->entry[i].param_id, psd->entry[i].value, + psd->entry[i].valid); + } #endif - if (psd->entry[PSD_ID_IS_EDL_MODE].valid && - psd->entry[PSD_ID_IS_EDL_MODE].value) { - printf("Selected boot device: DFU\n"); - return BOOT_DEVICE_DFU; + if (psd->entry[PSD_ID_IS_EDL_MODE].valid && + psd->entry[PSD_ID_IS_EDL_MODE].value) { + printf("Selected boot device: DFU\n"); + return BOOT_DEVICE_DFU; + } + + if (psd->entry[PSD_ID_BOOT_MEDIA_TYPE].valid) { + switch (psd->entry[PSD_ID_BOOT_MEDIA_TYPE].value) { + case PSD_MMC_FLASH: + printf("Selected boot device: MMC\n"); + return BOOT_DEVICE_MMC1; + case PSD_NOR_FLASH: + printf("Selected boot device: NOR\n"); + return BOOT_DEVICE_NOR; + case PSD_NAND_FLASH: + printf("Selected boot device: NAND\n"); + return BOOT_DEVICE_NAND; + case PSD_UFS_FLASH: + printf("Selected boot device: UFS\n"); + return BOOT_DEVICE_UFS; } - - if (psd->entry[PSD_ID_BOOT_MEDIA_TYPE].valid) { - switch (psd->entry[PSD_ID_BOOT_MEDIA_TYPE].value) { - case PSD_MMC_FLASH: - printf("Selected boot device: MMC\n"); - return BOOT_DEVICE_MMC1; - case PSD_NOR_FLASH: - printf("Selected boot device: NOR\n"); - return BOOT_DEVICE_NOR; - case PSD_NAND_FLASH: - printf("Selected boot device: NAND\n"); - return BOOT_DEVICE_NAND; - case PSD_UFS_FLASH: - printf("Selected boot device: UFS\n"); - return BOOT_DEVICE_UFS; - } - } - } - - /* - * Fallback: Use UFS when PBL shared data is not available - */ - if (IS_ENABLED(CONFIG_SPL_UFS_QCOM)) { - printf("Selected boot device: UFS\n"); - return BOOT_DEVICE_UFS; } pr_err("No boot device configured\n"); @@ -706,18 +687,16 @@ void board_init_f(ulong dummy) preloader_console_init(); - if (CONFIG_IS_ENABLED(QCOM_BOOT_FROM_PBL)) { - ret = qcom_spl_loader_pre_ddr(spl_boot_device()); - if (ret) { - pr_debug("qcom_spl_loader_pre_ddr() failed (%d)\n", ret); - goto fail; - } + ret = qcom_spl_loader_pre_ddr(spl_boot_device()); + if (ret) { + pr_debug("qcom_spl_loader_pre_ddr() failed (%d)\n", ret); + goto fail; + } - ret = qclib_post_process_from_spl(); - if (ret) { - pr_debug("qclib_post_process_from_spl() failed (%d)\n", ret); - goto fail; - } + ret = qclib_post_process_from_spl(); + if (ret) { + pr_debug("qclib_post_process_from_spl() failed (%d)\n", ret); + goto fail; } board_init_r(NULL, 0); diff --git a/configs/qcom_lemans_spl_defconfig b/configs/qcom_lemans_spl_defconfig deleted file mode 100644 index 8b63e44d4400..000000000000 --- a/configs/qcom_lemans_spl_defconfig +++ /dev/null @@ -1,106 +0,0 @@ -# Configuration for building U-Boot to be flashed -# to the uefi partition of Lemans-EVK dev boards with -# the "Linux Embedded" partition layout (which have -# a dedicated "uefi" partition for edk2/U-Boot) - -#include "qcom_defconfig" - -# Address where U-Boot proper will be loaded -CONFIG_TEXT_BASE=0xaf000000 -CONFIG_REMAKE_ELF=y -CONFIG_FASTBOOT_BUF_ADDR=0xdb300000 -CONFIG_DEFAULT_DEVICE_TREE="qcom/lemans-evk" -CONFIG_ENV_IS_IN_SCSI=y -CONFIG_ENV_SCSI_PART_USE_TYPE_GUID=y -# SCSI partition type GUID for logfs partition -CONFIG_ENV_SCSI_PART_TYPE_GUID="bc0330eb-3410-4951-a617-03898dbe3372" -# CONFIG_ENV_IS_DEFAULT is not set -# CONFIG_ENV_IS_NOWHERE is not set - -# SPL configurations for Lemans-EVK -# Purpose: Load FIT image (containing TFA, OPTEE and U-Boot proper) -# from UFS storage and jump to next image (TFA) - -CONFIG_SPL=y -CONFIG_SPL_BUILD=y -CONFIG_SPL_FRAMEWORK=y - -CONFIG_SPL_TEXT_BASE=0x1c100000 -CONFIG_SPL_MAX_SIZE=0x60000 -CONFIG_SPL_BSS_LIMIT=y -CONFIG_SPL_BSS_MAX_SIZE=0x10000 -# CONFIG_SPL_SEPARATE_BSS is not set - -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_HAVE_INIT_STACK=y -CONFIG_SPL_STACK=0xD7300000 - -CONFIG_SPL_SYS_MALLOC_F_LEN=0x80000 -CONFIG_SPL_SYS_MALLOC=y -CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y -CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0xdb300000 -CONFIG_SPL_SYS_MALLOC_SIZE=0x10000 - -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y - -CONFIG_SPL_DM=y -CONFIG_SPL_OF_LIBFDT=y -CONFIG_SPL_OF_CONTROL=y -CONFIG_SPL_OF_REAL=y -CONFIG_SPL_SIMPLE_BUS=y - -CONFIG_SPL_DM_RESET=y - -CONFIG_SPL_CLK=y - -CONFIG_SPL_GPIO=y -CONFIG_SPL_DM_GPIO=y - -CONFIG_SPL_UFS=y -CONFIG_SPL_UFS_QCOM=y - -CONFIG_SPL_UFS_RAW_U_BOOT_DEVNUM=4 -CONFIG_SPL_UFS_RAW_U_BOOT_SECTOR=0x0 -CONFIG_SPL_UFS_RAW_U_BOOT_USE_PARTITION=y -CONFIG_SPL_UFS_RAW_U_BOOT_PARTITION_NAME="uefi_a" -CONFIG_SPL_UFS_RAW_U_BOOT_PARTITION_NUM=1 - -CONFIG_SPL_PARTITIONS=y -CONFIG_SPL_DOS_PARTITION=y -CONFIG_SPL_CHARSET=y - -CONFIG_SPL_PHY=y -CONFIG_SPL_PHY_QCOM_QMP_UFS=y - -CONFIG_SPL_POWER=y -CONFIG_SPL_POWER_DOMAIN=y - -CONFIG_SPL_LOAD_FIT=y - -CONFIG_SPL_ATF=y - -CONFIG_SPL_REMAKE_ELF=y - -CONFIG_COUNTER_FREQUENCY=19200000 - -# CONFIG_SAVE_PREV_BL_FDT_ADDR is not set -# CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR is not set -CONFIG_SPL_ATF_LOAD_IMAGE_V2=y -CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y -CONFIG_SPL_HAS_LOAD_FIT_ADDRESS=y -CONFIG_SPL_LOAD_FIT_ADDRESS=0xB0800000 -CONFIG_SPL_FRAMEWORK_BOARD_INIT_F=y - -CONFIG_SPL_DRIVERS_MISC=y -CONFIG_SPL_SERIAL=y -CONFIG_SPL_MISC=y -CONFIG_SPL_QCOM_GENI=y -CONFIG_SPL_MSM_GENI_SERIAL=y - -CONFIG_SPL_BANNER_PRINT=y -CONFIG_SPL_CLK_STUB=y -CONFIG_SPL_PINCTRL=y -CONFIG_SPL_PINCTRL_QCOM_SA8775P=y -CONFIG_SPL_QCOM_SMEM=y -# CONFIG_SPL_QCOM_BOOT_FROM_PBL is not set From c196f78a59263d4221610a7ef09adfcb39a32232 Mon Sep 17 00:00:00 2001 From: Balaji Selvanathan Date: Wed, 2 Sep 2026 22:57:24 +0530 Subject: [PATCH 3/3] Revert "[qcom-next] Add SPL support for Qualcomm Snapdragon SoCs" (PR #77) Revert the initial SPL support for Qualcomm Snapdragon SoCs (IPQ5210 and core SPL infrastructure) merged via qualcomm-linux/u-boot PR #77 (https://github.com/qualcomm-linux/u-boot/pull/77). This reverts the following qcom-next commits: 976563d59b0 doc: board/qualcomm: Update RDP build instructions 9fa2f2729e3 configs: add qcom_ipq5210_mmc_defconfig 2bd29d62790 mach-snapdragon: Add commands to create wrapper ELF 18e16eea7b2 mach-snapdragon: spl: Update SMEM with boot details 60b1477d513 mach-snapdragon: Add initial support for QCOM SPL e3003d1678c spl: Include SMEM driver in SPL 3635906b1e2 mach-snapdragon: Add PBL shared data defines 16c3f9249d0 misc: qcom_geni: Add minicore support f460d843b62 pinctrl: qcom: Add ipq5210 pinctrl driver 945097fb64d clk/qcom: add initial clock driver for ipq5210 316563b1a79 dts: ipq5210-rdp504-u-boot: add override dtsi 3034e843062 binman: qcom: Add type definitions for Qualcomm binaries eb026ca0450 binman: Ignore noload segments for image numbering Signed-off-by: Balaji Selvanathan --- arch/arm/Kconfig | 5 +- arch/arm/dts/ipq5210-rdp504-u-boot.dtsi | 128 --- arch/arm/mach-snapdragon/Kconfig | 8 - arch/arm/mach-snapdragon/Makefile | 3 - .../mach-snapdragon/ipq5210-spl-wrap-elf.lds | 18 - arch/arm/mach-snapdragon/qcom-priv.h | 51 -- arch/arm/mach-snapdragon/spl.c | 749 ------------------ common/spl/Kconfig | 8 - configs/qcom_ipq5210_mmc_defconfig | 106 --- doc/board/qualcomm/rdp.rst | 83 +- drivers/Makefile | 1 - drivers/clk/qcom/Kconfig | 8 - drivers/clk/qcom/Makefile | 1 - drivers/clk/qcom/clock-ipq5210.c | 98 --- drivers/misc/Kconfig | 6 - drivers/misc/Makefile | 1 - drivers/misc/qcom_geni-minicore.c | 102 --- drivers/misc/qcom_geni.c | 100 +-- drivers/pinctrl/qcom/Kconfig | 8 - drivers/pinctrl/qcom/Makefile | 1 - drivers/pinctrl/qcom/pinctrl-ipq5210.c | 349 -------- include/soc/qcom/geni-se.h | 5 - include/soc/qcom/qup-fw-load.h | 12 - include/soc/qcom/smem.h | 4 - scripts/Makefile.xpl | 24 - tools/binman/elf.py | 4 +- tools/binman/etype/qcom_appsbl.py | 18 - tools/binman/etype/qcom_config.py | 21 - tools/binman/etype/qcom_lib.py | 21 - 29 files changed, 16 insertions(+), 1927 deletions(-) delete mode 100644 arch/arm/dts/ipq5210-rdp504-u-boot.dtsi delete mode 100644 arch/arm/mach-snapdragon/ipq5210-spl-wrap-elf.lds delete mode 100644 arch/arm/mach-snapdragon/spl.c delete mode 100644 configs/qcom_ipq5210_mmc_defconfig delete mode 100644 drivers/clk/qcom/clock-ipq5210.c delete mode 100644 drivers/misc/qcom_geni-minicore.c delete mode 100644 drivers/pinctrl/qcom/pinctrl-ipq5210.c delete mode 100644 tools/binman/etype/qcom_appsbl.py delete mode 100644 tools/binman/etype/qcom_config.py delete mode 100644 tools/binman/etype/qcom_lib.py diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 8304c2ebb7f9..4e4d3a3e157d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1146,13 +1146,12 @@ config ARCH_SNAPDRAGON select SPMI select BOARD_LATE_INIT select OF_BOARD - select SAVE_PREV_BL_FDT_ADDR if !ENABLE_ARM_SOC_BOOT0_HOOK && !SPL - select LINUX_KERNEL_IMAGE_HEADER if !ENABLE_ARM_SOC_BOOT0_HOOK && !SPL + select SAVE_PREV_BL_FDT_ADDR if !ENABLE_ARM_SOC_BOOT0_HOOK + select LINUX_KERNEL_IMAGE_HEADER if !ENABLE_ARM_SOC_BOOT0_HOOK select SYSRESET select SYSRESET_PSCI if !QCOM_SNAGBOOT_MODE select ANDROID_BOOT_IMAGE_IGNORE_BLOB_ADDR select MMU_PGPROT - select SUPPORT_SPL imply OF_UPSTREAM imply CMD_DM imply DM_USB_GADGET diff --git a/arch/arm/dts/ipq5210-rdp504-u-boot.dtsi b/arch/arm/dts/ipq5210-rdp504-u-boot.dtsi deleted file mode 100644 index 5f19915047b5..000000000000 --- a/arch/arm/dts/ipq5210-rdp504-u-boot.dtsi +++ /dev/null @@ -1,128 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * IPQ5210 RDP504 board device tree source - * - * Copyright (c) 2026 The Linux Foundation. All rights reserved. - */ - -/ { - /* Will be removed when SMEM parsing is updated */ - memory@80000000 { - bootph-all; - device_type = "memory"; - reg = <0x0 0x80000000 0x0 0x20000000>; - }; - - binman: binman { - description = "IPQ5210 boot loader"; - fit { - description = "IPQ5210 Boot Loader FIT"; - fit,fdt-list = "of-list"; - fit,external-offset = <0x0>; - - images { - @qcom-config-SEQ { - fit,operation = "split-elf"; - description = "QC Config"; - type = "qcom-config"; - arch = "arm64"; - os = "elf"; - compression = "none"; - fit,load; - fit,entry; - fit,data; - - qcom-config { - }; - }; - - @qcom-lib-SEQ { - fit,operation = "split-elf"; - description = "QC Lib"; - arch = "arm64"; - os = "elf"; - type = "qcom-lib"; - compression = "none"; - fit,load; - fit,entry; - fit,data; - - qcom-lib { - }; - }; - - @atf-SEQ { - fit,operation = "split-elf"; - description = "ARM Trusted Firmware"; - type = "atf_bl31"; - arch = "arm64"; - os = "arm-trusted-firmware"; - compression = "none"; - fit,load; - fit,entry; - fit,data; - - atf-bl31 { - }; - }; - - @qcom-appsbl-SEQ { - fit,operation = "split-elf"; - type = "qcom-appsbl"; - os = "U-Boot"; - arch = "arm64"; - compression = "none"; - fit,load; - fit,entry; - fit,data; - - qcom-appsbl { - }; - }; - - @tee-SEQ { - fit,operation = "split-elf"; - description = "TEE"; - type = "tee_os"; - arch = "arm64"; - os = "tee"; - compression = "none"; - fit,load; - fit,entry; - fit,data; - - tee-os { - }; - }; - }; - - configurations { - default = "pre-ddr"; - - pre-ddr { - description = "pre-ddr"; - loadables = "qcom-config-1", - "qcom-config-2", - "qcom-config-3", - "qcom-config-4", - "qcom-lib-1", - "qcom-lib-2", - "qcom-lib-3", - "qcom-lib-4"; - }; - - post-ddr { - description = "post-ddr"; - loadables = "atf-1", - "atf-2", - "atf-3", - "atf-4", - "atf-5", - "atf-6", - "qcom-appsbl-1", - "tee-1"; - }; - }; - }; - }; -}; diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig index 483b750d5dcf..dbe38fb3912a 100644 --- a/arch/arm/mach-snapdragon/Kconfig +++ b/arch/arm/mach-snapdragon/Kconfig @@ -83,14 +83,6 @@ config QCOM_EL2_GUNYAH_EXIT_SUPPORT endchoice -config SPL_WRAPPER_ELF - bool "Create wrapper ELF for applicable platforms" - depends on SPL - help - Some platforms embed the U-Boot SPL binary within an ELF as a segment. - Additional tools are used to convert this ELF into an image that is - usable for the boot ROM. - config QCOM_BOOT0_SNAGBOOT_MODE bool "boot0.h initialization for Snagboot mode" help diff --git a/arch/arm/mach-snapdragon/Makefile b/arch/arm/mach-snapdragon/Makefile index c80f63e33f65..1566bbe50a1f 100644 --- a/arch/arm/mach-snapdragon/Makefile +++ b/arch/arm/mach-snapdragon/Makefile @@ -2,11 +2,8 @@ # # (C) Copyright 2015 Mateusz Kulikowski -ifndef CONFIG_XPL_BUILD obj-y += board.o dram.o obj-$(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) += capsule_update.o obj-$(CONFIG_QCOM_FIT_MULTIDTB) += qcom_fit_multidtb.o obj-$(CONFIG_QCOM_HWDETECT) += qcom_hwdetect.o obj-$(CONFIG_OF_LIVE) += of_fixup.o -endif -obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/arch/arm/mach-snapdragon/ipq5210-spl-wrap-elf.lds b/arch/arm/mach-snapdragon/ipq5210-spl-wrap-elf.lds deleted file mode 100644 index 5a582e65ca02..000000000000 --- a/arch/arm/mach-snapdragon/ipq5210-spl-wrap-elf.lds +++ /dev/null @@ -1,18 +0,0 @@ -/* - * SPDX-License-Identifier: GPL-2.0 - * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. - */ -PHDRS { - ptype PT_LOAD FLAGS(0x7); -} - -ENTRY(_entry) - -SECTIONS { - . = IMAGE_TEXT_BASE; - _entry = . ; - data : { - *(.data) - . = ALIGN(4); - } :ptype -} diff --git a/arch/arm/mach-snapdragon/qcom-priv.h b/arch/arm/mach-snapdragon/qcom-priv.h index 327e378e4fd3..39dc8fcc76ad 100644 --- a/arch/arm/mach-snapdragon/qcom-priv.h +++ b/arch/arm/mach-snapdragon/qcom-priv.h @@ -39,56 +39,5 @@ void qcom_configure_capsule_updates(void) {} #endif /* EFI_HAVE_CAPSULE_SUPPORT */ int qcom_parse_memory(const void *fdt, bool fdt_is_internal); -enum pbl_shared_data_param_id { - PSD_ID_PBL_FW_VERSION = 0x0, /* PBL firmware version */ - PSD_ID_PBL_PATCH_VERSION = 0x1, /* Patch version */ - PSD_ID_RMB_MBOX_BASE_ADDR = 0x2, /* Not used */ - PSD_ID_CPU_BOOT_SPEED_HZ = 0x3, /* CPU boot speed (Hz) */ - PSD_ID_BOOT_MEDIA_TYPE = 0x4, /* Boot media type */ - PSD_ID_IS_EDL_MODE = 0x5, /* Emergency Download mode */ - PSD_ID_DEV_PROG_ELF_ENTRY_ADDR = 0x6, /* Not used */ - PSD_ID_XBL_CONFIG_ELF_ENTRY_ADDR = 0x7, /* Not used */ - PSD_ID_XBL_SC_EXT_ELF_ENTRY_ADDR = 0x8, /* Not used */ - PSD_ID_PBL_TIMESTAMPS_BUFFER_ADDR = 0x9, /* PBL logs address */ - PSD_ID_PBL_TIMESTAMPS_BUFFER_SIZE = 0xa, /* PBL log size */ - PSD_ID_PBL_DEBUG_SHARED_INFO_ADDR = 0xb, /* Debug info address */ - PSD_ID_PBL_DEBUG_SHARED_INFO_SIZE = 0xc, /* Debug info size */ - PSD_ID_TME_CPU_PBL_ROM_BYPASS_FUSE = 0xd, /* Secure boot status */ - PSD_ID_XBL_SC_DEBUG_LOG_ADDR = 0xe, /* XBL SC debug log address */ - PSD_ID_XBL_SC_DEBUG_LOG_SIZE = 0xf, /* XBL SC debug log size */ - PSD_ID_CURRENT_IMAGE_SET = 0x10, /* Booted image set */ - PSD_ID_MEDIA_DATA_INFO_ADDR = 0x11, /* Media info pointer */ - PSD_ID_MEDIA_DATA_INFO_SIZE = 0x12, /* Media info size */ - PBL_SHARED_DATA_PARAM_MAX, - PBL_SHARED_DATA_PARAM_SIZE = 0xffffffffu, /* to force 32 bits */ -}; - -enum pbl_boot_flash_type { - PSD_NO_FLASH = 0, - PSD_NOR_FLASH = 1, - PSD_NAND_FLASH = 2, - PSD_ONENAND_FLASH = 3, - PSD_SDC_FLASH = 4, - PSD_MMC_FLASH = 5, - PSD_SPI_FLASH = 6, - PSD_PCIE_FLASH = 7, - PSD_UFS_FLASH = 8, - PSD_RSVD_1_FLASH = 9, - PSD_USB_FLASH = 10, - PSD_SPI_NAND_FLASH = 11, - PSD_SPI_FLASH_GPT = 12, -}; - -struct pbl_shared_data_entry { - u32 param_id; - ulong value; - bool valid; -}; - -struct pbl_shared_data { - u32 version; - u32 num_of_entries; - struct pbl_shared_data_entry entry[PBL_SHARED_DATA_PARAM_MAX]; -}; #endif /* __QCOM_PRIV_H__ */ diff --git a/arch/arm/mach-snapdragon/spl.c b/arch/arm/mach-snapdragon/spl.c deleted file mode 100644 index c1a7d4cb00f4..000000000000 --- a/arch/arm/mach-snapdragon/spl.c +++ /dev/null @@ -1,749 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "qcom-priv.h" - -DECLARE_GLOBAL_DATA_PTR; - -#define QCOM_SPL_TCSR_REG_ADDR 0x195c100 -#define QCOM_SPL_DLOAD_MASK BIT(4) -#define QCOM_SPL_DLOAD_SHFT 0x4 - -#define QCOM_SPL_IS_DLOAD_BIT_SET ((readl(QCOM_SPL_TCSR_REG_ADDR) & \ - QCOM_SPL_DLOAD_MASK) >> \ - QCOM_SPL_DLOAD_SHFT) - -#define QCOM_SPL_FIT_IMG_PARTITION "0:BOOTLDR" - -#define MAGIC_KEY "QCLIB_CB" -#define MAX_ENTRIES 0xF -#define IF_TABLE_VERSION 0x1 -#define QCCONFIG "qc_config" -#define QCSDI "qcsdi" - -/** - * struct interface_table_entry - Meta data for blobs in QCLIB interface - * @entry_name: Name of the data blob (e.g., "dcb_settings"). - * @address: Address of the data blob. - * @size: Size of the data blob. - * @attributes: Attributes for the blob (e.g., save to storage). - */ -struct interface_table_entry { - char entry_name[24]; - u64 address; - u32 size; - u32 attributes; -}; - -/** - * struct interface_table - QCLIB Interface table header - * @magic_key: Magic key for validation ("QCLIB_CB"). - * @version: Interface table version. - * @num_entries: Number of valid entries. - * @max_entries: Maximum allowable entries. - * @global_attributes: Flags for global attributes (e.g., SDI path). - * @reserved1: Reserved for future use. - * @reserved2: Reserved for future use. - * @if_table_entries: Array of interface table entries. - */ -struct interface_table { - char magic_key[8]; - u32 version; - u32 num_entries; - u32 max_entries; - u32 global_attributes; - u32 reserved1; - u32 reserved2; - struct interface_table_entry if_table_entries[MAX_ENTRIES]; -}; - -/** - * qcom_spl_jump_img_entry_t - Type definition for image entry point functions. - * @arg1: First argument passed to the entry point. - * @arg2: Second argument passed to the entry point. - */ -typedef void (*qcom_spl_jump_img_entry_t)(void *arg1, void *arg2); - -/* - * Global QCSDI address populated by qclib_post_process_from_spl - * Placed in .data section to ensure it persists - */ -static u64 g_qcsdi_address __section(".data"); - -/** - * lowlevel_init() - Early low-level initialization. - * - * This function performs very early hardware initialization, - * specifically disabling the MMU if enabled by PBL. - */ -void lowlevel_init(void) -{ -} - -/** - * qcom_spl_error_handler() - Centralized SPL error handler. - * @arg: Generic argument (unused). - * - * This function is invoked upon critical errors during the SPL boot process. - */ -void qcom_spl_error_handler(void *arg) -{ - pr_err("Entered the SPL Error Handler\n"); - hang(); -} - -/** - * qcom_spl_malloc_init_f() - Initialize malloc for SPL. - * - * This function initializes the malloc subsystem using the memory region - */ -void qcom_spl_malloc_init_f(void) -{ - if (!CONFIG_IS_ENABLED(SYS_MALLOC_F)) - return; - /* - * Set up by crt0.S - */ - assert(gd->malloc_base); - gd->malloc_limit = CONFIG_VAL(SYS_MALLOC_F_LEN); - gd->malloc_ptr = 0; - - mem_malloc_init(gd->malloc_base, gd->malloc_limit); - gd->flags |= GD_FLG_FULL_MALLOC_INIT; -} - -/** - * qcom_spl_get_fit_img_entry_point() - Get entry point from FIT image node. - * @fit: Pointer to the FIT image blob. - * @node: Node ID within the FIT image. - * @entry_point: Pointer to store the retrieved entry point. - * - * Return: 0 on success, or a negative error code on failure. - */ -static int qcom_spl_get_fit_img_entry_point(void *fit, int node, - u64 *entry_point) -{ - int ret; - - if (!fit) { - pr_err("FIT image blob is NULL\n"); - return -EINVAL; - } - if (node <= 0) { - pr_err("Invalid FIT node ID %d\n", node); - return -EINVAL; - } - if (!entry_point) { - pr_err("Entry point pointer is NULL\n"); - return -EINVAL; - } - - ret = fit_image_get_entry(fit, node, (ulong *)entry_point); - if (ret) { - pr_debug("No entry point for node %d, trying load address\n", - node); - ret = fit_image_get_load(fit, node, (ulong *)entry_point); - if (ret) - pr_err("No load address for node %d (%d)\n", node, ret); - } - - return ret; -} - -#if IS_ENABLED(CONFIG_SPL_SMEM) -/** - * qcom_spl_populate_smem() - Populate shared memory (SMEM) information. - * @ctx: Pointer to the global SPL context. - * - * This function initializes and populates various SMEM items with boot-related - * information, such as flash type, try-mode status, and ATF enable status. - * Return: 0 on success, or a negative error code on failure. - */ -static int qcom_spl_populate_smem(void *ctx) -{ - int ret; - size_t size; - struct udevice *smem; - u32 *fltype; - - ret = uclass_get_device(UCLASS_SMEM, 0, &smem); - if (ret) { - pr_err("Failed to find SMEM node (%d)\n", ret); - return ret; - } - - size = sizeof(u32); - ret = smem_alloc(smem, -1, SMEM_BOOT_FLASH_TYPE, size); - if (ret) { - pr_err("Failed to alloc item: SMEM_BOOT_FLASH_TYPE (%d)\n", ret); - return ret; - } - - fltype = (u32 *)smem_get(smem, -1, SMEM_BOOT_FLASH_TYPE, &size); - if (!fltype) { - pr_err("Failed to get item: SMEM_BOOT_FLASH_TYPE\n"); - return -ENOENT; - } - - if (IS_ENABLED(CONFIG_SPL_MMC)) { - *fltype = SMEM_BOOT_MMC_FLASH; - return 0; - } - - pr_err("Boot medium not specified\n"); - - return -ENOENT; -} -#endif /* IS_ENABLED(CONFIG_SPL_SMEM) */ - -/** - * qcom_spl_get_iftbl_entry_by_name() - Get an interface table entry by name. - * @if_tbl: Pointer to the QCLIB interface table. - * @name: Name of the entry to find. - * @entry: Pointer to a buffer where the found entry will be copied. - * - * Return: 0 on success, or a negative error code on failure. - */ -static int qcom_spl_get_iftbl_entry_by_name(struct interface_table *if_tbl, - char *name, - struct interface_table_entry *entry) -{ - uint uc_index; - - if (!if_tbl) { - pr_err("Invalid interface table\n"); - return -EINVAL; - } - if (!name) { - pr_err("Invalid name\n"); - return -EINVAL; - } - if (!entry) { - pr_err("Invalid entry pointer\n"); - return -EINVAL; - } - - for (uc_index = 0; uc_index < if_tbl->num_entries; uc_index++) { - if (!strcmp(if_tbl->if_table_entries[uc_index].entry_name, name)) { - memcpy(entry, - &if_tbl->if_table_entries[uc_index], - sizeof(struct interface_table_entry)); - return 0; - } - } - pr_err("Interface table entry '%s' not found\n", name); - - return -ENOENT; -} - -/** - * qclib_post_process_from_spl() - Post-process QCLIB image from SPL FIT address - * - * This function performs the same operations as qclib_post_process() but - * takes no arguments. It gets the FIT image from CONFIG_SPL_LOAD_FIT_ADDRESS - * and finds the qcom-lib-1 node automatically. - * - * Return: 0 on success, or a negative error code on failure. - */ -int qclib_post_process_from_spl(void) -{ - int ret; - int entry_idx; - int images_node; - int qcconfig_node; - int qclib_node; - const void *fit; - struct interface_table if_tbl; - struct interface_table_entry qcsdi_entry; - qcom_spl_jump_img_entry_t qclib_entry; - u64 entry_point; - - /* Get FIT image from SPL load address */ - fit = (const void *)CONFIG_SPL_LOAD_FIT_ADDRESS; - - pr_debug("QCLIB post-processing from SPL: fit=%p\n", fit); - - /* - * Find "images" node in FIT (get it once and reuse) - */ - images_node = fdt_subnode_offset(fit, 0, "images"); - if (images_node < 0) { - pr_err("Failed to find images node in FIT\n"); - return -ENOENT; - } - - /* - * Find "qcom-config-1" image node - */ - qcconfig_node = fdt_subnode_offset(fit, images_node, "qcom-config-1"); - if (qcconfig_node < 0) { - pr_err("Failed to find qcom-config-1 node in FIT\n"); - return -ENOENT; - } - - /* - * Find "qcom-lib-1" image node - */ - qclib_node = fdt_subnode_offset(fit, images_node, "qcom-lib-1"); - if (qclib_node < 0) { - pr_err("Failed to find qcom-lib-1 node in FIT\n"); - return -ENOENT; - } - - /* - * Initialize the local interface table - */ - memset(&if_tbl, 0, sizeof(struct interface_table)); - memcpy(if_tbl.magic_key, MAGIC_KEY, strlen(MAGIC_KEY)); - - if_tbl.version = IF_TABLE_VERSION; - if_tbl.num_entries = 0; - if_tbl.max_entries = MAX_ENTRIES; - - /* - * Add QCCONFIG entry to the interface table - */ - entry_idx = 0; - memcpy(if_tbl.if_table_entries[entry_idx].entry_name, - QCCONFIG, strlen(QCCONFIG)); - - ret = qcom_spl_get_fit_img_entry_point((void *)fit, - qcconfig_node, - &if_tbl.if_table_entries[entry_idx].address); - if (ret) { - pr_err("Failed to get qcom-config-1 entry point (%d)\n", ret); - return ret; - } - if_tbl.if_table_entries[entry_idx].attributes = 0; - if_tbl.num_entries = entry_idx + 1; - - /* - * Add QCSDI entry to the interface table - */ - entry_idx++; - memcpy(if_tbl.if_table_entries[entry_idx].entry_name, - QCSDI, strlen(QCSDI)); - - if_tbl.if_table_entries[entry_idx].address = 0; - if_tbl.if_table_entries[entry_idx].attributes = 0; - if_tbl.num_entries = entry_idx + 1; - - /* - * Get qcom-lib-1 entry point - */ - ret = qcom_spl_get_fit_img_entry_point((void *)fit, - qclib_node, - &entry_point); - if (ret) { - pr_err("Failed to get qcom-lib-1 entry point (%d)\n", ret); - return ret; - } - - qclib_entry = (qcom_spl_jump_img_entry_t)entry_point; - - pr_info("Jumping to qcom-lib-1 at 0x%llx\n", entry_point); - qclib_entry(&if_tbl, NULL); - - /* Parse the interface table to extract QCSDI address */ - ret = qcom_spl_get_iftbl_entry_by_name(&if_tbl, QCSDI, &qcsdi_entry); - if (ret) { - pr_err("Failed to get QCSDI entry from interface table (%d)\n", ret); - return ret; - } - - g_qcsdi_address = qcsdi_entry.address; - pr_info("QCSDI address: 0x%llx\n", g_qcsdi_address); - - return 0; -} - -#if IS_ENABLED(CONFIG_SPL_SMEM) -/** - * spl_board_prepare_for_boot() - Prepare board for boot - * - * This function is called by SPL before jumping to the next stage. - * It populates SMEM during coldboot. - */ -void spl_board_prepare_for_boot(void) -{ - int ret; - - /* - * Populate SMEM in coldboot (Dload bit not set) - */ - if (!QCOM_SPL_IS_DLOAD_BIT_SET) { - ret = qcom_spl_populate_smem(NULL); - if (ret) { - pr_err("Failed to populate SMEM (%d)\n", ret); - qcom_spl_error_handler(NULL); - } - } -} -#endif /* IS_ENABLED(CONFIG_SPL_SMEM) */ - -/** - * spl_get_load_buffer() - Allocate a cache-aligned buffer for image loading. - * @offset: Offset (unused, typically 0 for SPL). - * @size: Size of the buffer to allocate. - * - * Return: Pointer to the allocated buffer, or NULL on failure. - */ -struct legacy_img_hdr *spl_get_load_buffer(ssize_t offset, size_t size) -{ - return (void *)(CONFIG_SPL_LOAD_FIT_ADDRESS); -} - -/** - * board_spl_fit_buffer_addr() - Get the address of the FIT image buffer. - * @fit_size: Size of the FIT image. - * @sectors: Number of sectors. - * @bl_len: Block length. - * - * Return: Address of the FIT image buffer. - */ -void *board_spl_fit_buffer_addr(ulong fit_size, int sectors, int bl_len) -{ - return spl_get_load_buffer(0, sectors * bl_len); -} - -/** - * bl2_plat_get_bl31_params_v2() - Retrieve and fixup BL31 parameters. - * @bl32_entry: Entry point for BL32 (OP-TEE). - * @bl33_entry: Entry point for BL33 (U-Boot/kernel). - * @fdt_addr: Address of the Device Tree Blob (FDT). - * - * Return: Pointer to the populated BL31 parameters structure. - */ -struct bl_params *bl2_plat_get_bl31_params_v2(uintptr_t bl32_entry, - uintptr_t bl33_entry, - uintptr_t fdt_addr) -{ - struct bl_params *bl_params; - struct bl_params_node *node; - - /* - * Populate the bl31 params with default values. - */ - bl_params = bl2_plat_get_bl31_params_v2_default(bl32_entry, bl33_entry, - fdt_addr); - - /* - * Fixup the bl31 params based on platform requirements. - */ - for_each_bl_params_node(bl_params, node) { - if (node->image_id == ATF_BL31_IMAGE_ID) { - /* - * Pass QCSDI address to BL31 via arg0 - * This address was populated by qclib_post_process() - */ - if (g_qcsdi_address == 0) - pr_warn("QCSDI address not set, BL31 may not function correctly\n"); - - node->ep_info->args.arg0 = g_qcsdi_address; - pr_debug("Setting BL31 arg0 to QCSDI address: 0x%llx\n", g_qcsdi_address); - } - } - - return bl_params; -} - -/** - * qcom_spl_loader_pre_ddr() - SPL loader for pre-DDR stage. - * @boot_device: Type of boot device. - * - * Return: 0 on success, or a negative error code on failure. - */ -static int qcom_spl_loader_pre_ddr(u8 boot_device) -{ - struct spl_image_loader *loader, *drv; - struct spl_image_info spl_image = { 0 }; - struct spl_boot_device boot_dev = { .boot_device = boot_device, }; - int ret = -ENODEV, n_ents; - - drv = ll_entry_start(struct spl_image_loader, spl_image_loader); - n_ents = ll_entry_count(struct spl_image_loader, spl_image_loader); - - for (loader = drv; loader && (loader != drv + n_ents); loader++) { - if (boot_device != loader->boot_device) - continue; - - ret = loader->load_image(&spl_image, &boot_dev); - if (!ret) - break; - - printf("%s: Error: %d\n", __func__, ret); - } - - return ret; -} - -#if CONFIG_IS_ENABLED(MMC) -/** - * spl_find_partition_info() - Find partition information by name - * @uclass_id: Device class ID (UCLASS_MMC) - * @device_num: Device number within the class - * @part_name: Name of the partition to find - * @info: Pointer to store partition information - * - * This function provides partition lookup logic for MMC. - * Return: Partition number on success, negative error code on failure - */ -static int spl_find_partition_info(enum uclass_id uclass_id, int device_num, - const char *part_name, - struct disk_partition *info) -{ - int ret; - struct blk_desc *desc; - - if (!part_name || !info) { - printf("Invalid parameters for partition lookup\n"); - return -EINVAL; - } - - /* - * Get block device descriptor - */ - desc = blk_get_devnum_by_uclass_id(uclass_id, device_num); - if (!desc) { - printf("Block device not found for class %d, device %d\n", - uclass_id, device_num); - return -ENODEV; - } - - /* - * Initialize partition table if needed - */ - if (desc->part_type == PART_TYPE_UNKNOWN) { - printf("Initializing partition table\n"); - /* - * Prefer EFI/GPT - */ - desc->part_type = PART_TYPE_EFI; - } - - /* - * Find partition by name - */ - ret = part_get_info_by_name(desc, part_name, info); - if (ret < 0) { - printf("Partition '%s' not found\n", part_name); - return -ENOENT; - } - - printf("Found partition '%s' at partition number %d\n", part_name, ret); - return ret; -} - -/** - * spl_mmc_boot_mode() - Determine the boot mode for MMC - * @mmc: Pointer to the MMC device - * @boot_device: Boot device ID - * - * Return: MMCSD_MODE_RAW to use raw partition access - */ -u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device) -{ - return MMCSD_MODE_RAW; -} - -/** - * spl_mmc_boot_partition() - Determine which partition to boot from - * @boot_device: Boot device ID - * - * Return: Partition number to boot from, or default partition on error - */ -int spl_mmc_boot_partition(const u32 boot_device) -{ - int ret; - struct disk_partition info; - - /* - * Use common partition lookup function - */ - ret = spl_find_partition_info(UCLASS_MMC, 0, QCOM_SPL_FIT_IMG_PARTITION, &info); - if (ret < 0) { - printf("Using default MMC partition %d\n", - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION); - return CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION; - } - - return ret; -} - -/** - * spl_mmc_get_uboot_raw_sector() - Find the raw sector offset - * @mmc: Pointer to the MMC device - * @raw_sect: Sector - * - * Return: 0 if the image is at the starting of the partition without any offset. - */ -unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc, ulong raw_sect) -{ - return 0; -} -#endif /* CONFIG_IS_ENABLED(MMC) */ - -static struct pbl_shared_data g_psd __section(".data"); - -void save_boot_params(ulong r0, ulong r1, ulong r2, ulong r3) -{ - unsigned long sctlr; - struct pbl_shared_data *psd; - - sctlr = get_sctlr(); - set_sctlr(sctlr & ~(CR_M)); /* Disable MMU */ - - psd = (struct pbl_shared_data *)r0; - - if (!psd || psd->num_of_entries < PBL_SHARED_DATA_PARAM_MAX) - goto out; - - memcpy(&g_psd, psd, sizeof(g_psd)); - -out: - save_boot_params_ret(); -} - -/** - * spl_boot_device() - Determine the boot device. - * - * Return: The mapped boot device type, - * or BOOT_DEVICE_NONE if the device is invalid. - */ -u32 spl_boot_device(void) -{ - struct pbl_shared_data *psd = &g_psd; - -#ifdef DEBUG - for (int i = 0; psd && i < psd->num_of_entries; i++) { - printf("entry[0x%x] = %d 0x%08x %d\n", i, - psd->entry[i].param_id, psd->entry[i].value, - psd->entry[i].valid); - } -#endif - - if (psd->entry[PSD_ID_IS_EDL_MODE].valid && - psd->entry[PSD_ID_IS_EDL_MODE].value) { - printf("Selected boot device: DFU\n"); - return BOOT_DEVICE_DFU; - } - - if (psd->entry[PSD_ID_BOOT_MEDIA_TYPE].valid) { - switch (psd->entry[PSD_ID_BOOT_MEDIA_TYPE].value) { - case PSD_MMC_FLASH: - printf("Selected boot device: MMC\n"); - return BOOT_DEVICE_MMC1; - case PSD_NOR_FLASH: - printf("Selected boot device: NOR\n"); - return BOOT_DEVICE_NOR; - case PSD_NAND_FLASH: - printf("Selected boot device: NAND\n"); - return BOOT_DEVICE_NAND; - case PSD_UFS_FLASH: - printf("Selected boot device: UFS\n"); - return BOOT_DEVICE_UFS; - } - } - - pr_err("No boot device configured\n"); - return BOOT_DEVICE_NONE; -} - -#if defined(CONFIG_SPL_BUILD) -/** - * board_init_f() - Main entry point for SPL. - * @dummy: Dummy argument (unused). - */ -void board_init_f(ulong dummy) -{ - int ret; - - memset(__bss_start, 0, __bss_end - __bss_start); /* Clear BSS */ - - qcom_spl_malloc_init_f(); - - ret = spl_early_init(); - if (ret) { - pr_debug("spl_early_init() failed (%d)\n", ret); - goto fail; - } - - preloader_console_init(); - - ret = qcom_spl_loader_pre_ddr(spl_boot_device()); - if (ret) { - pr_debug("qcom_spl_loader_pre_ddr() failed (%d)\n", ret); - goto fail; - } - - ret = qclib_post_process_from_spl(); - if (ret) { - pr_debug("qclib_post_process_from_spl() failed (%d)\n", ret); - goto fail; - } - - board_init_r(NULL, 0); - -fail: - if (ret) - qcom_spl_error_handler(NULL); -} -#endif /* CONFIG_SPL_BUILD */ - -int board_fit_config_name_match(const char *name) -{ - /* - * SPL loads the pre-HLOS images from bootldr FIT image - * as below - * - * In board_init_f() - Matches "pre-ddr" configuration node and - * load the images mentioned in its - * - * In board_init_r() - Matches "post-ddr" configuration node and - * load the images mentioned in its - * - */ - if (!(gd->flags & GD_FLG_SPL_INIT)) { - if (!strcmp(name, "pre-ddr")) { - printf("Selected FIT Config: %s\n", name); - return 0; - } - } else { - if (!strcmp(name, "post-ddr")) { - printf("Selected FIT Config: %s\n", name); - return 0; - } - } - - return -EINVAL; -} - -int board_fdt_blob_setup(void **fdtp) -{ - return 0; -} - -void reset_cpu(void) -{ - /* - * Empty placeholder for arch/arm/lib/reset.c:do_reset(), - * to avoid "undefined reference to `reset_cpu'" - */ -} diff --git a/common/spl/Kconfig b/common/spl/Kconfig index f3dfd029ab55..93e69f6d7c48 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -1387,14 +1387,6 @@ config SPL_RAM_DEVICE be already in memory when SPL takes over, e.g. loaded by the boot ROM. -config SPL_SMEM - bool "Support SMEM (Shared Memory manager)" - depends on SMEM - help - Enable support for the Shared Memory Manager. The driver provides an - interface to items in a heap shared among all processors. This enables - the drivers in drivers/smem as part of an SPL build. - config SPL_PCI_DFU bool "PCIe boot support" depends on SPL_PCI_ENDPOINT diff --git a/configs/qcom_ipq5210_mmc_defconfig b/configs/qcom_ipq5210_mmc_defconfig deleted file mode 100644 index e903daa581cc..000000000000 --- a/configs/qcom_ipq5210_mmc_defconfig +++ /dev/null @@ -1,106 +0,0 @@ -CONFIG_ARM=y -CONFIG_SKIP_LOWLEVEL_INIT=y -CONFIG_POSITION_INDEPENDENT=y -CONFIG_SYS_INIT_SP_BSS_OFFSET=0x180000 -CONFIG_ARCH_SNAPDRAGON=y -CONFIG_TEXT_BASE=0x87980000 -CONFIG_NR_DRAM_BANKS=2 -CONFIG_ENV_SIZE=0x40000 -CONFIG_ENV_OFFSET=0 -CONFIG_DEFAULT_DEVICE_TREE="qcom/ipq5210-rdp504" -CONFIG_SYS_LOAD_ADDR=0x90000000 -CONFIG_REMAKE_ELF=y -CONFIG_FIT=y -CONFIG_FIT_VERBOSE=y -# CONFIG_BOOTSTD is not set -CONFIG_OF_BOARD_SETUP=y -CONFIG_USE_PREBOOT=y -CONFIG_SYS_PBSIZE=1024 -# CONFIG_DISPLAY_CPUINFO is not set -CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_HUSH_PARSER=y -CONFIG_CMD_MMC=y -CONFIG_CMD_PART=y -CONFIG_EFI_PARTITION=y -CONFIG_OF_LIVE=y -CONFIG_ENV_IS_IN_MMC=y -CONFIG_CLK=y -CONFIG_CLK_QCOM_IPQ5210=y -CONFIG_MSM_GPIO=y -# CONFIG_I2C is not set -# CONFIG_INPUT is not set -CONFIG_MISC=y -CONFIG_QCOM_GENI=y -CONFIG_QCOM_GENI_MINICORE=y -CONFIG_MMC_HS200_SUPPORT=y -CONFIG_MMC_SDHCI=y -# CONFIG_MMC_SDHCI_ADMA_HELPERS is not set -# CONFIG_MMC_SDHCI_ADMA is not set -# CONFIG_MMC_SDHCI_ADMA_FORCE_32BIT is not set -# CONFIG_MMC_SDHCI_ADMA_64BIT is not set -CONFIG_MMC_SDHCI_MSM=y -CONFIG_MTD=y -CONFIG_DM_MDIO=y -CONFIG_DM_ETH_PHY=y -CONFIG_DWC_ETH_QOS=y -CONFIG_DWC_ETH_QOS_QCOM=y -CONFIG_RGMII=y -CONFIG_PHY=y -CONFIG_PHY_QCOM_QMP_UFS=y -CONFIG_PHY_QCOM_QUSB2=y -CONFIG_PINCTRL=y -CONFIG_PINCONF=y -CONFIG_PINCTRL_QCOM_IPQ5210=y -CONFIG_DEBUG_UART_MSM_GENI=y -CONFIG_DEBUG_UART_ANNOUNCE=y -CONFIG_MSM_SERIAL=y -CONFIG_MSM_GENI_SERIAL=y -CONFIG_SOC_QCOM=y -CONFIG_SPL=y -CONFIG_SPL_FRAMEWORK=y -CONFIG_SPL_OF_CONTROL=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_OF_LIBFDT=y -CONFIG_SPL_DM=y -CONFIG_SPL_GPIO=y -CONFIG_SPL_DM_GPIO=y -CONFIG_SPL_DM_RESET=y -CONFIG_SPL_PINCTRL=y -CONFIG_SPL_CLK=y -CONFIG_SPL_DRIVERS_MISC=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_SERIAL=y -CONFIG_SPL_SMEM=y -CONFIG_DM_STATS=y -CONFIG_SPL_SYS_MALLOC_F=y -CONFIG_SPL_SYS_MALLOC_F_LEN=0x20000 -CONFIG_SPL_SYS_MALLOC=y -CONFIG_SYS_MALLOC_DEFAULT_TO_INIT=y -CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y -CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80008000 -CONFIG_SPL_SYS_MALLOC_SIZE=0x20000 -# CONFIG_SPL_SEPARATE_BSS is not set -# CONFIG_SPL_USE_TINY_PRINTF is not set -CONFIG_SPL_BSS_MAX_SIZE=0x4000 -CONFIG_SPL_TEXT_BASE=0x08c24000 -CONFIG_SPL_MAX_SIZE=0x3D000 -CONFIG_SPL_MMC=y -CONFIG_SPL_MMC_SDHCI_ADMA=y -CONFIG_SPL_MMC_WRITE=y -CONFIG_SPL_SYS_MMCSD_RAW_MODE=y -CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y -CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x00 -CONFIG_COUNTER_FREQUENCY=24000000 -CONFIG_SPL_STACKPROTECTOR=y -CONFIG_SPL_LOAD_FIT=y -CONFIG_SPL_ATF=y -CONFIG_SPL_ATF_LOAD_IMAGE_V2=y -CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y -CONFIG_SPL_HAS_LOAD_FIT_ADDRESS=y -CONFIG_SPL_LOAD_FIT_ADDRESS=0x08cbe000 -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_HAVE_INIT_STACK=y -CONFIG_SPL_STACK=0x08c24000 -# CONFIG_SAVE_PREV_BL_FDT_ADDR is not set -CONFIG_SPL_WRAPPER_ELF=y diff --git a/doc/board/qualcomm/rdp.rst b/doc/board/qualcomm/rdp.rst index 354dc9d06e11..99cf8eba57ce 100644 --- a/doc/board/qualcomm/rdp.rst +++ b/doc/board/qualcomm/rdp.rst @@ -42,98 +42,17 @@ on your device with:: U-Boot should be running after a reboot (``reset``). -Build steps for IPQ5210 based Qualcomm Dragonwing F8 & N8 Platforms: --------------------------------------------------------------------- - -Please refer to the following URLs for more details about the platforms. - - F8: https://www.qualcomm.com/networking-infrastructure/products/f-series/f8-platform - - N8: https://www.qualcomm.com/networking-infrastructure/products/n-series/n8-platform - -1. Since U-Boot SPL is enabled on these platforms, the build command generates - both the U-Boot SPL and U-Boot proper images. Assuming ${uboot_dir} is the - top of the U-Boot sources and ${out_dir} as the output directory, - - $ cd ${uboot_dir} - $ export CROSS_COMPILE= - $ make -j8 O=${out_dir} qcom_ipq5210_mmc_defconfig - $ make -j8 O=${out_dir} - - U-Boot SPL image: ${out_dir}/spl/u-boot-spl.wrap-elf - U-Boot image: ${out_dir}/u-boot.elf - -2. Convert the SPL image to multi ELF - - $ cd ${out_dir}/spl - $ python elftombn.py -f u-boot-spl.wrap-elf -o u-boot-spl.mbn -v7 - $ python `create_multielf.py` -f u-boot-spl.mbn,tmel-ipq52xx-patch.elf \ - -o u-boot-spl.melf - - This u-boot-spl.melf should be flashed into 0:SPL partition. - Please see below for the location of `tmel-ipq52xx-patch.elf` - -3. Convert the U-Boot image to bootloader image - - $ cd ${out_dir} - $ python elftombn.py -f u-boot.elf -o u-boot.mbn -v7 - - The u-boot.mbn has to be combined with `qc_config.elf`, `QCLib.elf`, `TFA` - and `OPTEE`. Please see below for the location for these ELFs. TFA and OPTEE - can be built from the sources using the following commands - - TFA: - $ make PLAT=ipq52xx QTISECLIB_PATH=path/to/`libqtisec_dbg.a` SPD=opteed - - OPTEE: - $ make PLATFORM=qcom-ipq52xx -j16 - - These binaries can be combined into a flashable image using binman. - - Assuming all the required binaries are available in ${uboot_dir}/binman - - $ export bm=${uboot_dir}/binman - $ cd ${bm} - $ ${uboot_dir}/tools/binman/binman \ - --toolpath ${uboot_dir}/tools build \ - -u \ - -d ${out_dir}/u-boot.dtb \ - -O ${bm}.out \ - -I ${uboot_dir} \ - -I ${bm} \ - -I ${uboot_dir}/board \ - -I ${out_dir}/dts/upstream/src/arm64 \ - -a of-list="qcom/ipq5210-rdp504" \ - -a atf-bl31-path=${bm}/bl31.mbn \ - -a tee-os-path=${bm}/tee-pager_v2.mbn \ - -a qcom-config-path=${bm}/qc_config.elf \ - -a qcom-lib-path=${bm}/QCLib.elf \ - -a qcom-appsbl-path=${out_dir}/u-boot.mbn \ - -a default-dt="qcom/ipq5210-rdp504" \ - -a spl-bss-pad=1 \ - -a spl-dtb=y \ - -a of-spl-remove-props="interrupt-parent interrupts" - - This should be flashed into 0:BOOTLDR partition. - .. WARNING Boards with newer software versions would automatically go the emergency download (EDL) mode if U-Boot is not functioning as expected. If its a runtime failure at Uboot, the system will get reset (due to watchdog) and XBL will try to boot from next bank and if Bank B also doesn't have a functional image and is not booting fine, then the system will enter - EDL. A tool like bkerler's `edl` can be used for flashing with the + EDL. A tool like bkerler's `edl`_ can be used for flashing with the firehose loader binary appropriate for the board. Note that the support added is very basic. Restoring the original U-Boot on boards with older version of the software requires a debugger. -.. _create_multielf.py: https://raw.githubusercontent.com/coreboot/coreboot/refs/heads/main/util/qualcomm/create_multielf.py .. _elftombn.py: https://git.codelinaro.org/clo/qsdk/oss/system/tools/meta/-/tree/NHSS.QSDK.13.0.5.r2/scripts?ref_type=heads .. _edl: https://github.com/bkerler/edl -.. _libqtisec_dbg.a: https://softwarecenter.qualcomm.com/nexus/generic/product/chip/software-product/IPQ5210.NLQ.14.0/ipq5210.nlq.14.0-qca-oem-qartifact/r00036.1/WIN.TFA.1.0.R4/apss_proc/out/proprietary/qtiseclib/output/ipq52xx/release/libqtisec_dbg.a -.. _OPTEE: https://git.codelinaro.org/clo/trusted-firmware/optee_os/optee_os/-/tree/win.optee.1.0?ref_type=heads -.. _qc_config.elf: https://softwarecenter.qualcomm.com/nexus/generic/product/chip/software-product/IPQ5210.NLQ.14.0/ipq5210.nlq.14.0-qca-oem-qartifact/r00036.1/BOOT.MXF.2.3.1.1/boot_images/boot/QcomPkg/SocPkg/Hermosa/Bin/LC/RELEASE/qc_config.elf -.. _QCLib.elf: https://softwarecenter.qualcomm.com/nexus/generic/product/chip/software-product/IPQ5210.NLQ.14.0/ipq5210.nlq.14.0-qca-oem-qartifact/r00036.1/BOOT.MXF.2.3.1.1/boot_images/boot/QcomPkg/SocPkg/Hermosa/Bin/LC/RELEASE/QCLib.elf -.. _TFA: https://git.codelinaro.org/clo/trusted-firmware/tf-a/trusted-firmware-a/-/tree/win.tfa.1.0.r4?ref_type=heads -.. _tmel-ipq52xx-patch.elf: https://softwarecenter.qualcomm.com/nexus/generic/product/chip/software-product/IPQ5210.NLQ.14.0/ipq5210.nlq.14.0-qca-oem-qartifact/r00036.1/TMEL.WNS.2.4/tmel-ipq52xx-patch.elf diff --git a/drivers/Makefile b/drivers/Makefile index 6c1bdfefbea7..f694a18c0a43 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -74,7 +74,6 @@ obj-$(CONFIG_SPL_SATA) += ata/ scsi/ obj-$(CONFIG_SPL_LEGACY_BLOCK) += block/ obj-$(CONFIG_SPL_THERMAL) += thermal/ obj-$(CONFIG_SPL_UFS) += scsi/ ufs/ -obj-$(CONFIG_SPL_SMEM) += smem/ endif endif diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig index 7f990b7ecd8f..8bf0c9175fbb 100644 --- a/drivers/clk/qcom/Kconfig +++ b/drivers/clk/qcom/Kconfig @@ -31,14 +31,6 @@ config CLK_QCOM_IPQ4019 on the Snapdragon IPQ4019 SoC. This driver supports the clocks and resets exposed by the GCC hardware block. -config CLK_QCOM_IPQ5210 - bool "Qualcomm IPQ5210 GCC" - select CLK_QCOM - help - Say Y here to enable support for the Global Clock Controller - on the Qualcomm IPQ5210 SoC. This driver supports the clocks - and resets exposed by the GCC hardware block. - config CLK_QCOM_IPQ5424 bool "Qualcomm IPQ5424 GCC" select CLK_QCOM diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile index 7e979863dfcc..142ccbcaee02 100644 --- a/drivers/clk/qcom/Makefile +++ b/drivers/clk/qcom/Makefile @@ -7,7 +7,6 @@ obj-$(CONFIG_CLK_QCOM_SDM845) += clock-sdm845.o obj-$(CONFIG_CLK_QCOM_APQ8016) += clock-apq8016.o obj-$(CONFIG_CLK_QCOM_APQ8096) += clock-apq8096.o obj-$(CONFIG_CLK_QCOM_IPQ4019) += clock-ipq4019.o -obj-$(CONFIG_CLK_QCOM_IPQ5210) += clock-ipq5210.o obj-$(CONFIG_CLK_QCOM_IPQ5424) += clock-ipq5424.o obj-$(CONFIG_CLK_QCOM_IPQ9574) += clock-ipq9574.o obj-$(CONFIG_CLK_QCOM_MILOS) += clock-milos.o diff --git a/drivers/clk/qcom/clock-ipq5210.c b/drivers/clk/qcom/clock-ipq5210.c deleted file mode 100644 index 2e6037b64100..000000000000 --- a/drivers/clk/qcom/clock-ipq5210.c +++ /dev/null @@ -1,98 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Clock drivers for Qualcomm IPQ5210 - * - * (C) Copyright 2024 Linaro Ltd. - * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "clock-qcom.h" - -static ulong ipq5210_set_rate(struct clk *clk, ulong rate) -{ - struct msm_clk_priv *priv = dev_get_priv(clk->dev); - - /* - * Since GATE_CLK is deprecated and GATE_CLK_POLLED is being used - * use 'cbcr_reg' instead of 'reg'. - */ - switch (clk->id) { - case GCC_QUPV3_WRAP_SE1_CLK: - clk_rcg_set_rate_mnd(priv->base, priv->data->clks[clk->id].cbcr_reg, - 0, 2, 217, CFG_CLK_SRC_GPLL0, 16); - break; - case GCC_SDCC1_AHB_CLK: - break; - case GCC_SDCC1_APPS_CLK: - clk_rcg_set_rate_mnd(priv->base, priv->data->clks[clk->id].cbcr_reg, - 0, 6, 25, CFG_CLK_SRC_GPLL0, 16); - break; - default: - return -EINVAL; - } - - return rate; -} - -static const struct gate_clk ipq5210_clks[] = { - GATE_CLK_POLLED(GCC_QUPV3_WRAP_SE1_CLK, 0x05020, BIT(0), 0x05004), - GATE_CLK_POLLED(GCC_SDCC1_AHB_CLK, 0x3303c, BIT(0), 0x3303c), - GATE_CLK_POLLED(GCC_SDCC1_APPS_CLK, 0x3302c, BIT(0), 0x33004), - GATE_CLK_POLLED(GCC_IM_SLEEP_CLK, 0x34020, BIT(0), 0x34020), -}; - -static int ipq5210_enable(struct clk *clk) -{ - struct msm_clk_priv *priv = dev_get_priv(clk->dev); - - if (priv->data->num_clks <= clk->id) { - debug("%s: unknown clk id %lu\n", __func__, clk->id); - return -ENOENT; - } - - debug("%s: clk %s\n", __func__, ipq5210_clks[clk->id].name); - - return qcom_gate_clk_en(priv, clk->id); -} - -static const struct qcom_reset_map ipq5210_gcc_resets[] = { - [GCC_SDCC_BCR] = {0x33000, 0}, - [GCC_USB0_PHY_BCR] = {0x2c06c, 0}, - [GCC_USB3PHY_0_PHY_BCR] = {0x2c070, 0}, - [GCC_QUSB2_0_PHY_BCR] = {0x2c068, 0}, - [GCC_USB_BCR] = {0x2c000, 0}, -}; - -static struct msm_clk_data ipq5210_gcc_data = { - .resets = ipq5210_gcc_resets, - .num_resets = ARRAY_SIZE(ipq5210_gcc_resets), - .clks = ipq5210_clks, - .num_clks = ARRAY_SIZE(ipq5210_clks), - .enable = ipq5210_enable, - .set_rate = ipq5210_set_rate, -}; - -static const struct udevice_id gcc_ipq5210_of_match[] = { - { - .compatible = "qcom,ipq5210-gcc", - .data = (ulong)&ipq5210_gcc_data, - }, - { } -}; - -U_BOOT_DRIVER(gcc_ipq5210) = { - .name = "gcc_ipq5210", - .id = UCLASS_NOP, - .of_match = gcc_ipq5210_of_match, - .bind = qcom_cc_bind, - .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF, -}; diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 09ec40f25b0f..68a4c5d60766 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -120,12 +120,6 @@ config SPL_QCOM_GENI for providing a common interface for various peripherals like UART, I2C, SPI, etc. -config QCOM_GENI_MINICORE - bool "Support minicores in Qualcomm Generic Interface (GENI) driver" - depends on QCOM_GENI - help - Enable support for minicores in Qualcomm GENI and its peripherals. - config ROCKCHIP_EFUSE bool "Rockchip e-fuse support" depends on MISC diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 70617bc22aa6..c1fb958261ed 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -67,7 +67,6 @@ obj-$(CONFIG_SANDBOX) += qfw_sandbox.o endif obj-$(CONFIG_QCOM_SPMI_SDAM) += qcom-spmi-sdam.o obj-$(CONFIG_$(PHASE_)QCOM_GENI) += qcom_geni.o -obj-$(CONFIG_QCOM_GENI_MINICORE) += qcom_geni-minicore.o obj-$(CONFIG_$(PHASE_)QCOM_HWINFO) += qcom_hwinfo.o obj-$(CONFIG_$(PHASE_)ROCKCHIP_EFUSE) += rockchip-efuse.o obj-$(CONFIG_$(PHASE_)ROCKCHIP_OTP) += rockchip-otp.o diff --git a/drivers/misc/qcom_geni-minicore.c b/drivers/misc/qcom_geni-minicore.c deleted file mode 100644 index 33bc61ddf350..000000000000 --- a/drivers/misc/qcom_geni-minicore.c +++ /dev/null @@ -1,102 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. - */ - -#include -#include - -/* - * Register configuration for the QUP minicores to setup the corresponding - * functionality of SPI/I2C/UART. - */ -static u8 cfg_reg_idx[] = { - /* 0 to 18 */ - 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, - /* 64 to 113 */ - 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, - 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, - 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, - 112, 113, -}; - -static u32 spi_cfg_val[] = { - /* 0 to 18 */ - 0x00000000, 0x00000400, 0x00000000, 0x00000000, 0x00240E78, 0x00011088, - 0x00240007, 0x00000000, 0x00000000, 0x0001000A, 0x00000300, 0x00000000, - 0x00000000, 0x00000000, 0x00154400, 0x001483A0, 0x00AA8128, 0x00641002, - 0x00004000, - /* 64 to 113 */ - 0x00000201, 0x0001FE05, 0x0002C2E7, 0x0A435C00, 0x0010011A, 0x08800000, - 0x00000000, 0x100CAC00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000018E4, 0x00000000, - 0x00000003, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x0007F807, 0x000FFEFE, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00200000, 0x00000004, 0x00000009, 0x0007F807, 0x000FFEFE, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00C0033F, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000055, -}; - -static u32 uart_cfg_val[] = { - /* 0 to 18 */ - 0x00000024, 0x00000000, 0x00000024, 0x00000000, 0x00019A00, 0x00400000, - 0x00E00000, 0x00010020, 0x00000000, 0x00000000, 0x00000300, 0x00000700, - 0x00000400, 0x00000000, 0x00000000, 0x00C00000, 0x00000000, 0x00C00024, - 0x00000B00, - /* 64 to 113 */ - 0x00020231, 0x0000CE05, 0x000360E7, 0x0941E6A8, 0x00100510, 0x42C01E51, - 0x00000401, 0x002E8400, 0x1694581A, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000001, 0x0000031C, 0x00000000, - 0x0000000F, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00081C06, 0x00004010, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x0000000D, 0x00000000, 0x00081C06, 0x00004010, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00C02415, 0x0000000E, 0x00000001, - 0x00000001, 0x00000000, 0x00C00000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000055, -}; - -static u32 i2c_cfg_val[] = { - /* 0 to 18 */ - 0x00000090, 0x00000000, 0x00000090, 0x00000000, 0x00038028, 0x00084080, - 0x00000343, 0x00010000, 0x00000000, 0x00001A00, 0x00000100, 0x00000000, - 0x00000000, 0x00000000, 0x00808008, 0x001C0020, 0x00000000, 0x00020000, - 0x00000000, - /* 64 to 113 */ - 0x00000201, 0x0001FC01, 0x00036222, 0x09C01FFC, 0x00100120, 0x02C00000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000409, 0x00000003, - 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x0007F8FE, 0x000FFEFE, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000001, 0x0007F807, 0x000FFEFE, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00C00000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000055, -}; - -struct qup_mini_core_info qup_mini_cores[] = { - { - .serial_protocol = GENI_SE_SPI, - .fw_version = 0xb02, - .cfg_version = 0x9, - .cfg_count = ARRAY_SIZE(spi_cfg_val), - .cfg_val = spi_cfg_val, - .cfg_idx = cfg_reg_idx, - }, { - .serial_protocol = GENI_SE_UART, - .fw_version = 0x405, - .cfg_version = 0xa, - .cfg_count = ARRAY_SIZE(uart_cfg_val), - .cfg_val = uart_cfg_val, - .cfg_idx = cfg_reg_idx, - }, { - .serial_protocol = GENI_SE_I2C, - .fw_version = 0x204, - .cfg_version = 0x9, - .cfg_count = ARRAY_SIZE(i2c_cfg_val), - .cfg_val = i2c_cfg_val, - .cfg_idx = cfg_reg_idx, - }, { - .serial_protocol = GENI_SE_INVALID_PROTO, - }, -}; diff --git a/drivers/misc/qcom_geni.c b/drivers/misc/qcom_geni.c index 40044e5d48a6..a62ae6a2478f 100644 --- a/drivers/misc/qcom_geni.c +++ b/drivers/misc/qcom_geni.c @@ -34,15 +34,8 @@ struct qup_se_rsc { struct geni_se_plat { bool need_firmware_load; -#if IS_ENABLED(CONFIG_QCOM_GENI_MINICORE) - bool is_mini_core; -#endif }; -#if IS_ENABLED(CONFIG_QCOM_GENI_MINICORE) -extern struct qup_mini_core_info qup_mini_cores[]; -#endif - /** * geni_enable_interrupts() Enable interrupts. * @rsc: Pointer to a structure representing SE-related resources. @@ -170,53 +163,16 @@ static void geni_config_common_control(struct qup_se_rsc *rsc) COMMON_CSR_SLV_CLK_CGC_ON_BMASK); } -static int load_se_firmware(struct qup_se_rsc *rsc, bool elf, void *info) +static int load_se_firmware(struct qup_se_rsc *rsc, struct elf_se_hdr *hdr) { - struct elf_se_hdr *hdr, tmp_hdr; const u32 *fw_val_arr, *cfg_val_arr; const u8 *cfg_idx_arr; u32 i, reg_value, mask, ramn_cnt; int ret; - if (elf) { - hdr = info; - fw_val_arr = (const u32 *)((u8 *)hdr + hdr->fw_offset); - cfg_idx_arr = (const u8 *)hdr + hdr->cfg_idx_offset; - cfg_val_arr = (const u32 *)((u8 *)hdr + hdr->cfg_val_offset); - } else if (IS_ENABLED(CONFIG_QCOM_GENI_MINICORE)) { - /* - * Minicore controllers come with pre-configured functionality - * and don't need a firmware download and just need the register - * configuration. Hence, skipping the firmware part and setting - * up just the register configuration related information. - */ - struct qup_mini_core_info *qmc = info; - - for (; qmc->serial_protocol != GENI_SE_INVALID_PROTO; qmc++) - if (qmc->serial_protocol == rsc->protocol) - break; - - if (qmc->serial_protocol == GENI_SE_INVALID_PROTO) { - dev_err(rsc->dev, "Invalid MINICORE protocol (%d)\n", - rsc->protocol); - return -EINVAL; - } - - tmp_hdr.magic = MAGIC_NUM_SE; - tmp_hdr.version = 1; - tmp_hdr.serial_protocol = rsc->protocol; - tmp_hdr.fw_version = qmc->fw_version; - tmp_hdr.cfg_version = qmc->cfg_version; - tmp_hdr.fw_size_in_items = qmc->cfg_ram_count; - tmp_hdr.cfg_size_in_items = qmc->cfg_count; - hdr = &tmp_hdr; - fw_val_arr = (const u32 *)qmc->cfg_ram; - cfg_idx_arr = (const u8 *)qmc->cfg_idx; - cfg_val_arr = (const u32 *)qmc->cfg_val; - } else { - dev_err(rsc->dev, "Neither fw nor register settings found\n"); - return -EINVAL; - } + fw_val_arr = (const u32 *)((u8 *)hdr + hdr->fw_offset); + cfg_idx_arr = (const u8 *)hdr + hdr->cfg_idx_offset; + cfg_val_arr = (const u32 *)((u8 *)hdr + hdr->cfg_val_offset); geni_config_common_control(rsc); @@ -394,9 +350,8 @@ int qcom_geni_load_firmware(phys_addr_t qup_base, { struct qup_se_rsc rsc; struct elf_se_hdr *hdr; - bool elf; int ret; - void *fw, *info; + void *fw; rsc.dev = dev; rsc.base = qup_base; @@ -422,22 +377,15 @@ int qcom_geni_load_firmware(phys_addr_t qup_base, /* The firmware blob is the private data of the GENI wrapper (parent) */ fw = dev_get_priv(dev->parent); - if (IS_ELF(*(Elf32_Ehdr *)fw)) { - ret = read_elf(&rsc, fw, &hdr); - if (ret) { - dev_err(dev, "Failed to read ELF: %d\n", ret); - return ret; - } - elf = true; - info = hdr; - } else { - elf = false; - info = fw; + ret = read_elf(&rsc, fw, &hdr); + if (ret) { + dev_err(dev, "Failed to read ELF: %d\n", ret); + return ret; } dev_info(dev, "Loading QUP firmware...\n"); - return load_se_firmware(&rsc, elf, info); + return load_se_firmware(&rsc, hdr); } /* @@ -466,11 +414,6 @@ static int geni_se_of_to_plat(struct udevice *dev) if (proto == GENI_SE_INVALID_PROTO) plat->need_firmware_load = true; - -#if IS_ENABLED(CONFIG_QCOM_GENI_MINICORE) - if (readl(res.start + SE_HW_PARAM_2) & GENI_USE_MINICORES) - plat->is_mini_core = true; -#endif } return 0; @@ -530,7 +473,7 @@ static int probe_children_load_firmware(struct udevice *dev) ret = 0; /* Find the device for this ofnode, or bind it */ if (device_find_global_by_ofnode(child, &child_dev)) - ret = lists_bind_fdt(dev, child, &child_dev, NULL, false); + ret = lists_bind_fdt(dev, child, &child_dev, NULL, false); if (ret) { /* Skip nodes that don't have drivers */ debug("Failed to probe child %s: %d\n", ofnode_get_name(child), ret); @@ -549,7 +492,7 @@ static int probe_children_load_firmware(struct udevice *dev) * Load firmware for QCOM GENI peripherals from the dedicated partition on storage and bind/probe * all the peripheral devices that need firmware to be loaded. */ -int qcom_geni_fw_initialise(void) +static int qcom_geni_fw_initialise(void) { debug("Loading firmware for QCOM GENI SE\n"); struct udevice *geni_wrapper, *blk_dev; @@ -575,12 +518,6 @@ int qcom_geni_fw_initialise(void) return 0; } -#if IS_ENABLED(CONFIG_QCOM_GENI_MINICORE) - if (plat->is_mini_core) { - fw_buf = qup_mini_cores; - goto mini_core; - } -#endif ret = find_qupfw_part(&blk_dev, &part_info); if (ret) { pr_err("QUP firmware partition not found\n"); @@ -607,9 +544,6 @@ int qcom_geni_fw_initialise(void) return 0; } -#if IS_ENABLED(CONFIG_QCOM_GENI_MINICORE) -mini_core: -#endif /* * OK! Firmware is loaded, now bind and probe remaining children. They will attempt to load * firmware during probe. Do this for each GENI SE wrapper that needs firmware loading. @@ -629,14 +563,7 @@ int qcom_geni_fw_initialise(void) return 0; } -#if CONFIG_XPL_BUILD -int qcom_geni_fw_probe(struct udevice *dev) -{ - return qcom_geni_fw_initialise(); -} -#else EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, qcom_geni_fw_initialise); -#endif static const struct udevice_id geni_ids[] = { { .compatible = "qcom,geni-se-qup" }, @@ -650,7 +577,4 @@ U_BOOT_DRIVER(geni_se_qup) = { .of_to_plat = geni_se_of_to_plat, .plat_auto = sizeof(struct geni_se_plat), .flags = DM_FLAG_DEFAULT_PD_CTRL_OFF, -#if CONFIG_XPL_BUILD - .probe = qcom_geni_fw_probe, -#endif }; diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig index ba866b5b6b2e..c5e03baca9ac 100644 --- a/drivers/pinctrl/qcom/Kconfig +++ b/drivers/pinctrl/qcom/Kconfig @@ -76,14 +76,6 @@ config SPL_PINCTRL_QCOM_IPQ4019 SPL variant of PINCTRL_QCOM_IPQ4019. See the help of PINCTRL_QCOM_IPQ4019 for details. -config PINCTRL_QCOM_IPQ5210 - bool "Qualcomm IPQ5210 Pinctrl" - default y if PINCTRL_QCOM_GENERIC - select PINCTRL_QCOM - help - Say Y here to enable support for pinctrl on the IPQ5210 SoC, - as well as the associated GPIO driver. - config PINCTRL_QCOM_IPQ5424 bool "Qualcomm IPQ5424 Pinctrl" default y if PINCTRL_QCOM_GENERIC diff --git a/drivers/pinctrl/qcom/Makefile b/drivers/pinctrl/qcom/Makefile index 8145ae37cb46..41f37b0e1756 100644 --- a/drivers/pinctrl/qcom/Makefile +++ b/drivers/pinctrl/qcom/Makefile @@ -5,7 +5,6 @@ obj-$(CONFIG_$(PHASE_)PINCTRL_QCOM) += pinctrl-qcom.o obj-$(CONFIG_$(PHASE_)PINCTRL_QCOM_APQ8016) += pinctrl-apq8016.o obj-$(CONFIG_$(PHASE_)PINCTRL_QCOM_IPQ4019) += pinctrl-ipq4019.o -obj-$(CONFIG_$(PHASE_)PINCTRL_QCOM_IPQ5210) += pinctrl-ipq5210.o obj-$(CONFIG_$(PHASE_)PINCTRL_QCOM_IPQ5424) += pinctrl-ipq5424.o obj-$(CONFIG_$(PHASE_)PINCTRL_QCOM_IPQ9574) += pinctrl-ipq9574.o obj-$(CONFIG_$(PHASE_)PINCTRL_QCOM_APQ8096) += pinctrl-apq8096.o diff --git a/drivers/pinctrl/qcom/pinctrl-ipq5210.c b/drivers/pinctrl/qcom/pinctrl-ipq5210.c deleted file mode 100644 index a9b435ad543a..000000000000 --- a/drivers/pinctrl/qcom/pinctrl-ipq5210.c +++ /dev/null @@ -1,349 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Qualcomm IPQ5210 pinctrl - * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. - */ - -#include - -#include "pinctrl-qcom.h" - -#define MAX_PIN_NAME_LEN 32 -static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); - -enum ipq5210_functions { - msm_mux_atest_char_start, - msm_mux_atest_char_status0, - msm_mux_atest_char_status1, - msm_mux_atest_char_status2, - msm_mux_atest_char_status3, - msm_mux_atest_tic_en, - msm_mux_audio_pri, - msm_mux_audio_pri_mclk_out0, - msm_mux_audio_pri_mclk_in0, - msm_mux_audio_pri_mclk_out1, - msm_mux_audio_pri_mclk_in1, - msm_mux_audio_pri_mclk_out2, - msm_mux_audio_pri_mclk_in2, - msm_mux_audio_pri_mclk_out3, - msm_mux_audio_pri_mclk_in3, - msm_mux_audio_sec, - msm_mux_audio_sec_mclk_out0, - msm_mux_audio_sec_mclk_in0, - msm_mux_audio_sec_mclk_out1, - msm_mux_audio_sec_mclk_in1, - msm_mux_audio_sec_mclk_out2, - msm_mux_audio_sec_mclk_in2, - msm_mux_audio_sec_mclk_out3, - msm_mux_audio_sec_mclk_in3, - msm_mux_core_voltage_0, - msm_mux_cri_trng0, - msm_mux_cri_trng1, - msm_mux_cri_trng2, - msm_mux_cri_trng3, - msm_mux_dbg_out_clk, - msm_mux_dg_out, - msm_mux_gcc_plltest_bypassnl, - msm_mux_gcc_plltest_resetn, - msm_mux_gcc_tlmm, - msm_mux_gpio, - msm_mux_led0, - msm_mux_led1, - msm_mux_led2, - msm_mux_mdc_mst, - msm_mux_mdc_slv0, - msm_mux_mdc_slv1, - msm_mux_mdc_slv2, - msm_mux_mdio_mst, - msm_mux_mdio_slv0, - msm_mux_mdio_slv1, - msm_mux_mdio_slv2, - msm_mux_mux_tod_out, - msm_mux_pcie0_clk_req_n, - msm_mux_pcie0_wake, - msm_mux_pcie1_clk_req_n, - msm_mux_pcie1_wake, - msm_mux_pll_test, - msm_mux_pon_active_led, - msm_mux_pon_mux_sel, - msm_mux_pon_rx, - msm_mux_pon_rx_los, - msm_mux_pon_tx, - msm_mux_pon_tx_burst, - msm_mux_pon_tx_dis, - msm_mux_pon_tx_fault, - msm_mux_pon_tx_sd, - msm_mux_gpn_rx_los, - msm_mux_gpn_tx_burst, - msm_mux_gpn_tx_dis, - msm_mux_gpn_tx_fault, - msm_mux_gpn_tx_sd, - msm_mux_pps, - msm_mux_pwm0, - msm_mux_pwm1, - msm_mux_pwm2, - msm_mux_pwm3, - msm_mux_qdss_cti_trig_in_a0, - msm_mux_qdss_cti_trig_in_a1, - msm_mux_qdss_cti_trig_in_b0, - msm_mux_qdss_cti_trig_in_b1, - msm_mux_qdss_cti_trig_out_a0, - msm_mux_qdss_cti_trig_out_a1, - msm_mux_qdss_cti_trig_out_b0, - msm_mux_qdss_cti_trig_out_b1, - msm_mux_qdss_traceclk_a, - msm_mux_qdss_tracectl_a, - msm_mux_qdss_tracedata_a, - msm_mux_qrng_rosc0, - msm_mux_qrng_rosc1, - msm_mux_qrng_rosc2, - msm_mux_qspi_data, - msm_mux_qspi_clk, - msm_mux_qspi_cs_n, - msm_mux_qup_se0, - msm_mux_qup_se1, - msm_mux_qup_se2, - msm_mux_qup_se3, - msm_mux_qup_se4, - msm_mux_qup_se5, - msm_mux_qup_se5_l1, - msm_mux_resout, - msm_mux_rx_los0, - msm_mux_rx_los1, - msm_mux_rx_los2, - msm_mux_sdc_clk, - msm_mux_sdc_cmd, - msm_mux_sdc_data, - msm_mux_tsens_max, - msm_mux__, -}; - -#define MSM_PIN_FUNCTION(fname) \ - [msm_mux_##fname] = {#fname, msm_mux_##fname} - -static const struct pinctrl_function msm_pinctrl_functions[] = { - MSM_PIN_FUNCTION(atest_char_start), - MSM_PIN_FUNCTION(atest_char_status0), - MSM_PIN_FUNCTION(atest_char_status1), - MSM_PIN_FUNCTION(atest_char_status2), - MSM_PIN_FUNCTION(atest_char_status3), - MSM_PIN_FUNCTION(atest_tic_en), - MSM_PIN_FUNCTION(audio_pri), - MSM_PIN_FUNCTION(audio_pri_mclk_out0), - MSM_PIN_FUNCTION(audio_pri_mclk_in0), - MSM_PIN_FUNCTION(audio_pri_mclk_out1), - MSM_PIN_FUNCTION(audio_pri_mclk_in1), - MSM_PIN_FUNCTION(audio_pri_mclk_out2), - MSM_PIN_FUNCTION(audio_pri_mclk_in2), - MSM_PIN_FUNCTION(audio_pri_mclk_out3), - MSM_PIN_FUNCTION(audio_pri_mclk_in3), - MSM_PIN_FUNCTION(audio_sec), - MSM_PIN_FUNCTION(audio_sec_mclk_out0), - MSM_PIN_FUNCTION(audio_sec_mclk_in0), - MSM_PIN_FUNCTION(audio_sec_mclk_out1), - MSM_PIN_FUNCTION(audio_sec_mclk_in1), - MSM_PIN_FUNCTION(audio_sec_mclk_out2), - MSM_PIN_FUNCTION(audio_sec_mclk_in2), - MSM_PIN_FUNCTION(audio_sec_mclk_out3), - MSM_PIN_FUNCTION(audio_sec_mclk_in3), - MSM_PIN_FUNCTION(core_voltage_0), - MSM_PIN_FUNCTION(cri_trng0), - MSM_PIN_FUNCTION(cri_trng1), - MSM_PIN_FUNCTION(cri_trng2), - MSM_PIN_FUNCTION(cri_trng3), - MSM_PIN_FUNCTION(dbg_out_clk), - MSM_PIN_FUNCTION(dg_out), - MSM_PIN_FUNCTION(gcc_plltest_bypassnl), - MSM_PIN_FUNCTION(gcc_plltest_resetn), - MSM_PIN_FUNCTION(gcc_tlmm), - MSM_PIN_FUNCTION(gpio), - MSM_PIN_FUNCTION(led0), - MSM_PIN_FUNCTION(led1), - MSM_PIN_FUNCTION(led2), - MSM_PIN_FUNCTION(mdc_mst), - MSM_PIN_FUNCTION(mdc_slv0), - MSM_PIN_FUNCTION(mdc_slv1), - MSM_PIN_FUNCTION(mdc_slv2), - MSM_PIN_FUNCTION(mdio_mst), - MSM_PIN_FUNCTION(mdio_slv0), - MSM_PIN_FUNCTION(mdio_slv1), - MSM_PIN_FUNCTION(mdio_slv2), - MSM_PIN_FUNCTION(mux_tod_out), - MSM_PIN_FUNCTION(pcie0_clk_req_n), - MSM_PIN_FUNCTION(pcie0_wake), - MSM_PIN_FUNCTION(pcie1_clk_req_n), - MSM_PIN_FUNCTION(pcie1_wake), - MSM_PIN_FUNCTION(pll_test), - MSM_PIN_FUNCTION(pon_active_led), - MSM_PIN_FUNCTION(pon_mux_sel), - MSM_PIN_FUNCTION(pon_rx), - MSM_PIN_FUNCTION(pon_rx_los), - MSM_PIN_FUNCTION(pon_tx), - MSM_PIN_FUNCTION(pon_tx_burst), - MSM_PIN_FUNCTION(pon_tx_dis), - MSM_PIN_FUNCTION(pon_tx_fault), - MSM_PIN_FUNCTION(pon_tx_sd), - MSM_PIN_FUNCTION(gpn_rx_los), - MSM_PIN_FUNCTION(gpn_tx_burst), - MSM_PIN_FUNCTION(gpn_tx_dis), - MSM_PIN_FUNCTION(gpn_tx_fault), - MSM_PIN_FUNCTION(gpn_tx_sd), - MSM_PIN_FUNCTION(pps), - MSM_PIN_FUNCTION(pwm0), - MSM_PIN_FUNCTION(pwm1), - MSM_PIN_FUNCTION(pwm2), - MSM_PIN_FUNCTION(pwm3), - MSM_PIN_FUNCTION(qdss_cti_trig_in_a0), - MSM_PIN_FUNCTION(qdss_cti_trig_in_a1), - MSM_PIN_FUNCTION(qdss_cti_trig_in_b0), - MSM_PIN_FUNCTION(qdss_cti_trig_in_b1), - MSM_PIN_FUNCTION(qdss_cti_trig_out_a0), - MSM_PIN_FUNCTION(qdss_cti_trig_out_a1), - MSM_PIN_FUNCTION(qdss_cti_trig_out_b0), - MSM_PIN_FUNCTION(qdss_cti_trig_out_b1), - MSM_PIN_FUNCTION(qdss_traceclk_a), - MSM_PIN_FUNCTION(qdss_tracectl_a), - MSM_PIN_FUNCTION(qdss_tracedata_a), - MSM_PIN_FUNCTION(qrng_rosc0), - MSM_PIN_FUNCTION(qrng_rosc1), - MSM_PIN_FUNCTION(qrng_rosc2), - MSM_PIN_FUNCTION(qspi_data), - MSM_PIN_FUNCTION(qspi_clk), - MSM_PIN_FUNCTION(qspi_cs_n), - MSM_PIN_FUNCTION(qup_se0), - MSM_PIN_FUNCTION(qup_se1), - MSM_PIN_FUNCTION(qup_se2), - MSM_PIN_FUNCTION(qup_se3), - MSM_PIN_FUNCTION(qup_se4), - MSM_PIN_FUNCTION(qup_se5), - MSM_PIN_FUNCTION(qup_se5_l1), - MSM_PIN_FUNCTION(resout), - MSM_PIN_FUNCTION(rx_los0), - MSM_PIN_FUNCTION(rx_los1), - MSM_PIN_FUNCTION(rx_los2), - MSM_PIN_FUNCTION(sdc_clk), - MSM_PIN_FUNCTION(sdc_cmd), - MSM_PIN_FUNCTION(sdc_data), - MSM_PIN_FUNCTION(tsens_max), -}; - -typedef unsigned int msm_pin_function[10]; - -#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ - [id] = { msm_mux_gpio, /* gpio mode */ \ - msm_mux_##f1, \ - msm_mux_##f2, \ - msm_mux_##f3, \ - msm_mux_##f4, \ - msm_mux_##f5, \ - msm_mux_##f6, \ - msm_mux_##f7, \ - msm_mux_##f8, \ - msm_mux_##f9, \ - } - -static const msm_pin_function ipq5210_pin_functions[] = { - PINGROUP(0, sdc_data, qspi_data, pwm2, _, _, _, _, _, _), - PINGROUP(1, sdc_data, qspi_data, pwm2, _, _, _, _, _, _), - PINGROUP(2, sdc_data, qspi_data, pwm2, _, _, _, _, _, _), - PINGROUP(3, sdc_data, qspi_data, pwm2, _, _, _, _, _, _), - PINGROUP(4, sdc_cmd, qspi_cs_n, _, _, _, _, _, _, _), - PINGROUP(5, sdc_clk, qspi_clk, _, _, _, _, _, _, _), - PINGROUP(6, qup_se0, led0, pwm1, _, cri_trng0, qdss_tracedata_a, _, _, _), - PINGROUP(7, qup_se0, led1, pwm1, _, cri_trng1, qdss_tracedata_a, _, _, _), - PINGROUP(8, qup_se0, pwm1, audio_pri_mclk_out2, audio_pri_mclk_in2, _, cri_trng2, qdss_tracedata_a, _, _), - PINGROUP(9, qup_se0, led2, pwm1, _, cri_trng3, qdss_tracedata_a, _, _, _), - PINGROUP(10, pon_rx_los, qup_se3, pwm0, _, _, qdss_tracedata_a, _, _, _), - PINGROUP(11, pon_active_led, qup_se3, pwm0, _, _, qdss_tracedata_a, _, _, _), - PINGROUP(12, pon_tx_dis, qup_se2, pwm0, audio_pri_mclk_out0, audio_pri_mclk_in0, _, qrng_rosc0, qdss_tracedata_a, _), - PINGROUP(13, gpn_tx_dis, qup_se2, pwm0, audio_pri_mclk_out3, audio_pri_mclk_in3, _, qrng_rosc1, qdss_tracedata_a, _), - PINGROUP(14, pon_tx_burst, qup_se0, _, qrng_rosc2, qdss_tracedata_a, _, _, _, _), - PINGROUP(15, pon_tx, qup_se0, _, qdss_tracedata_a, _, _, _, _, _), - PINGROUP(16, pon_tx_sd, audio_sec_mclk_out1, audio_sec_mclk_in1, qdss_cti_trig_out_b0, _, _, _, _, _), - PINGROUP(17, pon_tx_fault, audio_sec_mclk_out0, audio_sec_mclk_in0, _, _, _, _, _, _), - PINGROUP(18, pps, pll_test, _, _, _, _, _, _, _), - PINGROUP(19, mux_tod_out, audio_pri_mclk_out1, audio_pri_mclk_in1, _, _, _, _, _, _), - PINGROUP(20, qup_se2, mdc_slv1, tsens_max, qdss_tracedata_a, _, _, _, _, _), - PINGROUP(21, qup_se2, mdio_slv1, qdss_tracedata_a, _, _, _, _, _, _), - PINGROUP(22, core_voltage_0, qup_se3, pwm3, _, _, _, _, _, _), - PINGROUP(23, led0, qup_se3, dbg_out_clk, qdss_traceclk_a, _, _, _, _, _), - PINGROUP(24, _, _, _, _, _, _, _, _, _), - PINGROUP(25, _, _, _, _, _, _, _, _, _), - PINGROUP(26, mdc_mst, led2, _, qdss_tracectl_a, _, _, _, _, _), - PINGROUP(27, mdio_mst, led1, _, _, _, _, _, _, _), - PINGROUP(28, pcie1_clk_req_n, qup_se1, _, _, qdss_cti_trig_out_a0, _, _, _, _), - PINGROUP(29, _, _, _, _, _, _, _, _, _), - PINGROUP(30, pcie1_wake, qup_se1, _, _, qdss_cti_trig_in_a0, _, _, _, _), - PINGROUP(31, pcie0_clk_req_n, mdc_slv0, _, qdss_cti_trig_out_a1, _, _, _, _, _), - PINGROUP(32, _, _, _, _, _, _, _, _, _), - PINGROUP(33, pcie0_wake, mdio_slv0, qdss_cti_trig_in_a1, _, _, _, _, _, _), - PINGROUP(34, audio_pri, atest_char_status0, qdss_cti_trig_in_b0, _, _, _, _, _, _), - PINGROUP(35, audio_pri, rx_los2, atest_char_status1, qdss_cti_trig_out_b1, _, _, _, _, _), - PINGROUP(36, audio_pri, _, rx_los1, atest_char_status2, _, _, _, _, _), - PINGROUP(37, audio_pri, rx_los0, atest_char_status3, _, qdss_cti_trig_in_b1, _, _, _, _), - PINGROUP(38, qup_se1, led2, gcc_plltest_bypassnl, qdss_tracedata_a, _, _, _, _, _), - PINGROUP(39, qup_se1, led1, led0, gcc_tlmm, qdss_tracedata_a, _, _, _, _), - PINGROUP(40, qup_se4, rx_los2, audio_sec, gcc_plltest_resetn, qdss_tracedata_a, _, _, _, _), - PINGROUP(41, qup_se4, rx_los1, audio_sec, qdss_tracedata_a, _, _, _, _, _), - PINGROUP(42, qup_se4, rx_los0, audio_sec, atest_tic_en, _, _, _, _, _), - PINGROUP(43, qup_se4, audio_sec, _, _, _, _, _, _, _), - PINGROUP(44, resout, _, _, _, _, _, _, _, _), - PINGROUP(45, pon_mux_sel, _, _, _, _, _, _, _, _), - PINGROUP(46, dg_out, atest_char_start, _, _, _, _, _, _, _), - PINGROUP(47, gpn_rx_los, mdc_slv2, qup_se5, _, _, _, _, _, _), - PINGROUP(48, pon_rx, qup_se5, _, _, _, _, _, _, _), - PINGROUP(49, gpn_tx_fault, mdio_slv2, qup_se5, audio_sec_mclk_out2, audio_sec_mclk_in2, _, _, _, _), - PINGROUP(50, gpn_tx_sd, qup_se5, audio_sec_mclk_out3, audio_sec_mclk_in3, _, _, _, _, _), - PINGROUP(51, gpn_tx_burst, qup_se5, _, _, _, _, _, _, _), - PINGROUP(52, qup_se2, qup_se5, qup_se4, qup_se5_l1, _, _, _, _, _), - PINGROUP(53, qup_se2, qup_se4, qup_se5_l1, _, _, _, _, _, _), -}; - -static const char *ipq5210_get_function_name(struct udevice *dev, uint selector) -{ - return msm_pinctrl_functions[selector].name; -} - -static const char *ipq5210_get_pin_name(struct udevice *dev, uint selector) -{ - snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); - return pin_name; -} - -static int ipq5210_get_function_mux(unsigned int pin, uint selector) -{ - unsigned int i; - const msm_pin_function *func = ipq5210_pin_functions + pin; - - for (i = 0; i < 10; i++) - if ((*func)[i] == selector) - return i; - - pr_err("Can't find requested function for pin %u\n", pin); - return -EINVAL; -} - -static const struct msm_pinctrl_data ipq5210_data = { - .pin_data = { - .pin_count = 54, - .special_pins_start = 54, /* There are no special pins */ - }, - .functions_count = ARRAY_SIZE(msm_pinctrl_functions), - .get_function_name = ipq5210_get_function_name, - .get_function_mux = ipq5210_get_function_mux, - .get_pin_name = ipq5210_get_pin_name, -}; - -static const struct udevice_id msm_pinctrl_ids[] = { - { .compatible = "qcom,ipq5210-tlmm", .data = (ulong)&ipq5210_data }, - { /* Sentinal */ } -}; - -U_BOOT_DRIVER(pinctrl_ipq5210) = { - .name = "pinctrl_ipq5210", - .id = UCLASS_NOP, - .of_match = msm_pinctrl_ids, - .ops = &msm_pinctrl_ops, - .bind = msm_pinctrl_bind, - .flags = DM_FLAG_PRE_RELOC, -}; diff --git a/include/soc/qcom/geni-se.h b/include/soc/qcom/geni-se.h index 3063b37010de..fc9a8e82cd88 100644 --- a/include/soc/qcom/geni-se.h +++ b/include/soc/qcom/geni-se.h @@ -77,12 +77,8 @@ enum geni_se_protocol_type { #define SE_IRQ_EN 0xe1c #define SE_HW_PARAM_0 0xe24 #define SE_HW_PARAM_1 0xe28 -#define SE_HW_PARAM_2 0xe2c #define SE_DMA_GENERAL_CFG 0xe30 -/* SE_HW_PARAM_2 fields */ -#define GENI_USE_MINICORES BIT(12) - /* GENI_DFS_IF_CFG fields */ #define DFS_IF_EN BIT(0) @@ -252,7 +248,6 @@ enum geni_se_protocol_type { /* SE_HW_PARAM_0 fields */ #define TX_FIFO_WIDTH_MSK GENMASK(29, 24) #define TX_FIFO_WIDTH_SHFT 24 - /* * For QUP HW Version >= 3.10 Tx fifo depth support is increased * to 256bytes and corresponding bits are 16 to 23 diff --git a/include/soc/qcom/qup-fw-load.h b/include/soc/qcom/qup-fw-load.h index b329a18ef22c..a67a93c72a4b 100644 --- a/include/soc/qcom/qup-fw-load.h +++ b/include/soc/qcom/qup-fw-load.h @@ -14,7 +14,6 @@ #define GENI_INIT_CFG_REVISION 0x0 #define GENI_S_INIT_CFG_REVISION 0x4 #define GENI_FORCE_DEFAULT_REG 0x20 -#define GENI_OUTPUT_CTRL 0x24 #define GENI_CGC_CTRL 0x28 #define GENI_CFG_REG0 0x100 @@ -174,17 +173,6 @@ struct elf_se_hdr { struct udevice; -struct qup_mini_core_info { - u16 serial_protocol; - u16 fw_version; - u16 cfg_version; - u16 cfg_count; - u32 *cfg_val; - u8 *cfg_idx; - u32 *cfg_ram; - u32 cfg_ram_count; -}; - int qcom_geni_load_firmware(phys_addr_t qup_base, struct udevice *dev); #endif /* _LINUX_QCOM_QUP_FW_LOAD */ diff --git a/include/soc/qcom/smem.h b/include/soc/qcom/smem.h index 9e50f3974a2e..586432412eb8 100644 --- a/include/soc/qcom/smem.h +++ b/include/soc/qcom/smem.h @@ -16,10 +16,6 @@ int qcom_smem_alloc(unsigned host, unsigned item, size_t size); void *qcom_smem_get(unsigned host, unsigned item, size_t *size); int qcom_smem_get_free_space(unsigned host); - -#define SMEM_BOOT_FLASH_TYPE 498 -#define SMEM_BOOT_MMC_FLASH 5 - #else static int qcom_smem_init(void) { return -ENOSYS; } diff --git a/scripts/Makefile.xpl b/scripts/Makefile.xpl index 6e9f24b748a6..a3fd3e1375f7 100644 --- a/scripts/Makefile.xpl +++ b/scripts/Makefile.xpl @@ -256,26 +256,6 @@ MKIMAGEFLAGS_boot.bin = -T zynqmpimage -R $(srctree)/$(CONFIG_BOOT_INIT_FILE) \ -n "$(shell cd $(srctree); readlink -f $(CONFIG_PMUFW_INIT_FILE))" endif -ifeq ($(CONFIG_SPL_WRAPPER_ELF),y) -# Convert ELF to object file -OBJCOPYFLAGS_$(SPL_BIN).bin.o = -I binary -O elf64-littleaarch64 - -# Wrap the object file inside a ELF -QCOM_SPL_SOC = $(shell echo $(notdir "$(CONFIG_DEFAULT_DEVICE_TREE)") | cut -f1 -d-) -QCOM_SPL_WRAP_LDS = $(srctree)/arch/arm/mach-snapdragon/$(QCOM_SPL_SOC)-spl-wrap-elf.lds -LDFLAGS_$(SPL_BIN).wrap-elf = -T $(obj)/$(SPL_BIN).wrap-elf.lds - -$(obj)/$(SPL_BIN).wrap-elf.lds: $(QCOM_SPL_WRAP_LDS) FORCE - $(call if_changed_dep,cpp_lds) - -$(obj)/$(SPL_BIN).bin.o: $(obj)/$(SPL_BIN).bin $(obj)/$(SPL_BIN).wrap-elf.lds FORCE - $(call if_changed,objcopy) - -$(obj)/$(SPL_BIN).wrap-elf: $(obj)/$(SPL_BIN).bin.o FORCE - $(call if_changed,ld) - -endif - $(obj)/$(SPL_BIN)-align.bin: $(obj)/$(SPL_BIN).bin @dd if=$< of=$@ conv=sync bs=4 2>/dev/null; @@ -322,10 +302,6 @@ INPUTS-$(CONFIG_ARCH_ZYNQMP) += $(obj)/boot.bin INPUTS-$(CONFIG_ARCH_MEDIATEK) += $(obj)/u-boot-spl-mtk.bin -ifeq ($(CONFIG_ARCH_SNAPDRAGON),y) -INPUTS-$(CONFIG_SPL_WRAPPER_ELF) += $(obj)/u-boot-spl.wrap-elf -endif - all: $(INPUTS-y) quiet_cmd_cat = CAT $@ diff --git a/tools/binman/elf.py b/tools/binman/elf.py index b43cf490b377..6ac960e04196 100644 --- a/tools/binman/elf.py +++ b/tools/binman/elf.py @@ -551,7 +551,6 @@ def read_loadable_segments(data): raise ValueError(err) entry = elf.header['e_entry'] segments = [] - n = 0 for i in range(elf.num_segments()): segment = elf.get_segment(i) if segment['p_type'] != 'PT_LOAD' or not segment['p_memsz']: @@ -559,8 +558,7 @@ def read_loadable_segments(data): continue start = segment['p_offset'] rend = start + segment['p_filesz'] - segments.append((n, segment['p_paddr'], data[start:rend])) - n = n + 1 + segments.append((i, segment['p_paddr'], data[start:rend])) return segments, entry def is_valid(data): diff --git a/tools/binman/etype/qcom_appsbl.py b/tools/binman/etype/qcom_appsbl.py deleted file mode 100644 index e308ebd2fca3..000000000000 --- a/tools/binman/etype/qcom_appsbl.py +++ /dev/null @@ -1,18 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. -# -# Entry-type module for U-Boot MBN image -# - -from binman.etype.blob_named_by_arg import Entry_blob_named_by_arg - -class Entry_qcom_appsbl(Entry_blob_named_by_arg): - """U-Boot mbn image - - Properties / Entry arguments: - - filename: Filename of u-boot MBN (default 'u-boot.mbn') - - This is the U-Boot MBN image. - """ - def __init__(self, section, etype, node): - super().__init__(section, etype, node, 'qcom-appsbl') diff --git a/tools/binman/etype/qcom_config.py b/tools/binman/etype/qcom_config.py deleted file mode 100644 index a1787c97b34e..000000000000 --- a/tools/binman/etype/qcom_config.py +++ /dev/null @@ -1,21 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. -# -# Entry-type module for QC Config ELF -# - -from binman.entry import Entry -from binman.etype.blob_named_by_arg import Entry_blob_named_by_arg - -class Entry_qcom_config(Entry_blob_named_by_arg): - """QC Config ELF - - Properties / Entry arguments: - - qcom-config-path: Filename of QC Config ELF (typically 'qcconfig.elf') - - This will be part of the Qualcomm SPL based bootloader image - - """ - def __init__(self, section, etype, node): - super().__init__(section, etype, node, 'qcom-config') - self.external = True diff --git a/tools/binman/etype/qcom_lib.py b/tools/binman/etype/qcom_lib.py deleted file mode 100644 index ca7666fe6e63..000000000000 --- a/tools/binman/etype/qcom_lib.py +++ /dev/null @@ -1,21 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. -# -# Entry-type module for QC LIB ELF -# - -from binman.entry import Entry -from binman.etype.blob_named_by_arg import Entry_blob_named_by_arg - -class Entry_qcom_lib(Entry_blob_named_by_arg): - """QC LIB ELF - - Properties / Entry arguments: - - qcom-lib-path: Filename of QC LIB ELF (typically 'QCLib.elf') - - This will be part of the Qualcomm SPL based bootloader image - - """ - def __init__(self, section, etype, node): - super().__init__(section, etype, node, 'qcom-lib') - self.external = True