diff --git a/CMakeLists.txt b/CMakeLists.txt index f3d98143..bfcedabb 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -1,5 +1,5 @@ # -# Copyright (c) 2025, Telink +# Copyright (c) 2025-2026, Telink # # SPDX-License-Identifier: Apache-2.0 # @@ -9,11 +9,11 @@ if(CONFIG_HAS_TELINK_DRIVERS) # SOC configuration for Telink RISC-V series string(REGEX REPLACE "^telink_" "" SOC_FAMILY ${CONFIG_SOC_SERIES}) -if(CONFIG_SOC_RISCV_TELINK_B91 OR CONFIG_SOC_RISCV_TELINK_B92 OR - CONFIG_SOC_RISCV_TELINK_TL321X) +if(CONFIG_SOC_RISCV_TELINK_B91 OR CONFIG_SOC_RISCV_TELINK_B92) add_subdirectory(hal_v1) -elseif(CONFIG_SOC_RISCV_TELINK_TL322X OR CONFIG_SOC_RISCV_TELINK_TL323X OR - CONFIG_SOC_RISCV_TELINK_TL721X) +elseif(CONFIG_SOC_RISCV_TELINK_TL321X OR CONFIG_SOC_RISCV_TELINK_TL322X OR + CONFIG_SOC_RISCV_TELINK_TL323X OR CONFIG_SOC_RISCV_TELINK_TL721X OR + CONFIG_SOC_RISCV_TELINK_TL521X OR CONFIG_SOC_RISCV_TELINK_TL523X) add_subdirectory(hal_v2) else() message(FATAL_ERROR "Not supported SOC") diff --git a/Kconfig b/Kconfig index 20d0abbe..26694504 100644 --- a/Kconfig +++ b/Kconfig @@ -3,12 +3,14 @@ config HAL_TELINK_V1 bool "Telink HAL V1" - depends on SOC_RISCV_TELINK_B91 || SOC_RISCV_TELINK_B92 || SOC_RISCV_TELINK_TL321X + depends on SOC_RISCV_TELINK_B91 || SOC_RISCV_TELINK_B92 default y config HAL_TELINK_V2 bool "Telink HAL V2" - depends on SOC_RISCV_TELINK_TL322X || SOC_RISCV_TELINK_TL323X || SOC_RISCV_TELINK_TL721X + depends on SOC_RISCV_TELINK_TL321X || SOC_RISCV_TELINK_TL322X || \ + SOC_RISCV_TELINK_TL323X || SOC_RISCV_TELINK_TL721X || \ + SOC_RISCV_TELINK_TL521X || SOC_RISCV_TELINK_TL523X default y if HAL_TELINK_V1 @@ -17,4 +19,4 @@ endif if HAL_TELINK_V2 rsource "hal_v2/Kconfig" -endif \ No newline at end of file +endif diff --git a/hal_v2/CMakeLists.txt b/hal_v2/CMakeLists.txt index 53e6e006..dbf91d79 100644 --- a/hal_v2/CMakeLists.txt +++ b/hal_v2/CMakeLists.txt @@ -1,5 +1,5 @@ # -# Copyright (c) 2025, Telink +# Copyright (c) 2025-2026, Telink # # SPDX-License-Identifier: Apache-2.0 # @@ -23,11 +23,28 @@ elseif(CONFIG_SOC_RISCV_TELINK_TL323X) set(SOC "TL323X") set(LIB_SOC_NAME "tl323x") message(STATUS "Configuring for SOC: TELINK_TL323X") +elseif(CONFIG_SOC_RISCV_TELINK_TL521X) + set(SOC "TL521X") + set(LIB_SOC_NAME "tl521x") + message(STATUS "Configuring for SOC: TELINK_TL521X") +elseif(CONFIG_SOC_RISCV_TELINK_TL523X) + set(SOC "TL523X") + set(LIB_SOC_NAME "tl523x") + message(STATUS "Configuring for SOC: TELINK_TL523X") else() message(FATAL_ERROR "Not supported SOC") endif() -set(CONFIG_COMPILE_SDK 1) +# Default to precompiled BLE SDK unless Kconfig disables it. +# A disabled bool Kconfig option is undefined in CMake, so use +# CONFIG_SOC_SERIES as a sentinel to detect that Kconfig has run. +if(NOT DEFINED CONFIG_COMPILE_SDK) + if(DEFINED CONFIG_SOC_SERIES) + set(CONFIG_COMPILE_SDK 0) # Kconfig processed; COMPILE_SDK explicitly disabled. + else() + set(CONFIG_COMPILE_SDK 1) # Kconfig not loaded yet -> default to precompiled SDK. + endif() +endif() if(CONFIG_COMPILE_SDK) get_filename_component( @@ -51,10 +68,16 @@ if(CONFIG_COMPILE_SDK) else() zephyr_link_libraries(${TELINK_BLE_SDK_DIR}/tl_ble_sdk/proj_lib/zephyr/${LIB_SOC_NAME}/lib_zephyr_${LIB_SOC_NAME}_single_core.a) endif() - elseif(CONFIG_SOC_RISCV_TELINK_TL323X OR CONFIG_SOC_RISCV_TELINK_TL721X) - zephyr_link_libraries(${TELINK_BLE_SDK_DIR}/tl_ble_sdk/proj_lib/zephyr/${LIB_SOC_NAME}/lib_zephyr_${LIB_SOC_NAME}.a) - elseif(CONFIG_SOC_RISCV_TELINK_TL321X) - zephyr_link_libraries(${TELINK_BLE_SDK_DIR}/tl_ble_sdk/proj_lib/lib_zephyr_${LIB_SOC_NAME}.a) + elseif(CONFIG_SOC_RISCV_TELINK_TL321X OR CONFIG_SOC_RISCV_TELINK_TL323X OR CONFIG_SOC_RISCV_TELINK_TL721X OR CONFIG_SOC_RISCV_TELINK_TL521X OR CONFIG_SOC_RISCV_TELINK_TL523X) + if(CONFIG_IEEE802154_TLX_BLE_COEXIST OR CONFIG_BT_TLX_CHANNEL_SOUNDING) + zephyr_link_libraries(${TELINK_BLE_SDK_DIR}/tl_ble_sdk/proj_lib/zephyr/${LIB_SOC_NAME}/lib_zephyr_${LIB_SOC_NAME}_concurrent.a) + else() + if(CONFIG_COMPILE_TL_LIB_GENERAL) + zephyr_link_libraries(${TELINK_BLE_SDK_DIR}/tl_ble_sdk/proj_lib/zephyr/${LIB_SOC_NAME}/lib_zephyr_${LIB_SOC_NAME}_general.a) + else() + zephyr_link_libraries(${TELINK_BLE_SDK_DIR}/tl_ble_sdk/proj_lib/zephyr/${LIB_SOC_NAME}/lib_zephyr_${LIB_SOC_NAME}.a) + endif() + endif() endif() else() add_subdirectory(tl_ble_src/tools) @@ -62,8 +85,8 @@ endif() add_subdirectory(wrapper) -if(CONFIG_MBEDTLS) - add_subdirectory(wrapper/crypto/mbedtls) +if (CONFIG_MBEDTLS OR CONFIG_TINYCRYPT OR CONFIG_BOOT_USE_MBEDTLS OR CONFIG_BOOT_USE_TINYCRYPT) + add_subdirectory(wrapper/crypto) endif() if(CONFIG_PM) diff --git a/hal_v2/fetch_sdk.sh b/hal_v2/fetch_sdk.sh index 5c4891ac..86ff6c6d 100755 --- a/hal_v2/fetch_sdk.sh +++ b/hal_v2/fetch_sdk.sh @@ -2,33 +2,159 @@ # # Downloading Telink BLE SDK. # -# Usage: ./fetch_sdk.sh +# Usage: ./fetch_sdk.sh [repo_url] [target] # Copyright (c) 2026 Telink Semiconductor # SPDX-License-Identifier: Apache-2.0 SCRIPT_DIR=$(cd "$(dirname "$0")" && pwd) -REPO_URL="https://github.com/telink-semi/tl_ble_sdk.git" -TARGET_COMMIT="bf886feb6cb78dac40b4fc34c8cc1cec1316bf14" -DEST_DIR="$SCRIPT_DIR/tl_ble_sdk" +# default values +DEFAULT_REPO_URL="https://github.com/telink-semi/tl_ble_sdk_zephyr.git" +DEFAULT_TARGET="9135c8eddb7caf72256c911b0ef113fb4037b1b4" -echo "dest dir: $DEST_DIR" +# parse parameters +REPO_URL="${1:-$DEFAULT_REPO_URL}" +TARGET="${2:-$DEFAULT_TARGET}" +# Place the SDK alongside the hal_telink module (modules/hal/telink_ble_sdk), +# matching the west manifest layout so both methods are interchangeable. +DEST_DIR="$SCRIPT_DIR/../../telink_ble_sdk" -if [ ! -d "$DEST_DIR/.git" ]; then - echo "cloning repo..." - git clone $REPO_URL "$DEST_DIR" -else - echo "repo already exists, updating..." +# show help message +show_help() { + echo "Usage: $0 [repo_url] [target]" + echo "" + echo "Parameters:" + echo " repo_url - Git repository URL (default: $DEFAULT_REPO_URL)" + echo " target - Commit hash, branch name, or tag (default: $DEFAULT_TARGET)" + echo "" + echo "Examples:" + echo " $0 # Use default values" + echo " $0 https://github.com/xxx/sdk.git main # Clone main branch" + echo " $0 https://github.com/xxx/sdk.git v1.2.3 # Clone tag v1.2.3" + echo " $0 https://github.com/xxx/sdk.git abc123 # Clone specific commit" + echo "" +} + +# check parameters +if [ "$1" = "-h" ] || [ "$1" = "--help" ]; then + show_help + exit 0 fi -cd "$DEST_DIR" || exit +echo "==========================================" +echo "Fetching Telink BLE SDK" +echo "==========================================" +echo "Repository: $REPO_URL" +echo "Target: $TARGET" +echo "Destination: $DEST_DIR" +echo "==========================================" + +# check if target repo exists +if [ -d "$DEST_DIR/.git" ]; then + echo "Repository already exists, updating..." + cd "$DEST_DIR" || exit 1 + + # acquire latest data + git fetch --all --tags --prune + + # check if target commit exists in current remote + TARGET_EXISTS=false + + if git rev-parse --quiet --verify "$TARGET^{commit}" >/dev/null 2>&1; then + TARGET_EXISTS=true + else + # Try to fetch from other remotes + echo "Target not found in current remote, trying to add alternative remote..." + + # Check if we need to switch to different repository + CURRENT_REMOTE=$(git remote get-url origin 2>/dev/null) + if [ "$CURRENT_REMOTE" != "$REPO_URL" ]; then + echo "Current remote: $CURRENT_REMOTE" + echo "Target remote: $REPO_URL" + echo "Switching remote to target repository..." + + # Add new remote + git remote add target_repo "$REPO_URL" 2>/dev/null || git remote set-url target_repo "$REPO_URL" + + # Fetch from target remote + git fetch target_repo --tags --prune -echo "fetching latest data and checking out Commit: $TARGET_COMMIT" -git fetch origin -git checkout $TARGET_COMMIT + # Check if target exists in target remote + if git rev-parse --quiet --verify "target_repo/$TARGET^{commit}" >/dev/null 2>&1; then + TARGET_EXISTS=true + # Create a local branch tracking the target remote + git checkout -b "target_$TARGET" "target_repo/$TARGET" 2>/dev/null || git checkout "$TARGET" + fi + fi + fi -CURRENT_COMMIT=$(git rev-parse HEAD) -echo "------------------------------------------" + CURRENT_COMMIT=$(git rev-parse HEAD) + + # try to checkout target as commit, branch, or tag + if [ "$TARGET_EXISTS" = true ] || git rev-parse --quiet --verify "$TARGET^{commit}" >/dev/null 2>&1; then + # TARGET is valid commit hash + if [ "$CURRENT_COMMIT" = "$TARGET" ]; then + echo "Already at target commit: $TARGET" + exit 0 + fi + git checkout "$TARGET" + elif git show-ref --quiet --verify "refs/heads/$TARGET"; then + # TARGET is local branch + echo "Switching to branch: $TARGET" + git checkout "$TARGET" + git pull origin "$TARGET" + elif git ls-remote --exit-code --heads origin "$TARGET" >/dev/null 2>&1; then + # TARGET is remote branch + echo "Switching to remote branch: $TARGET" + git checkout -B "$TARGET" "origin/$TARGET" + elif git ls-remote --exit-code --tags origin "$TARGET" >/dev/null 2>&1; then + # TARGET is tag + echo "Switching to tag: $TARGET" + git checkout "tags/$TARGET" -b "tag-$TARGET" + elif git ls-remote --exit-code --heads target_repo "$TARGET" >/dev/null 2>&1; then + # TARGET is branch in target remote + echo "Switching to branch from target remote: $TARGET" + git checkout -B "$TARGET" "target_repo/$TARGET" + elif git ls-remote --exit-code --tags target_repo "$TARGET" >/dev/null 2>&1; then + # TARGET is tag in target remote + echo "Switching to tag from target remote: $TARGET" + git checkout "tags/$TARGET" -b "tag-$TARGET" + else + echo "Error: Cannot find target '$TARGET'" + echo "Available commits in current repository:" + git log --oneline -10 + exit 1 + fi +else + echo "Cloning repository..." + git clone "$REPO_URL" "$DEST_DIR" + cd "$DEST_DIR" || exit 1 + + # switch to specific target + if git rev-parse --quiet --verify "$TARGET^{commit}" >/dev/null 2>&1; then + git checkout "$TARGET" + elif git ls-remote --exit-code origin "$TARGET" >/dev/null 2>&1; then + git checkout -B "$TARGET" "origin/$TARGET" + elif git ls-remote --exit-code --tags origin "$TARGET" >/dev/null 2>&1; then + git checkout "tags/$TARGET" -b "tag-$TARGET" + else + echo "Warning: Target '$TARGET' not found, using default branch" + fi +fi + +# show final status +FINAL_COMMIT=$(git rev-parse HEAD) +FINAL_BRANCH=$(git rev-parse --abbrev-ref HEAD 2>/dev/null || echo "detached HEAD") + +echo "==========================================" echo "Sync complete!" echo "Current directory: $(pwd)" -echo "Current Commit: $CURRENT_COMMIT" +echo "Current branch: $FINAL_BRANCH" +echo "Current commit: $FINAL_COMMIT" +echo "==========================================" + +# show recent commits +echo "Recent commits:" +git log --oneline -3 +echo "==========================================" + diff --git a/hal_v2/fetch_src.sh b/hal_v2/fetch_src.sh index f6f5c482..adaa4a91 100755 --- a/hal_v2/fetch_src.sh +++ b/hal_v2/fetch_src.sh @@ -4,30 +4,142 @@ # !!! This script is for Telink internal usage only !!! # !!! Use ./fetch_sdk instead !!! # -# Usage: ./fetch_src.sh +# Usage: ./fetch_src.sh [repo_url] [target] # Copyright (c) 2026 Telink Semiconductor # SPDX-License-Identifier: Apache-2.0 SCRIPT_DIR=$(cd "$(dirname "$0")" && pwd) -REPO_URL="http://192.168.48.36/src/ble/telink_b91m_ble_multi_connection_src.git" -TARGET_COMMIT="d8b779b1ed138c0579b548d3164cb255955e6f09" +# default values +DEFAULT_REPO_URL="http://192.168.48.36/src/ble/telink_b91m_ble_multi_connection_src.git" +DEFAULT_TARGET="59f98c5122291c8eb23e3ea0b3666c42e9f81b8e" + +# parse parameters +REPO_URL="${1:-$DEFAULT_REPO_URL}" +TARGET="${2:-$DEFAULT_TARGET}" DEST_DIR="$SCRIPT_DIR/tl_ble_src" -echo "dest dir: $DEST_DIR" +# show help message +show_help() { + echo "Usage: $0 [repo_url] [target]" + echo "" + echo "Parameters:" + echo " repo_url - Git repository URL (default: $DEFAULT_REPO_URL)" + echo " target - Commit hash, branch name, or tag (default: $DEFAULT_TARGET)" + echo "" + echo "Examples:" + echo " $0 # Use default values" + echo " $0 https://github.com/xxx/src.git main # Clone main branch" + echo " $0 https://github.com/xxx/src.git v1.2.3 # Clone tag v1.2.3" + echo " $0 https://github.com/xxx/src.git abc123 # Clone specific commit" + echo "" +} -if [ ! -d "$DEST_DIR/.git" ]; then - echo "cloning repo..." - git clone $REPO_URL "$DEST_DIR" -else - echo "repo already exists, updating..." +# check parameters +if [ "$1" = "-h" ] || [ "$1" = "--help" ]; then + show_help + exit 0 fi -cd "$DEST_DIR" || exit +echo "==========================================" +echo "Fetching Telink BLE sources" +echo "==========================================" +echo "Repository: $REPO_URL" +echo "Target: $TARGET" +echo "Destination: $DEST_DIR" +echo "==========================================" -echo "fetching latest data and checking out Commit: $TARGET_COMMIT" -git fetch origin -git checkout $TARGET_COMMIT +# check if target repo exists +if [ -d "$DEST_DIR/.git" ]; then + echo "Repository already exists, updating..." + cd "$DEST_DIR" || exit 1 + + # acquire latest data + git fetch --all --tags --prune + + # check if target commit exists in current remote + TARGET_EXISTS=false + + if git rev-parse --quiet --verify "$TARGET^{commit}" >/dev/null 2>&1; then + TARGET_EXISTS=true + else + # Try to fetch from other remotes + echo "Target not found in current remote, trying to add alternative remote..." + + # Check if we need to switch to different repository + CURRENT_REMOTE=$(git remote get-url origin 2>/dev/null) + if [ "$CURRENT_REMOTE" != "$REPO_URL" ]; then + echo "Current remote: $CURRENT_REMOTE" + echo "Target remote: $REPO_URL" + echo "Switching remote to target repository..." + + # Add new remote + git remote add target_repo "$REPO_URL" 2>/dev/null || git remote set-url target_repo "$REPO_URL" + + # Fetch from target remote + git fetch target_repo --tags --prune + + # Check if target exists in target remote + if git rev-parse --quiet --verify "target_repo/$TARGET^{commit}" >/dev/null 2>&1; then + TARGET_EXISTS=true + # Create a local branch tracking the target remote + git checkout -b "target_$TARGET" "target_repo/$TARGET" 2>/dev/null || git checkout "$TARGET" + fi + fi + fi + + CURRENT_COMMIT=$(git rev-parse HEAD) + + # try to checkout target as commit, branch, or tag + if [ "$TARGET_EXISTS" = true ] || git rev-parse --quiet --verify "$TARGET^{commit}" >/dev/null 2>&1; then + # TARGET is valid commit hash + if [ "$CURRENT_COMMIT" = "$TARGET" ]; then + echo "Already at target commit: $TARGET" + echo "------------------------------------------" + echo "Sync complete!" + echo "Current directory: $(pwd)" + echo "Current Commit: $CURRENT_COMMIT" + exit 0 + fi + git checkout "$TARGET" + elif git show-ref --quiet --verify "refs/heads/$TARGET"; then + # TARGET is local branch + if [ "$CURRENT_COMMIT" = "$(git rev-parse "$TARGET")" ]; then + echo "Already at target branch: $TARGET (commit: $CURRENT_COMMIT)" + echo "------------------------------------------" + echo "Sync complete!" + echo "Current directory: $(pwd)" + echo "Current Commit: $CURRENT_COMMIT" + exit 0 + fi + git checkout "$TARGET" + git pull origin "$TARGET" + elif git show-ref --quiet --verify "refs/remotes/origin/$TARGET"; then + # TARGET is remote branch + git checkout -b "$TARGET" "origin/$TARGET" 2>/dev/null || git checkout "$TARGET" + git pull origin "$TARGET" + else + echo "Error: Target '$TARGET' not found. Please check the commit hash, branch name, or tag." + exit 1 + fi +else + # repository does not exist, clone it + echo "Cloning repository..." + git clone "$REPO_URL" "$DEST_DIR" + cd "$DEST_DIR" || exit 1 + + # try to checkout target + if git rev-parse --quiet --verify "$TARGET^{commit}" >/dev/null 2>&1; then + git checkout "$TARGET" + elif git show-ref --quiet --verify "refs/heads/$TARGET"; then + git checkout "$TARGET" + elif git show-ref --quiet --verify "refs/remotes/origin/$TARGET"; then + git checkout -b "$TARGET" "origin/$TARGET" + else + echo "Error: Target '$TARGET' not found. Please check the commit hash, branch name, or tag." + exit 1 + fi +fi CURRENT_COMMIT=$(git rev-parse HEAD) echo "------------------------------------------" diff --git a/hal_v2/wrapper/CMakeLists.txt b/hal_v2/wrapper/CMakeLists.txt index 195b5ccd..169d5b9e 100644 --- a/hal_v2/wrapper/CMakeLists.txt +++ b/hal_v2/wrapper/CMakeLists.txt @@ -23,8 +23,8 @@ zephyr_library_sources(${ZIGBEE_SOURCES}) zephyr_compile_options( -DCHIP_TYPE=CHIP_TYPE_TL322X - -DTLK_MESSAGE_D25F=1 - -DTLK_MESSAGE_N22=0 + # -DTLK_MESSAGE_D25F=1 + # -DTLK_MESSAGE_N22=0 -DMAILBOX_D25F=1 -DMAILBOX_FALSH_WR_NOTIFY=1 -DSHM_MBOX_TYPE_TPSLL_EN=1 @@ -42,6 +42,10 @@ if(CONFIG_IEEE802154_TELINK_B9X OR CONFIG_IEEE802154_TELINK_TLX) zephyr_include_directories(controller/${SOC_FAMILY}) endif() +if(CONFIG_IEEE802154_TLX_BLE_COEXIST) + zephyr_include_directories(${ZEPHYR_BASE}/drivers/ieee802154) +endif() + if(CONFIG_SOC_SERIES_RISCV_TELINK_B9X_RETENTION OR CONFIG_SOC_SERIES_RISCV_TELINK_TLX_RETENTION) zephyr_library_sources(common/tl_context.S) endif() @@ -53,6 +57,12 @@ if(CONFIG_BT_B9X OR CONFIG_BT_TLX) controller/${SOC_FAMILY}/${SOC_FAMILY}_bt_flash.c ) + if(CONFIG_BT_CHANNEL_SOUNDING) + zephyr_library_sources( + controller/${SOC_FAMILY}/${SOC_FAMILY}_bt_cs.c + ) + endif() + if(CONFIG_TELINK_TL322X_ENABLE_N22) zephyr_library_sources( controller/${SOC_FAMILY}/${SOC_FAMILY}_bt_host.c @@ -70,6 +80,10 @@ endif() zephyr_library_sources(common/tl_flash.c) +if(CONFIG_SOC_RISCV_TELINK_TL323X) +zephyr_library_sources(common/tl_sd_adc.c) +endif() + if(CONFIG_PM) zephyr_sources(common/tl_sleep.c) -endif() \ No newline at end of file +endif() diff --git a/hal_v2/wrapper/Kconfig b/hal_v2/wrapper/Kconfig index fcdc28f3..fe734a7f 100644 --- a/hal_v2/wrapper/Kconfig +++ b/hal_v2/wrapper/Kconfig @@ -2,3 +2,4 @@ # SPDX-License-Identifier: Apache-2.0 rsource "controller/Kconfig" +rsource "crypto/Kconfig" diff --git a/hal_v2/wrapper/common/tl_flash.c b/hal_v2/wrapper/common/tl_flash.c index 902a3538..180aa812 100644 --- a/hal_v2/wrapper/common/tl_flash.c +++ b/hal_v2/wrapper/common/tl_flash.c @@ -1,5 +1,5 @@ -/****************************************************************************** - * Copyright (c) 2023 Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK") +/************************************************************************************************** + * Copyright (c) 2023-2026 Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK") * All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -14,36 +14,64 @@ * See the License for the specific language governing permissions and * limitations under the License. * - *****************************************************************************/ + **************************************************************************************************/ #include "tl_flash.h" #include "drivers.h" #include "flash.h" #include "flash_prot.h" - /******************************************************************************************************************* - * This function serves to 1m area flash protection - ******************************************************************************************************************/ +#ifndef CONFIG_SOC_RISCV_TELINK_TL523X + /************************************************************************************************* + * This function serves to 1m area flash protection + **************************************************************************************************/ #define FLASH_1M_ADR_OFFSET 0x100000 #define FLASH_1920K_ADR_OFFSET 0x1e0000 #define FLASH_2M_ADR_OFFSET 0x200000 +#define FLASH_3968K_ADR_OFFSET 0x3e0000 #define FLASH_4M_ADR_OFFSET 0x400000 -#define FLASH_ADR_OFFSET_SELECT FLASH_1920K_ADR_OFFSET +#if CONFIG_SOC_RISCV_TELINK_TL323X || CONFIG_SOC_RISCV_TELINK_TL521X + #if CONFIG_PM + #define FLASH_ADR_OFFSET_SELECT FLASH_1920K_ADR_OFFSET + #else + #if (CONFIG_FLASH_SIZE > 2048) + /* 4MB flash or larger, protect up to 3968K */ + #define FLASH_ADR_OFFSET_SELECT FLASH_3968K_ADR_OFFSET + #elif (CONFIG_FLASH_SIZE > 1024) + /* 2MB flash, protect up to 1920K */ + #define FLASH_ADR_OFFSET_SELECT FLASH_1920K_ADR_OFFSET + #else + /* 1MB flash, protect up to 1M */ + #define FLASH_ADR_OFFSET_SELECT FLASH_1M_ADR_OFFSET + #endif + #endif/*CONFIG_PM*/ +#else + #if (CONFIG_FLASH_SIZE > 1024) + /* 2MB flash, protect up to 1920K */ + #define FLASH_ADR_OFFSET_SELECT FLASH_1920K_ADR_OFFSET + #else + /* 1MB flash, protect up to 1M */ + #define FLASH_ADR_OFFSET_SELECT FLASH_1M_ADR_OFFSET + #endif +#endif uint16_t flash_protection_lock_select(uint32_t addr) { /* FLASH_LOCK_NONE_MID156085 or FLASH_LOCK_NONE_MID1560C8 is 0x0*/ - unsigned int flash_lockBlock_cmd = flash_change_app_lock_block_to_flash_lock_block(FLASH_LOCK_FW_LOW_1M); + unsigned int flash_lockBlock_cmd = + flash_change_app_lock_block_to_flash_lock_block(FLASH_LOCK_FW_LOW_1M); unsigned int app_lockBlock = FLASH_LOCK_FW_LOW_1M; unsigned int blc_flash_mid = 0; if(addr == FLASH_1M_ADR_OFFSET) { app_lockBlock = FLASH_LOCK_FW_LOW_1M; - flash_lockBlock_cmd = flash_change_app_lock_block_to_flash_lock_block(app_lockBlock); + flash_lockBlock_cmd = + flash_change_app_lock_block_to_flash_lock_block(app_lockBlock); }else if (addr == FLASH_2M_ADR_OFFSET || addr == FLASH_4M_ADR_OFFSET){ app_lockBlock = FLASH_LOCK_ALL_AREA; - flash_lockBlock_cmd = flash_change_app_lock_block_to_flash_lock_block(app_lockBlock); + flash_lockBlock_cmd = + flash_change_app_lock_block_to_flash_lock_block(app_lockBlock); }else if (addr == FLASH_1920K_ADR_OFFSET){ blc_flash_mid = ble_flash_read_mid(); if(blc_flash_mid == MID156085){ @@ -51,6 +79,29 @@ uint16_t flash_protection_lock_select(uint32_t addr) }else if (blc_flash_mid == MID1560C8){ flash_lockBlock_cmd = FLASH_LOCK_LOW_1920K_MID1560C8; } +#if CONFIG_SOC_RISCV_TELINK_TL323X || CONFIG_SOC_RISCV_TELINK_TL521X + }else if (addr == FLASH_3968K_ADR_OFFSET){ + blc_flash_mid = ble_flash_read_mid(); + /* 4M flash protect */ +#if CONFIG_SOC_RISCV_TELINK_TL323X + if(blc_flash_mid == MID166085){ + flash_lockBlock_cmd = FLASH_LOCK_LOW_3968K_MID166085; + }else +#endif +#if CONFIG_SOC_RISCV_TELINK_TL521X + if(blc_flash_mid == MID1660CD){ + flash_lockBlock_cmd = FLASH_LOCK_LOW_3968K_MID1660CD; + }else +#endif + { + /* use generic 1920k flash protect */ + if(blc_flash_mid == MID156085){ + flash_lockBlock_cmd = FLASH_LOCK_LOW_1920K_MID156085; + }else if (blc_flash_mid == MID1560C8){ + flash_lockBlock_cmd = FLASH_LOCK_LOW_1920K_MID1560C8; + } + } +#endif } return flash_lockBlock_cmd; } @@ -74,8 +125,12 @@ void flash_protection_lock_operation(unsigned int offset) void flash_protection_unlock_operation(unsigned int offset) { - /* suppose we will operate lock area, it will do ota, will unlock first and not lock again until it will reboot. */ + /* + * suppose we will operate lock area, it will do ota, + * will unlock first and not lock again until it will reboot. + */ if(offset < FLASH_ADR_OFFSET_SELECT){ flash_unlock(); } -} \ No newline at end of file +} +#endif diff --git a/hal_v2/wrapper/common/tl_rf_power.c b/hal_v2/wrapper/common/tl_rf_power.c index 4758859b..dead1cb9 100644 --- a/hal_v2/wrapper/common/tl_rf_power.c +++ b/hal_v2/wrapper/common/tl_rf_power.c @@ -19,7 +19,9 @@ #include "tl_rf_power.h" #if CONFIG_SOC_RISCV_TELINK_B91 || CONFIG_SOC_RISCV_TELINK_B92 #include -#elif CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL721X || CONFIG_SOC_RISCV_TELINK_TL322X || CONFIG_SOC_RISCV_TELINK_TL323X +#elif CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL721X || \ + CONFIG_SOC_RISCV_TELINK_TL322X || CONFIG_SOC_RISCV_TELINK_TL323X || \ + CONFIG_SOC_RISCV_TELINK_TL521X || CONFIG_SOC_RISCV_TELINK_TL523X #include #endif @@ -274,6 +276,45 @@ const uint8_t tl_tx_pwr_lt[] = { }; +#elif CONFIG_SOC_RISCV_TELINK_TL521X +/* Copy from TX power TL321X lookup table, needs to update */ +const uint8_t tl_tx_pwr_lt[] = { + /*VANT*/ + RF_POWER_N20p50dBm, /**< -21.0 dbm: -20 */ + RF_POWER_N20p50dBm, /**< -21.0 dbm: -19 */ + RF_POWER_N20p50dBm, /**< -21.0 dbm: -18 */ + RF_POWER_N20p50dBm, /**< -21.0 dbm: -17 */ + RF_POWER_N20p50dBm, /**< -21.0 dbm: -16 */ + RF_POWER_N15p00dBm, /**< -15.0 dbm: -15 */ + RF_POWER_N15p00dBm, /**< -15.0 dbm: -14 */ + RF_POWER_N15p00dBm, /**< -15.0 dbm: -13 */ + RF_POWER_N15p00dBm, /**< -12.0 dbm: -12 */ + RF_POWER_N11p50dBm, /**< -12.0 dbm: -11 */ + RF_POWER_N11p50dBm, /**< -12.0 dbm: -10 */ + RF_POWER_N9p00dBm, /**< -9.5 dbm: -9 */ + RF_POWER_N9p00dBm, /**< -9.5 dbm: -8 */ + RF_POWER_N7p50dBm, /**< -7.5 dbm: -7 */ + RF_POWER_N6p00dBm, /**< -6.0 dbm: -6 */ + RF_POWER_N4p50dBm, /**< -5.0 dbm: -5 */ + RF_POWER_N4p50dBm, /**< -4.0 dbm: -4 */ + RF_POWER_N3p50dBm, /**< -3.0 dbm: -3 */ + RF_POWER_N2p00dBm, /**< -2.0 dbm: -2 */ + RF_POWER_N1p00dBm, /**< -1.5 dbm: -1 */ + RF_POWER_P0p00dBm, /**< 0.0 dbm: 0 */ + RF_POWER_P1p00dBm, /**< 1.2 dbm: 1 */ + RF_POWER_P2p00dBm, /**< 2.0 dbm: 2 */ + RF_POWER_P3p00dBm, /**< 3.0 dbm: 3 */ + RF_POWER_P4p00dBm, /**< 4.0 dbm: 4 */ + RF_POWER_P5p00dBm, /**< 5.0 dbm: 5 */ + RF_POWER_P6p00dBm, /**< 6.0 dbm: 6 */ + /*VBAT*/ + + RF_POWER_P7p00dBm, /**< 7.0 dbm: 7 */ + RF_POWER_P8p00dBm, /**< 8.0 dbm: 8 */ + RF_POWER_P9p00dBm, /**< 9.0 dbm: 9 */ + RF_POWER_P10p00dBm, /**< 10.0 dbm: 10 */ + RF_POWER_P10p00dBm, /**< 10.5 dbm: 11 */ +}; #endif _attribute_data_retention_ static volatile bool tl_rf_inited = false; diff --git a/hal_v2/wrapper/common/tl_rf_power.h b/hal_v2/wrapper/common/tl_rf_power.h index 24571e0a..f879d8f6 100644 --- a/hal_v2/wrapper/common/tl_rf_power.h +++ b/hal_v2/wrapper/common/tl_rf_power.h @@ -35,6 +35,9 @@ #elif CONFIG_SOC_RISCV_TELINK_TL323X #define TL_TX_POWER_MIN (-20) #define TL_TX_POWER_MAX (11) +#elif CONFIG_SOC_RISCV_TELINK_TL521X +#define TL_TX_POWER_MIN (-20) +#define TL_TX_POWER_MAX (11) #else #define TL_TX_POWER_MIN (-30) #define TL_TX_POWER_MAX (9) diff --git a/hal_v2/wrapper/common/tl_sd_adc.c b/hal_v2/wrapper/common/tl_sd_adc.c new file mode 100644 index 00000000..a09b8875 --- /dev/null +++ b/hal_v2/wrapper/common/tl_sd_adc.c @@ -0,0 +1,123 @@ +/************************************************************************************************** + * @file tl_sd_adc.c + * + * @brief This is the source file for tl323x + * + * @author Driver Group + * @date 2026 + * + * @par Copyright (c) 2026, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK") + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + **************************************************************************************************/ + +#include +#include "sd_adc.h" +#include "tl_sd_adc.h" +#include "lib/include/stimer.h" +#include "lpc.h" + +#define SD_ADC_SAMPLE_CNT 16 // Number of samples used to calculate the average. +static signed int sd_adc_sample_buffer[SD_ADC_SAMPLE_CNT] __attribute__((aligned(4))) = {0}; + +_attribute_ram_code_sec_ +int adc_sort_and_get_average_code(void) +{ + signed int code_average = 0; + + // Enable ADC and start sampling + sd_adc_power_on(SD_ADC_SAMPLE_MODE); + + /* Wait for ADC to stabilize */ + delay_us(200); + + /* Start sampling */ + sd_adc_sample_start(); + + // Discard the first 4 invalid samples + for (int i = 0; i < 4; i++) { + sd_adc_get_raw_code(); + } + + // Collect multiple samples + int cnt = 0; + while (cnt < SD_ADC_SAMPLE_CNT) { + int sample_cnt = sd_adc_get_rxfifo_cnt(); + if (sample_cnt > 0) { + sd_adc_sample_buffer[cnt] = sd_adc_get_raw_code(); + cnt++; + } + } + + // Sort samples using insertion sort + for(int i = 1; i < SD_ADC_SAMPLE_CNT; i++) { + if(sd_adc_sample_buffer[i] < sd_adc_sample_buffer[i-1]) { + signed int temp = sd_adc_sample_buffer[i]; + sd_adc_sample_buffer[i] = sd_adc_sample_buffer[i-1]; + int j; + for(j = i-1; j >= 0 && sd_adc_sample_buffer[j] > temp; j--) { + sd_adc_sample_buffer[j+1] = sd_adc_sample_buffer[j]; + } + sd_adc_sample_buffer[j+1] = temp; + } + } + + // Calculate average (remove the highest and lowest 1/4 data) + for (int i = SD_ADC_SAMPLE_CNT >> 2; + i < (SD_ADC_SAMPLE_CNT - (SD_ADC_SAMPLE_CNT >> 2)); i++) { + code_average += sd_adc_sample_buffer[i] / (SD_ADC_SAMPLE_CNT >> 1); + } + + signed int sd_adc_vol_10x = sd_adc_calculate_voltage(code_average, SD_ADC_VOLTAGE_10X_MV); + return sd_adc_vol_10x / 10; +} + +void AdcDriverInit(void) +{ + /* Initialize the SD ADC module to single-channel mode */ + sd_adc_init(SD_ADC_SINGLE_DC_MODE); +#if(SD_ADC_MODE == SD_ADC_GPIO_MODE) + sd_adc_gpio_cfg_t adc_gpio_cfg = + { + .clk_freq = SD_ADC_CLK_FREQ, + .downsample_rate = SD_ADC_DOWNSAMPLE_RATE, + .gpio_div = SD_ADC_DIV, + .input_p = SD_ADC_GPIO_PIN, + .input_n = SD_ADC_GNDN, + }; + sd_adc_gpio_sample_init(&adc_gpio_cfg); +#elif(SD_ADC_MODE == SD_ADC_VBAT_MODE) + sd_adc_vbat_sample_init(SD_ADC_CLK_FREQ, SD_ADC_DIV, SD_ADC_DOWNSAMPLE_RATE); +#endif +} + +int AdcDriverRead(void) +{ + int adc_mv_val = adc_sort_and_get_average_code(); + sd_adc_power_off(SD_ADC_SAMPLE_MODE); +#if(SD_ADC_MODE == SD_ADC_GPIO_MODE) + +#elif(SD_ADC_MODE == SD_ADC_VBAT_MODE) + /* + * Close LPC before sleep, otherwise + * it will increase the standby current. + */ + lpc_vbat_detect_disable(); + lpc_power_down(); +#endif + return adc_mv_val; +} + +adc_init_f _TLAdcDriverInit = AdcDriverInit; +adc_read_f _TLAdcDriverRead = AdcDriverRead; diff --git a/hal_v2/wrapper/common/tl_sd_adc.h b/hal_v2/wrapper/common/tl_sd_adc.h new file mode 100644 index 00000000..1605d479 --- /dev/null +++ b/hal_v2/wrapper/common/tl_sd_adc.h @@ -0,0 +1,55 @@ +/************************************************************************************************** + * @file tl_sd_adc.h + * + * @brief This is the header file for tl323x + * + * @author Driver Group + * @date 2026 + * + * @par Copyright (c) 2026, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK") + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + **************************************************************************************************/ +#pragma once + +#include "dma.h" +#include "compiler.h" +#include "gpio.h" +#include "reg_include/register.h" + +#define SD_ADC_GPIO_MODE 1 +#define SD_ADC_VBAT_MODE 2 +#define SD_ADC_MODE SD_ADC_VBAT_MODE + +#if(SD_ADC_MODE == SD_ADC_GPIO_MODE) +#define SD_ADC_GPIO_PIN SD_ADC_GPIO_PB5P +#define SD_ADC_DIV SD_ADC_GPIO_CHN_DIV_1F4 +#elif(SD_ADC_MODE == SD_ADC_VBAT_MODE) +#define SD_ADC_DIV SD_ADC_VBAT_DIV_1F4 +#endif +#define SD_ADC_CLK_FREQ SD_ADC_SAPMPLE_CLK_1M +#define SD_ADC_DOWNSAMPLE_RATE SD_ADC_DOWNSAMPLE_RATE_128 + +_attribute_ram_code_sec_ +int adc_sort_and_get_average_code(void); + +void AdcDriverInit(void); + +int AdcDriverRead(void); + +typedef void (*adc_init_f)(void); +typedef int (*adc_read_f)(void); + +extern adc_init_f _TLAdcDriverInit; +extern adc_read_f _TLAdcDriverRead; diff --git a/hal_v2/wrapper/common/tl_sleep.c b/hal_v2/wrapper/common/tl_sleep.c index c5a3397f..61b754b7 100644 --- a/hal_v2/wrapper/common/tl_sleep.c +++ b/hal_v2/wrapper/common/tl_sleep.c @@ -105,8 +105,12 @@ CONFIG_SOC_SERIES_RISCV_TELINK_TLX_RETENTION) #define DEEPSLEEP_MODE_RET_SRAM DEEPSLEEP_MODE_RET_SRAM_LOW96K #elif CONFIG_SOC_RISCV_TELINK_TL321X #define DEEPSLEEP_MODE_RET_SRAM DEEPSLEEP_MODE_RET_SRAM_LOW96K +#elif CONFIG_SOC_RISCV_TELINK_TL322X +#define DEEPSLEEP_MODE_RET_SRAM DEEPSLEEP_MODE_RET_SRAM_LOW128K #elif CONFIG_SOC_RISCV_TELINK_TL323X #define DEEPSLEEP_MODE_RET_SRAM DEEPSLEEP_MODE_RET_SRAM_LOW160K +#elif CONFIG_SOC_RISCV_TELINK_TL521X +#define DEEPSLEEP_MODE_RET_SRAM DEEPSLEEP_MODE_RET_SRAM_LOW256K #elif CONFIG_SOC_RISCV_TELINK_TL721X #define DEEPSLEEP_MODE_RET_SRAM DEEPSLEEP_MODE_RET_SRAM_LOW256K #endif diff --git a/hal_v2/wrapper/controller/Kconfig b/hal_v2/wrapper/controller/Kconfig index 63fbf4b4..d1a764c9 100644 --- a/hal_v2/wrapper/controller/Kconfig +++ b/hal_v2/wrapper/controller/Kconfig @@ -1,6 +1,21 @@ # Copyright (c) 2022 Telink Semiconductor # SPDX-License-Identifier: Apache-2.0 +config COMPILE_SDK + bool "Use precompiled BLE SDK library" + default y + help + Use the precompiled Telink BLE SDK library instead of building from + source. When enabled, internal headers are not available and must + be excluded. + +config COMPILE_TL_LIB_GENERAL + bool "Use general telink lib" + default n + help + Use the general Telink BLE SDK library instead of building with ram + optimized library to support for more features. + menu "Telink BLE Controller" depends on BT_B9X || BT_TLX @@ -85,6 +100,15 @@ config TL_BLE_CTRL_RF_POWER Telink TLX BLE TX power endif +if SOC_RISCV_TELINK_TL521X +config TL_BLE_CTRL_RF_POWER + int "Tx power, dbm" + default 3 + range -20 10 + help + Telink TLX BLE TX power +endif + config TL_BLE_CTRL_MASTER_MAX_NUM int "Maximum number of master connections" default 0 @@ -179,4 +203,11 @@ config TL_BLE_CTRL_THREAD_PERIOD_MS help Telink BLE Controller thread period in ms. +config BT_TLX_CHANNEL_SOUNDING + bool "Telink TLX Channel Sounding support" + depends on BT_TLX + depends on SOC_RISCV_TELINK_TL721X + help + Enable Channel Sounding (Bluetooth 6.0) in the Telink TLX Controller. + endmenu diff --git a/hal_v2/wrapper/controller/b9x/b9x_bt.c b/hal_v2/wrapper/controller/b9x/b9x_bt.c index 05b3ad69..8d2231eb 100644 --- a/hal_v2/wrapper/controller/b9x/b9x_bt.c +++ b/hal_v2/wrapper/controller/b9x/b9x_bt.c @@ -104,7 +104,8 @@ static int b9x_bt_hci_tx_handler(void) while(bltHci_txfifo.wptr != bltHci_txfifo.rptr) { /* Get HCI data */ - u8 *p = bltHci_txfifo.p + (bltHci_txfifo.rptr & bltHci_txfifo.mask) * bltHci_txfifo.size; + u8 *p = bltHci_txfifo.p + + (bltHci_txfifo.rptr & bltHci_txfifo.mask) * bltHci_txfifo.size; if (p) { u32 len; BSTREAM_TO_UINT16(len, p); @@ -117,9 +118,11 @@ static int b9x_bt_hci_tx_handler(void) } } else if (tl_bt_state == TL_BT_CONTROLLER_STATE_STOPPING) { /* In this state HCI reset is sent - waiting for command complete */ - static const uint8_t hci_reset_cmd_complette[] = {0x04, 0x0e, 0x04, 0x01, 0x03, 0x0c, 0x00}; + static const uint8_t hci_reset_cmd_complette[] = + {0x04, 0x0e, 0x04, 0x01, 0x03, 0x0c, 0x00}; - if (len == sizeof(hci_reset_cmd_complette) && !memcmp(p, hci_reset_cmd_complette, len)) { + if (len == sizeof(hci_reset_cmd_complette) && + !memcmp(p, hci_reset_cmd_complette, len)) { tl_bt_state = TL_BT_CONTROLLER_STATE_STOPPED; k_sem_give(&controller_sem); } @@ -245,7 +248,8 @@ int b9x_bt_controller_init() /* Create BLE main thread */ (void)k_thread_create(&b9x_bt_controller_thread_data, - b9x_bt_controller_thread_stack, K_THREAD_STACK_SIZEOF(b9x_bt_controller_thread_stack), + b9x_bt_controller_thread_stack, + K_THREAD_STACK_SIZEOF(b9x_bt_controller_thread_stack), b9x_bt_controller_thread, NULL, NULL, NULL, BLE_THREAD_PRIORITY, 0, K_NO_WAIT); #if CONFIG_SOC_RISCV_TELINK_B91 (void)k_thread_name_set(&b9x_bt_controller_thread_data, "B91_BT"); @@ -322,7 +326,7 @@ void b9x_bt_host_callback_register(const b9x_bt_host_callback_t *pcb) /** * @brief Get state of Telink B9X BLE Controller */ -enum tl_bt_controller_state tl_bt_controller_state(void) { - +enum tl_bt_controller_state tl_bt_controller_state(void) +{ return tl_bt_state; } diff --git a/hal_v2/wrapper/controller/b9x/b9x_bt.h b/hal_v2/wrapper/controller/b9x/b9x_bt.h index 14585332..2df06484 100644 --- a/hal_v2/wrapper/controller/b9x/b9x_bt.h +++ b/hal_v2/wrapper/controller/b9x/b9x_bt.h @@ -34,8 +34,10 @@ enum tl_bt_controller_state { * used for vhci call host function to notify what host need to do */ typedef struct b9x_bt_host_callback { - void (*host_send_available)(void); /* the host can send packet to the controller */ - void (*host_read_packet)(uint8_t *data, uint16_t len); /* the controller has a packet to send to the host */ + /* the host can send packet to the controller */ + void (*host_send_available)(void); + /* the controller has a packet to send to the host */ + void (*host_read_packet)(uint8_t *data, uint16_t len); } b9x_bt_host_callback_t; /** diff --git a/hal_v2/wrapper/controller/b9x/b9x_bt_buffer.h b/hal_v2/wrapper/controller/b9x/b9x_bt_buffer.h index c4dd0c22..2697a06e 100644 --- a/hal_v2/wrapper/controller/b9x/b9x_bt_buffer.h +++ b/hal_v2/wrapper/controller/b9x/b9x_bt_buffer.h @@ -26,7 +26,7 @@ #include "stack/ble/B92/ble.h" #endif -#define BT_BUF_HCI_RX_SIZE \ +#define BT_BUF_HCI_RX_SIZE \ MAX(BT_BUF_CMD_SIZE(CONFIG_BT_BUF_CMD_TX_SIZE), BT_BUF_ACL_SIZE(CONFIG_BT_BUF_ACL_TX_SIZE)) #define ACL_CONN_MAX_RX_OCTETS (BT_BUF_RX_SIZE > 251 ? 251 : BT_BUF_RX_SIZE) diff --git a/hal_v2/wrapper/controller/b9x/b9x_bt_flash.c b/hal_v2/wrapper/controller/b9x/b9x_bt_flash.c index 76f4d480..c9a329ac 100644 --- a/hal_v2/wrapper/controller/b9x/b9x_bt_flash.c +++ b/hal_v2/wrapper/controller/b9x/b9x_bt_flash.c @@ -41,9 +41,9 @@ static int get_bytes_from_str(uint8_t *buf, int buf_len, const char *src) for (i = 0U; i < strlen(src); i++) { if (!(src[i] >= '0' && src[i] <= '9') && - !(src[i] >= 'A' && src[i] <= 'F') && - !(src[i] >= 'a' && src[i] <= 'f') && - src[i] != ':') { + !(src[i] >= 'A' && src[i] <= 'F') && + !(src[i] >= 'a' && src[i] <= 'f') && + src[i] != ':') { return -EINVAL; } } diff --git a/hal_v2/wrapper/controller/tlx/debug_gpio.h b/hal_v2/wrapper/controller/tlx/debug_gpio.h new file mode 100644 index 00000000..cd47c878 --- /dev/null +++ b/hal_v2/wrapper/controller/tlx/debug_gpio.h @@ -0,0 +1,275 @@ +/****************************************************************************** + * Copyright (c) 2026 Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK") + * All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + *****************************************************************************/ +#ifndef __DEBUG_GPIO_H__ +#define __DEBUG_GPIO_H__ + +#ifndef DEBUG_OT_BLE_GPIO_ENABLE +#define DEBUG_OT_BLE_GPIO_ENABLE 0 +#endif + +#if (DEBUG_OT_BLE_GPIO_ENABLE) + #define GPIO_CHN0 GPIO_PE0 + #define GPIO_CHN1 GPIO_PE1 + #define GPIO_CHN2 GPIO_PE2 + #define GPIO_CHN3 GPIO_PE3 + #define GPIO_CHN4 GPIO_PE4 + #define GPIO_CHN5 GPIO_PE5 + #define GPIO_CHN6 GPIO_PE6 + #define GPIO_CHN7 GPIO_PF3 + + #define GPIO_CHN8 GPIO_PF4 + #define GPIO_CHN9 GPIO_PF6 + #define GPIO_CHN10 GPIO_PF7 + #define GPIO_CHN11 GPIO_PA0 + #define GPIO_CHN12 GPIO_PA1 + #define GPIO_CHN13 GPIO_PE7 + #define GPIO_CHN14 GPIO_PF0 + #define GPIO_CHN15 GPIO_PF1 + + + #define PE0_OUTPUT_ENABLE 1 + #define PE1_OUTPUT_ENABLE 1 + #define PE2_OUTPUT_ENABLE 1 + #define PE3_OUTPUT_ENABLE 1 + #define PE4_OUTPUT_ENABLE 1 + #define PE5_OUTPUT_ENABLE 1 + #define PE6_OUTPUT_ENABLE 1 + #define PF3_OUTPUT_ENABLE 1 + + #define PF4_OUTPUT_ENABLE 1 + #define PF6_OUTPUT_ENABLE 1 + #define PF7_OUTPUT_ENABLE 1 + #define PA0_OUTPUT_ENABLE 1 + #define PA1_OUTPUT_ENABLE 1 + #define PE7_OUTPUT_ENABLE 1 + #define PF0_OUTPUT_ENABLE 1 + #define PF1_OUTPUT_ENABLE 1 +#endif + +#if (DEBUG_OT_BLE_GPIO_ENABLE) + #ifdef GPIO_CHN0 + #define DBG_OT_BLE_CHN0_LOW gpio_write(GPIO_CHN0, 0) + #define DBG_OT_BLE_CHN0_HIGH gpio_write(GPIO_CHN0, 1) + #define DBG_OT_BLE_CHN0_TOGGLE gpio_toggle(GPIO_CHN0) + #else + #define DBG_OT_BLE_CHN0_LOW + #define DBG_OT_BLE_CHN0_HIGH + #define DBG_OT_BLE_CHN0_TOGGLE + #endif + + #ifdef GPIO_CHN1 + #define DBG_OT_BLE_CHN1_LOW gpio_write(GPIO_CHN1, 0) + #define DBG_OT_BLE_CHN1_HIGH gpio_write(GPIO_CHN1, 1) + #define DBG_OT_BLE_CHN1_TOGGLE gpio_toggle(GPIO_CHN1) + #else + #define DBG_OT_BLE_CHN1_LOW + #define DBG_OT_BLE_CHN1_HIGH + #define DBG_OT_BLE_CHN1_TOGGLE + #endif + + #ifdef GPIO_CHN2 + #define DBG_OT_BLE_CHN2_LOW gpio_write(GPIO_CHN2, 0) + #define DBG_OT_BLE_CHN2_HIGH gpio_write(GPIO_CHN2, 1) + #define DBG_OT_BLE_CHN2_TOGGLE gpio_toggle(GPIO_CHN2) + #else + #define DBG_OT_BLE_CHN2_LOW + #define DBG_OT_BLE_CHN2_HIGH + #define DBG_OT_BLE_CHN2_TOGGLE + #endif + + #ifdef GPIO_CHN3 + #define DBG_OT_BLE_CHN3_LOW gpio_write(GPIO_CHN3, 0) + #define DBG_OT_BLE_CHN3_HIGH gpio_write(GPIO_CHN3, 1) + #define DBG_OT_BLE_CHN3_TOGGLE gpio_toggle(GPIO_CHN3) + #else + #define DBG_OT_BLE_CHN3_LOW + #define DBG_OT_BLE_CHN3_HIGH + #define DBG_OT_BLE_CHN3_TOGGLE + #endif + + #ifdef GPIO_CHN4 + #define DBG_OT_BLE_CHN4_LOW gpio_write(GPIO_CHN4, 0) + #define DBG_OT_BLE_CHN4_HIGH gpio_write(GPIO_CHN4, 1) + #define DBG_OT_BLE_CHN4_TOGGLE gpio_toggle(GPIO_CHN4) + #else + #define DBG_OT_BLE_CHN4_LOW + #define DBG_OT_BLE_CHN4_HIGH + #define DBG_OT_BLE_CHN4_TOGGLE + #endif + + #ifdef GPIO_CHN5 + #define DBG_OT_BLE_CHN5_LOW gpio_write(GPIO_CHN5, 0) + #define DBG_OT_BLE_CHN5_HIGH gpio_write(GPIO_CHN5, 1) + #define DBG_OT_BLE_CHN5_TOGGLE gpio_toggle(GPIO_CHN5) + #else + #define DBG_OT_BLE_CHN5_LOW + #define DBG_OT_BLE_CHN5_HIGH + #define DBG_OT_BLE_CHN5_TOGGLE + #endif + + #ifdef GPIO_CHN6 + #define DBG_OT_BLE_CHN6_LOW gpio_write(GPIO_CHN6, 0) + #define DBG_OT_BLE_CHN6_HIGH gpio_write(GPIO_CHN6, 1) + #define DBG_OT_BLE_CHN6_TOGGLE gpio_toggle(GPIO_CHN6) + #else + #define DBG_OT_BLE_CHN6_LOW + #define DBG_OT_BLE_CHN6_HIGH + #define DBG_OT_BLE_CHN6_TOGGLE + #endif + + #ifdef GPIO_CHN7 + #define DBG_OT_BLE_CHN7_LOW gpio_write(GPIO_CHN7, 0) + #define DBG_OT_BLE_CHN7_HIGH gpio_write(GPIO_CHN7, 1) + #define DBG_OT_BLE_CHN7_TOGGLE gpio_toggle(GPIO_CHN7) + #else + #define DBG_OT_BLE_CHN7_LOW + #define DBG_OT_BLE_CHN7_HIGH + #define DBG_OT_BLE_CHN7_TOGGLE + #endif + + #ifdef GPIO_CHN8 + #define DBG_OT_BLE_CHN8_LOW gpio_write(GPIO_CHN8, 0) + #define DBG_OT_BLE_CHN8_HIGH gpio_write(GPIO_CHN8, 1) + #define DBG_OT_BLE_CHN8_TOGGLE gpio_toggle(GPIO_CHN8) + #else + #define DBG_OT_BLE_CHN8_LOW + #define DBG_OT_BLE_CHN8_HIGH + #define DBG_OT_BLE_CHN8_TOGGLE + #endif + + #ifdef GPIO_CHN9 + #define DBG_OT_BLE_CHN9_LOW gpio_write(GPIO_CHN9, 0) + #define DBG_OT_BLE_CHN9_HIGH gpio_write(GPIO_CHN9, 1) + #define DBG_OT_BLE_CHN9_TOGGLE gpio_toggle(GPIO_CHN9) + #else + #define DBG_OT_BLE_CHN9_LOW + #define DBG_OT_BLE_CHN9_HIGH + #define DBG_OT_BLE_CHN9_TOGGLE + #endif + + #ifdef GPIO_CHN10 + #define DBG_OT_BLE_CHN10_LOW gpio_write(GPIO_CHN10, 0) + #define DBG_OT_BLE_CHN10_HIGH gpio_write(GPIO_CHN10, 1) + #define DBG_OT_BLE_CHN10_TOGGLE gpio_toggle(GPIO_CHN10) + #else + #define DBG_OT_BLE_CHN10_LOW + #define DBG_OT_BLE_CHN10_HIGH + #define DBG_OT_BLE_CHN10_TOGGLE + #endif + + #ifdef GPIO_CHN11 + #define DBG_OT_BLE_CHN11_LOW gpio_write(GPIO_CHN11, 0) + #define DBG_OT_BLE_CHN11_HIGH gpio_write(GPIO_CHN11, 1) + #define DBG_OT_BLE_CHN11_TOGGLE gpio_toggle(GPIO_CHN11) + #else + #define DBG_OT_BLE_CHN11_LOW + #define DBG_OT_BLE_CHN11_HIGH + #define DBG_OT_BLE_CHN11_TOGGLE + #endif + + #ifdef GPIO_CHN12 + #define DBG_OT_BLE_CHN12_LOW gpio_write(GPIO_CHN12, 0) + #define DBG_OT_BLE_CHN12_HIGH gpio_write(GPIO_CHN12, 1) + #define DBG_OT_BLE_CHN12_TOGGLE gpio_toggle(GPIO_CHN12) + #else + #define DBG_OT_BLE_CHN12_LOW + #define DBG_OT_BLE_CHN12_HIGH + #define DBG_OT_BLE_CHN12_TOGGLE + #endif + + #ifdef GPIO_CHN13 + #define DBG_OT_BLE_CHN13_LOW gpio_write(GPIO_CHN13, 0) + #define DBG_OT_BLE_CHN13_HIGH gpio_write(GPIO_CHN13, 1) + #define DBG_OT_BLE_CHN13_TOGGLE gpio_toggle(GPIO_CHN13) + #else + #define DBG_OT_BLE_CHN13_LOW + #define DBG_OT_BLE_CHN13_HIGH + #define DBG_OT_BLE_CHN13_TOGGLE + #endif + + #ifdef GPIO_CHN14 + #define DBG_OT_BLE_CHN14_LOW gpio_write(GPIO_CHN14, 0) + #define DBG_OT_BLE_CHN14_HIGH gpio_write(GPIO_CHN14, 1) + #define DBG_OT_BLE_CHN14_TOGGLE gpio_toggle(GPIO_CHN14) + #else + #define DBG_OT_BLE_CHN14_LOW + #define DBG_OT_BLE_CHN14_HIGH + #define DBG_OT_BLE_CHN14_TOGGLE + #endif + + #ifdef GPIO_CHN15 + #define DBG_OT_BLE_CHN15_LOW gpio_write(GPIO_CHN15, 0) + #define DBG_OT_BLE_CHN15_HIGH gpio_write(GPIO_CHN15, 1) + #define DBG_OT_BLE_CHN15_TOGGLE gpio_toggle(GPIO_CHN15) + #else + #define DBG_OT_BLE_CHN15_LOW + #define DBG_OT_BLE_CHN15_HIGH + #define DBG_OT_BLE_CHN15_TOGGLE + #endif +#else + #define DBG_OT_BLE_CHN0_LOW + #define DBG_OT_BLE_CHN0_HIGH + #define DBG_OT_BLE_CHN0_TOGGLE + #define DBG_OT_BLE_CHN1_LOW + #define DBG_OT_BLE_CHN1_HIGH + #define DBG_OT_BLE_CHN1_TOGGLE + #define DBG_OT_BLE_CHN2_LOW + #define DBG_OT_BLE_CHN2_HIGH + #define DBG_OT_BLE_CHN2_TOGGLE + #define DBG_OT_BLE_CHN3_LOW + #define DBG_OT_BLE_CHN3_HIGH + #define DBG_OT_BLE_CHN3_TOGGLE + #define DBG_OT_BLE_CHN4_LOW + #define DBG_OT_BLE_CHN4_HIGH + #define DBG_OT_BLE_CHN4_TOGGLE + #define DBG_OT_BLE_CHN5_LOW + #define DBG_OT_BLE_CHN5_HIGH + #define DBG_OT_BLE_CHN5_TOGGLE + #define DBG_OT_BLE_CHN6_LOW + #define DBG_OT_BLE_CHN6_HIGH + #define DBG_OT_BLE_CHN6_TOGGLE + #define DBG_OT_BLE_CHN7_LOW + #define DBG_OT_BLE_CHN7_HIGH + #define DBG_OT_BLE_CHN7_TOGGLE + #define DBG_OT_BLE_CHN8_LOW + #define DBG_OT_BLE_CHN8_HIGH + #define DBG_OT_BLE_CHN8_TOGGLE + #define DBG_OT_BLE_CHN9_LOW + #define DBG_OT_BLE_CHN9_HIGH + #define DBG_OT_BLE_CHN9_TOGGLE + #define DBG_OT_BLE_CHN10_LOW + #define DBG_OT_BLE_CHN10_HIGH + #define DBG_OT_BLE_CHN10_TOGGLE + #define DBG_OT_BLE_CHN11_LOW + #define DBG_OT_BLE_CHN11_HIGH + #define DBG_OT_BLE_CHN11_TOGGLE + #define DBG_OT_BLE_CHN12_LOW + #define DBG_OT_BLE_CHN12_HIGH + #define DBG_OT_BLE_CHN12_TOGGLE + #define DBG_OT_BLE_CHN13_LOW + #define DBG_OT_BLE_CHN13_HIGH + #define DBG_OT_BLE_CHN13_TOGGLE + #define DBG_OT_BLE_CHN14_LOW + #define DBG_OT_BLE_CHN14_HIGH + #define DBG_OT_BLE_CHN14_TOGGLE + #define DBG_OT_BLE_CHN15_LOW + #define DBG_OT_BLE_CHN15_HIGH + #define DBG_OT_BLE_CHN15_TOGGLE +#endif + +#endif diff --git a/hal_v2/wrapper/controller/tlx/tlx_bt.c b/hal_v2/wrapper/controller/tlx/tlx_bt.c index bef7548e..e295fbb8 100644 --- a/hal_v2/wrapper/controller/tlx/tlx_bt.c +++ b/hal_v2/wrapper/controller/tlx/tlx_bt.c @@ -99,6 +99,37 @@ _attribute_ram_code_ void stimer_irq_handler(const void *param) blc_sdk_irq_handler(); DBG_CHN15_LOW; } +#if (LL_FEATURE_ENABLE_CHANNEL_SOUNDING) +_attribute_ram_code_ void timer0_irq_handler(const void *param) +{ + (void)param; + +#if (MCU_CORE_TYPE == MCU_CORE_TL721X) || (MCU_CORE_TYPE == MCU_CORE_TL322X) || \ + (MCU_CORE_TYPE == MCU_CORE_TL521X) + if (timer_get_irq_status(FLD_TMR0_MODE_IRQ)) +#else + if (timer_get_irq_status(TMR_STA_TMR0)) +#endif + { + u32 r = core_interrupt_disable(); + reg_tmr_ctrl0 &= ~FLD_TMR0_EN; +#if (MCU_CORE_TYPE == MCU_CORE_TL721X) || (MCU_CORE_TYPE == MCU_CORE_TL322X) || \ + (MCU_CORE_TYPE == MCU_CORE_TL521X) + timer_clr_irq_status(FLD_TMR0_MODE_IRQ); +#else + timer_clr_irq_status(TMR_STA_TMR0); +#endif + core_restore_interrupt(r); + + if (ll_cs_rawData_process_cb) { + ll_cs_rawData_process_cb(); + } + if (ll_cs_hci_subevent_report_cb) { + ll_cs_hci_subevent_report_cb(); + } + } +} +#endif /** * @brief BLE Controller HCI Tx callback implementation @@ -109,7 +140,8 @@ static int tlx_bt_hci_tx_handler(void) while(bltHci_txfifo.wptr != bltHci_txfifo.rptr) { /* Get HCI data */ - u8 *p = bltHci_txfifo.p + (bltHci_txfifo.rptr & bltHci_txfifo.mask) * bltHci_txfifo.size; + u8 *p = bltHci_txfifo.p + + (bltHci_txfifo.rptr & bltHci_txfifo.mask) * bltHci_txfifo.size; if (p) { u32 len; BSTREAM_TO_UINT16(len, p); @@ -122,9 +154,11 @@ static int tlx_bt_hci_tx_handler(void) } } else if (tl_bt_state == TL_BT_CONTROLLER_STATE_STOPPING) { /* In this state HCI reset is sent - waiting for command complete */ - static const uint8_t hci_reset_cmd_complette[] = {0x04, 0x0e, 0x04, 0x01, 0x03, 0x0c, 0x00}; + static const uint8_t hci_reset_cmd_complette[] = + {0x04, 0x0e, 0x04, 0x01, 0x03, 0x0c, 0x00}; - if (len == sizeof(hci_reset_cmd_complette) && !memcmp(p, hci_reset_cmd_complette, len)) { + if (len == sizeof(hci_reset_cmd_complette) && + !memcmp(p, hci_reset_cmd_complette, len)) { tl_bt_state = TL_BT_CONTROLLER_STATE_STOPPED; k_sem_give(&controller_sem); } @@ -154,7 +188,9 @@ static int tlx_bt_hci_rx_handler(void) if (p) { /* Send data to the controller */ blc_hci_handler(&p[0], 0); -#if CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL721X || CONFIG_SOC_RISCV_TELINK_TL322X || CONFIG_SOC_RISCV_TELINK_TL323X +#if CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL721X || \ + CONFIG_SOC_RISCV_TELINK_TL322X || CONFIG_SOC_RISCV_TELINK_TL323X || \ + CONFIG_SOC_RISCV_TELINK_TL521X if (p[0] == HCI_TYPE_ACL_DATA) { k_sem_give(&controller_sem); } @@ -181,9 +217,11 @@ static void tlx_bt_controller_thread() */ static void tlx_bt_irq_init() { -#if CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL721X || CONFIG_SOC_RISCV_TELINK_TL322X || CONFIG_SOC_RISCV_TELINK_TL323X - plic_preempt_feature_dis(); - flash_plic_preempt_config(0,1); +#if CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL721X || \ + CONFIG_SOC_RISCV_TELINK_TL322X || CONFIG_SOC_RISCV_TELINK_TL323X || \ + CONFIG_SOC_RISCV_TELINK_TL521X + plic_preempt_feature_en(CORE_PREEMPT_PRI_MODE0); + flash_plic_preempt_config(0, 1); #endif /* Init STimer IRQ */ @@ -196,6 +234,12 @@ static void tlx_bt_irq_init() #endif plic_set_priority(IRQ_SYSTIMER, 2); plic_set_priority(IRQ_ZB_RT, 2); + +#if (LL_FEATURE_ENABLE_CHANNEL_SOUNDING) + /* Init TIMER0 IRQ for channel sounding */ + IRQ_CONNECT(IRQ_TIMER0 + CONFIG_2ND_LVL_ISR_TBL_OFFSET, 1, timer0_irq_handler, 0, 0); + plic_set_priority(IRQ_TIMER0, 1); +#endif } #endif /** @@ -214,7 +258,9 @@ int tlx_bt_controller_init() rf_mode_init(); /* Reset Radio */ rf_radio_reset(); - #if CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL721X || CONFIG_SOC_RISCV_TELINK_TL322X || CONFIG_SOC_RISCV_TELINK_TL323X + #if CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL721X || \ + CONFIG_SOC_RISCV_TELINK_TL322X || CONFIG_SOC_RISCV_TELINK_TL323X || \ + CONFIG_SOC_RISCV_TELINK_TL521X rf_reset_dma(); rf_baseband_reset(); #endif @@ -227,11 +273,13 @@ int tlx_bt_controller_init() rf_drv_ble_init(); #ifdef CONFIG_BT_CENTRAL - app_acl_mstTxfifo = (u8 *)calloc(ACL_MASTER_TX_FIFO_SIZE * ACL_MASTER_TX_FIFO_NUM * CONFIG_TL_BLE_CTRL_MASTER_MAX_NUM,1); + app_acl_mstTxfifo = (u8 *)calloc(ACL_MASTER_TX_FIFO_SIZE * + ACL_MASTER_TX_FIFO_NUM * CONFIG_TL_BLE_CTRL_MASTER_MAX_NUM, 1); #endif /* CONFIG_BT_CENTRAL */ #ifdef CONFIG_BT_PERIPHERAL - app_acl_slvTxfifo = (u8 *)calloc(ACL_SLAVE_TX_FIFO_SIZE * ACL_SLAVE_TX_FIFO_NUM * CONFIG_TL_BLE_CTRL_SLAVE_MAX_NUM,1); + app_acl_slvTxfifo = (u8 *)calloc(ACL_SLAVE_TX_FIFO_SIZE * + ACL_SLAVE_TX_FIFO_NUM * CONFIG_TL_BLE_CTRL_SLAVE_MAX_NUM, 1); #endif /* CONFIG_BT_PERIPHERAL */ app_acl_rxfifo = (u8 *)calloc(ACL_RX_FIFO_SIZE * ACL_RX_FIFO_NUM,1); @@ -245,11 +293,18 @@ int tlx_bt_controller_init() return status; } +#ifdef CONFIG_IEEE802154_TLX_BLE_COEXIST + extern void tlx_bt_802154_dual_mode_enable(void); + tlx_bt_802154_dual_mode_enable(); +#endif + /* Init IRQs */ tlx_bt_irq_init(); /* Register callback to controller. */ -#if CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL721X || CONFIG_SOC_RISCV_TELINK_TL322X || CONFIG_SOC_RISCV_TELINK_TL323X +#if CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL721X || \ + CONFIG_SOC_RISCV_TELINK_TL322X || CONFIG_SOC_RISCV_TELINK_TL323X || \ + CONFIG_SOC_RISCV_TELINK_TL521X blc_ll_registerGiveSemCb(os_give_sem_cb, os_give_sem_cb); blc_setOsSupEnable(true); #endif @@ -259,7 +314,8 @@ int tlx_bt_controller_init() /* Create BLE main thread */ (void)k_thread_create(&tlx_bt_controller_thread_data, - tlx_bt_controller_thread_stack, K_THREAD_STACK_SIZEOF(tlx_bt_controller_thread_stack), + tlx_bt_controller_thread_stack, + K_THREAD_STACK_SIZEOF(tlx_bt_controller_thread_stack), tlx_bt_controller_thread, NULL, NULL, NULL, BLE_THREAD_PRIORITY, 0, K_NO_WAIT); #if CONFIG_SOC_RISCV_TELINK_TL321X (void)k_thread_name_set(&tlx_bt_controller_thread_data, "TL321X_BT"); @@ -269,6 +325,8 @@ int tlx_bt_controller_init() (void)k_thread_name_set(&tlx_bt_controller_thread_data, "TL322X_BT"); #elif CONFIG_SOC_RISCV_TELINK_TL323X (void)k_thread_name_set(&tlx_bt_controller_thread_data, "TL323X_BT"); +#elif CONFIG_SOC_RISCV_TELINK_TL521X + (void)k_thread_name_set(&tlx_bt_controller_thread_data, "TL521X_BT"); #endif /* Start thread */ @@ -299,11 +357,17 @@ void tlx_bt_controller_deinit() /* Reset Radio */ rf_radio_reset(); -#if CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL721X || CONFIG_SOC_RISCV_TELINK_TL322X || CONFIG_SOC_RISCV_TELINK_TL323X +#if CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL721X || \ + CONFIG_SOC_RISCV_TELINK_TL322X || CONFIG_SOC_RISCV_TELINK_TL323X || \ + CONFIG_SOC_RISCV_TELINK_TL521X rf_reset_dma(); rf_baseband_reset(); #endif +#ifdef CONFIG_IEEE802154_TLX_BLE_COEXIST + extern void tlx_bt_802154_dual_mode_disable(void); + tlx_bt_802154_dual_mode_disable(); +#endif #ifdef CONFIG_BT_CENTRAL free(app_acl_mstTxfifo); @@ -345,8 +409,10 @@ void tlx_bt_host_send_packet(uint8_t type, const uint8_t *data, uint16_t len) */ void tlx_bt_host_callback_register(const tlx_bt_host_callback_t *pcb) { - tlx_ctrl.callbacks.host_read_packet = pcb->host_read_packet; //hci_tlx_host_rcv_pkt - tlx_ctrl.callbacks.host_send_available = pcb->host_send_available; //hci_tlx_controller_rcv_pkt_ready + /* hci_tlx_host_rcv_pkt */ + tlx_ctrl.callbacks.host_read_packet = pcb->host_read_packet; + /* hci_tlx_controller_rcv_pkt_ready */ + tlx_ctrl.callbacks.host_send_available = pcb->host_send_available; } /** @@ -356,3 +422,16 @@ enum tl_bt_controller_state tl_bt_controller_state(void) { return tl_bt_state; } + +#ifdef CONFIG_IEEE802154_TLX_BLE_COEXIST + + +/** + * @brief BLE RF HW initialization + */ +void tlx_init_ble_rf_hw(void) +{ + extern void tlksdk_init_ble_rf_hw(rf_power_level_e rf_power_level); + tlksdk_init_ble_rf_hw(tl_tx_pwr_lt[CONFIG_TL_BLE_CTRL_RF_POWER - TL_TX_POWER_MIN]); +} +#endif /* CONFIG_IEEE802154_TLX_BLE_COEXIST */ diff --git a/hal_v2/wrapper/controller/tlx/tlx_bt.h b/hal_v2/wrapper/controller/tlx/tlx_bt.h index d04a5e32..5223acc2 100644 --- a/hal_v2/wrapper/controller/tlx/tlx_bt.h +++ b/hal_v2/wrapper/controller/tlx/tlx_bt.h @@ -33,8 +33,10 @@ enum tl_bt_controller_state { * used for vhci call host function to notify what host need to do */ typedef struct tlx_bt_host_callback { - void (*host_send_available)(void); /* the host can send packet to the controller */ - void (*host_read_packet)(uint8_t *data, uint16_t len); /* the controller has a packet to send to the host */ + /* the host can send packet to the controller */ + void (*host_send_available)(void); + /* the controller has a packet to send to the host */ + void (*host_read_packet)(uint8_t *data, uint16_t len); } tlx_bt_host_callback_t; /** @@ -66,11 +68,8 @@ void tlx_bt_controller_deinit(void); enum tl_bt_controller_state tl_bt_controller_state(void); /* Compatible macros */ -#define rf_baseband_reset rf_clr_dig_logic_state - -#define rf_radio_reset rf_reset_register_value - -#define rf_reset_dma rf_dma_reset - +#define rf_baseband_reset rf_clr_dig_logic_state +#define rf_radio_reset rf_reset_register_value +#define rf_reset_dma rf_dma_reset #endif /* TLX_BT_H_ */ diff --git a/hal_v2/wrapper/controller/tlx/tlx_bt_buffer.c b/hal_v2/wrapper/controller/tlx/tlx_bt_buffer.c index 76324ebe..2ebb2e7f 100644 --- a/hal_v2/wrapper/controller/tlx/tlx_bt_buffer.c +++ b/hal_v2/wrapper/controller/tlx/tlx_bt_buffer.c @@ -16,6 +16,9 @@ * *****************************************************************************/ #include "tlx_bt_buffer.h" +#ifdef CONFIG_BT_CHANNEL_SOUNDING +#include "tlx_bt_cs.h" +#endif /******* ACL connection LinkLayer TX & RX data FIFO allocation, Begin ********/ _attribute_data_sec_ u8* app_acl_rxfifo; @@ -29,3 +32,13 @@ _attribute_data_sec_ u8* app_acl_slvTxfifo; _attribute_data_sec_ u8* app_hci_rxfifo; _attribute_data_sec_ u8* app_hci_txfifo; _attribute_data_sec_ u8* app_hci_rxAclfifo; +/******** CS data allocation, Begin ******************************************/ +#ifdef CONFIG_BT_CHANNEL_SOUNDING +u8 app_CsConfigParam[CS_PARAM_LENGTH * APP_CS_CONFIG_NUM]; +u8 app_cs_rx_buf[CS_RX_FIFO_SIZE * CS_RX_FIFO_NUM]; +u8 hciCsSubeventRxFifo[CS_SUBEVENT_BUFF_LEN_MAX * HCI_RX_FIFO_NUM]; +u8 pct_raw_data[CS_PCT_DATA_SIZE]; +/******** CS data allocation, End ********************************************/ +u8 app_cs_transport_rx_buf[CS_TRANSPORT_RX_FIFO_NUM * CS_TRANSPORT_RX_FIFO_SIZE]; +u8 app_cs_stepDRBGInfoBuffer[CS_STEP_DRBG_INFO_SIZE * STEP_NUM_PER_SUBEVENT]; +#endif /* CONFIG_BT_CHANNEL_SOUNDING */ diff --git a/hal_v2/wrapper/controller/tlx/tlx_bt_buffer.h b/hal_v2/wrapper/controller/tlx/tlx_bt_buffer.h index 994148f4..a6d9b516 100644 --- a/hal_v2/wrapper/controller/tlx/tlx_bt_buffer.h +++ b/hal_v2/wrapper/controller/tlx/tlx_bt_buffer.h @@ -18,15 +18,19 @@ #ifndef TLX_BT_BUFFER_H_ #define TLX_BT_BUFFER_H_ -#include "zephyr/bluetooth/buf.h" +#include #include "stack/ble/ble.h" -#define BT_BUF_HCI_RX_SIZE \ - MAX(BT_BUF_CMD_SIZE(CONFIG_BT_BUF_CMD_TX_SIZE), BT_BUF_ACL_SIZE(CONFIG_BT_BUF_ACL_TX_SIZE)) +#define BT_BUF_HCI_RX_SIZE \ + MAX(BT_BUF_CMD_SIZE(CONFIG_BT_BUF_CMD_TX_SIZE), BT_BUF_ACL_SIZE(CONFIG_BT_BUF_ACL_TX_SIZE)) #define ACL_CONN_MAX_RX_OCTETS (BT_BUF_RX_SIZE > 251 ? 251 : BT_BUF_RX_SIZE) -#define ACL_SLAVE_MAX_TX_OCTETS (CONFIG_BT_BUF_ACL_TX_SIZE > 251 ? 251 : CONFIG_BT_BUF_ACL_TX_SIZE) -#define ACL_MASTER_MAX_TX_OCTETS (CONFIG_BT_BUF_ACL_TX_SIZE > 251 ? 251 : CONFIG_BT_BUF_ACL_TX_SIZE) + +#define ACL_SLAVE_MAX_TX_OCTETS \ + (CONFIG_BT_BUF_ACL_TX_SIZE > 251 ? 251 : CONFIG_BT_BUF_ACL_TX_SIZE) + +#define ACL_MASTER_MAX_TX_OCTETS \ + (CONFIG_BT_BUF_ACL_TX_SIZE > 251 ? 251 : CONFIG_BT_BUF_ACL_TX_SIZE) #define BT_BUF_TX_SIZE ACL_SLAVE_MAX_TX_OCTETS @@ -52,76 +56,95 @@ #define CAL_LL_ACL_BUF_NUM(x) (x <= 9 ? 9 : x <= 17 ? 17 : 33) /* - TX from host CMD or ACL buffer, RX to Contorller HCI buffer - According to Telink implementatios, the buffer shall be alligned to 16. -*/ + * TX from host CMD or ACL buffer, RX to Contorller HCI buffer + * According to Telink implementatios, the buffer shall be alligned to 16. + */ #define HCI_RX_FIFO_SIZE HCI_FIFO_SIZE(BT_BUF_HCI_RX_SIZE) /* - According to Telink implementation shall number of buffers shall be power of 2 -*/ -#define HCI_RX_FIFO_NUM NEXT_POWER_OF_2(MAX(CONFIG_BT_BUF_CMD_TX_COUNT, CONFIG_BT_BUF_ACL_TX_COUNT)) + * According to Telink implementation shall number of buffers shall be power of 2 + */ +#define HCI_RX_FIFO_NUM \ + NEXT_POWER_OF_2(MAX(CONFIG_BT_BUF_CMD_TX_COUNT, CONFIG_BT_BUF_ACL_TX_COUNT)) /* - TX from controller, RX to Host - According to Telink implementatios, the buffer shall be alligned to 4. -*/ + * TX from controller, RX to Host + * According to Telink implementatios, the buffer shall be alligned to 4. + */ #define HCI_TX_FIFO_SIZE HCI_FIFO_SIZE(ACL_CONN_MAX_RX_OCTETS) /* - According to Telink implementation shall number of buffers shall be power of 2 -*/ + * According to Telink implementation shall number of buffers shall be power of 2 + */ #define HCI_TX_FIFO_NUM NEXT_POWER_OF_2(BT_BUF_RX_COUNT) /* - Intermediate ACL buffer that takes data from HCI RX and pass it to ACL TX - According to Telink implementatios, the buffer shall be alligned to 4. -*/ + * Intermediate ACL buffer that takes data from HCI RX and pass it to ACL TX + * According to Telink implementatios, the buffer shall be alligned to 4. + */ #define HCI_RX_ACL_FIFO_SIZE ALIGN(BT_BUF_ACL_SIZE(BT_BUF_TX_SIZE), ALIGN_4) /* - According to Telink implementation shall number of buffers shall be power of 2 -*/ + * According to Telink implementation shall number of buffers shall be power of 2 + */ #define HCI_RX_ACL_FIFO_NUM NEXT_POWER_OF_2(CONFIG_BT_BUF_ACL_TX_COUNT) /* - Data from radio to RX ACL buffer - According to Telink implementatios, the buffer shall be alligned to 16. -*/ + * Data from radio to RX ACL buffer + * According to Telink implementatios, the buffer shall be alligned to 16. + */ #define ACL_RX_FIFO_SIZE CAL_LL_ACL_RX_FIFO_SIZE(ACL_CONN_MAX_RX_OCTETS) /* - Number of ACL RX buffers. Shall be power of 2 -*/ + * Number of ACL RX buffers. Shall be power of 2 + */ #define ACL_RX_FIFO_NUM NEXT_POWER_OF_2(BT_BUF_RX_COUNT) /* - Data from ACL TX to radio - According to Telink implementatios, the buffer shall be alligned to 16. -*/ + * Data from ACL TX to radio + * According to Telink implementatios, the buffer shall be alligned to 16. + */ #define ACL_SLAVE_TX_FIFO_SIZE CAL_LL_ACL_TX_FIFO_SIZE(BT_BUF_TX_SIZE) /* - Number of ACL TX buffers. Shall be 9, 17, 33 -*/ + * Number of ACL TX buffers. Shall be 9, 17, 33 + */ #define ACL_SLAVE_TX_FIFO_NUM CAL_LL_ACL_BUF_NUM(CONFIG_BT_BUF_ACL_TX_COUNT) /* - Data from ACL TX to radio - According to Telink implementatios, the buffer shall be alligned to 16. -*/ + * Data from ACL TX to radio + * According to Telink implementatios, the buffer shall be alligned to 16. + */ #define ACL_MASTER_TX_FIFO_SIZE CAL_LL_ACL_TX_FIFO_SIZE(BT_BUF_TX_SIZE) /* - Number of ACL TX buffers. Shall be 9, 17, 33 -*/ + * Number of ACL TX buffers. Shall be 9, 17, 33 + */ #define ACL_MASTER_TX_FIFO_NUM CAL_LL_ACL_BUF_NUM(CONFIG_BT_BUF_ACL_TX_COUNT) +#ifdef CONFIG_BT_CHANNEL_SOUNDING +#define CS_PHY_RX_FIFO_NUM 1 +#define CS_TRANSPORT_RX_FIFO_NUM 8 +#define CS_TRANSPORT_RX_FIFO_SIZE \ + CHANNEL_SOUNDING_TRANSPORT_RX_FIFO_SIZE_ALIGN16(MAX_ANT_PATHS_SUPPORT, 40, 10) + +/* + * Size of DRBG-generated information per step (channel, access address, sequence, etc.) + * user can't change this value!!! + */ +#define CS_STEP_DRBG_INFO_SIZE 52 +#endif /* CONFIG_BT_CHANNEL_SOUNDING */ + extern _attribute_data_sec_ u8* app_acl_rxfifo; extern _attribute_data_sec_ u8* app_acl_mstTxfifo; extern _attribute_data_sec_ u8* app_acl_slvTxfifo; extern _attribute_data_sec_ u8* app_hci_rxfifo; extern _attribute_data_sec_ u8* app_hci_txfifo; extern _attribute_data_sec_ u8* app_hci_rxAclfifo; +#ifdef CONFIG_BT_CHANNEL_SOUNDING +extern u8 app_cs_rx_buf[]; +extern u8 app_cs_transport_rx_buf[]; +extern u8 app_cs_stepDRBGInfoBuffer[]; +#endif /* CONFIG_BT_CHANNEL_SOUNDING */ #endif /* TLX_BT_BUFFER_H_ */ diff --git a/hal_v2/wrapper/controller/tlx/tlx_bt_cs.c b/hal_v2/wrapper/controller/tlx/tlx_bt_cs.c new file mode 100644 index 00000000..36f08d50 --- /dev/null +++ b/hal_v2/wrapper/controller/tlx/tlx_bt_cs.c @@ -0,0 +1,116 @@ +/************************************************************************************************** + * @file tlx_bt_cs.c + * + * @brief This is the source file for BLE SDK + * + * @author BLE GROUP + * @date 06,2022 + * + * @par Copyright (c) 2022, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK") + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + **************************************************************************************************/ +#include "tlx_bt_buffer.h" +#include "cs_cal.h" +#include "stack/ble/ble.h" +#include "tlx_bt_cs.h" + +#if (FREERTOS_ENABLE) +#include "app_port_freertos.h" +#endif + + + +#if (ANTENNA_SWITCHING_AUTO_EN) +//Initialize multi-antenas +cs_ant_switch_config_t ant_cfg = { + .ant_default_seq_value = 0, + .ant_ctrl_seq_base_value = ANTENNA_SWITCHING_CTRL_BASE, +}; + +#if (CHIP_TYPE == CHIP_TYPE_TL322X) + rf_cs_ant_switch_ctrl ant_switch_ctrl[] = { + {ANTENNA_SWITCHING_SEL_0_PIN, ATSEL_0,}, + }; +#endif +#endif // #if (ANTENNA_SWITCHING_AUTO_EN) + +#if (ANTENNA_SWITCHING_AUTO_EN) +void app_Init_CS_Multi_ANT_Switch(void){ + blc_cs_antenna_switch_config_init(&ant_cfg); + rf_cs_ant_switch_pin_init(ant_switch_ctrl, + sizeof(ant_switch_ctrl)/sizeof(rf_cs_ant_switch_ctrl)); +} +#endif +/** + * @brief BLE channel sounding initialize. + * @param None + * @return None + */ +void app_channel_sounding_init(void) +{ + blc_ll_initCsReflectorModule(); + + /* Initialize CS buffer */ + blc_ll_initCsConfigParam(app_CsConfigParam, APP_CS_CONFIG_NUM); + + blc_ll_initCsPhyRxFifo(app_cs_rx_buf, CS_RX_FIFO_SIZE, CS_RX_FIFO_NUM); + + blc_ll_initCsTransportRxFifo(app_cs_transport_rx_buf, CS_TRANSPORT_RX_FIFO_SIZE, + CS_TRANSPORT_RX_FIFO_NUM); + + /* Initialize the channel sounding HCI receive FIFO */ + blc_cs_initCsHciRxFifo(hciCsSubeventRxFifo, CS_SUBEVENT_BUFF_LEN_MAX, HCI_RX_FIFO_NUM); + + blc_ll_initCsPctDataBuff(pct_raw_data, CS_PCT_DATA_SIZE, MAX_ANT_PATHS_SUPPORT); + + /* Initialize CS Step DRBG Info buffer. */ + blc_cs_initStepDRBGInfo(app_cs_stepDRBGInfoBuffer, + CS_STEP_DRBG_INFO_SIZE, APP_CS_CONFIG_NUM); + +#if (ANTENNA_SWITCHING_AUTO_EN) + /* Initialize multi-antennas */ + blc_cs_antenna_switch_config_init(&ant_cfg); + rf_cs_ant_switch_pin_init(ant_switch_ctrl, + sizeof(ant_switch_ctrl)/sizeof(rf_cs_ant_switch_ctrl)); +#endif + +#if (MCU_CORE_TYPE == MCU_CORE_TL721X) + blc_cs_disableGpioPinsFromD4ToD7(); +#endif + + /* Set cs use tx power level */ + blc_cs_set_tx_power_level(CS_USE_TX_POWER_LEVEL); + + /* init ACL - CS Tag map, used when exist multiple cs. */ + extern void blc_cs_connHandle_algo4Tag_map_init(void); + blc_cs_connHandle_algo4Tag_map_init(); + +#if (CONFIG_CS_SUPPORT_INITIATOR) + /* + * Init algorithm-4 estimate buffer. + * return 0:success; -1:buffer null; -2:tag number invalid + */ + estimate_buff_init(CS_MAX_NUM, cs_tag_buffer); + blc_cs_setAlgo4MaxDist(CS_ALGO_MAX_DISTANCE); +#endif + +#if (CS_SUPPORT_PRIVATE_CONTROL_PDU) + extern ble_sts_t blc_ll_initPrivateControl(void); + blc_ll_initPrivateControl(); +#endif + + /* Load calibration table for RTT. */ + blc_loadCsCali_table(flash_sector_calibration + CALIB_OFFSET_CALI_TABLE_HEADER_INFO); +} diff --git a/hal_v2/wrapper/controller/tlx/tlx_bt_cs.h b/hal_v2/wrapper/controller/tlx/tlx_bt_cs.h new file mode 100644 index 00000000..1c6a0218 --- /dev/null +++ b/hal_v2/wrapper/controller/tlx/tlx_bt_cs.h @@ -0,0 +1,107 @@ +/************************************************************************************************** + * @file tlx_bt_cs.h + * + * @brief This is the header file for BLE SDK + * + * @author BLE GROUP + * @date 06,2022 + * + * @par Copyright (c) 2022, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK") + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + **************************************************************************************************/ +#ifndef _APP_CS_H_ +#define _APP_CS_H_ + + +extern rf_cs_ant_switch_ctrl ant_switch_ctrl[]; +extern cs_ant_switch_config_t ant_cfg; + +/** + * @brief BLE channel sounding initialize. + * @param None + * @return None + */ +void app_channel_sounding_init(void); + +#define CS_OPTIMIZE_T_IP_FCS 1 + +/** + * @brief Antenna Switch Configuration + */ +#ifndef ANTENNA_SWITCHING_AUTO_EN + #define ANTENNA_SWITCHING_AUTO_EN 0 +#endif + +#ifndef NUM_ANT_SUPPORT + #define NUM_ANT_SUPPORT 0x01 +#endif + +#ifndef MAX_ANT_PATHS_SUPPORT + #define MAX_ANT_PATHS_SUPPORT 0X01 +#endif + +/** + * @brief Antenna switch configuration for channel sounding + */ +#define ANTENNA_SWITCHING_SEL_0_PIN GPIO_PB3 +#define ANTENNA_SWITCHING_CTRL_BASE (0) + +#define APP_CS_CONFIG_NUM 1 +#define CS_RX_FIFO_NUM 4 + +#ifndef CS_ALIGN_16 +#define CS_ALIGN_16(len) ((((len) + 15) >> 4) << 4) +#endif + +#ifndef CS_RX_MODE0_FIFO_SIZE_MAX +#define CS_RX_MODE0_FIFO_SIZE_MAX CS_ALIGN_16(80 * 20 + 80 + 4) +#endif + +#ifndef CS_RX_MODE1_FIFO_SIZE_MAX +#define CS_RX_MODE1_FIFO_SIZE_MAX CS_ALIGN_16((5 + 44 + 128 + 15) * 20 + 80 + 4) +#endif + +#ifndef CS_RX_MODE2_FIFO_SIZE_MAX +#define CS_RX_MODE2_FIFO_SIZE_MAX(AP, PM, SW) \ + CS_ALIGN_16((5 + (AP + 1) * (PM + SW) - SW) * 20 + 80 + 4) +#endif + +#ifndef max3 +#define max3(a, b, c) \ + (((a) > (b)) ? (((a) > (c)) ? (a) : (c)) : (((b) > (c)) ? (b) : (c))) +#endif + +#ifndef CS_RX_FIFO_SIZE +#define CS_RX_FIFO_SIZE \ + max3(CS_RX_MODE0_FIFO_SIZE_MAX, CS_RX_MODE1_FIFO_SIZE_MAX, \ + CS_RX_MODE2_FIFO_SIZE_MAX(MAX_ANT_PATHS_SUPPORT, 40, 10)) +#endif + +#define CS_PCT_DATA_SIZE \ + ((MAX_ANT_PATHS_SUPPORT + 1) * STEP_NUM_PER_SUBEVENT * (PHASE_ITEM_LEN + AMP_ITEM_LEN)) + +#define CS_CALIB_OFFSET_CALI_TABLE_HEADER_INFO 0x300 +/* RF_POWER_P6p71dBm = 27 for TL721X RF_TX_POWER_A3, matching cs_reflector_demo */ +#define CS_USE_TX_POWER_LEVEL 27 + +#ifndef CS_SUPPORT_PRIVATE_CONTROL_PDU + #define CS_SUPPORT_PRIVATE_CONTROL_PDU 1 +#endif + +extern u8 app_CsConfigParam[]; +extern u8 hciCsSubeventRxFifo[]; +extern u8 pct_raw_data[]; + +#endif /* _APP_CS_H_ */ diff --git a/hal_v2/wrapper/controller/tlx/tlx_bt_flash.c b/hal_v2/wrapper/controller/tlx/tlx_bt_flash.c index a07afcf7..0d6a5b95 100644 --- a/hal_v2/wrapper/controller/tlx/tlx_bt_flash.c +++ b/hal_v2/wrapper/controller/tlx/tlx_bt_flash.c @@ -36,9 +36,9 @@ static int get_bytes_from_str(uint8_t *buf, int buf_len, const char *src) for (i = 0U; i < strlen(src); i++) { if (!(src[i] >= '0' && src[i] <= '9') && - !(src[i] >= 'A' && src[i] <= 'F') && - !(src[i] >= 'a' && src[i] <= 'f') && - src[i] != ':') { + !(src[i] >= 'A' && src[i] <= 'F') && + !(src[i] >= 'a' && src[i] <= 'f') && + src[i] != ':') { return -EINVAL; } } @@ -59,6 +59,14 @@ static int get_bytes_from_str(uint8_t *buf, int buf_len, const char *src) } #endif +#if 0 /* CONFIG_DUAL_MODE == CONFIG_AUTO_SWITCH_DUAL_MODE */ +#define USER_PARA_MAC_OFFSET (0x100) +#define USER_PARTITION dual_mode_partition +#define USER_PARTITION_DEVICE FIXED_PARTITION_DEVICE(USER_PARTITION) +#define USER_PARTITION_OFFSET FIXED_PARTITION_OFFSET(USER_PARTITION) +#define USER_PARTITION_SIZE FIXED_PARTITION_SIZE(USER_PARTITION) +#endif /* CONFIG_DUAL_MODE */ + /** * @brief This function is used to initialize the MAC address * @param[in] bt_mac - BT MAC address @@ -105,6 +113,20 @@ _attribute_no_inline_ int tlx_bt_blc_mac_init(uint8_t *bt_mac) temp_mac[8] = 0; err = flash_write(flash_device, FIXED_PARTITION_OFFSET(vendor_partition) + TLX_BT_MAC_ADDR_OFFSET, temp_mac, BLE_ADDR_LEN + 3); + +#elif 0 /* CONFIG_DUAL_MODE == CONFIG_AUTO_SWITCH_DUAL_MODE */ + + uint8_t dummy_mac[BLE_ADDR_LEN] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}; + + /* Get the ramdom mac address from zb which will passed in the user-para sector */ + err = flash_read(USER_PARTITION_DEVICE, USER_PARTITION_OFFSET + + USER_PARA_MAC_OFFSET, bt_mac, BLE_ADDR_LEN); + if(memcmp(bt_mac, dummy_mac, sizeof(dummy_mac)) == 0){ + /* if mac address is empty, use random instead. */ + generateRandomNum(BLE_ADDR_LEN, bt_mac); + } + bt_mac[5] |= 0xC0; /* random static by default */ + #else generateRandomNum(BLE_ADDR_LEN, bt_mac); /* The random static address will be generated on every reboot */ diff --git a/hal_v2/wrapper/controller/tlx/tlx_bt_host.c b/hal_v2/wrapper/controller/tlx/tlx_bt_host.c index f7380c13..88d5a139 100644 --- a/hal_v2/wrapper/controller/tlx/tlx_bt_host.c +++ b/hal_v2/wrapper/controller/tlx/tlx_bt_host.c @@ -44,7 +44,8 @@ static void tlx_bt_controller_thread() { while (tl_bt_state == TL_BT_CONTROLLER_STATE_ACTIVE || tl_bt_state == TL_BT_CONTROLLER_STATE_STOPPING) { - k_sem_take(&controller_sem, K_FOREVER); //Mailbox irq can also trigger controller_sem in time. + /* Mailbox irq can also trigger controller_sem in time. */ + k_sem_take(&controller_sem, K_FOREVER); mcc_d25f_loop(); /* temporary solutions */ @@ -63,7 +64,7 @@ static tlx_bt_host_callback_t tlx_bt_cb = {0}; */ int tlx_bt_controller_init() { - int status = INIT_OK; + int status = INIT_OK; /* pke and ske required to be used by the host SMP module */ ext_crypto_hw_init_enable(); @@ -74,17 +75,18 @@ int tlx_bt_controller_init() blc_pm_setSleepMask(PM_SLEEP_LEG_ADV | PM_SLEEP_ACL_PERIPHR); # endif /* CONFIG_PM */ - /* init semaphore */ + /* init semaphore */ k_sem_reset(&controller_sem); k_sem_give(&controller_sem); - (void)k_thread_create(&tlx_bt_controller_thread_data, - tlx_bt_controller_thread_stack, K_THREAD_STACK_SIZEOF(tlx_bt_controller_thread_stack), + (void)k_thread_create(&tlx_bt_controller_thread_data, + tlx_bt_controller_thread_stack, + K_THREAD_STACK_SIZEOF(tlx_bt_controller_thread_stack), tlx_bt_controller_thread, NULL, NULL, NULL, BLE_THREAD_PRIORITY, 0, K_NO_WAIT); - (void)k_thread_name_set(&tlx_bt_controller_thread_data, "TL322X_BT"); + (void)k_thread_name_set(&tlx_bt_controller_thread_data, "TL322X_BT"); - tl_bt_state = TL_BT_CONTROLLER_STATE_ACTIVE; + tl_bt_state = TL_BT_CONTROLLER_STATE_ACTIVE; k_thread_start(&tlx_bt_controller_thread_data); return status; @@ -92,9 +94,9 @@ int tlx_bt_controller_init() _attribute_ram_code_ void mcc_d25f_sm_data_ready(u8* data) { - (void) data; + (void) data; - k_sem_give(&controller_sem); + k_sem_give(&controller_sem); } /** @@ -105,7 +107,7 @@ void tlx_bt_controller_deinit(void) /* start BLE stopping procedure */ tl_bt_state = TL_BT_CONTROLLER_STATE_STOPPING; - /* reset controller */ + /* reset controller */ static const uint8_t hci_reset_cmd[] = {0x03, 0x0c, 0x00}; tlx_bt_host_send_packet(0x01, hci_reset_cmd, sizeof(hci_reset_cmd)); @@ -124,8 +126,12 @@ void tlx_bt_host_send_packet(uint8_t type, const uint8_t *data, uint16_t len) return; } - u8 hci_cmd[255+3] = {0}; //Controllers shall be able to accept HCI Command packets with up to 255 bytes of data excluding the HCI Command packet header. + /* + * Controllers shall be able to accept HCI Command packets with + * up to 255 bytes of data excluding the HCI Command packet header. + */ hci_cmd[0] = type; + u8 hci_cmd[255+3] = {0}; memcpy(hci_cmd+1, data, len); shm_fifo_status_e ret = mcc_d25f_hci_send_msg(hci_cmd, len+1); if (ret == SHM_FIFO_SUCCESS) { @@ -141,15 +147,17 @@ void tlx_bt_host_send_packet(uint8_t type, const uint8_t *data, uint16_t len) */ void tlx_bt_host_callback_register(const tlx_bt_host_callback_t *pcb) { - tlx_bt_cb.host_read_packet = pcb->host_read_packet; //hci_tlx_host_rcv_pkt - tlx_bt_cb.host_send_available = pcb->host_send_available; //hci_tlx_controller_rcv_pkt_ready + /* hci_tlx_host_rcv_pkt */ + tlx_bt_cb.host_read_packet = pcb->host_read_packet; + /* hci_tlx_controller_rcv_pkt_ready */ + tlx_bt_cb.host_send_available = pcb->host_send_available; mcc_d25f_register_shm_recv_cb(TLK_SHM_MSG_HCI, tlx_bt_cb.host_read_packet); } /** * @brief Get state of Telink TLX BLE Controller */ -enum tl_bt_controller_state tl_bt_controller_state(void) { - +enum tl_bt_controller_state tl_bt_controller_state(void) +{ return tl_bt_state; } diff --git a/hal_v2/wrapper/controller/tlx/tlx_bt_host.h b/hal_v2/wrapper/controller/tlx/tlx_bt_host.h index 8e66d15f..8176b645 100644 --- a/hal_v2/wrapper/controller/tlx/tlx_bt_host.h +++ b/hal_v2/wrapper/controller/tlx/tlx_bt_host.h @@ -33,8 +33,10 @@ enum tl_bt_controller_state { * used for vhci call host function to notify what host need to do */ typedef struct tlx_bt_host_callback { - void (*host_send_available)(void); /* the host can send packet to the controller */ - void (*host_read_packet)(uint8_t *data, uint16_t len); /* the controller has a packet to send to the host */ + /* the host can send packet to the controller */ + oid (*host_send_available)(void); + /* the controller has a packet to send to the host */ + void (*host_read_packet)(uint8_t *data, uint16_t len); } tlx_bt_host_callback_t; /** @@ -50,4 +52,4 @@ void tlx_bt_host_callback_register(const tlx_bt_host_callback_t *callback); void tlx_bt_host_send_packet(uint8_t type, const uint8_t *data, uint16_t len); -#endif /* TLX_BT_HOST_H_ */ \ No newline at end of file +#endif /* TLX_BT_HOST_H_ */ diff --git a/hal_v2/wrapper/controller/tlx/tlx_bt_init.c b/hal_v2/wrapper/controller/tlx/tlx_bt_init.c index 4337756a..98accf6a 100644 --- a/hal_v2/wrapper/controller/tlx/tlx_bt_init.c +++ b/hal_v2/wrapper/controller/tlx/tlx_bt_init.c @@ -15,6 +15,9 @@ * limitations under the License. * *****************************************************************************/ +#include +LOG_MODULE_REGISTER(tlx_bt_init, LOG_LEVEL_INF); + #include "zephyr/bluetooth/buf.h" #include #include "stack/ble/ble.h" @@ -22,6 +25,9 @@ #include "tlx_bt_buffer.h" #include "tlx_bt_init.h" #include "tlx_bt_flash.h" +#ifdef CONFIG_BT_CHANNEL_SOUNDING +#include "tlx_bt_cs.h" +#endif #include "tl_rf_power.h" #ifdef CONFIG_PM @@ -63,14 +69,43 @@ _attribute_ble_data_retention_ u8 /** a temporary method to set exit latency which can be set in header files */ #if CONFIG_SOC_RISCV_TELINK_TL321X - #define SUSPEND_EXIT_LATENCY_US (320U) + #define SUSPEND_EXIT_LATENCY_US (240U) #define DEEPRETN_EXIT_LATENCY_US (1000U) /*!< Not used for now */ +#elif CONFIG_SOC_RISCV_TELINK_TL322X + #define SUSPEND_EXIT_LATENCY_US (170U) + #define DEEPRETN_EXIT_LATENCY_US (1000U) #elif CONFIG_SOC_RISCV_TELINK_TL323X - #define SUSPEND_EXIT_LATENCY_US (500U) /*!< No Fast Settle Used For Now, Update Later */ - #define DEEPRETN_EXIT_LATENCY_US (1000U) /*!< Not used for now */ + /* for tl323x, if in pm mode the cclk is 48M, the early wakeup should be 500us. + * In non-pm mode ,the cclk is 96M, the early wakeup should be 400us, will be + * more stable + */ + #if CONFIG_PM + /*!< No Fast Settle Used For Now, Update Later */ + #define SUSPEND_EXIT_LATENCY_US (260U) + #else + /*!< No Fast Settle Used For Now, Update Later */ + #define SUSPEND_EXIT_LATENCY_US (400U) + #endif + /*!< Not used for now */ + #define DEEPRETN_EXIT_LATENCY_US (1000U) +#elif CONFIG_SOC_RISCV_TELINK_TL521X + /* for tl521x, if in pm mode the cclk is 48M, the early wakeup should be 500us. + * In non-pm mode ,the cclk is 96M, the early wakeup should be 400us, will be + * more stable + */ + #if CONFIG_PM + /*!< No Fast Settle Used For Now, Update Later */ + #define SUSPEND_EXIT_LATENCY_US (360U) + #else + /*!< No Fast Settle Used For Now, Update Later */ + #define SUSPEND_EXIT_LATENCY_US (100U) + #endif + /*!< Not used for now */ + #define DEEPRETN_EXIT_LATENCY_US (0U) #elif CONFIG_SOC_RISCV_TELINK_TL721X - #define SUSPEND_EXIT_LATENCY_US (250U) - #define DEEPRETN_EXIT_LATENCY_US (0U) /*!< Not used for now */ + #define SUSPEND_EXIT_LATENCY_US (200U) + /*!< Not used for now */ + #define DEEPRETN_EXIT_LATENCY_US (0U) #endif /** @@ -156,7 +191,9 @@ int tlx_bt_blc_init(void *prx, void *ptx) } #endif /* CONFIG_BT_PERIPHERAL */ -#if CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL721X || CONFIG_SOC_RISCV_TELINK_TL322X || CONFIG_SOC_RISCV_TELINK_TL323X +#if CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL721X || \ + CONFIG_SOC_RISCV_TELINK_TL322X || CONFIG_SOC_RISCV_TELINK_TL323X || \ + CONFIG_SOC_RISCV_TELINK_TL521X blc_ll_configLegacyAdvEnableStrategy(LEG_ADV_EN_STRATEGY_3); #endif @@ -199,6 +236,10 @@ int tlx_bt_blc_init(void *prx, void *ptx) blc_hci_le_setEventMask_cmd(0xFFFFFFFF); blc_hci_le_setEventMask_2_cmd(0x7FFFFFFF); +#ifdef CONFIG_BT_CHANNEL_SOUNDING + app_channel_sounding_init(); +#endif + u8 check_status = blc_controller_check_appBufferInitialization(); if (check_status != BLE_SUCCESS) { return INIT_FAILED; @@ -212,7 +253,9 @@ int tlx_bt_blc_init(void *prx, void *ptx) /* Enable the sleep masks for BLE stack thread */ blc_pm_setSleepMask(PM_SLEEP_LEG_ADV | PM_SLEEP_LEG_SCAN | PM_SLEEP_ACL_SLAVE | PM_SLEEP_ACL_MASTER); - #if CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL721X || CONFIG_SOC_RISCV_TELINK_TL323X + #if CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL721X || \ + CONFIG_SOC_RISCV_TELINK_TL322X || CONFIG_SOC_RISCV_TELINK_TL323X || \ + CONFIG_SOC_RISCV_TELINK_TL521X extern void blc_ll_setOsLowPowerExitLatencyUs(uint32_t suspendUs, uint32_t deepretUs); blc_ll_setOsLowPowerExitLatencyUs(SUSPEND_EXIT_LATENCY_US, DEEPRETN_EXIT_LATENCY_US); #endif @@ -220,4 +263,182 @@ int tlx_bt_blc_init(void *prx, void *ptx) return INIT_OK; } -#endif /* TLK_ONLY_BLE_HOST */ \ No newline at end of file + +#ifdef CONFIG_IEEE802154_TLX_BLE_COEXIST +#include +#include +#include +#include "ieee802154_tlx.h" +#include "thd_task.h" +#include "debug_gpio.h" + +extern void tlx_init_ble_rf_hw(void); +extern void tlx_init_802154_rf_hw(void); +extern void tlx_rf_tx_is_sending(void); +extern void tlx_rf_isr(const void *parameter); +extern bool blc_ll_isOnly802p15p4ScanTaskBusy(void); + +extern void openthread_suspend(void); +extern void openthread_resume(void); +extern void net_if_thread_suspend(void); +extern void net_if_thread_resume(void); +extern void net_tc_threads_suspend(void); +extern void net_tc_threads_resume(void); +extern void ot_radio_workq_thread_suspend(void); +extern void ot_radio_workq_thread_resume(void); +extern volatile bool tlx_rf_zigbee_250K_mode; + +volatile bool tlx_rf_802154_mode; +volatile bool tlx_openthread_threads_suspend; +extern struct k_sem ieee802154_task_ready_sem; + +/* Suspend OpenThread and 802.15.4 threads at the same time */ +_attribute_ram_code_ +static void tlx_suspend_openthread_threads(void) +{ + const struct device *const radio_dev = + DEVICE_DT_GET(DT_CHOSEN(zephyr_ieee802154)); + + struct tlx_data *tlx = radio_dev->data; + + if(k_sem_count_get(&tlx->ack_wait) == 0) { + /* LOG_ERR("ack_wait taking\n"); */ + /* release ack wait semaphore */ + k_sem_give(&tlx->ack_wait); + /* ack wait failure, disable ack handler */ + tlx->ack_handler_en = false; + } + + k_sched_lock(); + ot_radio_workq_thread_suspend(); + openthread_suspend(); + net_if_thread_suspend(); + net_tc_threads_suspend(); + k_sched_unlock(); + tlx_openthread_threads_suspend = true; +} + +/* Resume OpenThread and 802.15.4 threads at the same time */ +_attribute_ram_code_ +static void tlx_resume_openthread_threads(void) +{ + k_sched_lock(); + net_if_thread_resume(); + net_tc_threads_resume(); + openthread_resume(); + ot_radio_workq_thread_resume(); + k_sched_unlock(); + tlx_openthread_threads_suspend = false; +} + +_attribute_ram_code_ +void tlx_switch_to_802154_mode(void) +{ + // tlx_init_802154_rf_hw(); + tlx_resume_openthread_threads(); + k_sem_give(&ieee802154_task_ready_sem); + tlx_rf_zigbee_250K_mode = false; + tlx_rf_802154_mode = true; +} + +_attribute_ram_code_ +void tlx_switch_to_ble_mode(void) +{ + // DBG_OT_BLE_CHN2_LOW; + tlx_rf_tx_is_sending(); + tlx_suspend_openthread_threads(); + k_sem_reset(&ieee802154_task_ready_sem); + // tlx_rf_zigbee_250K_mode = true; + tlx_rf_802154_mode = false; +} + +void tlx_switch_to_802154_rf_irq_routine(void) +{ +#ifdef CONFIG_IEEE802154_TLX_BLE_COEXIST +#if CONFIG_DYNAMIC_INTERRUPTS + /* lock interrupts */ + unsigned int key = irq_lock(); + irq_connect_dynamic(15, 2, + (void (*)(const void *))tlx_rf_isr, 0, 0); + /* unlock interrupts */ + irq_unlock(key); +#else + #error "error occurred, BLE + 802154 dual-mode need to enable the dynamic interrupts" +#endif +#endif +} + +/** + * @brief Enable BLE and 802.15.4 coexistence mode + * @param None. + * @return None. + */ +void tlx_bt_802154_dual_mode_enable(void) +{ + // tlksdk_thd_initFlexibleTask_module();// add by junwei todo + tlksdk_thd_initInsertTask1_module(); + tlksdk_thd_registerSwitchTo802154RfCb(tlx_init_802154_rf_hw, tlx_init_ble_rf_hw); + tlksdk_thd_registerModeChangeCb(tlx_switch_to_802154_mode, tlx_switch_to_ble_mode); + tlksdk_thd_registerRfIsrCb(tlx_rf_isr, NULL); + + // // tlksdk_thd_enableFlexibleTask(THD_TASK_ENABLE); + // tlksdk_thd_enableInsertTask1(THD_TASK_ENABLE); +#if (DEBUG_OT_BLE_GPIO_ENABLE) + gpio_function_en(GPIO_CHN0); + gpio_output_en(GPIO_CHN0); + gpio_function_en(GPIO_CHN1); + gpio_output_en(GPIO_CHN1); + gpio_function_en(GPIO_CHN2); + gpio_output_en(GPIO_CHN2); + gpio_function_en(GPIO_CHN3); + gpio_output_en(GPIO_CHN3); + gpio_function_en(GPIO_CHN4); + gpio_output_en(GPIO_CHN4); + gpio_function_en(GPIO_CHN5); + gpio_output_en(GPIO_CHN5); + gpio_function_en(GPIO_CHN6); + gpio_output_en(GPIO_CHN6); + gpio_function_en(GPIO_CHN7); + gpio_output_en(GPIO_CHN7); + gpio_function_en(GPIO_CHN8); + gpio_output_en(GPIO_CHN8); + gpio_function_en(GPIO_CHN9); + gpio_output_en(GPIO_CHN9); + gpio_function_en(GPIO_CHN10); + gpio_output_en(GPIO_CHN10); + rf_enable_bb_debug(); + DBG_OT_BLE_CHN0_HIGH; +#endif + +} + +/** + * @brief Disable BLE and 802.15.4 coexistence mode + * @param None. + * @return None. + */ +void tlx_bt_802154_dual_mode_disable(void) +{ + // tlksdk_thd_enableFlexibleTask(THD_TASK_DISABLE); + tlksdk_thd_enableInsertTask1(THD_TASK_DISABLE); + DBG_OT_BLE_CHN0_LOW; +} + +/** + * @brief Start BLE and 802.15.4 coexistence mode + * @param None. + * @return None. + */ +_attribute_no_inline_ void tlx_bt_802154_dual_mode_start(void) +{ + k_sleep(K_SECONDS(1)); + static int insert_flag = 0; + + if(insert_flag == 0){ + insert_flag = 1; + tlksdk_thd_enableInsertTask1(0x01); + } +} + +#endif /* IEEE802154_TLX_BLE_COEXIST */ +#endif /* TLK_ONLY_BLE_HOST */ diff --git a/hal_v2/wrapper/controller/tlx/tlx_bt_init.h b/hal_v2/wrapper/controller/tlx/tlx_bt_init.h index a7d15f56..ff03ac01 100644 --- a/hal_v2/wrapper/controller/tlx/tlx_bt_init.h +++ b/hal_v2/wrapper/controller/tlx/tlx_bt_init.h @@ -18,6 +18,8 @@ #ifndef TLX_BT_INIIT_H_ #define TLX_BT_INIIT_H_ +#include "compiler.h" + #define INIT_OK (0) #define INIT_FAILED (-1) @@ -29,4 +31,6 @@ */ int tlx_bt_blc_init(void *prx, void *ptx); +_attribute_no_inline_ void tlx_bt_802154_dual_mode_start(void); + #endif /* TLX_BT_INIIT_H_ */ diff --git a/hal_v2/wrapper/crypto/CMakeLists.txt b/hal_v2/wrapper/crypto/CMakeLists.txt new file mode 100644 index 00000000..c4044d67 --- /dev/null +++ b/hal_v2/wrapper/crypto/CMakeLists.txt @@ -0,0 +1,53 @@ +# +# Copyright (c) 2026, Telink +# +# SPDX-License-Identifier: Apache-2.0 +# + +if (CONFIG_MBEDTLS OR CONFIG_BOOT_USE_MBEDTLS) + add_subdirectory(mbedtls) +endif() + +if (CONFIG_TINYCRYPT OR CONFIG_BOOT_USE_TINYCRYPT) + add_subdirectory(tinycrypt) +endif() + + +if (CONFIG_TELINK_TLX_MBEDTLS_HW_ACCELERATION OR CONFIG_TELINK_TLX_TINYCRYPT_HW_ACCELERATION) + +zephyr_library() + +zephyr_library_compile_definitions( + CONFIG_HASH_SUPPORT_MUL_THREAD=1 +) + +zephyr_library_sources( + sha256_wrapper.c + multithread_tlx.c + sha_tlx_backend.c +) + +if (CONFIG_TELINK_TLX_MBEDTLS_HW_ACCELERATION) + + zephyr_link_libraries( + -Wl,--wrap,mbedtls_sha256_starts + -Wl,--wrap,mbedtls_sha256_update + -Wl,--wrap,mbedtls_sha256_finish + -Wl,--wrap=mbedtls_sha256 + -Wl,--wrap=mbedtls_sha256_clone + -Wl,--wrap=mbedtls_sha256_free + ) + +endif() + +if (CONFIG_TELINK_TLX_TINYCRYPT_HW_ACCELERATION) + + zephyr_link_libraries( + -Wl,--wrap,tc_sha256_init + -Wl,--wrap,tc_sha256_update + -Wl,--wrap,tc_sha256_final + ) + +endif() + +endif() diff --git a/hal_v2/wrapper/crypto/Kconfig b/hal_v2/wrapper/crypto/Kconfig new file mode 100644 index 00000000..5abbbb65 --- /dev/null +++ b/hal_v2/wrapper/crypto/Kconfig @@ -0,0 +1,41 @@ +# Copyright (c) 2026 Telink Semiconductor +# SPDX-License-Identifier: Apache-2.0 + +if TELINK_B9X_MBEDTLS_HW_ACCELERATION || TELINK_B9X_TINYCRYPT_HW_ACCELERATION || \ + TELINK_TLX_MBEDTLS_HW_ACCELERATION || TELINK_TLX_TINYCRYPT_HW_ACCELERATION + +choice + prompt "Telink crypto back-ends log level" + default TL_TELINK_CRYPTO_BACKEND_LOG_LEVEL_INFO + help + This option selects log level for Telink crypto back-ends +config TL_TELINK_CRYPTO_BACKEND_LOG_LEVEL_CRIT + bool "Critical" +config TL_TELINK_CRYPTO_BACKEND_LOG_LEVEL_WARN + bool "Warning" +config TL_TELINK_CRYPTO_BACKEND_LOG_LEVEL_INFO + bool "Informational" +config TL_TELINK_CRYPTO_BACKEND_LOG_LEVEL_DEBG + bool "Debug" +endchoice + +config TL_TELINK_CRYPTO_BACKEND_LOG_LEVEL + int + default 1 if TL_TELINK_CRYPTO_BACKEND_LOG_LEVEL_CRIT + default 2 if TL_TELINK_CRYPTO_BACKEND_LOG_LEVEL_WARN + default 3 if TL_TELINK_CRYPTO_BACKEND_LOG_LEVEL_INFO + default 4 if TL_TELINK_CRYPTO_BACKEND_LOG_LEVEL_DEBG + default 0 + +if TELINK_TLX_MBEDTLS_HW_ACCELERATION || TELINK_TLX_TINYCRYPT_HW_ACCELERATION + +config TL_TELINK_TLX_SHA_HW_SLOTS + int "Telink TLX simultimes HW SHA slots number" + range 0 64 + default 2 if BOARD_TL3218X_RETENTION + default 4 if BOARD_TL3218X + default 8 + +endif + +endif diff --git a/hal_v2/wrapper/crypto/mbedtls/CMakeLists.txt b/hal_v2/wrapper/crypto/mbedtls/CMakeLists.txt index ce18ad44..e68140a3 100644 --- a/hal_v2/wrapper/crypto/mbedtls/CMakeLists.txt +++ b/hal_v2/wrapper/crypto/mbedtls/CMakeLists.txt @@ -1,5 +1,5 @@ # -# Copyright (c) 2022-2024, Telink +# Copyright (c) 2022-2026, Telink # # SPDX-License-Identifier: Apache-2.0 # diff --git a/hal_v2/wrapper/crypto/mbedtls/ecp_backend_test.c b/hal_v2/wrapper/crypto/mbedtls/ecp_backend_test.c index 3537e82a..3c3569f6 100644 --- a/hal_v2/wrapper/crypto/mbedtls/ecp_backend_test.c +++ b/hal_v2/wrapper/crypto/mbedtls/ecp_backend_test.c @@ -574,7 +574,7 @@ int telink_soc_ecp_self_test(int verbose) item_allocated = false; continue; } - +#if defined(MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED) mbedtls_printf("\tstage 8\n"); MBEDTLS_MPI_CHK(mbedtls_ecp_muladd(&ecp_group, &sum, &sk, &ecp_group.G, &sk, &pk)); mbedtls_printf("\tstage 9\n"); @@ -582,7 +582,7 @@ int telink_soc_ecp_self_test(int verbose) &sum_ref, ecp_tc[i].sum, ecp_tc[i].pk_len)); mbedtls_printf("\tstage 10\n"); MBEDTLS_MPI_CHK(mbedtls_ecp_point_cmp(&sum, &sum_ref)); - +#endif /* MBEDTLS_ECP_SHORT_WEIERSTRASS_ENABLED */ mbedtls_ecp_point_free(&sum_ref); mbedtls_ecp_point_free(&sum); mbedtls_ecp_point_free(&pk_ref); diff --git a/hal_v2/wrapper/crypto/mbedtls/ecp_tlx_backend.c b/hal_v2/wrapper/crypto/mbedtls/ecp_tlx_backend.c index 7ee0022b..aa2f48ab 100644 --- a/hal_v2/wrapper/crypto/mbedtls/ecp_tlx_backend.c +++ b/hal_v2/wrapper/crypto/mbedtls/ecp_tlx_backend.c @@ -34,7 +34,8 @@ LOG_MODULE_REGISTER(ecc_tlx, CONFIG_MBEDTLS_LOG_LEVEL); * HW unit curve data constants definition ****************************************************************/ -#if CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL322X || CONFIG_SOC_RISCV_TELINK_TL323X +#if CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL322X || \ + CONFIG_SOC_RISCV_TELINK_TL323X || CONFIG_SOC_RISCV_TELINK_TL521X #define ECCP_P_BITLEN eccp_p_bitLen #define ECCP_N_BITLEN eccp_n_bitLen #define ECCP_P eccp_p @@ -222,7 +223,8 @@ static eccp_curve_t secp192k1_curve_dat = { #if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) -#if CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL322X || CONFIG_SOC_RISCV_TELINK_TL323X +#if CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL322X || \ + CONFIG_SOC_RISCV_TELINK_TL323X || CONFIG_SOC_RISCV_TELINK_TL521X #define MONT_P_BITLEN p_bitLen #define MONT_N_BITLEN n_bitLen #define MONT_P p @@ -237,10 +239,13 @@ static eccp_curve_t secp192k1_curve_dat = { #define MONT_A24 a24 #endif -#if CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL721X || CONFIG_SOC_RISCV_TELINK_TL322X || CONFIG_SOC_RISCV_TELINK_TL323X +#if CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL721X || \ + CONFIG_SOC_RISCV_TELINK_TL322X || CONFIG_SOC_RISCV_TELINK_TL323X || \ + CONFIG_SOC_RISCV_TELINK_TL521X static mont_curve_t x25519 = { .MONT_P_BITLEN = 255, -#if CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL322X || CONFIG_SOC_RISCV_TELINK_TL323X +#if CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL322X || \ + CONFIG_SOC_RISCV_TELINK_TL323X || CONFIG_SOC_RISCV_TELINK_TL521X .MONT_N_BITLEN = 253, #endif .MONT_P = (unsigned int[]){ @@ -257,7 +262,9 @@ static mont_curve_t x25519 = { 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }; -#endif /*CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL721X || CONFIG_SOC_RISCV_TELINK_TL322X*/ +#endif /* CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL721X || + CONFIG_SOC_RISCV_TELINK_TL322X || CONFIG_SOC_RISCV_TELINK_TL323X || + CONFIG_SOC_RISCV_TELINK_TL521X */ #endif /* MBEDTLS_ECP_DP_CURVE25519_ENABLED */ @@ -300,9 +307,13 @@ static const struct { mont_curve_t *curve_dat; } mont_curve_linking[] = { #if defined(MBEDTLS_ECP_DP_CURVE25519_ENABLED) -#if CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL721X || CONFIG_SOC_RISCV_TELINK_TL322X || CONFIG_SOC_RISCV_TELINK_TL323X +#if CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL721X || \ + CONFIG_SOC_RISCV_TELINK_TL322X || CONFIG_SOC_RISCV_TELINK_TL323X || \ + CONFIG_SOC_RISCV_TELINK_TL521X {.group = MBEDTLS_ECP_DP_CURVE25519, .curve_dat = &x25519} -#endif /*CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL721X || CONFIG_SOC_RISCV_TELINK_TL322X*/ +#endif /* CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL721X || + CONFIG_SOC_RISCV_TELINK_TL322X || CONFIG_SOC_RISCV_TELINK_TL323X || + CONFIG_SOC_RISCV_TELINK_TL521X */ #endif /* MBEDTLS_ECP_DP_CURVE25519_ENABLED */ }; #endif /* MBEDTLS_ECP_MONTGOMERY_ENABLED */ @@ -379,7 +390,7 @@ int telink_tlx_ecp_check_pubkey(const mbedtls_ecp_group *grp, (void) mbedtls_mpi_write_binary_le(&pt->MBEDTLS_PRIVATE(Y), (unsigned char *)Qy, sizeof(Qy)); telink_soc_ecp_lock(); - int r = pke_eccp_point_verify(eccp_curve, Qx, Qy); + int r = eccp_pointVerify(eccp_curve, Qx, Qy); telink_soc_ecp_unlock(); if (r == PKE_SUCCESS) { @@ -435,7 +446,7 @@ int telink_tlx_ecp_mul_restartable(mbedtls_ecp_group *grp, break; } telink_soc_ecp_lock(); - int r = pke_eccp_point_mul(eccp_curve, ms, Qx, Qy, Qx, Qy); + int r = eccp_pointMul(eccp_curve, ms, Qx, Qy, Qx, Qy); telink_soc_ecp_unlock(); if (r != PKE_SUCCESS) { @@ -457,7 +468,7 @@ int telink_tlx_ecp_mul_restartable(mbedtls_ecp_group *grp, break; } telink_soc_ecp_lock(); - int r = pke_x25519_point_mul(mont_curve, ms, Qx, Qx); + int r = x25519_pointMul(mont_curve, ms, Qx, Qx); telink_soc_ecp_unlock(); if (r != PKE_SUCCESS) { LOG_ERR("EC multiplication error"); @@ -522,7 +533,7 @@ int telink_tlx_ecp_muladd_restartable(mbedtls_ecp_group *grp, (void) mbedtls_mpi_write_binary_le(m, (unsigned char *)ms, sizeof(ms)); telink_soc_ecp_lock(); - r = pke_eccp_point_mul(eccp_curve, ms, Q1x, Q1y, Q1x, Q1y); + r = eccp_pointMul(eccp_curve, ms, Q1x, Q1y, Q1x, Q1y); telink_soc_ecp_unlock(); if (r != PKE_SUCCESS) { LOG_ERR("EC multiplication error"); @@ -535,7 +546,7 @@ int telink_tlx_ecp_muladd_restartable(mbedtls_ecp_group *grp, } (void) mbedtls_mpi_write_binary_le(n, (unsigned char *)ms, sizeof(ms)); telink_soc_ecp_lock(); - r = pke_eccp_point_mul(eccp_curve, ms, Q2x, Q2y, Q2x, Q2y); + r = eccp_pointMul(eccp_curve, ms, Q2x, Q2y, Q2x, Q2y); telink_soc_ecp_unlock(); if (r != PKE_SUCCESS) { LOG_ERR("EC multiplication error"); @@ -547,7 +558,7 @@ int telink_tlx_ecp_muladd_restartable(mbedtls_ecp_group *grp, break; } telink_soc_ecp_lock(); - r = pke_eccp_point_add(eccp_curve, Q1x, Q1y, Q2x, Q2y, Q1x, Q1y); + r = eccp_pointAdd(eccp_curve, Q1x, Q1y, Q2x, Q2y, Q1x, Q1y); telink_soc_ecp_unlock(); if (r != PKE_SUCCESS) { LOG_ERR("EC summation error"); diff --git a/hal_v2/wrapper/crypto/mbedtls/mbedtls_wrapper.c b/hal_v2/wrapper/crypto/mbedtls/mbedtls_wrapper.c index 06c086cb..356844a8 100644 --- a/hal_v2/wrapper/crypto/mbedtls/mbedtls_wrapper.c +++ b/hal_v2/wrapper/crypto/mbedtls/mbedtls_wrapper.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2024 Telink Semiconductor + * Copyright (c) 2024-2026 Telink Semiconductor * * SPDX-License-Identifier: Apache-2.0 */ @@ -44,10 +44,37 @@ extern int telink_b9x_ecp_muladd_restartable(mbedtls_ecp_group *grp, extern int telink_soc_ecp_self_test(int verbose); #endif /* MBEDTLS_SELF_TEST */ +#endif /* MBEDTLS_ECP_C */ + +/********************************************************************* + * SHA256 HW accelerated functions + *********************************************************************/ + +#ifdef MBEDTLS_SHA256_C + +#include + +#if CONFIG_TELINK_TLX_MBEDTLS_HW_SHA_ACCELERATION +extern void telink_tlx_sha256_init(mbedtls_sha256_context *ctx); +extern int telink_tlx_sha256_starts(mbedtls_sha256_context *ctx, int is224); +extern int telink_tlx_sha256_update(mbedtls_sha256_context *ctx, + const unsigned char *input, + size_t ilen); +extern int telink_tlx_sha256_finish(mbedtls_sha256_context *ctx, + unsigned char output[32]); +extern void telink_tlx_sha256_free(mbedtls_sha256_context *ctx); + +extern void telink_tlx_sha256_clone(mbedtls_sha256_context *dst, + const mbedtls_sha256_context *src); +#endif /* CONFIG_TELINK_TLX_MBEDTLS_HW_SHA_ACCELERATION */ + +#endif /* MBEDTLS_SHA256_C */ + /********************************************************************* * LD transformed software functions *********************************************************************/ +#ifdef MBEDTLS_ECP_C extern int __real_mbedtls_ecp_check_pubkey(const mbedtls_ecp_group *grp, const mbedtls_ecp_point *pt); extern int __real_mbedtls_ecp_mul_restartable(mbedtls_ecp_group *grp, @@ -62,11 +89,14 @@ extern int __real_mbedtls_ecp_muladd_restartable(mbedtls_ecp_group *grp, #ifdef MBEDTLS_SELF_TEST extern int __real_mbedtls_ecp_self_test(int verbose); #endif /* MBEDTLS_SELF_TEST */ +#endif /* MBEDTLS_ECP_C */ /********************************************************************* * Call HW accelerated functionality if fails use software *********************************************************************/ +#ifdef MBEDTLS_ECP_C + int __wrap_mbedtls_ecp_check_pubkey(const mbedtls_ecp_group *grp, const mbedtls_ecp_point *pt) { @@ -182,3 +212,75 @@ int __wrap_mbedtls_ecp_self_test(int verbose) #endif /* MBEDTLS_SELF_TEST */ #endif /* MBEDTLS_ECP_C */ + +/********************************************************************* + * SHA256 wrapper functions + *********************************************************************/ + +#ifdef MBEDTLS_SHA256_C + +#ifdef CONFIG_TELINK_TLX_MBEDTLS_HW_SHA_ACCELERATION +void __wrap_mbedtls_sha256_init(mbedtls_sha256_context *ctx) +{ + telink_tlx_sha256_init(ctx); +} + +int __wrap_mbedtls_sha256_starts(mbedtls_sha256_context *ctx, int is224) +{ + return telink_tlx_sha256_starts(ctx, is224); +} + +int __wrap_mbedtls_sha256_update(mbedtls_sha256_context *ctx, + const unsigned char *input, + size_t ilen) +{ + return telink_tlx_sha256_update(ctx, input, ilen);; +} + +int __wrap_mbedtls_sha256_finish(mbedtls_sha256_context *ctx, + unsigned char output[32]) +{ + return telink_tlx_sha256_finish(ctx, output); +} + +void __wrap_mbedtls_sha256_free(mbedtls_sha256_context *ctx) +{ + telink_tlx_sha256_free(ctx); +} + +void __wrap_mbedtls_sha256_clone(mbedtls_sha256_context *dst, + const mbedtls_sha256_context *src) +{ + telink_tlx_sha256_clone(dst, src); +} + +int __wrap_mbedtls_sha256(const unsigned char *input, + size_t ilen, + unsigned char output[32], + int is224) +{ + mbedtls_sha256_context ctx; + int ret; + + __wrap_mbedtls_sha256_init(&ctx); + + ret = __wrap_mbedtls_sha256_starts(&ctx, is224); + if (ret != 0) { + goto exit; + } + + ret = __wrap_mbedtls_sha256_update(&ctx, input, ilen); + if (ret != 0) { + goto exit; + } + + ret = __wrap_mbedtls_sha256_finish(&ctx, output); + +exit: + __wrap_mbedtls_sha256_free(&ctx); + return ret; +} + +#endif /* CONFIG_TELINK_TLX_MBEDTLS_HW_SHA_ACCELERATION */ + +#endif /* MBEDTLS_SHA256_C */ diff --git a/hal_v2/wrapper/crypto/mbedtls/telink_soc_mbedtls_user_config.h b/hal_v2/wrapper/crypto/mbedtls/telink_soc_mbedtls_user_config.h index 9720c60d..963e8a4d 100644 --- a/hal_v2/wrapper/crypto/mbedtls/telink_soc_mbedtls_user_config.h +++ b/hal_v2/wrapper/crypto/mbedtls/telink_soc_mbedtls_user_config.h @@ -15,56 +15,4 @@ #undef MBEDTLS_MEMORY_BUFFER_ALLOC_C #endif -#if CONFIG_SOC_RISCV_TELINK_TL323X || CONFIG_SOC_RISCV_TELINK_TL721X - -#define big_integer_compare uint32_BigNumCmp -#define pke_clr_irq_status pke_clear_interrupt -// #define pke_get_irq_status pke_wait_till_done -#define pke_opr_start pke_start -#define pke_mod_add pke_modadd -#define pke_mod_sub pke_modsub -#define pke_mod_mul pke_modmul -#define pke_mod_inv pke_modinv -#define div2n_u32 Big_Div2n -#define sub_u32 pke_sub -#define pke_eccp_point_mul eccp_pointMul -#define pke_eccp_point_add eccp_pointAdd -#define pke_eccp_point_verify eccp_pointVerify -#if defined(SUPPORT_C25519) || defined(CONFIG_SOC_RISCV_TELINK_TL721X) -#define pke_x25519_point_mul x25519_pointMul -#define pke_ed25519_point_mul ed25519_pointMul -#define pke_ed25519_point_add ed25519_pointAdd -# else -// #define pke_x25519_point_mul -// #define pke_ed25519_point_mul -// #define pke_ed25519_point_add -# endif /* SUPPORT_C25519 */ - -#else - -#define big_integer_compare uint32_BigNumCmp -#define pke_clr_irq_status pke_clear_interrupt -#define pke_get_irq_status pke_wait_till_done -#define pke_opr_start pke_start -#define pke_mod_add pke_modadd -#define pke_mod_sub pke_modsub -#define pke_mod_mul pke_modmul -#define pke_mod_inv pke_modinv -#define div2n_u32 Big_Div2n -#define sub_u32 pke_sub -#define pke_eccp_point_mul eccp_pointMul -#define pke_eccp_point_add eccp_pointAdd -#define pke_eccp_point_verify eccp_pointVerify -# ifdef SUPPORT_C25519 -#define pke_x25519_point_mul x25519_pointMul -#define pke_ed25519_point_mul ed25519_pointMul -#define pke_ed25519_point_add ed25519_pointAdd -# else -#define pke_x25519_point_mul -#define pke_ed25519_point_mul -#define pke_ed25519_point_add -# endif /* SUPPORT_C25519 */ - -#endif /* CONFIG_SOC_RISCV_TELINK_TL323X || CONFIG_SOC_RISCV_TELINK_TL721X */ - #endif /* TELINK_SOC_MBEDTLS_USER_CONFIG_H */ diff --git a/hal_v2/wrapper/crypto/multithread_tlx.c b/hal_v2/wrapper/crypto/multithread_tlx.c new file mode 100644 index 00000000..87082e36 --- /dev/null +++ b/hal_v2/wrapper/crypto/multithread_tlx.c @@ -0,0 +1,19 @@ +/* + * Copyright (c) 2026 Telink Semiconductor + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +K_MUTEX_DEFINE(telink_tlx_soc_sha_mutex); + +void telink_tlx_soc_sha_lock(void) +{ + (void)k_mutex_lock(&telink_tlx_soc_sha_mutex, K_FOREVER); +} + +void telink_tlx_soc_sha_unlock(void) +{ + (void)k_mutex_unlock(&telink_tlx_soc_sha_mutex); +} diff --git a/hal_v2/wrapper/crypto/sha256_wrapper.c b/hal_v2/wrapper/crypto/sha256_wrapper.c new file mode 100644 index 00000000..8643823b --- /dev/null +++ b/hal_v2/wrapper/crypto/sha256_wrapper.c @@ -0,0 +1,133 @@ +/* + * Copyright (c) 2026 Telink Semiconductor + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +int telink_tlx_sha_init(void *ctx, HASH_ALG hash_alg); +int telink_tlx_sha_update(void *ctx, const void *data, size_t data_len); +int telink_tlx_sha_final(void *ctx, uint8_t *digest); +int telink_tlx_sha_clone(void *dst, const void *src); +void telink_tlx_sha_cleanup(void *ctx); + +#if CONFIG_TELINK_TLX_MBEDTLS_HW_ACCELERATION + +#include + +int __real_mbedtls_sha256_starts(mbedtls_sha256_context *ctx, int is224); +int __real_mbedtls_sha256_update(mbedtls_sha256_context *ctx, const unsigned char *input, + size_t ilen); +int __real_mbedtls_sha256_finish(mbedtls_sha256_context *ctx, unsigned char *output); +void __real_mbedtls_sha256_clone(mbedtls_sha256_context *dst, const mbedtls_sha256_context *src); +void __real_mbedtls_sha256_free(mbedtls_sha256_context *ctx); + +int __wrap_mbedtls_sha256_starts(mbedtls_sha256_context *ctx, int is224) +{ + int ret = telink_tlx_sha_init(ctx, is224 ? HASH_SHA224 : HASH_SHA256); + + if (ret) { + ret = __real_mbedtls_sha256_starts(ctx, is224); + } + return ret; +} + +int __wrap_mbedtls_sha256_update(mbedtls_sha256_context *ctx, const unsigned char *input, + size_t ilen) +{ + int ret = telink_tlx_sha_update(ctx, input, ilen); + + if (ret) { + ret = __real_mbedtls_sha256_update(ctx, input, ilen); + } + return ret; +} + +int __wrap_mbedtls_sha256_finish(mbedtls_sha256_context *ctx, unsigned char *output) +{ + int ret = telink_tlx_sha_final(ctx, output); + + if (ret) { + ret = __real_mbedtls_sha256_finish(ctx, output); + } + return ret; +} + +int __wrap_mbedtls_sha256(const unsigned char *input, size_t ilen, unsigned char *output, int is224) +{ + int ret; + mbedtls_sha256_context ctx; + + mbedtls_sha256_init(&ctx); + do { + ret = __wrap_mbedtls_sha256_starts(&ctx, is224); + if (ret) { + break; + } + ret = __wrap_mbedtls_sha256_update(&ctx, input, ilen); + if (ret) { + break; + } + ret = __wrap_mbedtls_sha256_finish(&ctx, output); + } while (0); + mbedtls_sha256_free(&ctx); + return ret; +} + +void __wrap_mbedtls_sha256_clone(mbedtls_sha256_context *dst, const mbedtls_sha256_context *src) +{ + if (telink_tlx_sha_clone(dst, src)) { + __real_mbedtls_sha256_clone(dst, src); + } +} + +void __wrap_mbedtls_sha256_free(mbedtls_sha256_context *ctx) +{ + telink_tlx_sha_cleanup(ctx); + __real_mbedtls_sha256_free(ctx); +} + +#endif /* CONFIG_TELINK_TLX_MBEDTLS_HW_ACCELERATION */ + +#if CONFIG_TELINK_TLX_TINYCRYPT_HW_ACCELERATION + +#include + +extern int __real_tc_sha256_init(TCSha256State_t s); +extern int __real_tc_sha256_update(TCSha256State_t s, const uint8_t *data, size_t datalen); +extern int __real_tc_sha256_final(uint8_t *digest, TCSha256State_t s); + +int __wrap_tc_sha256_init(TCSha256State_t s) +{ + int ret = telink_tlx_sha_init(s, HASH_SHA256); + + if (ret) { + ret = __real_tc_sha256_init(s); + } + return ret; +} + +int __wrap_tc_sha256_update(TCSha256State_t s, const uint8_t *data, size_t datalen) +{ + int ret = telink_tlx_sha_update(s, data, datalen); + + if (ret) { + ret = __real_tc_sha256_update(s, data, datalen); + } + return ret; +} + +int __wrap_tc_sha256_final(uint8_t *digest, TCSha256State_t s) +{ + int ret = telink_tlx_sha_final(s, digest); + + if (ret) { + ret = __real_tc_sha256_final(digest, s); + } + return ret; +} + +#endif /* CONFIG_TELINK_TLX_TINYCRYPT_HW_ACCELERATION */ diff --git a/hal_v2/wrapper/crypto/sha_tlx_backend.c b/hal_v2/wrapper/crypto/sha_tlx_backend.c new file mode 100644 index 00000000..d911bd80 --- /dev/null +++ b/hal_v2/wrapper/crypto/sha_tlx_backend.c @@ -0,0 +1,147 @@ +/* + * Copyright (c) 2026 Telink Semiconductor + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +#include +LOG_MODULE_REGISTER(sha_tlx, CONFIG_TL_TELINK_CRYPTO_BACKEND_LOG_LEVEL); + +#include +#include + +extern void telink_tlx_soc_sha_lock(void); +extern void telink_tlx_soc_sha_unlock(void); + +static struct { + void *lib_ctx; + HASH_CTX hw_ctx; +} telink_tlx_sha_data[CONFIG_TL_TELINK_TLX_SHA_HW_SLOTS]; + +static int telink_tlx_sha_get_slot(const void *ctx, bool exist) +{ + int result = -1; + + for (size_t i = 0; i < ARRAY_SIZE(telink_tlx_sha_data); ++i) { + if ((exist && telink_tlx_sha_data[i].lib_ctx == ctx) || + (!exist && telink_tlx_sha_data[i].lib_ctx == NULL)) { + result = i; + break; + } + } + return result; +} + +int telink_tlx_sha_init(void *ctx, HASH_ALG hash_alg) +{ + int result = -1; + + telink_tlx_soc_sha_lock(); + int id = telink_tlx_sha_get_slot(ctx, false); + + if (id >= 0) { + if (!hash_init(&telink_tlx_sha_data[id].hw_ctx, hash_alg)) { + telink_tlx_sha_data[id].lib_ctx = ctx; + result = 0; + } + } + telink_tlx_soc_sha_unlock(); + if (result) { + LOG_DBG("telink SHA acceleration failed failed (%s)", __func__); + } + return result; +} + +int telink_tlx_sha_update(void *ctx, const void *data, size_t data_len) +{ + int result = -1; + + telink_tlx_soc_sha_lock(); + int id = telink_tlx_sha_get_slot(ctx, true); + + if (id >= 0) { + if (!hash_update(&telink_tlx_sha_data[id].hw_ctx, data, data_len)) { + result = 0; + } + } + telink_tlx_soc_sha_unlock(); + if (result) { + LOG_DBG("telink SHA acceleration failed failed (%s)", __func__); + } + return result; +} + +int telink_tlx_sha_final(void *ctx, uint8_t *digest) +{ + int result = -1; + + telink_tlx_soc_sha_lock(); + int id = telink_tlx_sha_get_slot(ctx, true); + + if (id >= 0) { + if (!hash_final(&telink_tlx_sha_data[id].hw_ctx, digest)) { + telink_tlx_sha_data[id].lib_ctx = NULL; + result = 0; + } + } + telink_tlx_soc_sha_unlock(); + if (result) { + LOG_DBG("telink SHA acceleration failed failed (%s)", __func__); + } + return result; +} + +int telink_tlx_sha_clone(void *dst, const void *src) +{ + int result = -1; + + telink_tlx_soc_sha_lock(); + int src_id = telink_tlx_sha_get_slot(src, true); + int dst_id = telink_tlx_sha_get_slot(dst, false); + + if (src_id >= 0 && dst_id >= 0) { + telink_tlx_sha_data[dst_id].hw_ctx = telink_tlx_sha_data[src_id].hw_ctx; + telink_tlx_sha_data[dst_id].lib_ctx = dst; + result = 0; + } + telink_tlx_soc_sha_unlock(); + if (result) { + LOG_DBG("telink SHA acceleration failed failed (%s)", __func__); + } + return result; +} + +void telink_tlx_sha_cleanup(void *ctx) +{ + telink_tlx_soc_sha_lock(); + int id = telink_tlx_sha_get_slot(ctx, true); + + if (id >= 0) { + telink_tlx_sha_data[id].lib_ctx = NULL; + } + telink_tlx_soc_sha_unlock(); +} + +static void telink_tlx_sha_pm_cb(enum pm_state state) +{ + if (state == PM_STATE_STANDBY) { + hash_dig_en(); + } +} + +static int telink_tlx_sha_startup(void) +{ + static struct pm_notifier telink_tlx_sha_pm_notifier = { + .state_exit = telink_tlx_sha_pm_cb, + }; + + pm_notifier_register(&telink_tlx_sha_pm_notifier); + hash_dig_en(); + LOG_DBG("telink SHA acceleration inited"); + return 0; +} + +SYS_INIT(telink_tlx_sha_startup, POST_KERNEL, 0); diff --git a/hal_v2/wrapper/crypto/tinycrypt/CMakeLists.txt b/hal_v2/wrapper/crypto/tinycrypt/CMakeLists.txt new file mode 100644 index 00000000..22551cd5 --- /dev/null +++ b/hal_v2/wrapper/crypto/tinycrypt/CMakeLists.txt @@ -0,0 +1,9 @@ +# +# Copyright (c) 2026, Telink +# +# SPDX-License-Identifier: Apache-2.0 +# + +if(CONFIG_TELINK_B9X_TINYCRYPT_HW_ACCELERATION OR CONFIG_TELINK_TLX_TINYCRYPT_HW_ACCELERATION) + +endif() diff --git a/hal_v2/wrapper/zb_proj/drivers/multi_core/mailbox_msg.c b/hal_v2/wrapper/zb_proj/drivers/multi_core/mailbox_msg.c index 48b7c8af..f2f76764 100644 --- a/hal_v2/wrapper/zb_proj/drivers/multi_core/mailbox_msg.c +++ b/hal_v2/wrapper/zb_proj/drivers/multi_core/mailbox_msg.c @@ -25,6 +25,7 @@ #include "mailbox_msg.h" #include "mailbox_service.h" #include "utility.h" +#include static share_mem_fifo_t *sm_tx_fifo = NULL; static share_mem_fifo_t *sm_rx_fifo = NULL; @@ -91,7 +92,7 @@ void mailbox_msg_tx(share_mem_type_e type, u8 *data, u32 len) } printf("]\n"); } - +#if 0 static void mailbox_msg_tx_fifo_handler(u8 *data) { sm_tx_fifo = (share_mem_fifo_t *)BUILD_U32(data[3], data[4], data[5], data[6]); @@ -112,7 +113,7 @@ static void mailbox_msg_nv_fifo_handler(u8 *data) share_memory_set_fifo_status(sm_nv_fifo, SHARE_MEMORY_STATUS_READY); printf("sm_nv_fifo: %x\n", (u32)sm_nv_fifo); } -#if 0 + void mailbox_msg_init(void) { mailbox_service_cb_register(MAILBOX_MSG_TX_FIFO, mailbox_msg_tx_fifo_handler);