confuse about inNodeMapping and outNodeMapping

[FDH21]

WithSbusNoC :
why serial-tl maps to fbus in inNodeMapping, and no cbus mapping in outNodeMapping.
Gemmini10ReRoCCOrigNoCConfig :
the outNodeMapping has four system[0-3], but WithNBanks(8) means there are 8 L2 banks. Additionally, why there are 8 serdesser[7]?

[jerryz123]

Could you paste the full config?

[FDH21]

The following are two configs in target-design/chipyard/generators/chipyard/src/main/scala/config/NoCConfigs.scala.
in MultiNoCConfig, is Cbus connectted to Sbus? and why serial-tl in WithSbusNoC means fbus?
in Gemmini10ReRoCCOrigNoCConfig , the outNodeMapping has four system[0-3], but WithNBanks(8) means there are 8 L2 banks. Additionally, why there are 8 serdesser[0-7]?

class MultiNoCConfig extends Config(
  new constellation.soc.WithCbusNoC(constellation.protocol.TLNoCParams(
    constellation.protocol.DiplomaticNetworkNodeMapping(
      inNodeMapping = ListMap(
        "serial-tl" -> 0),
      outNodeMapping = ListMap(
        "error" -> 1, "l2[0]" -> 2, "pbus" -> 3, "plic" -> 4,
        "clint" -> 5, "dmInner" -> 6, "bootrom" -> 7, "tileClockGater" -> 8, "tileResetSetter" -> 9)),
    NoCParams(
      topology = TerminalRouter(BidirectionalLine(10)),
      channelParamGen = (a, b) => UserChannelParams(Seq.fill(5) { UserVirtualChannelParams(4) }),
      routingRelation = NonblockingVirtualSubnetworksRouting(TerminalRouterRouting(BidirectionalLineRouting()), 5, 1))
  )) ++
  new constellation.soc.WithMbusNoC(constellation.protocol.TLNoCParams(
    constellation.protocol.DiplomaticNetworkNodeMapping(
      inNodeMapping = ListMap(
        "L2 InclusiveCache[0]" -> 1, "L2 InclusiveCache[1]" -> 2,
        "L2 InclusiveCache[2]" -> 5, "L2 InclusiveCache[3]" -> 6),
      outNodeMapping = ListMap(
        "system[0]" -> 0, "system[1]" -> 3,  "system[2]" -> 4 , "system[3]" -> 7,
        "serdesser" -> 0)),
    NoCParams(
      topology        = TerminalRouter(BidirectionalTorus1D(8)),
      channelParamGen = (a, b) => UserChannelParams(Seq.fill(10) { UserVirtualChannelParams(4) }),
      routingRelation = BlockingVirtualSubnetworksRouting(TerminalRouterRouting(BidirectionalTorus1DShortestRouting()), 5, 2))
  )) ++
  new constellation.soc.WithSbusNoC(constellation.protocol.TLNoCParams(
    constellation.protocol.DiplomaticNetworkNodeMapping(
      inNodeMapping = ListMap(
        "Core 0" -> 1, "Core 1" -> 2,  "Core 2" -> 4 , "Core 3" -> 7,
        "Core 4" -> 8, "Core 5" -> 11, "Core 6" -> 13, "Core 7" -> 14,
        "serial-tl" -> 0),
      outNodeMapping = ListMap(
        "system[0]" -> 5, "system[1]" -> 6, "system[2]" -> 9, "system[3]" -> 10,
        "pbus" -> 3)),
    NoCParams(
      topology        = TerminalRouter(Mesh2D(4, 4)),
      channelParamGen = (a, b) => UserChannelParams(Seq.fill(8) { UserVirtualChannelParams(4) }),
      routingRelation = BlockingVirtualSubnetworksRouting(TerminalRouterRouting(Mesh2DEscapeRouting()), 5, 1))
  )) ++
  new freechips.rocketchip.subsystem.WithNBigCores(8) ++
  new freechips.rocketchip.subsystem.WithNBanks(4) ++
  new freechips.rocketchip.subsystem.WithNMemoryChannels(4) ++
  new chipyard.config.AbstractConfig
)

class Gemmini10ReRoCCOrigNoCConfig extends Config(
  new constellation.soc.WithSbusNoC(constellation.protocol.TLNoCParams(
    constellation.protocol.DiplomaticNetworkNodeMapping(
      inNodeMapping = ListMap(
        "serial-tl" -> 0,
        "Core 0" -> 20,
        "Core 1" -> 23,
        "Core 2" -> 24,
        "Core 3" -> 25,
        "Core 4" -> 26,
        "ReRoCC 0" -> 8,
        "ReRoCC 1" -> 9,
        "ReRoCC 2" -> 10,
        "ReRoCC 3" -> 11,
        "ReRoCC 4" -> 16,
        "ReRoCC 5" -> 17,
        "ReRoCC 6" -> 18,
        "ReRoCC 7" -> 19,
        "ReRoCC 8" -> 21,
        "ReRoCC 9" -> 22
      ),
      outNodeMapping = ListMap(
        "error" -> 0,
        "serdesser[0]" -> 4,
        "serdesser[1]" -> 5,
        "serdesser[2]" -> 6,
        "serdesser[3]" -> 7,
        "serdesser[4]" -> 12,
        "serdesser[5]" -> 13,
        "serdesser[6]" -> 14,
        "serdesser[7]" -> 15,
        "system[0]|" -> 0,
        "system[1]|" -> 1,
        "system[2]|" -> 2,
        "system[3]|" -> 3
      )),
    NoCParams(
      topology        = Mesh2D(7, 4),
      channelParamGen = (a, b) => UserChannelParams(Seq.fill(8) { UserVirtualChannelParams(4) },
        useOutputQueues = false),
      routingRelation = NonblockingVirtualSubnetworksRouting(Mesh2DEscapeRouting(), 5, 1))
    // NoCParams(
    //   topology        = TerminalRouter(Mesh2D(4, 4)),
    //   channelParamGen = (a, b) => UserChannelParams(Seq.fill(8) { UserVirtualChannelParams(4) },
    //     useOutputQueues = false),
    //   routingRelation = NonblockingVirtualSubnetworksRouting(TerminalRouterRouting(Mesh2DEscapeRouting()), 5, 1))
  )) ++
  new Gemmini10ReRoCCBaseConfig
)
class Gemmini10ReRoCCBaseConfig extends Config(
  //new chipyard.config.WithReRoCC(4, chipyard.rerocc.ReRoCCTileParams(dcacheParams=None, mergeTLNodes=true, l2TLBEntries=1024, l2TLBWays=4)) ++
  new chipyard.config.WithReRoCC(4, chipyard.rerocc.ReRoCCTileParams(l2TLBEntries=512, l2TLBWays=4, mergeTLNodes=true, dcacheParams=Some(DCacheParams(nWays=4, nSets=4)))) ++
  new gemmini.DummyDefaultGemminiConfig ++
  new gemmini.DummyDefaultGemminiConfig ++
  new gemmini.DummyDefaultGemminiConfig ++
  new gemmini.DummyDefaultGemminiConfig ++
  new gemmini.DummyDefaultGemminiConfig ++
  new gemmini.DummyDefaultGemminiConfig ++
  new gemmini.DummyDefaultGemminiConfig ++
  new gemmini.DummyDefaultGemminiConfig ++
  new gemmini.DummyDefaultGemminiConfig ++
  new gemmini.DummyDefaultGemminiConfig ++
  new freechips.rocketchip.subsystem.WithNBigCores(5) ++
  new chipyard.config.WithSystemBusWidth(128) ++
  new freechips.rocketchip.subsystem.WithExtMemSbusBypass ++
  new freechips.rocketchip.subsystem.WithNBanks(8) ++
  new freechips.rocketchip.subsystem.WithInclusiveCache(nWays=2, capacityKB=2048) ++ 
  new freechips.rocketchip.subsystem.WithNMemoryChannels(4) ++
  new `chipyard.config.AbstractConfig)`