Building a 24 bit size Cache using Logisim. The cache is in write back policy and LRU eviction policy. Each block have 4 bytes size, and 2 sets, 3 of ways(blocks per set) CPU address is 10 bits, and the parameter is value. The cache is consist of 6 main parts which are control path, ways, finite state machine, implantation, age, and set. Receiving 6 inputs and output 7 by each single clock cycle Using logisim