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<!DOCTYPE HTML>
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<h1>Machine Learning System (MLSys) Research</h1>
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<p>Machine learning has been widely used in a wide spectrum of modern application domains such as recommendation, computer vision, natural language processing, etc. The performance of inference is crucial to deploy pretrained models into production. With the development of new machine learning models
and hardware architectures, a set of new challenges emerge from efficient executing of inference jobs for both large models and small models. On the one hand, ultra-scale models pretraining becomes increasingly popular in recent years, while how to deploy these large models
efficiently onto hardware platforms with as minimum resource usage is still not well studied. On the other hand, small-scale models face the performance issues of non-computation overhead, which becomes an increasingly important factor for end-to-end performance with the boost of
computing power from both general-purpose (e.g., GPUs) and customised ML accelerators. At FSA, we are particularly interested in tackling the essential performance problems above for both extreme large-scale and small-scale models on a diverse range of hardware platforms. Our team has a unique capability of collaborating with
top industry research labs to use real-world enterprise scenarios to constrain and refine our solutions that can scale to millions of users. </p>
<p>Along with our top international academic and industry lab collaborators (Google Brain, Microsoft and Alibaba), FSA aims to explore principles and key technologies of multi-scale multi-dimensional machine learning inference system optimisation through cross-stack co-design (compiler, runtime and hardware accelerators).
The scope of our MLSys research includes but not limited to ML compiler design and optimisations, software-hardware co-design, runtime optimisation techniques, and customised acceleration for novel deep learning models. </p>
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<h2>Publications</h2>
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<li>AStitch: enabling a new multi-dimensional optimisation space for memory-intensive ML training and inference on modern SIMT architectures. <b>ASPLOS 2022.</b></li>
<li>Randomness In Neural Network Training: Characterising The Impact of Tooling, <b>MLSys 2022</b>, with Google Brain.</li>
<li> COMET: A Novel Memory-Efficient Deep Learning Training Framework by Using ErrorBounded Lossy Compression, <b>VLDB'22</b></li>
<li>MalFox:Camouflaged Adversarial Malware Example Generation Based on Conv-GANs Against Black-Box Detectors, <b>IEEE Transactions on Computers, 2022</b></li>
<li>Enabling Highly Efficient Capsule Networks Processing Through Software-Hardware Co-Design. <b>IEEE Transactions on Computers, 2021</b></li>
<li>ClickTrain: efficient and accurate end-to-end deep learning training via fine-grained architecture-preserving pruning. <b>ICS 2021.</b></li>
<li>η-LSTM: Co-Designing Highly-Efficient Large LSTM Training via Exploiting Memory-Saving and Architectural Design Opportunities. <b>ISCA 2021</b></li>
<li>Shift-BNN: Highly-Efficient Probabilistic Bayesian Neural Network Training via Memory-Friendly Pattern Retrieving. <b>MICRO 2021</b></li>
<li>MAPA: Multi-Accelerator Pattern Allocation Policy for Multi-Tenant GPU Servers, <b>SC 2021.</b></li>
<li>Toward efficient interactions between Python and native libraries, <b>ESEC/FSE’21.</b></li>
<li>A novel memory-efficient deep learning training framework via error-bounded lossy compression, <b>PPoPP'21</b></li>
<li> Enabling Highly Efficient Capsule Networks Processing Through A PIM-Based Architecture Design, <b>HPCA' 20.</b></li>
<li>BSTC: A Novel Binarized Soft Tensor Core Design for Accelerating Bit-Based Approximated Neural Nets, <b>SC 2019.</b></li>
<li> LP-BNN: Ultra low latency BNN inference with layer parallelism, <b>ASAP 2019.</b></li>
<li>SuperNeurons: Dynamic GPU Memory Management for Training Deep Neural Networks., <b>PPoPP 2018</b></li>
<li>NUMA-Caffe: NUMA-Aware Deep Learning Neural Networks, <b>TACO 2018</b></li>
<li>MIC-SVM: Designing A Highly Efficient Support Vector Machine For Advanced Modern Multi-Core and Many-Core Architectures, <b>IPDPS 2014</b></li>
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