Version 0.4.1 Release - 09/12/25
Changelog:
- Build configuration option settings (
FEAT_BYTES) are encoded in the ROM binary at offset E057H
- Option
POST_VID_HGC to display "HGC" (Hercules) if detected instead of "MDA" on POST (disabled by default)
- Option
RAM_TEST_NONE to disable RAM testing and clear (disabled by default)
- Option
KB_BUF_BDA to use BDA-set KB buffer pointers at 40:80H, otherwise hard-coded offsets (disabled by default)
- Fix: reset base address in FDC polling loop
- Fix: light pen calculation error in CGA mode 6
FDC_IPL_SW enabled by default on 5150
ROM standard builds
| Build |
Download |
Desc |
| Standard/Turbo |
8088, V20 |
Supports Turbo (standard Ctrl-Alt-+ speed switching), best choice for most systems. |
| XT 5160 |
8088, V20 |
Best for standard 4.77MHz XT/5160 or clone PCs. |
| PC 5150 |
8088, V20 |
Supports cassette, 5150 motherboard, 640 KiB memory and option ROMs. |
| ST-12 |
8088, V20 |
Juko ST-12 / UNIQUE UX-12 / TD3300A chipset |
Additional chipsets / platforms
| Build |
Download |
Desc |
| micro_8088 / NuXT 8088 |
Hi: F800 |
32K high F800 image with RTC support for use with UFLASH.EXE |
| micro_8088 / NuXT V20 only |
Hi: F800 |
32K high F800 image with RTC support for use with UFLASH.EXE |
NOTE: This is a minor release, where fixes only apply to issues related to very specific configurations and new options are disabled by default. For any other build types use the 0.4.0 releases.
