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[job] Strix Halo: multi-session serving (parallel or sequential) and long context, Flash-Next and the 27B #145

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@AzeezIsh

Status (updated 2026-10-28 05:30Z)

State: in progress. Flash-Next serves on Linux (framework, 96 GB carve-out) from main since #197 merged (c3774309e, 2026-10-27). Post-merge build and serve were verified on both boxes at 8863dc5e5.

Done / measured

  • Warm-turn slowdown root-caused.
    • ATLAS_HIP_MOE_GROUPED_MIN_TOKENS defaulted to 1024, so every short prefill chunk ran MoE experts per token.
    • Setting it to 64 makes warm agent turns ~4× faster and cached-prefix prefill ~9× faster (f46, f49).
    • ST-995 holds at 84.52/81.97 (f48).
  • Agentic, same build: 1024 scores 50/50, Σwall 15,441 s (f51). 64 scores 45/50 (f47) and 47/50 (f53), Σwall 10,689 s.
    • The 64 failures are all "no Cargo.toml was written", so 64 is not proposed.
    • 256 is under test.
  • Batched decode doesn't scale: steady C=8 is ~15 tok/s against Gufo's 125 (AR).
    • Cause: routed and shared MoE run per row in the mHC batched decode (f50).
    • The GB10 1–4-row kernel ported to HIP is bit-identical but no faster (f52), so it is parked.
  • ATLAS_QSA_VERIFY_ACTIVE=1 brings back MTP past the QSA bound on gfx1151: 8k/32k decode 12.1 → 18.9/18.0 tok/s (f55).

Queued (framework):

  • f56: agentic at 1024, second sample.
  • f57: agentic at 256.
  • f58: build the verify-active default branch and prove the flip.
  • f59: ST-995 at 256.

Local branches (push disabled in the operator clone; the owner pushes):

  • perf/hip-qsa-verify-active-default 88cffac78: ready.
  • fix/hip-moe-grouped-min-64 5f57b08cc: on hold; the value is likely to become 256.
  • perf/hip-qwen4exp-moe-decode 750a18bfb: parked.

Next: a gfx1151-shaped batched MoE decode kernel (expert dedup across rows plus int8 dot). It is the C>1 limiter.


Why: Flash-Next on Strix Halo is served one request at a time today.

Multi-session (tester ask, 2026-09-30): a 128 GB tester wants 2–3 agent sessions on one box, for Flash-Next or the 27B. Memory decides which shape is possible:

  • Parallel: batch 2–3. The 27B has room for it. Flash-Next on Windows sits close to the commit wall at batch 1.
  • Sequential: one session runs at a time, but every session's prefix KV and SSM snapshots stay resident, so returning to a session doesn't re-prefill its history. Today the Windows Flash-Next recipe runs --ssm-cache-slots 0 with no prefix caching, so every turn re-prefills. In the running Strix Halo Windows: Flash-Next port on main + MoE prefill transpose (2k TTFT ~2x) (supersedes #54) #80 perf leg that means 60+ s TTFT at 20k+ context.
  • Stretch: spill idle sessions' KV and SSM snapshots to NVMe and restore them on their next turn.

Done bar (the 128 GB box under Linux; Windows limits documented beside it):

  • C=8 greedy serving at ≥ 150 tok/s aggregate on short prompts, 0 faults, and no request refused for KV;
  • 128k context at C=1, with the memory plan written into the recipe;
  • C=2 on the agentic replay at 0 dropped turns, plus ST-995 unchanged (AGENTS.md platform rule);
  • 3 interleaved agent sessions at batch 1 (the sequential shape) on Flash-Next and on the 27B. A revisit turn must restore its session's cache rather than re-prefill: the restore shows in the serve log, and revisit TTFT is reported against the cold TTFT. The ssm-state-poisoning-gate must pass under the recipe that does it.

Plan, each step gated by the one before:

  1. Serve Flash-Next under Linux on the 128 GB box, using the same launcher modes as Windows. Record the memory map: weights, KV, SSM pools, snapshots, and how much headroom is left.
  2. Batched MoE decode and verify arms for 2–8 sequences × K rows, which also unblocks MTP at C ≥ 2.
  3. A KV/SSM pool plan for C=8 at 32k and for C=1 at 128k. Then a C = 1/2/4/8 sweep on greedy short prompts and the agentic replay at C=2.
  4. Sequential multi-session: size the snapshot pool and prefix cache for 3 resident sessions inside each platform's memory wall, then measure revisit TTFT. The NVMe spill of idle sessions comes after, if residency doesn't fit.

Related: #57 (the port), #58 (DFlash2 batched concurrency, GB10), #100, #130, and #146 (thinking switch, flag cleanup, memory auto-sizing).

Activity

  1. added
    jobA piece of work anyone can pick up. Shows on atlasinference.dev/#jobs
    on Sep 30, 2026
  2. changed the title [-][job] Qwen3.8-Flash-Next on Strix Halo: concurrency and long context[/-] [+][job] Strix Halo: multi-session serving (parallel or sequential) and long context, Flash-Next and the 27B[/+] on Oct 1, 2026
  3. AzeezIsh commented on Oct 9, 2026

    @AzeezIsh
    ContributorAuthor

    Unblocks multi-session and long context on winbox: the iGPU allocation went from 32 GB (~77 GB visible, ~63 GB usable) to 96 GB dedicated (107.9 GB HIP-visible) on 2026-10-09. Old KV and slot budgets measured on winbox are stale. Re-measure the commit ceiling before sizing. Details: #144 (comment)

  4. AzeezIsh commented on Oct 18, 2026

    @AzeezIsh
    ContributorAuthor

    Status update (2026-10-18, framework 128 GB / aizeez): Flash-Next now serves on Linux.

    Chain that works on integ/amd-train-suballoc-leak (train + fix/hip-suballoc-145 @ 969d28a, jobs f19/f20, bin 4ac55d80be57):

    • --gpu-memory-utilization 0.95 + ATLAS_HIP_SUBALLOC=1 (default on Linux) + --dangerously-allow-unresolved-kernel-lookups (hc_pre_down_mt isn't eager-registered on the strix-hip target — needs a real registration or the flag in the recipe).
    • Memory map: 91.2 GB budget; 85.9 GB pre-KV → 5.3 GB KV (14094 blocks × 12 layers). At util 0.90 it was 0.5 GB and died under probe; at ≤0.82 it refuses to build.
    • Probes all answered, 0 faults: 10k TTFT median 13.1 s, decode ~22 tok/s (single-shot, serve-amd.sh-adjacent fingerprint, max-seq 16384, MTP --num-drafts 1, thinking off).
    • Sequential multi-session mechanism demonstrated: prefix caching + 4 SSM slots — 7.5k-ctx revisit turns went 10.4 s → 0.7–0.8 s with restored=2 (the "restore, don't re-prefill" evidence this issue's done bar wants, at small scale).

    Also: the f17 "slabs leaked" FAIL was a test-bound bug, not a shim bug — the bound ignored the ~0.15 GB ROCm runtime pool (measured with SUBALLOC=0). Shim retention was already ≤1 slab/class on this path; now provably bounded regardless of free order (969d28ab2, branch fix/hip-suballoc-145 pushed). Strix s08: 27B outputs IDENTICAL with suballoc on vs off; nemotron golden 3/3 on framework.

    Still open here: full C=8/128k sweeps, batched MoE verify arms, and the kernel-audit registration for hc_pre_down_mt.

  5. AzeezIsh commented on Oct 19, 2026

    @AzeezIsh
    ContributorAuthor

    FP4 dtype survey on the AMD track (2026-10-18) — decided: stay on NVFP4.

    Looked at every FP4-family endpoint for these models on HF plus Atlas's loader support:

    • nvidia/Qwen3.8-Flash-Next-FP4-Local (~102 GB): routed experts are still NVFP4 (CSF scales); the delta is MXFP8 projections + F32 norms + 28.8 GB disk PLE. GB10 pre-KV ~93 GB. On framework (96 GB visible) that's ~0–4 GB KV at util 0.98 — fails the multi-session KV floor the NVFP4 pack meets (5.3 GB @0.95). Strix (60 GB) can't host it at all. Boot-boundary probe queued on framework as job f27 for the record.
    • MXFP4 endpoints: the only one for these models is FreedomAISVR/Qwen3.6-35B-A3B-MXFP4-MOE-GGUF — GGUF, and Atlas's GGUF path covers classic quants only (Q4_0…Q8_K; no MXFP4 block, no qwen3moe arch). Not servable.
    • Dtype economics on gfx1151 even if kernels existed: MXFP4 ≈ 0.53 B/weight vs NVFP4 ≈ 0.56 B/weight and E8M0 scales decode cheaper than E4M3+F32 two-level — real but single-digit decode-bandwidth gain; needs a new HIP decode kernel + loader + validation. Not justified while NVFP4+suballoc is green.
    • Portable pieces worth keeping from the fp4-local research: disk-backed PLE pattern, per-tensor-class format policy (experts vs projections), memory-budget admission. The strix-hip track already gets its wins from the NVFP4 tensor-core prefill / DP4A decode / suballocator line.

    Also: framework f22 landed the first FNext-on-Linux ST-995 — 84.12/82.33 (thinking default) + f24 TS2 84.32/82.97 — on integ/amd-train-suballoc-v2; f23 first Linux perf sweep ~22 tok/s MTP decode. 35B-A3B serve queued (f25): it refused on strix's 60 GB but fits framework's 96 GB — result overnight.

  6. AzeezIsh commented on Oct 20, 2026

    @AzeezIsh
    ContributorAuthor

    Overnight consolidated status — the docked wins (2026-10-19/20, both gfx1151 boxes).

    Now green on integ/strix-hip-train-v1 (= PR #197, the collapsed stack):

    • Builds clean on both boxes (bins 7e430d0a18dc / framework tv1) and on a fresh DevLab gfx1151 runner — where main itself fails (atlas_pdl.cuh + __ldcg on every kernel). So this stack is the difference between a buildable and un-buildable AMD target.
    • Output identity proven on all three models: 27B, 35B-A3B, and Flash-Next all bit-identical with suballoc on vs off (probes short/code/2k/10k, mean|dlp| 0.000).
    • First-ever Flash-Next on Linux: boots at util 0.95 w/ 5.3 GB KV, MTP decode ~22-23 tok/s, ST-995 84.12/82.33 + 84.32/82.97 thinking-on (f22/f24), warm prefix/SSM restore 0.7-0.8 s restored=2, C-sweep 22.0→35.9 agg tok/s at C=8, 0 faults.
    • First 35B-A3B serving on the 96 GB box: ~69-77 tok/s decode, output-identical (f25/f29).
    • ST-995 pair closed: reconciled arm 84.42/75.22 = s05 train exactly; main-fix baseline 84.32/74.59 = s06 exactly — the ~3-pt normalized dip vs old main ref is a stable train-lineage constant, not a suballoc artifact.
    • Nemotron golden 3/3 on the collapsed arm.

    FP4-Local-on-AMD — honest boundary + the viable path:

    • nvidia/Qwen3.8-Flash-Next-FP4-Local (~102 GB repo, ~93 GB pre-KV on GB10): cannot be staged on framework (74 GB free disk) or strix (58 GB total RAM < ~73 GB weights). Not a fit question — a capacity wall.
    • Its real dtype delta is MXFP8 projections (2× NVFP4 bytes) — wrong direction for a bandwidth-bound UMA part, and the quality edge (87.44 vs ~84.9) has no same-binary A/B.
    • What we did do: merged the FP4-Local branch onto the full collapsed train (integ/fp4local-hip-train, merge clean) — the live question is whether mxfp8_proj.cu survives the HIP mirror; that's building on framework now (f32). If it compiles, the port is viable; the checkpoint still isn't.
    • The genuinely promising AMD dtype direction remains NVFP4 + the DP4A/tensor-core path already shipping in this stack — the ~5% MXFP4-style scale-decode saving isn't worth a new kernel family while nothing servable exists in that format for these models.

    Flags for review: hc_pre_down_mt still rides --dangerously-allow-unresolved-kernel-lookups (needs eager registration); the s11 baseline serve died mid-bench once (retry clean — logged as flake).

  7. AzeezIsh commented on Oct 23, 2026

    @AzeezIsh
    ContributorAuthor

    Overnight verification ledger — every claim below is in ~/ovn-out/*/RESULTS.txt (strix + framework, job IDs noted).

    Build/portability

    • integ/strix-hip-train-v1 (= PR strix-hip train: the validated gfx1151 stack (build fix + suballoc + carveout + hipBLASLt) #197) builds on both gfx1151 boxes and the DevLab pool — main does not (atlas_pdl.cuh/__ldcg per-kernel; DevLab run 39105011577 vs branch 39105009616 PASS).
    • integ/fp4local-hip-train (fp4-local + train) builds on gfx1151 after one intrinsic shim (__float2bfloat16_rn) and serves the standard NVFP4 checkpoint clean — the port is viable; the checkpoint is not (102 GB repo, ~93 GB pre-KV; disk + KV-floor walls documented above).

    Output identity — suballoc on/off, all bit-identical (mean|dlp| 0.000): 27B (s13), 35B-A3B (f29), Flash-Next (f28).

    Accuracy (ST-995, thinking default unless noted)

    • Collapsed arm, 27B, strix: 84.42/75.22 — identical to pre-suballoc train ×2 (s05/s10/s14, triple-confirmed).
    • Collapsed arm, FNext, framework: 84.12/82.33 (f22), 84.32/82.97 (f24).
    • fp4l-arm FNext: 84.02/81.44 (f36) — merge holds parity.
    • 35B-A3B: 87.44/85.28 (f35) — first Linux serve + score; ~77 tok/s decode.
    • Baseline same-day pair: main-fix 84.32/74.59 (s11b) — the ~3-pt normalized dip vs the old-era ref is a stable train-lineage constant, not a suballoc or merge artifact.

    New capability gates

    • First-ever Flash-Next on Linux: util 0.95, 5.3 GB KV, MTP ~22-23 tok/s, warm restore 0.7-0.8 s restored=2, C-sweep 22→35.9 agg tok/s (f26), 0 faults.
    • First 35B serving on the 96 GB box (f25/f29); refuses on the 60 GB box at every util to 0.92 (s15) — hard memory wall.
    • Nemotron golden 3/3 on the collapsed arm (f30, framework).

    Shortcomings measured (not yet fixed)

    • Prefill vs Gufo (~1,628 tok/s ref): FNext 795-894 tok/s at 2-8k ISL — ~2× steady-state gap; dense 27B ~216 tok/s at 8k — ~7.5× gap.
    • Fixed per-request overhead ~8.5 s at small ISL (9.5 s wall for 811 prompt tokens) — bisect legs queued (f38/s20).

    Infra bugs found & worked around tonight: f24 watchdog-subshell held queue.lock forever (leaked pgid); two zombie claims from dispatcher-death-mid-claim (f25, s11); f30's nemotron-scoped build clobbered tv1's full-model binary; nemotron script's VRAM < 90 GiB preflight is wrong for the APU (4 GiB dedicated + GTT).

  8. AzeezIsh commented on Oct 23, 2026

    @AzeezIsh
    ContributorAuthor

    Prefill shortcoming localized (f37/f38/f39, framework + strix). The ~9.4 s TTFT at ~1k ISL on Flash-Next is not a fixed warmup — short reqs run 0.26-0.31 s while every ~1k req costs ~9.4 s, and the request-window log is wall-to-wall MTP drafter context: prefill=ON carry=ON repeating every ~200-800 ms (TTFT=9427.9 ms for an 812-tok prompt, mean_na=0). The drafter-context init appears to re-execute per chunk/step and dominate small-mid ISL prefill. A/B queued: f40 = same requests with ATLAS_NO_MTP_DRAFTER_CONTEXT=0/1 at ISL 900 + 8192 — if the 9.4 s collapses, that's the kernel-dispatch defect. Dense-27B strix: ~216-284 tok/s vs Gufo ~1,628 — the bigger ~7.5x gap.

  9. AzeezIsh commented on Oct 27, 2026

    @AzeezIsh
    ContributorAuthor

    2026-10-27 update: the ~1k-token TTFT scare is withdrawn. The cache-resume path has a real slowdown.

    1. Correction to my 10-23 comment: the drafter context is not a prefill cost.

    • framework f40 ran the same 1.2k / 11k prompts with ATLAS_NO_MTP_DRAFTER_CONTEXT=0 and =1, on the tv1 binary. The results are identical either way:
    drafter context 1,248 tok 11,299 tok
    =0 1.37 s (910 tok/s) 15.20 s (744 tok/s)
    =1 1.36 s (920 tok/s) 15.21 s (743 tok/s)
    • f39's 9.4 s was a RUST_LOG=debug run. Its "drafter context re-runs per chunk" lines are a log flood, not repeated work. The attention-projection prefill GEMM calls ModelLevers::from_env() on every launch (qwen3_attention/prefill_weights.rs:44), and from_env() logs the drafter-context and GDN-deferred-commit lines each time. One info-level bench produced 1,218 of them.
    • Fix: local branch fix/levers-per-launch-log (d9a09f44f, off main). It adds a one-field accessor and makes no behaviour change. It is not pushed yet.

    2. New finding: resuming from a Marconi snapshot is ~13× slower than cold prefill (framework f41, Flash-Next NVFP4, b9ab4ed54 = main + #197 + #204).

    • Cold, 1,838 tokens: TTFT 2.6 s.
    • Warm hit (Marconi SSM cache hit: 7344 tokens skipped … replaying 1867 SSM tokens to reach 9211): TTFT 34.8 s, about 54 tok/s on the 1,867 new tokens. A second repetition read 35.0 s.
    • The log cadence shows two passes over the 12 attention layers at ~1.3 s per layer. Cold prefill runs at ~0.25 s per layer.
    • Every warm agent turn takes this path, so it outranks the cold-prefill gap for [job] Strix Halo: multi-session serving (parallel or sequential) and long context, Flash-Next and the 27B #145's multi-session and agentic goals.
    • The 27B on strix degrades less: s21 measured 307 tok/s at depth 0 and 185 tok/s at 8k depth.
    • Queued: per-kernel SYNC traces of resume vs cold (framework f42, strix s22). After those, the first Linux Flash-Next agentic soak (f44), which gives the "before" number for the fix.

    3. Gufo-matched baselines are running (greedy, thinking off, pp2048/tg128, cached depths, C = 1/2/4/8; both Gufo's sum-of-rates and the wall aggregate): f41 (Flash-Next: AR / MTP1 / MTP2) and s21 (27B: AR / MTP / DFlash2). First rows:

    pp d0 AR tg
    Flash-Next 725 tok/s 12.2 tok/s (Gufo: 1,801 / 28.3)
    27B 307 tok/s 10.5 tok/s (Gufo: 635 / 12.4)

    The full tables will go here when the jobs finish. The local ledger is at ~/code/notes/amd-campaign-2026-10-27/LEDGER.md on the operator Mac.

  10. AzeezIsh commented on Oct 27, 2026

    @AzeezIsh
    ContributorAuthor

    Root cause of the Flash-Next warm-turn slowdown: a stale HIP MoE threshold sends any chunk under 1,024 rows through the per-token expert path. Framework f42, SYNC launch trace, Flash-Next NVFP4, b9ab4ed54.

    What the trace shows (6,575-token prefill, GPU 14.7 s):

    • moe_expert_gate_up_shared_t + moe_expert_silu_down_shared_t, the decode GEMVs, take 7.1 s.
    • All of them come from the final 423-token chunk (6152→6575, split at the 6544 checkpoint into 392 + 31). That chunk launches 18,816 + 1,488 = 423 × 48 per-token calls and zero grouped-GEMM calls.
    • The 1,906-token resume: same pair, 4.2 s of 7.1 s GPU.
    • Cold 1,886 tokens: only 0.5 s. Only the 30-token piece after the checkpoint goes per-token.

    Cause (layers/moe/forward_prefill.rs:108-134):

    • On HIP, NVFP4 MoE prefill below ATLAS_HIP_MOE_GROUPED_MIN_TOKENS (default 1024) goes to forward_batched, which dispatches experts per token.
    • The default comes from a winbox measurement on 2026-09-20 (914f9ad), taken while a grouped call cost ~15 ms almost regardless of N.
    • That predates strix-hip: F16-operand prefill GEMM twins (exact NVFP4/FP8 dequant) for dense m128, routed MoE, w8a16 #155's F16 grouped twins. The fused gate_up now costs ~7.9 ms a layer for an 1,856-row chunk.
    • The BF16 and FP8 arms right above it use > 64.
    • A warm agent turn usually adds a few hundred tokens, so nearly every turn lands on the slow path.

    Being measured now (framework, the threshold is an env var, so no rebuild):

    • f46 sweeps the threshold over 1024 / 256 / 128 / 64 / 32. For each value it records cold TTFT for 20 to 1,900 new tokens, two resume cases (+300 and +1,900 on a 6.5k prefix), and greedy-output identity against 1024.
    • f47 and f48 then run the agentic soak and ST-995 at the chosen threshold.
    • If it holds, the fix is a one-line default change, with the numbers attached.

    Side results:

    • 27B (strix s22): resume behaves, 9.7 s vs 7.2 s cold, because the 27B has no MoE. Its prefill is GEMM-rate-bound: w4a16 FFN + w8a16 projections are 77% of GPU time at ~14 TF/s effective. Tracked in [job] Qwen3.8-27B on Strix Halo: prefill 2.4x gap + DP4A verify tiers for K=5..9 #72.
    • f41 also showed that Flash-Next MTP turns off past the QSA bound. At 8k and 32k depth, the MTP arms decode at AR speed (12.1 tok/s). This is the known by-design limit; Gufo holds ~40 tok/s with MTP at 32k.
    • Concurrency rows from f41/s21 are withdrawn as Gufo-comparable. Gufo prefills every session before timing decode, and my client timed each request from its own first token, so other users' prefills were counted as decode time. The client now reports the steady window in which all C requests are decoding. The rows will be re-run.
    • FP8 GDN (f43) can't run on strix-hip yet: the load-time quantizer quantize_bf16_to_fp8_blockscaled has no HIP build. NVFP4 GDN doesn't fit (94.2 GB committed before KV). Details in [job] Qwen3.8-Flash-Next on Strix Halo: decode speed (serial and MTP) #143 to follow.
  11. AzeezIsh commented on Oct 27, 2026

    @AzeezIsh
    ContributorAuthor

    Fix measured: the HIP MoE grouped-GEMM threshold 1024 → 64 makes warm agent turns 4× faster. Framework f46, Flash-Next NVFP4, b9ab4ed54, MTP1, prefix caching on. The threshold is an environment variable, so this used the same binary at every value.

    Cold TTFT (best of 2) at each ATLAS_HIP_MOE_GROUPED_MIN_TOKENS value:

    prompt tok 1024 (current) 256 128 64 32
    34 0.77 s 0.75 0.75 0.75 0.75
    59 1.08 1.08 1.08 1.08 0.67
    132 2.50 2.49 2.49 0.81 0.80
    253 4.63 4.62 1.06 1.07 1.07
    470 8.36 1.06 1.06 1.09 1.06
    649 11.61 1.30 1.29 1.31 1.29
    1035 1.71 1.74 1.73 1.70 1.72
    1676 2.40 2.42 2.42 2.40 2.41

    Marconi resume on a ~6.1k prefix:

    • +300 new tokens: 5.76 → 1.36 s.
    • +1,900 new tokens: 8.88 → 3.38 s.

    Greedy output: every value below 1024 gives the same 96-token answer, and it differs from the 1024 answer by one word ("linking" → "combining"). Short prefills now use the same grouped arithmetic that every prompt of 1,024+ tokens already used, so this is a numerics change, not a new code path.

    Gates: framework f47 (agentic-webserver, 50 iterations) and f48 (ST-995, same profile as f05's 84.12/81.47) both run at 64. f47 was already running at 64; f48 reads the value from a file, now set to 64 to match. 32 wins only at 59 tokens and is left as a follow-up.

    Code: local branch fix/hip-moe-grouped-min-64 (10a902576), based on integ/strix-hip-train-v1, so it can ride #197 or follow it. It changes one default plus the comment. It is HIP-only behind cfg!(atlas_hip), so NVIDIA is byte-unchanged. It also covers the other NVFP4 MoE models on HIP (35B-A3B, Nemotron Super). Not pushed: push is disabled in this clone, so the owner pushes it.

  12. AzeezIsh commented on Oct 27, 2026

    @AzeezIsh
    ContributorAuthor

    First Flash-Next agentic soak on Linux, run at the new MoE threshold (64). framework f47, b9ab4ed54, ATLAS_HIP_MOE_GROUPED_MIN_TOKENS=64, MTP1, prefix caching on, thinking at the checkpoint default. Record run-1793094528039258410.

    Pass rate:

    • webserver_ok 45/50, followed_directions 47/50.
    • Failures:
      • 3× "no Cargo.toml was written" (iterations 20, 26, 49). I read these as model behaviour; that's an inference.
      • 1× "/ping did not answer 'pong' within 30 s" (iteration 41).

    Timing:

    • Σwall 10,689 s. Per iteration: median 173 s, max 908 s.
    • TTFT over 546 turns: median 1.21 s, p90 5.09 s, max 12.8 s.
    • 471 Marconi hits, 71 no-snapshot recomputes, 0 faults.

    Caveats:

    • This bench has no Flash-Next thresholds, so the FAIL label is the harness default, not a gate.
    • These failures can't be attributed to the threshold change yet. For reference, the 27B on strix scored 50/50 at Σwall 9,379 s (s19).
    • The same-build baseline at 1024 is queued as framework f51. That gives a like-for-like A/B on pass rate and Σwall.
    • ST-995 at 64 is running now (f48; f05 reference 84.12/81.47).
  13. AzeezIsh commented on Oct 27, 2026

    @AzeezIsh
    ContributorAuthor

    The MoE threshold fix (1024 → 64) holds accuracy and makes cached-prefix prefill ~9× faster. Framework, Flash-Next NVFP4, b9ab4ed54.

    ST-995, thinking at the checkpoint default, f05 profile (f48, run-1793110320484201600):

    ATLAS_HIP_MOE_GROUPED_MIN_TOKENS overall normalized job
    1024 (current default) 84.12 81.47 f05
    64 84.52 81.97 f48

    The +0.4 / +0.5 difference is within run-to-run noise for this leg. Read it as "no regression", not as a gain. 0 faults.

    Gufo-matched prefill of ~1,850 new tokens on a cached prefix, AR (f49 vs f41, same build and serve flags):

    depth 1024 64
    0 725 tok/s 726
    8,192 53 499
    32,768 147 470

    Decode is unchanged (12.1–12.4 tok/s AR), as expected; this fix only touches prefill.

    Gates at 64:

    For context against Gufo: its Flash-Next pp at 8k depth is 1,721 tok/s; ours is now 499. Cold pp at depth 0 is 726 against 1,801. The remaining prefill gap is kernel throughput, tracked in #144.

  14. AzeezIsh commented on Oct 27, 2026

    @AzeezIsh
    ContributorAuthor

    Same-build agentic A/B for the HIP MoE threshold: 64 cuts Σwall 31% and median TTFT 4.2×. The pass rate needs a replicate before the fix merges. Framework, Flash-Next NVFP4, b9ab4ed54, MTP1, prefix caching on, thinking at the checkpoint default, 50 iterations each.

    ATLAS_HIP_MOE_GROUPED_MIN_TOKENS webserver_ok directions Σwall TTFT median / p90 / max Marconi hits record
    1024 (main today, f51) 50/50 50/50 15,441 s 5.08 / 11.37 / 28.5 s 540 run-1793128371095495787
    64 (f47) 45/50 47/50 10,689 s 1.21 / 5.09 / 12.8 s 471 run-1793094528039258410

    Both arms ran with 0 faults.

    Speed: the win is unambiguous. It matches the per-request sweep in f46.

    Pass rate: 45 vs 50, from one run per arm.

    • f47's failures are 3× "no Cargo.toml was written" and 1× /ping timeout.
    • At 64, the only change is the arithmetic of short prefills, which now use the grouped path long prompts already used. ST-995 at 64 holds: 84.52/81.97 vs 84.12/81.47.
    • So noise is plausible. That is an inference, and one pair of runs can't separate noise from a real effect.

    Replicate: f53, same build, threshold 64 plus ATLAS_QWEN4EXP_MOE_FAST=1.

    • If f52 confirms that the fast MoE kernel is bit-identical, f53's numerics equal f47's, so it doubles as the replicate.
    • If f53 also lands below 50, the threshold doesn't go in as-is. I'd then sweep 128/256, which keep most of the TTFT win per f46.
  15. AzeezIsh commented on Oct 28, 2026

    @AzeezIsh
    ContributorAuthor

    MoE threshold 64: the replicate confirms the pass-rate gap, so the fix is not merge-ready as-is. Framework, Flash-Next NVFP4, agentic-webserver, 50 iterations.

    threshold run webserver_ok directions Σwall TTFT median failure type
    1024 f51 run-1793128371095495787 50/50 50/50 15,441 s 5.08 s —
    64 f47 run-1793094528039258410 45/50 47/50 10,689 s 1.21 s 3× "no Cargo.toml was written", 1× /ping timeout
    64 (+ MOE_FAST=1, bit-identical per f52) f53 run-1793144150427619787 47/50 46/50 (not comparable: slower kernel) 1.59 s 3× "no Cargo.toml was written"

    Reading:

    • Both runs at 64 land below 50/50.
    • Every failure in them is the same harness check, wrote_project. The single 1024 run has none.
    • This is suggestive, not proven: one 1024 sample against two at 64.
    • ST-995 at 64 is fine (84.52/81.97). So the effect, if real, is on long multi-turn tool trajectories. Plausibly the changed short-prefill numerics shift a turn-boundary decision; that is an inference, not measured.

    Queued on framework, ~8 h:

    • f56: a second 1024 sample, to size the noise.
    • f57: threshold 256. Per f46, 256 keeps the ≥256-token TTFT win (470 → 1.06 s, 649 → 1.30 s) and leaves shorter chunks on the old path.

    Decision: if f57 holds 50/50, the proposed default becomes 256, not 64. Branch fix/hip-moe-grouped-min-64 stays unproposed until then.

  16. AzeezIsh commented on Oct 28, 2026

    @AzeezIsh
    ContributorAuthor

    HIP MoE grouped-GEMM threshold: 256 is the value to ship. It keeps most of the warm-turn win with no agentic regression. Framework, Flash-Next NVFP4, agentic-webserver, 50 iterations, MTP1, prefix caching on, thinking at the checkpoint default.

    ATLAS_HIP_MOE_GROUPED_MIN_TOKENS run webserver_ok directions Σwall TTFT median / p90 failure types
    1024 (main) f51 run-1793128371095495787 50/50 50/50 15,441 s 5.08 / 11.37 s —
    64 f47 run-1793094528039258410 45/50 47/50 10,689 s 1.21 / 5.09 s 3× no Cargo.toml, 1× /ping
    64 (bit-identical numerics, f52) f53 run-1793144150427619787 47/50 46/50 — 1.59 / 5.44 s 3× no Cargo.toml
    256 f57 run-1793178905812470578 49/50 50/50 13,049 s (−15.5%) 3.65 / 5.13 s 1× /ping timeout

    Reading:

    • Both 64 runs fail the same check, wrote_project. Neither the 1024 run nor the 256 run fails it.
    • My inference: the change in numerics for 64–255-row chunks shifts something in long tool trajectories. ST-995 at 64 was fine (84.52/81.97), so this shows up only in multi-turn agentic runs.
    • 256 keeps the large-chunk win: cold TTFT at 470 tokens 8.36 → 1.06 s, at 649 tokens 11.61 → 1.30 s (f46). Shorter chunks stay on the old path.

    Code: local branch fix/hip-moe-grouped-min-256 (909dc8b20, rebased onto main 8863dc5e5). It is a one-line HIP-only default change with the evidence in the comment, and it keeps #188's cfg(test) default of 1. ST-995 at 256 is queued (f59). If that holds, the branch is ready for the owner to push.

  17. AzeezIsh commented on Oct 28, 2026

    @AzeezIsh
    ContributorAuthor

    ST-995 holds at ATLAS_HIP_MOE_GROUPED_MIN_TOKENS=256 on Flash-Next (framework f59). Thinking default, prefix cache per recipe, record run-1793198886445328519.json.

    threshold overall normalized single-turn
    256 (f59, this fix) 84.32% 82.22%
    1024 (f05, old default) 84.12% 81.47%
    64 (f48) 84.52% 81.97%

    256 is within the 64↔1024 spread on both metrics. It was chosen because 64 caused the agentic "no Cargo.toml" failures and 1024 sent warm turns through the per-token MoE path. Faults: 0 errors, 0 panics, 0 illegal, 0 watchdog.

    Branch fix/hip-moe-grouped-min-256 909dc8b20 is ready for the owner to push (push is disabled in this clone). It changes one line of default in crates/spark-model/src/layers/moe/forward_prefill.rs, .unwrap_or(if cfg!(test) { 1 } else { 256 }), with the evidence in the comment.

  18. AzeezIsh commented on Oct 29, 2026

    @AzeezIsh
    ContributorAuthor

    Flash-Next --max-prefill-tokens 8192: agentic pass rate holds, but agentic TTFT gets slightly worse, so the default stays at 2048 (framework f74 / f75). agentic-webserver, 50 iterations, perf/hip-qsa-attn-tc2 62e4d801d (tc2 on, MIN=256), --max-seq-len 40960, prefix cache ON, thinking default. Matched pair, differing only in chunk size:

    --max-prefill-tokens webserver_ok followed_directions TTFT median / p90 record
    2048 (f74) 48/50 48/50 3,254 / 5,006 ms run-1793246850093767652
    8192 (f75) 48/50 48/50 3,511 / 5,598 ms run-1793264442604964401

    Cold long prefills are 9–12% faster at 8192 (f69), and accuracy is unaffected (f70 ppl + needles, now this agentic pair). But warm multi-turn TTFT is slightly worse (+8% median, +12% p90), probably because prefix-cached suffixes don't benefit from bigger chunks while a bigger chunk holds the GPU longer. Neutral-or-worse doesn't change a default: 2048 stays the default; 8192 is a documented option for long single-shot documents.

    (The first control, f72 at --max-seq-len 32768, aborted at run 23/50 when an agent reached a 24,930-token prompt + max_tokens 8192. That's why the pair was rerun at 40960.)

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