[AzeezIsh]

What

batched_embed_nvfp4 (added by #195 in kernels/gb10/common/embed_from_argmax.cu) calls __float2bfloat16_rn. HIP has no _rn variant, and this .cu is symlinked into the strix-hip targets, so main stops building for gfx1151. __float2bfloat16 rounds to nearest even on both CUDA and HIP, so the output does not change.

This is the second strix-hip break on main. The first is #174's atlas_pdl.cuh and friends, which #197 fixes. AMD needs both.

The other _rn call sites are only in GB10-only targets. I checked that none of them are symlinked into strix-hip.

Verified

• GB10 (sparky), main 504063a + this commit, FP4-Local, recipe profile (r1short, prefix caching on):
  • BFCL golden ST-995: 87.44 / 87.32, identical to the pre-merge qwen4_exp: serve NVIDIA's Qwen3.8-Flash-Next FP4-Local on its native formats (one GB10) #195 records (run-1792664799374893012).
  • agentic-webserver, 50 iterations: 50/50 webserver_ok, 50/50 followed_directions, 12.43 s/turn (run-1792654228906033074).
• strix-hip (framework, gfx1151), main + strix-hip train: the validated gfx1151 stack (build fix + suballoc + carveout + hipBLASLt) #197 + this commit: builds, and the embed_from_argmax code objects are emitted for t0/t3/t4. Without this commit the build fails on __float2bfloat16_rn.
• strix, strix-hip train: the validated gfx1151 stack (build fix + suballoc + carveout + hipBLASLt) #197 + this commit, Qwen3.8-27B-NVFP4: agentic-webserver 50/50, 50/50, 18.7 s/turn.

🤖 Generated with Claude Code

[AzeezIsh]

AMD train candidate gate: main 504063a + #197 + #204 (merged as b9ab4ed54), on strix (gfx1151, 64 GB):

• All strix-hip models build.
• BFCL golden ST-995 on nvidia/Qwen3.8-27B-NVFP4: 84.12 / 74.65 (n=995, run-1792775551367679462, 0 ERROR / panic / illegal / watchdog).
• Profile: s14/s19 (DFlash γ=8, GPU_UTIL 0.82, max-seq-len 26624, prefix caching on).
• The s14 reference on the same profile, on strix-hip train: the validated gfx1151 stack (build fix + suballoc + carveout + hipBLASLt) #197's head before qwen4_exp: serve NVIDIA's Qwen3.8-Flash-Next FP4-Local on its native formats (one GB10) #195 merged, was 84.42 / 75.22. The difference (−0.30 / −0.57) is about 3 samples, within the cross-build variance seen elsewhere today.
• Earlier on the same stack: agentic-webserver 50/50, 50/50, 18.7 s/turn.

So #204 together with #197 gives AMD a working main with no accuracy regression. A Flash-Next NVFP4 regression check of #195 on framework is still running.

🤖 Generated with Claude Code