[Bug] `<> DFRET` method reading an `RTRegion` member crashes elaboration with `NoSuchElementException: key not found: "OW_..."`

[soronpo]

Minimal repro (executed and confirmed)

import dfhdl.*
import dfhdl.hw.constraints.timing

@timing.reset(mode = _.async, active = _.low, portName = "rst_l")
class probe4 extends RTDesign:
  val active = new RTDerivedClkDomain {}
  val x = Bit <> IN
  val y = Bit <> OUT
  val r = new active.RTRegion:
    val q = Bit <> VAR.REG init 0
    q.din := x
  import r.q
  def f(a: Bit <> VAL): Bit <> DFRET = a & q
  y <> f(x)

Compiled via scala-cli with -M probe4 -- commit.

Expected behavior

Elaborates and commits; f inlines a & q (a design-scope read of the region's register), the same as writing y <> x & q directly — which works.

Actual behavior

Elaboration crashes:

Exception in thread "main" java.util.NoSuchElementException: key not found: "OW_e03a6f63_0_12"
	at scala.collection.immutable.BitmapIndexedMapNode.apply(HashMap.scala:678)
	...
	at dfhdl.compiler.ir.DB$getSet$.apply(DB.scala:54)
	at dfhdl.compiler.ir.DFRef.get(DFRef.scala:13)
	at dfhdl.compiler.ir.DFRef$OneWay$Gen.get(DFRef.scala:28)
	at dfhdl.compiler.ir.DFMember.getOwner(DFMember.scala:25)
	at dfhdl.compiler.ir.DFMember.getOwnerDesign(DFMember.scala:41)
	at dfhdl.compiler.ir.DFMember.isSameOwnerDesignAs(DFMember.scala:76)
	at dfhdl.compiler.ir.DB.$anonfun$36$$anonfun$2(DB.scala:1994)
	at dfhdl.compiler.ir.DB.directRefCheck(DB.scala:1974)
	at dfhdl.compiler.ir.DB.subDBCheck$lzyINIT1(DB.scala:2167)
	at dfhdl.compiler.ir.DB.check$lzyINIT1$$anonfun$1(DB.scala:2157)
	at dfhdl.core.Design.onCreateEnd(Design.scala:236)

What narrows it

• The same method reading a design-scope VAR.REG (no region) elaborates fine.
• The same region read written inline at design scope (no DFRET method) elaborates fine — that combination is the documented domain-and-regions pattern from the verilog-to-dfhdl skill.
• Only the combination — a <> DFRET method whose body reads a member of an RTRegion (reached via import) — crashes.

Hit while translating VeeR-EH1's dec_gpr_ctl (read mux as a DFRET helper reading the active region's gpr_bank_id). Workaround: inline the logic with an elaboration loop instead of a DFRET method.

DFHDL version

0.22.0+144-b39c45a4-SNAPSHOT (training branch, head b39c45a)

[soronpo]

Fixed in #500