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- Add GemminiBall Architecture guide: instruction routing, funct7 encoding, configuration and execution paths - Add Verilator Simulation and CI guide: clock handling improvements, memory configuration, test execution - Add Development Workflow and Build System guide: Nix setup, bbdev tool usage, common tasks - Update .order.json to include new Guide section - Sync both English and Chinese documentation Co-authored-by: Shiroha <whmio0115@gmail.com>
… GemminiBall enhancements - Add comprehensive Goban documentation (en and zh) covering: - Multi-core BBTile architecture and synchronization primitives - BarrierUnit hardware synchronization support - SPMD programming model with examples - Configuration variants (1-tile, 2-tile) - Test workloads (barrier tests) - Update GemminiBall Architecture documentation (en and zh): - Document funct7 encoding with bank enable bits [6:4] - Add new instructions: IM2COL, TRANSPOSE, RELU, QUANT, DEQUANT, MATMUL_WARP16 - Clarify loop configuration and execution paths - Reference recent loop unroller enhancements Addresses missing Goban documentation reported in PR comments. Co-authored-by: Shiroha <whmio0115@gmail.com>
…ion info - Add Goban configuration options (BuckyballGobanVerilatorConfig, BuckyballGoban2TileVerilatorConfig) - Include example Goban barrier test command - Add reference link to Goban Multi-Core Architecture documentation - Update both en and zh versions Co-authored-by: Shiroha <whmio0115@gmail.com>
- Add Architecture & Key Concepts section in both en and zh Overview - Document core components: Ball, Blink, BBTile, BarrierUnit - Reference Toy and Goban configuration models - Add Goban barrier test example to Quick Start - Link to detailed architecture guides (ISA, GemminiBall, Goban) Co-authored-by: Shiroha <whmio0115@gmail.com>
- Update funct7 encoding scheme from simple sequence to structured [6:4]=enable + [3:0]=opcode - Revise instruction table with all new funct7 values (0, 1, 2, 3, 4, 16, 32-105) - Add Gemmini loop instructions documentation (LOOP_WS and LOOP_CONV_WS) - Add barrier instruction (bb_barrier) - Update both zh and en locales in sync - Add deprecation notice for legacy funct7 values in instruction details sections Co-authored-by: Shiroha <whmio0115@gmail.com>
…ISA encoding - Update funct7 example from 38 to 50 with new enable+opcode scheme - Add note about ISA encoding specification update - Add reference to new Goban multi-core architecture - Clarify that tutorial uses single-core Toy configuration as example Co-authored-by: Shiroha <whmio0115@gmail.com>
… latest ISA - Update funct7 example from 38 to 50 with structured encoding scheme - Add note about recent ISA specification update - Reference Goban multi-core architecture documentation - Maintain consistency with Chinese version Co-authored-by: Shiroha <whmio0115@gmail.com>
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Update Buckyball ISA encoding, add new GemminiBall instructions, and revise hardware design tutorial to reflect recent codebase changes.
Recent
buckyballcommits (e.g.,8bd6970and49b1ac1) introduced a significant change to the ISAfunct7encoding scheme and new GemminiBall loop instructions. This PR updates the documentation to align with these architectural shifts and provides a warning about the new Goban multi-core architecture.Docs added or updated:
content/en/Overview/Buckyball ISA.mdcontent/zh/Overview/Buckyball ISA.mdcontent/en/Tutorial/Building Your Own Hardware Designs.mdcontent/zh/Tutorial/Building Your Own Hardware Designs.mdBuckyball codepaths or areas they cover:
Key knowledge gaps addressed:
funct7encoding scheme in ISA tables and examples.LOOP_WSandLOOP_CONV_WSinstructions.