data(cpu): recover 210 CPUs the earlier batches skipped on naming mismatches - #137
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…kipped Recovers records that the merged batches (#132-#135) left untouched because of three separate mismatches in how the pages name things, not because the data was unavailable: - model codes are not always digit-first (Core 2 uses E6600, Atom uses N270), and the table parser required a leading digit; - the Atom page is built entirely from {{cpulist}} templates and had never been run through that parser; - the Opteron page lists a bare model-number column with no branding column, so the family name now comes from the page itself. Same confirm-before-write rule as before (base clock within 0.05 GHz, TDP within 1 W, L3 must be a real capacity and must not equal the row's TDP): 1,610 rows parsed, 1,053 matched a record, 885 passed, 210 still had a gap to fill. Verified against known parts: Clarkdale i5-6xx/i3-5xx 32 nm, Haswell i7-4770R 22 nm, Broadwell i7-5775R 14 nm, Atom 330/D410 45 nm, Atom D2500 32 nm, Opteron Shanghai 6 MB L3. Older families whose rows failed the cross-check (Core 2 E-series, Atom N270, early Opteron) were left empty rather than guessed. Refs #1
Regenerates site/public/v1/cpus for the 210 records changed in the previous commit, with the engine at the pinned submodule commit. Only pages whose content actually differs are committed; 7,745 timestamp-only pages are left alone. Refs #1
🔎 Data verification — Tier 0 (offline existence/trust)Scored by Changed records in this PR210 record(s) scored. %%{init: {"theme":"base","themeVariables":{"pie1":"#3fb950","pie2":"#d29922","pie3":"#f85149","pieStrokeWidth":"0px","pieOpacity":"1"}}}%%
pie showData
title Verification bands — all records
"Green" : 210
"Yellow" : 0
"Red" : 0
Full-dataset baseline105742 record(s) scored. %%{init: {"theme":"base","themeVariables":{"pie1":"#3fb950","pie2":"#d29922","pie3":"#f85149","pieStrokeWidth":"0px","pieOpacity":"1"}}}%%
pie showData
title Verification bands — all records
"Green" : 14778
"Yellow" : 89175
"Red" : 1789
Hard violations (forced red):
green = authoritative source + complete + consistent · yellow = plausible, needs confirmation · red = sparse/weak source or a hard contradiction. Promotion to |
TechEngine change review: PASS
Changed data
Changed record examples
Heuristic review
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TechEngine validation stats: PASS
Data summary
Warning Tracked verified coverage is below 50% for watch 2.5% (11/433), brand 4.8% (10/207), tablet 5.0% (174/3455), soc 5.8% (123/2104), smartphone 9.1% (8453/93396), all 9.5% (10028/105742), gpu 12.0% (244/2030), pda 19.3% (27/140), and 1 more. Validation notes
Key output:
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What
210 records / 240 fields (
process_node205,l3_cache_mb35). CPUprocess_nodecoverage 56% → 61%,l3_cache_mb54% → 55%.Why these were missed, not missing
After #132–#135 merged, 1,737 CPUs still had no
process_node— and several whole families sat at 0% filled (A-Series 213/213, Ryzen 125/125, Core 2 124/124, Opteron 103/103, Atom 78/78). That looked like absent data. It wasn't; it was three naming mismatches:E6600/Q6600and Atom'sN270/Z530were discarded before any matching happened.{{cpulist}}templates — and had only ever been run through the table parser.Correctness
1,610 rows parsed → 1,053 matched a record → 885 passed the cross-check → 210 still had a gap to fill. Same rules as the merged batches: base clock within 0.05 GHz, TDP within 1 W, L3 must be a real cache capacity and must not equal the row's own TDP.
Spot-checked against known parts, all correct:
Older families were left empty on purpose. Core 2 E-series, Atom N270 and early Opteron rows did not pass the cross-check, so nothing was written for them rather than guessed — which is why no 65 nm or 130 nm values appear here at all.
All 4 source pages HTTP-verified; every record cites the page it came from.
python -m app.validate→ Data validation passed. Dump refreshed for the 210 changed pages only.Closes #1