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70 changes: 70 additions & 0 deletions CLAUDE.md
Original file line number Diff line number Diff line change
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# CLAUDE.md

This file provides guidance to Claude Code (claude.ai/code) when working with code in this repository.

## Project Overview

CACTI 7.0 (with CACTI-3DD extensions) is a cache/memory access time, cycle time, area, leakage, and dynamic power model. Originally from HP Labs, it models SRAM, eDRAM, DRAM, and non-volatile memory for architectural simulation. It is used as a library by McPAT (power modeling tool) and as a standalone tool.

## Build Commands

```bash
make # Debug build (default), output: ./cacti, objects in obj_dbg/
make dbg # Same as above
make opt # Optimized build, objects in obj_opt/
make clean # Clean all builds
```

The build uses `g++-13 -m64`. Debug builds use `-O0 -DNTHREADS=1`. Optimized builds use `-msse2 -DNTHREADS=8` (configurable via `NTHREADS` env var).

## Running

```bash
./cacti -infile cache.cfg # Run with a config file
./cacti -infile dram.cfg # DRAM configuration
```

Sample configs: `cache.cfg`, `dram.cfg`, `ddr3.cfg`, `lpddr.cfg`, and files under `sample_config_files/`. Regression tests are listed in `regression.test` (references configs in `test_configs/`).

## Architecture

**Entry point**: `main.cc` parses CLI args and calls `cacti_interface()` (defined in `cacti_interface.cc`).

**Key interfaces** (`cacti_interface.h`):
- `cacti_interface(string infile)` — config file interface
- `cacti_interface(InputParameter*)` — programmatic interface used by McPAT
- `init_interface(InputParameter*)` — McPAT integration point
- Multiple overloads with 52/54/63 positional args for different memory types (standard, NUCA, 3D DRAM)

**Core modeling pipeline**:
- `InputParameter` (in `cacti_interface.h`) — holds all configuration; `parse_cfg()` reads `.cfg` files
- `technology.cc` + `tech_params/*.dat` — technology parameters per node (16nm–180nm)
- `Ucache.cc` — top-level cache organization search; iterates over array partitioning parameters (Ndwl, Ndbl, Nspd, etc.) to find optimal design
- `uca.cc`/`uca.h` — Unified Cache Architecture modeling
- `bank.cc`/`mat.cc`/`subarray.cc` — hierarchical memory structure: banks contain mats, mats contain subarrays
- `htree2.cc` — H-tree interconnect modeling (address/data routing within banks)
- `decoder.cc` — row/column decoder modeling
- `wire.cc` — wire delay/power models for different wire types (global, semi-global, low-swing, etc.)
- `nuca.cc` — Non-Uniform Cache Architecture modeling with `router.cc`, `crossbar.cc`, `arbiter.cc`

**I/O and DRAM extensions**:
- `extio.cc`/`extio_technology.cc` — external I/O interface modeling (DDR3, DDR4, LPDDR2, WideIO, Serial)
- `memorybus.cc` — memory bus modeling
- `memcad.cc`/`memcad_parameters.cc` — MemCAD memory system design space exploration
- `TSV.cc` — Through-Silicon Via modeling for 3D DRAM (CACTI-3DD)
- `powergating.cc` — power gating support for sleep transistors

**Global state**: `parameter.h` defines `TechnologyParameter` (aliased as `g_tp`) — a large global struct holding all technology-specific electrical parameters, populated from `tech_params/*.dat` files.

**Output types**: `uca_org_t` is the primary result struct containing access_time, cycle_time, area, power, and detailed breakdowns for both tag and data arrays. `IO_org_t` holds I/O interface results.

## Config File Format

Config files use `-key value` syntax with `//` comments. Lines starting with `//` are ignored. Key parameters: `-size (bytes)`, `-block size (bytes)`, `-associativity`, `-technology (u)`, `-cache type` ("cache"/"ram"/"main memory"). See `cache.cfg` for a fully documented example.

## Code Conventions

- C++ without namespaces (uses `using namespace std` globally)
- No formal test framework; validation is done via regression configs in `regression.test`
- Header/source pairs: `foo.h`/`foo.cc` pattern throughout
- Build produces objects in `obj_dbg/` or `obj_opt/` directories
4 changes: 4 additions & 0 deletions README
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@@ -1,3 +1,7 @@
*io.cc, extio.h/cc were modified to output Cacti IO values
io.cc - output_data_csv() to output CACTI IO
extio.h/cc - to return values rather than just print

-----------------------------------------------------------


Expand Down
24 changes: 12 additions & 12 deletions basic_circuit.cc
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Expand Up @@ -899,20 +899,20 @@ double shortcircuit(
double vdd)
{

double p_short_circuit=0, p_short_circuit_discharge=0;//, p_short_circuit_charge, p_short_circuit_discharge_low, p_short_circuit_discharge_high, p_short_circuit_charge_low, p_short_circuit_charge_high; //this is actually energy
double /*fo_n,*/ fo_p, fanout, beta_ratio /*,vt_to_vdd_ratio*/;
double f_alpha, k_v, e, g_v_alpha, h_v_alpha;
double p_short_circuit=0;//, p_short_circuit_discharge=0, p_short_circuit_charge, p_short_circuit_discharge_low, p_short_circuit_discharge_high, p_short_circuit_charge_low, p_short_circuit_charge_high; //this is actually energy
//double /*fo_n,*/ fo_p, fanout, beta_ratio /*,vt_to_vdd_ratio*/;
//double f_alpha, k_v, e, g_v_alpha, h_v_alpha;

///fo_n = i_on_n/i_on_n_in;
fo_p = i_on_p/i_on_p_in;
fanout = 1;
beta_ratio = i_on_p/i_on_n;
//fo_p = i_on_p/i_on_p_in;
//fanout = 1;
//beta_ratio = i_on_p/i_on_n;
///vt_to_vdd_ratio = vt/vdd;
e = 2.71828;
f_alpha = 1/(velocity_index+2) -velocity_index/(2*(velocity_index+3)) +velocity_index/(velocity_index+4)*(velocity_index/2-1);
k_v = 0.9/0.8+(vdd-vt)/0.8*log(10*(vdd-vt)/e);
g_v_alpha = (velocity_index + 1)*pow((1-velocity_index),velocity_index)*pow((1-velocity_index),velocity_index/2)/f_alpha/pow((1-velocity_index-velocity_index),(velocity_index/2+velocity_index+2));
h_v_alpha = pow(2, velocity_index)*(velocity_index+1)*pow((1-velocity_index),velocity_index)/pow((1-velocity_index-velocity_index),(velocity_index+1));
//e = 2.71828;
//f_alpha = 1/(velocity_index+2) -velocity_index/(2*(velocity_index+3)) +velocity_index/(velocity_index+4)*(velocity_index/2-1);
//k_v = 0.9/0.8+(vdd-vt)/0.8*log(10*(vdd-vt)/e);
//g_v_alpha = (velocity_index + 1)*pow((1-velocity_index),velocity_index)*pow((1-velocity_index),velocity_index/2)/f_alpha/pow((1-velocity_index-velocity_index),(velocity_index/2+velocity_index+2));
//h_v_alpha = pow(2, velocity_index)*(velocity_index+1)*pow((1-velocity_index),velocity_index)/pow((1-velocity_index-velocity_index),(velocity_index+1));

//p_short_circuit_discharge_low = 10/3*(pow(0.5-vt_to_vdd_ratio,3.0)/pow(velocity_index,2.0)/pow(2.0,3*vt_to_vdd_ratio*vt_to_vdd_ratio))*c_in*vdd*vdd*fo_p*fo_p/fanout/beta_ratio;
// p_short_circuit_discharge_low = 10/3*(pow(((vdd-vt)-vt_to_vdd_ratio),3.0)/pow(velocity_index,2.0)/pow(2.0,3*vt_to_vdd_ratio*vt_to_vdd_ratio))*c_in*vdd*vdd*fo_p*fo_p/fanout/beta_ratio;
Expand All @@ -936,7 +936,7 @@ double shortcircuit(
//
// p_short_circuit = p_short_circuit_discharge;

p_short_circuit_discharge = k_v*vdd*vdd*c_in*fo_p*fo_p/((vdd-vt)*g_v_alpha*fanout*beta_ratio/2/k_v + h_v_alpha*fo_p);
//p_short_circuit_discharge = k_v*vdd*vdd*c_in*fo_p*fo_p/((vdd-vt)*g_v_alpha*fanout*beta_ratio/2/k_v + h_v_alpha*fo_p);
return (p_short_circuit);
}

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10 changes: 4 additions & 6 deletions cacti.mk
Original file line number Diff line number Diff line change
Expand Up @@ -13,16 +13,16 @@ INCS = -lm

ifeq ($(TAG),dbg)
DBG = -Wall
OPT = -ggdb -g -O0 -DNTHREADS=1 -gstabs+
OPT = -ggdb -g -O0 -DNTHREADS=1
else
DBG =
OPT = -g -msse2 -mfpmath=sse -DNTHREADS=$(NTHREADS)
endif

#CXXFLAGS = -Wall -Wno-unknown-pragmas -Winline $(DBG) $(OPT)
CXXFLAGS = -Wno-unknown-pragmas $(DBG) $(OPT)
CXX = g++ -m64
CC = gcc -m64
CXX = g++-13 -m64
CC = gcc-13 -m64

SRCS = area.cc bank.cc mat.cc main.cc Ucache.cc io.cc technology.cc basic_circuit.cc parameter.cc \
decoder.cc component.cc uca.cc subarray.cc wire.cc htree2.cc extio.cc extio_technology.cc \
Expand All @@ -48,6 +48,4 @@ obj_$(TAG)/%.o : %.cc
$(CXX) $(CXXFLAGS) -c $< -o $@

clean:
-rm -f *.o _cacti.so cacti.py $(TARGET)


-rm -f *.o _cacti.so cacti.py $(TARGET)
2 changes: 1 addition & 1 deletion crossbar.cc
Original file line number Diff line number Diff line change
Expand Up @@ -143,7 +143,7 @@ void Crossbar::compute_power()
double cap = g_tp.wire_outside_mat.C_per_um * (area.w + area.h) + n_out*tri_inp_cap + n_inp*tri_out_cap;
delay = horowitz(w1.signal_rise_time(), res*cap, deviceType->Vth/deviceType->Vdd, deviceType->Vth/deviceType->Vdd, RISE);

Wire wreset();
Wire wreset;
}

void Crossbar::print_crossbar()
Expand Down
20 changes: 11 additions & 9 deletions extio.cc
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ io_param(iot){}

//External IO AREA. Does not include PHY or decap, includes only IO active circuit. More details can be found in the CACTI-IO technical report (), Chapter 2.3.

void Extio::extio_area()
double Extio::extio_area()
{

//Area per IO, assuming drive stage and ODT are shared
Expand All @@ -35,12 +35,12 @@ void Extio::extio_area()

printf("IO Area (sq.mm) = ");
cout << io_area << endl;

return io_area;
}

//External IO Termination Power. More details can be found in the CACTI-IO technical report (), Chapter 2.1.

void Extio::extio_power_term()
double Extio::extio_power_term()
{

//IO Termination and Bias Power
Expand Down Expand Up @@ -128,12 +128,13 @@ void Extio::extio_power_term()

printf("IO Termination and Bias Power (mW) = ");
cout << io_power_term << endl;
return io_power_term;
}


//External PHY Power and Wakeup Times. More details can be found in the CACTI-IO technical report (), Chapter 2.1.

void Extio::extio_power_phy ()
double Extio::extio_power_phy ()
{


Expand Down Expand Up @@ -179,13 +180,13 @@ void Extio::extio_power_phy ()
cout << phy_power << " ";
printf("PHY Wakeup Time (us) = ");
cout << phy_wtime << endl;

return phy_power;
}


//External IO Dynamic Power. Does not include termination or PHY. More details can be found in the CACTI-IO technical report (), Chapter 2.1.

void Extio::extio_power_dynamic()
double Extio::extio_power_dynamic()
{

if (io_param->io_type == Serial)
Expand Down Expand Up @@ -345,12 +346,13 @@ void Extio::extio_power_dynamic()

printf("IO Dynamic Power (mW) = ");
cout << io_power_dynamic << " ";
return io_power_dynamic;
}


//External IO Timing and Voltage Margins. More details can be found in the CACTI-IO technical report (), Chapter 2.2.

void Extio::extio_eye()
double Extio::extio_eye()
{

if (io_param->io_type == Serial)
Expand Down Expand Up @@ -500,7 +502,7 @@ void Extio::extio_eye()

printf("IO Timing Margin (ps) = ");
cout << io_tmargin <<endl;
printf("IO Votlage Margin (V) = ");
printf("IO Voltage Margin (V) = ");
cout << io_vmargin << endl;

return io_tmargin;
}
10 changes: 5 additions & 5 deletions extio.h
Original file line number Diff line number Diff line change
Expand Up @@ -10,11 +10,11 @@ class Extio : public Component

Extio(IOTechParam *);

void extio_area();
void extio_eye();
void extio_power_dynamic();
void extio_power_phy();
void extio_power_term();
double extio_area();
double extio_eye();
double extio_power_dynamic();
double extio_power_phy();
double extio_power_term();

private:
IOTechParam *io_param;
Expand Down
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