Release v1.1.0 — AMD backend, CUDA fmt=4 correctness, tool-calling root cause, security hardening, +4.7x CPU, dual-SSD

.clang-format

@@ -0,0 +1,10 @@
+BasedOnStyle: LLVM
+IndentWidth: 4
+ColumnLimit: 120
+AllowShortFunctionsOnASingleLine: All
+AllowShortIfStatementsOnASingleLine: AllIfsAndElse
+AllowShortLoopsOnASingleLine: true
+BreakBeforeBraces: Attach
+PointerAlignment: Right
+SpaceAfterCStyleCast: false
+SortIncludes: false

.editorconfig

@@ -0,0 +1,24 @@
+root = true
+
+[*]
+charset = utf-8
+end_of_line = lf
+insert_final_newline = true
+trim_trailing_whitespace = true
+indent_style = space
+indent_size = 4
+
+[*.{c,h,cu}]
+indent_size = 4
+
+[*.{ts,tsx,js,json,css}]
+indent_size = 2
+
+[Makefile]
+indent_style = tab
+
+[*.yml]
+indent_size = 2
+
+[*.md]
+trim_trailing_whitespace = false

.github/workflows/ci.yml

@@ -12,8 +12,8 @@ jobs:
     runs-on: ubuntu-latest
     steps:
       - uses: actions/checkout@v4
-      - name: Build glm
-        run: cd c && make glm
+      - name: Build colibri
+        run: cd c && make colibri
       - name: C test suite
         run: cd c && make test-c
 
@@ -41,6 +41,27 @@ jobs:
             -Xcompiler=-Wall,-Wextra
           echo "CUDA syntax check passed"
 
+  engine-hip-syntax:
+    name: HIP syntax check
+    runs-on: ubuntu-latest
+    steps:
+      - uses: actions/checkout@v4
+      - name: Free runner disk
+        # rocm/dev images are large; hosted runners need the headroom freed
+        # BEFORE the pull (which is why this is not a container: job).
+        run: sudo rm -rf /usr/share/dotnet /usr/local/lib/android /opt/ghc /opt/hostedtoolcache/CodeQL
+      - name: Compile backend_cuda.cu + test binary with hipcc (no GPU)
+        run: |
+          # Tag pinned: `latest` outgrew the runner disk once already. The
+          # gcc-side engine link is skipped: containerized gcc/ld cannot link
+          # ROCm runtime libs (both 22.04 and 24.04 bases); the hipcc-driver
+          # link of the test binary below covers the single-source claim, and
+          # the engine link is exercised on real ROCm hardware (GPU_BACKENDS.md).
+          docker run --rm -v "$PWD":/src -w /src rocm/dev-ubuntu-24.04:6.2 bash -c '
+            apt-get update && apt-get install -y --no-install-recommends make gcc g++ &&
+            make -C c gpu-compile HIP=1 HIP_ARCH=gfx1100'
+          echo "HIP syntax check passed"
+
   windows-cuda-build:
     # The Windows CUDA path has no coverage anywhere: `engine-cuda-syntax` above
     # compiles with nvcc's *GCC* host on Linux, and check.yml's windows job is
@@ -105,13 +126,13 @@ jobs:
           make cuda-dll CUDA_ARCH=sm_80
           test -f coli_cuda.dll || { echo "cuda-dll reported success but produced no DLL" >&2; exit 1; }
           echo "coli_cuda.dll built (MSVC host)"
-      - name: make glm CUDA_DLL=1 (host links backend_loader, not cudart)
+      - name: make colibri CUDA_DLL=1 (host links backend_loader, not cudart)
         shell: msys2 {0}
         run: |
           cd c
-          make glm CUDA_DLL=1
-          test -f glm.exe || { echo "glm CUDA_DLL=1 reported success but produced no exe" >&2; exit 1; }
-          echo "glm.exe built against the DLL loader"
+          make colibri CUDA_DLL=1
+          test -f colibri.exe || { echo "colibri CUDA_DLL=1 reported success but produced no exe" >&2; exit 1; }
+          echo "colibri.exe built against the DLL loader"
 
   web:
     name: Web UI

.github/workflows/release.yml

@@ -59,7 +59,12 @@ jobs:
         run: |
           TAG=${GITHUB_REF#refs/tags/}
           mkdir -p dist
-          cp c/glm${{ matrix.ext }} dist/colibri-${TAG}-${{ matrix.name }}${{ matrix.ext }}
+          # The engine goes in under its PLAIN name. `coli` locates the engine by looking for
+          # "colibri"/"colibri.exe" (then "glm") next to itself, so shipping it as
+          # colibri-<tag>-<platform>.exe made every downloaded archive fail with
+          # "engine is not built. Run: coli build" -- with the engine sitting right there.
+          # The version lives in the ARCHIVE name, which is where a downloader looks for it.
+          cp c/glm${{ matrix.ext }} dist/colibri${{ matrix.ext }}
           cp c/coli dist/
           cp c/version.py dist/
           cp c/openai_server.py dist/
@@ -73,10 +78,36 @@ jobs:
             tar czf colibri-${TAG}-${{ matrix.name }}.tar.gz *
           fi
 
+      # Unpack what we are about to publish, in a clean directory, and prove `coli` finds the
+      # engine. A packaging mistake is invisible to every other job in this repo: the build is
+      # green, the tests are green, and the artifact is still unusable. Assert on behaviour.
+      - name: Verify the packaged archive actually runs
+        run: |
+          TAG=${GITHUB_REF#refs/tags/}
+          mkdir -p verify && cd verify
+          if [ "${{ matrix.ext }}" = ".exe" ]; then
+            7z x ../dist/colibri-${TAG}-${{ matrix.name }}.zip > /dev/null
+          else
+            tar xzf ../dist/colibri-${TAG}-${{ matrix.name }}.tar.gz
+          fi
+          test -x colibri${{ matrix.ext }} || { echo "engine missing from archive"; ls -la; exit 1; }
+          out=$(python3 coli info 2>&1 || true)
+          echo "$out"
+          case "$out" in
+            *"engine is not built"*) echo "FAIL: coli cannot find the packaged engine"; exit 1 ;;
+          esac
+          echo "$out" | grep -q "colibri" || { echo "FAIL: coli did not run"; exit 1; }
+          echo "OK: coli locates the engine in the published archive"
+
+      # Only the archives -- never the loose files. `dist/colibri-*.*` used to work by accident
+      # (the engine was versioned, so it did not match); now that the engine is plainly named,
+      # be explicit about what gets published.
       - uses: actions/upload-artifact@v4
         with:
           name: colibri-${{ matrix.name }}
-          path: dist/colibri-*.*
+          path: |
+            dist/colibri-*.zip
+            dist/colibri-*.tar.gz
 
   release:
     needs: build

.gitignore

@@ -10,6 +10,8 @@ desktop/src-tauri/target/
 desktop/src-tauri/gen/
 
 # binari compilati (si rigenerano con make / coli build)
+c/colibri
+c/colibri.exe
 c/glm
 c/glm.exe
 c/olmoe
@@ -23,18 +25,12 @@ c/backend_loader.o
 c/coli_cuda.dll
 c/coli_cuda.lib
 c/coli_cuda.exp
-c/tests/test_json
-c/tests/test_json.exe
-c/tests/test_st
-c/tests/test_st.exe
-c/tests/test_tier
-c/tests/test_tier.exe
-c/tests/test_grammar
-c/tests/test_grammar.exe
-c/tests/test_schema_gbnf
-c/tests/test_schema_gbnf.exe
-c/tests/test_compat_direct
-c/tests/test_compat_direct.exe
+c/tests/test_*
+!c/tests/test_*.c
+!c/tests/test_*.cu
+!c/tests/test_*.mm
+!c/tests/test_*.py
+result
 
 # oracoli tiny generati (make_glm_oracle.py) e dati benchmark scaricati
 c/glm_tiny/
@@ -68,3 +64,7 @@ c/tests/test_decode_batch
 c/tests/test_i4_acc512
 c/tests/test_idot
 c/tests/test_uring
+olmoe_merged/
+olmoe_i4/
+c/olmoe_merged/
+c/olmoe_i4/

CHANGELOG.md

@@ -3,6 +3,83 @@
 All notable changes to colibrì are documented here.
 Format follows [Keep a Changelog](https://keepachangelog.com/).
 
+## [1.1.0] — 2026-07-22
+
+A community release. 27 pull requests from more than 20 contributors, 216 commits since
+v1.0.0. Most of what follows was found, measured, or fixed by people who do not work on
+this project and had nothing to gain from it.
+
+### Added
+
+- **AMD GPU support (HIP/ROCm)** (#339) — single-source `backend_gpu_compat.h` with a WMMA
+  dispatch gate, so one codebase builds for CUDA and HIP. Validated on an RX 9070 XT
+  (RDNA4, ROCm 7.2): token-exact against CPU on a real fmt=4 gs64 container, with resident
+  dense *and* with routed experts in VRAM, plus a fail-injection control proving the GPU
+  actually executed the work.
+- **Dual-SSD streaming** (`COLI_MODEL_MIRROR`, #421) — read the model from two drives at
+  once, roughly doubling streaming bandwidth on a disk-bound host.
+- **N-drive shard split** (`COLI_MODEL_DIRS`, #469) — capacity aggregation: run a container
+  no single drive can hold, spread across several with no duplication.
+- **fmt=5 (int3-g64)** (#168) — 3-bit weights with per-64 group scales: measured 3.3x lower
+  outlier-row error than per-row int4 at 25% fewer bytes.
+- **fmt=6 (E8/IQ3 lattice)** (#465) — CPU decode kernel and dispatch; index codec tooling (#458).
+- **`tools/try_tool_calling.py`** — dependency-free two-turn tool-calling probe that doubles
+  as a smoke test.
+
+### Fixed
+
+- **Tool calling in coding clients** (#401), root cause found, in two parts:
+  - **#506** — the engine capped prompt encoding at `CTX-2`, and the tokenizer stops dead at
+    its limit *without reporting anything*. A prompt longer than the context was therefore
+    silently truncated to its first `CTX-2` tokens and answered anyway. With the 4096 default
+    that is 4094 — exactly the `prefill 4094` in the field report. The dropped tail was the
+    tool instructions and the user's actual turn, so the model emitted a bare `<` and stopped;
+    and because clients append to the *end* while truncation keeps the *head*, every retry
+    re-sent a byte-identical prompt. Now refused with a 400 `context_length_exceeded`.
+  - **#505** — a tool call whose closing `</tool_call>` never arrived was dropped whole,
+    because the parser required both tags. Now recovered when unambiguous, on both the
+    streamed and non-streamed paths.
+  - **#437** — non-EOS role markers were armed as hard stops in serve mode and cut generation
+    the instant a tool block started.
+- **Grouped-int4 (fmt=4) produced garbage output on CUDA** with `CUDA_DENSE=1` (#298) — the
+  dense and attention kernels applied per-group scales as if they were per-row. Hardware-verified.
+- **OpenMP tuning re-exec preserved the CPU affinity mask** (#476), jailing every thread onto
+  one core when `OMP_PROC_BIND`/`OMP_PLACES` were set: roughly a 20x slowdown.
+- **Pilot eviction guard dropped ~100% of speculations** once the cache filled (#497),
+  collapsing `PILOT_REAL` to a hint-only path.
+- **Silent budget clamp** capped the CUDA expert tier at ~109 experts regardless of
+  `CUDA_EXPERT_GB` (#495).
+- fmt=4 guard at the per-row-only CUDA entry points (#464/#470); `COLI_CUDA_MTP=1` and
+  `COLI_CUDA=0` are now honoured over implicit defaults (#468).
+
+### Security
+
+Threat model: model files come from mirrors that are not trusted.
+
+- **#368** — server hardening, JSON and tokenizer parser hardening, build flags, downloader
+  and dependency pinning.
+- **#413** — the quant layout is resolved *and* validated against the on-disk byte counts
+  (unknown layouts are refused rather than falling through to int2), shape-product overflow
+  is rejected, and the olmoe dtype-3 path no longer trusts a crafted `nbytes` (heap overflow).
+
+### Performance — all byte-identical
+
+- **#481** +4.7x on the MLA-absorb score and value-mix reductions
+- **#477** +13% decode on AVX-512 (`qt_addrow` / `qt_matvec_rows`)
+- **#475** +11.6% with opt-in `XEXP=1` (one OpenMP region per expert block at S=1 full residency)
+- **#473** +5.5% int4 IDOT at S=1 on AVX-512 VNNI
+
+### Changed
+
+- `glm.c` is now `colibri.c` plus header modules (#391); `make glm` remains as an alias.
+- Serve stage 2 (#192): `response_format`, per-request grammars, grammar-forced drafts.
+
+### Upgrade notes
+
+- **`CTX` still defaults to 4096.** Coding clients send far more than that in a single system
+  prompt. Use `CTX=32768`. Before this release an over-long prompt was silently truncated;
+  now you get a clear 400 instead.
+
 ## [1.0.0] — 2026-07-19
 
 First tagged release. The engine has been running in production since late June

GPU_BACKENDS.md

@@ -0,0 +1,85 @@
+# GPU backends: CUDA and HIP/ROCm
+
+colibrì's GPU expert backend is **one source file** (`c/backend_cuda.cu`) compiled
+for either vendor through `c/backend_gpu_compat.h` — the same one-shim-header
+pattern `compat.h` uses for the Windows port. Compiled by nvcc the shim is a
+pass-through to `cuda_runtime.h` (the NVIDIA path is byte-identical to the
+pre-HIP tree); compiled by hipcc it maps the 14-symbol CUDA runtime surface the
+backend uses onto HIP 1:1. The kernels use only shared syntax
+(`__global__`, `__shared__`, `__syncthreads__`, `<<<>>>`), no vendor intrinsics.
+
+**Rule for contributors:** vendor differences go in `backend_gpu_compat.h`
+only — never `#ifdef __HIP__` (or CUDA-specific code) in `backend_cuda.cu`.
+
+## Supported environments
+
+| backend | platform | toolchain | build |
+|---|---|---|---|
+| CUDA (`CUDA=1`) | Linux x86-64 | CUDA toolkit (nvcc), `CUDA_HOME=/usr/local/cuda` default | `make -C c glm CUDA=1 [CUDA_ARCH=native\|sm_XX]` |
+| HIP (`HIP=1`) | Linux x86-64 | ROCm (hipcc), `ROCM_HOME=/opt/rocm` default; tested on ROCm 7.2 | `make -C c glm HIP=1 [HIP_ARCH=native\|gfxXXXX]` |
+
+`CUDA=1` and `HIP=1` are mutually exclusive and both opt-in: the default build
+remains pure, dependency-free CPU. Both are refused on non-Linux with an early
+`$(error)`. `*_ARCH=native` targets the local GPU; pass an explicit arch when
+distributing or on machines with an unsupported iGPU visible to the runtime
+(and mask iGPUs at runtime with `HIP_VISIBLE_DEVICES=<ordinal>` on ROCm).
+
+## Runtime configuration (identical for both vendors)
+
+- `COLI_CUDA=1` + `COLI_GPU=N` (or `COLI_GPUS=0,1,...`) — enable, select devices
+- `CUDA_EXPERT_GB=G` — VRAM budget for the expert tier (clamped to free VRAM
+  minus projected dense set and 2 GB headroom per device)
+- `CUDA_RELEASE_HOST=1` — GPU-tier experts drop their host backing after
+  upload (default on multi-GPU); combined with `PIN=auto`/`PIN_FILL`, VRAM
+  becomes additional pinned capacity at zero RAM cost. The engine
+  rematerializes an expert from disk (`expert_host_ensure`) whenever the CPU
+  path needs one whose host copy was released — validated under total GPU
+  failure below.
+- `CUDA_DENSE=1` — experimental resident-dense path (unchanged)
+- `COLI_CUDA_TC_W4A16=1` — opt-in W4A16 tensor-core path. **NVIDIA-only**:
+  the WMMA kernels are compile-gated (`COLI_GPU_HAS_WMMA` in the compat
+  header) because gfx GPUs report `compute_major >= 7` and a runtime check
+  alone would select empty kernel bodies under HIP. On AMD, all compute uses
+  the portable kernels; rocWMMA matrix-core support is a possible follow-up.
+
+## Validation
+
+### Unit tests (run on GPU hardware)
+
+```sh
+make -C c cuda-test [CUDA_ARCH=...]    # NVIDIA
+make -C c hip-test  [HIP_ARCH=...]     # AMD (same test source)
+```
+
+Covers q8/q4/q2/f32 matmul correctness, multi-device placement/stats, and
+`tensor_update` — the standard upstream suite, unchanged, compiled by hipcc.
+(A companion PR adds failure-path tests for the backend; they are
+vendor-neutral and run under `hip-test` identically.)
+
+### CI (no GPU required)
+
+The `engine-hip-syntax` job in `.github/workflows/ci.yml` compiles the
+backend and its test binary with hipcc (`rocm/dev` container pinned to
+`6.2`, `gfx1100`) on every PR, mirroring `engine-cuda-syntax`. Kernel
+*execution* is not possible on hosted runners; that is what `hip-test`
+on real hardware is for (matrix below).
+
+### Hardware test matrix (documented results)
+
+| environment | result |
+|---|---|
+| AMD RX 9070 XT (gfx1201), ROCm 7.2.4, Linux 7.0 | `hip-test` **pass** (all cases above); GLM-5.2 end-to-end runs (0.32 tok/s @ 61% expert hit with CUDA_RELEASE_HOST=1); benchmark series in PR #112 |
+| NVIDIA | compile-verified in CI (`sm_80`); nvcc path is a pass-through include — **runtime run of `make cuda-test` on NVIDIA hardware welcomed**, the test source is vendor-neutral |
+
+## Known behavior notes
+
+- GPU float matmuls round differently than the CPU int8-dot (IDOT) kernels:
+  greedy output is **not token-identical** across backends (consistent with
+  the shape-dependence documented in #100), and MTP draft acceptance measures
+  lower on GPU-heavy configs (~40% → ~31% on the PR #112 machine). A
+  numerics-matched integer GPU kernel is the planned follow-up.
+- An earlier revision of this branch carried `CUDA_EXTEND=1` (VRAM tier
+  holding experts beyond the RAM pin). It was superseded by upstream's
+  `PIN=auto` + `PIN_FILL` + `CUDA_RELEASE_HOST`, which achieve the same
+  capacity extension with deeper engine integration; this branch's safety
+  and validation work now targets that mechanism.