Skip to content

Releases: MichTronics/Rivr

Rivr v0.2.1

11 May 10:59

Choose a tag to compare

Full Changelog: v0.2.0...v0.2.1

Full Changelog: v0.2.0...v0.2.1

Rivr v0.2.0

26 Apr 01:14

Choose a tag to compare

Full Changelog: v0.1.0...v0.2.0

Rivr v0.1.0

22 Mar 20:39

Choose a tag to compare

🚀 Rivr Public Beta — First Firmware Release

We’re excited to release the first public beta of Rivr — a lightweight LoRa mesh networking layer built for embedded systems.

✨ Highlights
⚡ Zero heap allocations after boot (stable by design)
🔁 Reliable multi-hop routing
📡 EU868 duty-cycle aware transmission
🧠 Dataflow-based node logic (not just packet forwarding)
🧠 What makes Rivr different

Most mesh networks move packets.
Rivr moves logic.

Instead of pushing all complexity to the application layer, nodes can execute lightweight logic within the network itself — enabling smarter routing, filtering, and behavior at the edge.

🧪 Status

This is an early public beta. The core networking stack is functional, but expect bugs, edge cases, and ongoing protocol evolution.

🧰 Supported Hardware
ESP32 + SX1262 / SX1276
Tested on common dev boards (Heltec / E22 variants)
📢 Feedback Wanted

We’re actively looking for real-world testing:

Range & routing behavior
Duty-cycle performance
Stability under load

If you encounter issues, please include logs or a SUPPORTPACK.

👉 This is just the beginning — Rivr is built to push embedded mesh networking beyond traditional designs.

Full Changelog: https://github.com/MichTronics/Rivr/commits/v0.1.0

Full Changelog: https://github.com/MichTronics/Rivr/commits/v0.1.0

Full Changelog: https://github.com/MichTronics/Rivr/commits/v0.1.0

Full Changelog: https://github.com/MichTronics/Rivr/commits/v0.1.0

Full Changelog: https://github.com/MichTronics/Rivr/commits/v0.1.0

Full Changelog: https://github.com/MichTronics/Rivr/commits/v0.1.0

Full Changelog: https://github.com/MichTronics/Rivr/commits/v0.1.0

Full Changelog: https://github.com/MichTronics/Rivr/commits/v0.1.0

Full Changelog: https://github.com/MichTronics/Rivr/commits/v0.1.0

Full Changelog: https://github.com/MichTronics/Rivr/commits/v0.1.0

Full Changelog: https://github.com/MichTronics/Rivr/commits/v0.1.0

Full Changelog: https://github.com/MichTronics/Rivr/commits/v0.1.0

Full Changelog: https://github.com/MichTronics/Rivr/commits/v0.1.0

Full Changelog: https://github.com/MichTronics/Rivr/commits/v0.1.0

Full Changelog: https://github.com/MichTronics/Rivr/commits/v0.1.0

Full Changelog: https://github.com/MichTronics/Rivr/commits/v0.1.0

Full Changelog: https://github.com/MichTronics/Rivr/commits/v0.1.0

Full Changelog: https://github.com/MichTronics/Rivr/commits/v0.1.0

Full Changelog: https://github.com/MichTronics/Rivr/commits/v0.1.0

Full Changelog: https://github.com/MichTronics/Rivr/commits/v0.1.0

Full Changelog: https://github.com/MichTronics/Rivr/commits/v0.1.0

Full Changelog: https://github.com/MichTronics/Rivr/commits/v0.1.0