Characterize AMD XDNA bfp16ebs8 block-8 semantics on silicon

[aravishankar-mp]

Part of #110.

Question

What exact numerical contract does XDNA2 bfp16ebs8 implement on the reference NPU, and can one
TOSA/OCP-style block-32 MXINT8 value be mapped into four block-8 groups without changing results?

This ticket advertises nothing. bfp16ebs8 is an AMD vendor block-8 shared-exponent format, not
ordinary FP16/BF16 and not the TOSA 1.1-draft block-32 MX contract. Background and current official
status: docs/research/tosa-int8-block-fp-status.md.

Required probes

• Freeze the element encoding, shared-exponent encoding/alignment, block ordering, and byte layout.
• Measure rounding, normalization, saturation/overflow, signed zero, subnormals, infinities, and
  NaNs from host-generated edge vectors.
• Compare native block-8 results with a pinned block-32 E8M0 + MXINT8 reference model across cases
  where the four sub-block exponents agree and disagree.
• Determine whether the hardware exposes conversion, MATMUL, or both, and whether accumulation is
  integer, BF16, FP32, or another documented contract.
• Record exact toolchain/runtime/device revisions and preserve minimal backend-local artifacts for
  repeatable on-metal testing.

Exit criteria

• A cited research note and bit-level reference model describe the observed vendor format.
• On-metal tests distinguish exact matches from mismatches with the pinned MX hypothesis.
• The result explicitly chooses one of: exact MX mapping, transform with documented loss, or
  distinct vendor-only contract.
• No public TOSA Target, extension bit, TosaCapabilityProvider row, or stable protocol value is
  added by this ticket.

[aravishankar-mp]

Probes complete; exit criteria met. Verdict: exact MX mapping, with three conditions recorded in docs/research/amdxdna-bfp16ebs8-characterization.md §6a: quantization must run under rnd_conv_even (hardware default is rnd_floor), e = 255 blocks (structural Inf/NaN) are outside MXINT8's domain, and exactness is proven for integer-exact FP32 accumulation envelopes.

Evidence: probes P0–P5 on the reference 1022:17f0 NPU (PR #161), raw outputs and compiled artifacts preserved under research/bfp16ebs8/, plus a bit-level reference model (runner/src/model.rs) whose unit tests replay the silicon planes — verifiable without an NPU — and which the live probes cross-validate bit-identically on eleven cases.

Two nuances the model surfaced, both documented: floor-rounding can emit m = −128 even though normalization never targets it; and at exact mantissa ±127.5 the hardware converter renormalizes while OCP quantization saturates, so an MXINT8 tier must quantize with the OCP procedure at that boundary.

Also material to #145: this AIE API's mx4/mx6/mx9 family is block-16 and AIE-MLv2-only — XDNA2 has no native MX type, so any released block-32 contract executes through exactly the decomposition proven here. Closing after PR #161 merges; #148 is unblocked by this verdict.