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fix(intrinsics): admit scalar arithmetic on sm_75 - #1725

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ssoj13:nvidia/fix/scalar-arithmetic-sm75

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@ssoj13 ssoj13 commented Nov 3, 2026

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The scalar_arithmetic recipe floored every F32/F64 form at PTX 7.0 / sm_80, so mul_rn_f32, fma_rn_f32, div_rn_f32, add_rn_f32 and the remaining rounded, .ftz, and .sat variants failed target gating on sm_75. The PTX ISA admits these scalar arithmetic instructions on sm_20 or older, and sm_75 is the oldest target CUDA 13 ptxas assembles, so PTX 7.0 / sm_75 is the lowest floor the evidence can attest, matching scalar_math (#1670).

The LLVM evidence is re-probed at sm_75 / +ptx70 with the pinned llc and ptxas 13.3.73. The libNVVM evidence is re-captured at compute_75, assembled with ptxas 13.3.33 and linked with nvJitLink at sm_75. The regenerated outputs change only the scalar_arithmetic floors and the catalog digest banners (updating the mlir-dialects book stamp to 53f2c1d8).

A generator test pins the sm_75 floor across all 64 forms and rejects sm_80 and sm_72. A codegen test checks every scalar_arithmetic target on both backends and the #1462 mul_rn_f32 and fma_rn_f32 repros at CUDA_OXIDE_TARGET=sm_75. The new scalar_arithmetic_sm75 example calls all 64 forms and checks their directed rounding and saturation behaviour. examples-compile builds it at sm_75 as PTX and as a libNVVM + nvJitLink cubin.

Supersedes #1512
Refs #1462

The scalar_arithmetic recipe floored every F32/F64 form at PTX 7.0 / sm_80,
so `mul_rn_f32`, `fma_rn_f32`, `div_rn_f32`, `add_rn_f32` and the remaining
rounded, `.ftz`, and `.sat` variants failed target gating on sm_75. The PTX
ISA admits these scalar arithmetic instructions on sm_20 or older, and sm_75
is the oldest target CUDA 13 ptxas assembles, so PTX 7.0 / sm_75 is the
lowest floor the evidence can attest, matching `scalar_math` (NVIDIA#1670).

The LLVM evidence is re-probed at sm_75 / +ptx70 with the pinned llc and
ptxas 13.3.73. The libNVVM evidence is re-captured at compute_75, assembled
with ptxas 13.3.33 and linked with nvJitLink at sm_75. The regenerated
outputs change only the scalar_arithmetic floors and the catalog digest
banners (updating the mlir-dialects book stamp to 53f2c1d8).

A generator test pins the sm_75 floor across all 64 forms and rejects sm_80
and sm_72. A codegen test checks every scalar_arithmetic target on both
backends and the NVIDIA#1462 `mul_rn_f32` and `fma_rn_f32` repros at
CUDA_OXIDE_TARGET=sm_75. The new scalar_arithmetic_sm75 example calls all
64 forms and checks their directed rounding and saturation behaviour.
examples-compile builds it at sm_75 as PTX and as a libNVVM + nvJitLink
cubin.

Refs NVIDIA#1462

Signed-off-by: Alex Khalyavin <joss13@gmail.com>
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