Skip to content
Merged
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
22 changes: 13 additions & 9 deletions tests/sim/testbenches/low_voltage_cmirror.spice
Original file line number Diff line number Diff line change
@@ -1,8 +1,8 @@
* Testbench: low-voltage cascode current mirror
* low_voltage_cmirror ports: IBIAS1 IBIAS2 GND IOUT1 IOUT2
* IBIAS1 is the reference input node; IBIAS2 is an internally-generated
* second-tier bias (left to float to its own operating point); IOUT1/IOUT2
* are the two mirrored output branches.
* subckt name: Low_voltage_current_mirror (filename stem is low_voltage_cmirror)
* ports: IBIAS1 IBIAS2 GND IOUT1 IOUT2
* IBIAS1 and IBIAS2 are BOTH reference-current inputs (main + cascode bias);
* IOUT1/IOUT2 are the two mirrored output branches.
*
* Functional check: push a reference current into IBIAS1 and confirm both
* output branches sink ~the same current (1:1 mirror) when held at mid-rail.
Expand All @@ -13,17 +13,21 @@
* point is delicate -- calibrate the check bands against a golden ngspice run.
.param VDD=1.8
.param IREF=10u
* Reference current into the IBIAS1 node.
Iref 0 IBIAS1 DC {IREF}
* This cell has TWO bias-current inputs: IBIAS1 (main mirror) and IBIAS2
* (cascode level -- it is the Ib node of the second FVF and gates X4/X5).
* Both must be driven, or the output cascodes are starved and sink ~0.
* IBIAS2's value sets the cascode bias and may need a different magnitude
* than IREF -- calibrate against a golden run.
Iref 0 IBIAS1 DC {IREF}
Iref2 0 IBIAS2 DC {IREF}
* Outputs held near mid-rail through ammeters; i(vmX) is the sunk mirror current.
Vsup DD 0 DC 0.9
Vm1 DD IOUT1 DC 0
Vm2 DD IOUT2 DC 0
* DUT: IBIAS1 IBIAS2 GND IOUT1 IOUT2
* GND port tied straight to node 0 (no source -- a 0 V source here both ends
* on ground reads as a shorted VSRC and aborts the analysis). IBIAS2 left on
* its own net.
X1 IBIAS1 net_ibias2 0 IOUT1 IOUT2 low_voltage_cmirror
* on ground reads as a shorted VSRC and aborts the analysis).
X1 IBIAS1 IBIAS2 0 IOUT1 IOUT2 Low_voltage_current_mirror
.dc Iref 2u 20u 1u
.measure dc iout1_op FIND i(vm1) AT=10u
.measure dc iout2_op FIND i(vm2) AT=10u
Expand Down
Loading